17126 lines
1.0 MiB
17126 lines
1.0 MiB
; --------------------------------------------------------------------------------
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; @Title: HT32F491x3 On-Chip Peripherals
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; @Props: Released
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; @Author: KRZ
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; @Changelog: 2024-08-02 KRZ
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; @Manufacturer: HOLTEK - HOLTEK Semiconductor Inc.
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; @Doc: Generated (TRACE32, build: 171528.), based on: HT32F491x3.svd (Ver. 1.0)
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; @Core: Cortex-M4F
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; @Chip: HT32F49153, HT32F49163
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; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; ARM Limited (ARM) is supplying this software for use with Cortex-M\n
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; processor based microcontroller, but can be equally used for other\n
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; suitable processor architectures. This file can be freely distributed.\n
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; Modifications to this file shall be clearly marked.\n
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; \n
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; THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\n
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; OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\n
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; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\n
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; ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\n
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; CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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; --------------------------------------------------------------------------------
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; $Id: perht32f491x3.per 18189 2024-08-02 09:27:21Z kwisniewski $
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AUTOINDENT.ON CENTER TREE
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ENUMDELIMITER ","
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base ad:0x0
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tree.close "Core Registers (Cortex-M4F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
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bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
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bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
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group.long 0x10++0x0B
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited"
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bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15"
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,ARMv7-M"
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newline
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abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC24=Cortex-M4"
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bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15"
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
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bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x07
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line.long 0x00 "HFSR,Hard Fault Status Register"
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bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
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bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
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bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
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group.long 0xD34++0x0B
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line.long 0x00 "MMFAR,MemManage Fault Address Register"
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line.long 0x04 "BFAR,BusFault Address Register"
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line.long 0x08 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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width 10.
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tree "Feature Registers"
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "ACC (HICK Auto Clock Calibration)"
|
|
base ad:0x40017400
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "STS,status register"
|
|
bitfld.long 0x0 1. "RSLOST,Reference Signal Lost" "0,1"
|
|
bitfld.long 0x0 0. "CALRDY,Internal high-speed clock calibration ready" "0,1"
|
|
line.long 0x4 "CTRL1,control register 1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "STEP,STEP"
|
|
bitfld.long 0x4 5. "CALRDYIEN,CALRDY interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "EIEN,RSLOST error interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "ENTRIM,Enable trim" "0,1"
|
|
bitfld.long 0x4 0. "CALON,Calibration on" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "CTRL2,control register 2"
|
|
hexmask.long.byte 0x0 8.--13. 1. "HICKTWK,Internal high-speed auto clock trimming"
|
|
hexmask.long.byte 0x0 0.--7. 1. "HICKCAL,Internal high-speed auto clock calibration"
|
|
group.long 0xC++0xB
|
|
line.long 0x0 "C1,compare value 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "C1,Compare 1"
|
|
line.long 0x4 "C2,compare value 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "C2,Compare 2"
|
|
line.long 0x8 "C3,compare value 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "C3,Compare 3"
|
|
tree.end
|
|
tree "ADC (Analog-to-Digital Converter)"
|
|
base ad:0x0
|
|
tree "ADC1"
|
|
base ad:0x40012000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "STS,status register"
|
|
rbitfld.long 0x0 6. "RDY,ADC ready to conversion flag" "0,1"
|
|
bitfld.long 0x0 5. "OCCO,Ordinary channel conversion overflow flag" "0,1"
|
|
bitfld.long 0x0 4. "OCCS,Ordinary channel conversion start flag" "0,1"
|
|
bitfld.long 0x0 3. "PCCS,Preempted channel conversion start flag" "0,1"
|
|
bitfld.long 0x0 2. "PCCE,Preempted channels conversion end flag" "0,1"
|
|
bitfld.long 0x0 1. "OCCE,Ordinary channels conversion end flag" "0,1"
|
|
bitfld.long 0x0 0. "VMOR,Voltage monitoring out of range flag" "0,1"
|
|
line.long 0x4 "CTRL1,control register 1"
|
|
bitfld.long 0x4 26. "OCCOIEN,Ordinary channel conversion overflow interrupt enable" "0,1"
|
|
bitfld.long 0x4 24.--25. "CRSEL,Conversion resolution select" "0,1,2,3"
|
|
bitfld.long 0x4 23. "OCVMEN,Voltage monitoring enable on ordinary channels" "0,1"
|
|
bitfld.long 0x4 22. "PCVMEN,Voltage monitoring enable on preempted channels" "0,1"
|
|
bitfld.long 0x4 13.--15. "OCPCNT,Partitioned mode conversion count of ordinary channels" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "PCPEN,Partitioned mode enable on preempted channels" "0,1"
|
|
bitfld.long 0x4 11. "OCPEN,Partitioned mode enable on ordinary channels" "0,1"
|
|
bitfld.long 0x4 10. "PCAUTOEN,Preempted group automatic conversion enable after ordinary group" "0,1"
|
|
bitfld.long 0x4 9. "VMSGEN,Voltage monitoring enable on a single channel" "0,1"
|
|
bitfld.long 0x4 8. "SQEN,Sequence mode enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PCCEIEN,Conversion end interrupt enable for preempted channels" "0,1"
|
|
bitfld.long 0x4 6. "VMORIEN,Voltage monitoring out of range interrupt enable" "0,1"
|
|
bitfld.long 0x4 5. "OCCEIEN,Ordinary channel conversion end interrupt enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "VMCSEL,Voltage monitoring channel select"
|
|
line.long 0x8 "CTRL2,control register 2"
|
|
bitfld.long 0x8 30. "OCSWTRG,Ordinary channel software conversion trigger" "0,1"
|
|
bitfld.long 0x8 28.--29. "OCETE,Ordinary channel external trigger edge select" "0,1,2,3"
|
|
hexmask.long.byte 0x8 24.--27. 1. "OCTESEL,trigger event select for ordinary channels conversion"
|
|
bitfld.long 0x8 22. "PCSWTRG,Preempted channel software conversion trigger" "0,1"
|
|
bitfld.long 0x8 20.--21. "PCETE,Preempted channel external trigger edge select" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--19. 1. "PCTESEL,trigger event select for preempted channels conversion"
|
|
bitfld.long 0x8 11. "DTALIGN,Data alignment" "0,1"
|
|
bitfld.long 0x8 10. "EOCSFEN,Each ordinary channel conversion set OCCE flag enable" "0,1"
|
|
bitfld.long 0x8 9. "OCDRCEN,Ordinary channel DMA request continuation enable for independent mode" "0,1"
|
|
bitfld.long 0x8 8. "OCDMAEN,Ordinary channel DMA transfer enable for independent mode" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "ADABRT,ADC conversion abort" "0,1"
|
|
bitfld.long 0x8 3. "ADCALINIT,Initialize A/D calibration" "0,1"
|
|
bitfld.long 0x8 2. "ADCAL,A/D Calibration" "0,1"
|
|
bitfld.long 0x8 1. "RPEN,Repeat mode enable" "0,1"
|
|
bitfld.long 0x8 0. "ADCEN,A/D converter enable" "0,1"
|
|
line.long 0xC "SPT1,sample time register 1"
|
|
bitfld.long 0xC 24.--26. "CSPT18,Selection sample time of channel ADC_IN18" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 21.--23. "CSPT17,Selection sample time of channel ADC_IN17" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 18.--20. "CSPT16,Selection sample time of channel ADC_IN16" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 15.--17. "CSPT15,Selection sample time of channel ADC_IN15" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 12.--14. "CSPT14,Selection sample time of channel ADC_IN14" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 9.--11. "CSPT13,Selection sample time of channel ADC_IN13" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 6.--8. "CSPT12,Selection sample time of channel ADC_IN12" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3.--5. "CSPT11,Selection sample time of channel ADC_IN11" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 0.--2. "CSPT10,Selection sample time of channel ADC_IN10" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "SPT2,sample time register 2"
|
|
bitfld.long 0x10 27.--29. "CSPT9,Selection sample time of channel ADC_IN9" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 24.--26. "CSPT8,Selection sample time of channel ADC_IN8" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 21.--23. "CSPT7,Selection sample time of channel ADC_IN7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 18.--20. "CSPT6,Selection sample time of channel ADC_IN6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 15.--17. "CSPT5,Selection sample time of channel ADC_IN5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 12.--14. "CSPT4,Selection sample time of channel ADC_IN4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 9.--11. "CSPT3,Selection sample time of channel ADC_IN3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 6.--8. "CSPT2,Selection sample time of channel ADC_IN2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 3.--5. "CSPT1,Selection sample time of channel ADC_IN1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "CSPT0,Selection sample time of channel ADC_IN0" "0,1,2,3,4,5,6,7"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "SPT3,sample time register 3"
|
|
bitfld.long 0x0 21.--23. "CSPT27,Selection sample time of channel ADC_IN27" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 18.--20. "CSPT26,Selection sample time of channel ADC_IN26" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 15.--17. "CSPT25,Selection sample time of channel ADC_IN25" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--14. "CSPT24,Selection sample time of channel ADC_IN24" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 9.--11. "CSPT23,Selection sample time of channel ADC_IN23" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 6.--8. "CSPT22,Selection sample time of channel ADC_IN22" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3.--5. "CSPT21,Selection sample time of channel ADC_IN21" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "CSPT20,Selection sample time of channel ADC_IN20" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14++0x23
|
|
line.long 0x0 "PCDTO1,Preempted channel 1 data offset register"
|
|
hexmask.long.word 0x0 0.--11. 1. "PCDTO1,Data offset for Preempted channel 1"
|
|
line.long 0x4 "PCDTO2,Preempted channel 2 data offset register"
|
|
hexmask.long.word 0x4 0.--11. 1. "PCDTO2,Data offset for Preempted channel 2"
|
|
line.long 0x8 "PCDTO3,Preempted channel 3 data offset register"
|
|
hexmask.long.word 0x8 0.--11. 1. "PCDTO3,Data offset for Preempted channel 3"
|
|
line.long 0xC "PCDTO4,Preempted channel 4 data offset register"
|
|
hexmask.long.word 0xC 0.--11. 1. "PCDTO4,Data offset for Preempted channel 4"
|
|
line.long 0x10 "VMHB,Voltage monitoring high boundary register"
|
|
hexmask.long.word 0x10 0.--11. 1. "VMHB,Voltage monitoring high boundary"
|
|
line.long 0x14 "VMLB,Voltage monitoring low boundary register"
|
|
hexmask.long.word 0x14 0.--11. 1. "VMLB,Voltage monitoring low boundary"
|
|
line.long 0x18 "OSQ1,Ordinary sequence register 1"
|
|
hexmask.long.byte 0x18 20.--24. 1. "OCLEN,Ordinary conversion sequence length"
|
|
hexmask.long.byte 0x18 15.--19. 1. "OSN16,Number of 16th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x18 10.--14. 1. "OSN15,Number of 15th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x18 5.--9. 1. "OSN14,Number of 14th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x18 0.--4. 1. "OSN13,Number of 13th conversion in ordinary sequence"
|
|
line.long 0x1C "OSQ2,Ordinary sequence register 2"
|
|
hexmask.long.byte 0x1C 25.--29. 1. "OSN12,Number of 12th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x1C 20.--24. 1. "OSN11,Number of 11th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x1C 15.--19. 1. "OSN10,Number of 10th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x1C 10.--14. 1. "OSN9,Number of 8th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x1C 5.--9. 1. "OSN8,Number of 7th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x1C 0.--4. 1. "OSN7,Number of 13th conversion in ordinary sequence"
|
|
line.long 0x20 "OSQ3,Ordinary sequence register 3"
|
|
hexmask.long.byte 0x20 25.--29. 1. "OSN6,Number of 6th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x20 20.--24. 1. "OSN5,Number of 5th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x20 15.--19. 1. "OSN4,Number of 4th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x20 10.--14. 1. "OSN3,number of 3rd conversion in ordinary sequence"
|
|
hexmask.long.byte 0x20 5.--9. 1. "OSN2,Number of 2nd conversion in ordinary sequence"
|
|
hexmask.long.byte 0x20 0.--4. 1. "OSN1,Number of 1st conversion in ordinary sequence"
|
|
group.long 0x54++0xB
|
|
line.long 0x0 "OSQ4,Ordinary sequence register 4"
|
|
hexmask.long.byte 0x0 25.--29. 1. "OSN22,Number of 22th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x0 20.--24. 1. "OSN21,Number of 21th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x0 15.--19. 1. "OSN20,Number of 20th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x0 10.--14. 1. "OSN19,number of 19rd conversion in ordinary sequence"
|
|
hexmask.long.byte 0x0 5.--9. 1. "OSN18,Number of 18nd conversion in ordinary sequence"
|
|
hexmask.long.byte 0x0 0.--4. 1. "OSN17,Number of 17st conversion in ordinary sequence"
|
|
line.long 0x4 "OSQ5,Ordinary sequence register 5"
|
|
hexmask.long.byte 0x4 25.--29. 1. "OSN28,Number of 28th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x4 20.--24. 1. "OSN27,Number of 27th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x4 15.--19. 1. "OSN26,Number of 26th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x4 10.--14. 1. "OSN25,number of 25rd conversion in ordinary sequence"
|
|
hexmask.long.byte 0x4 5.--9. 1. "OSN24,Number of 24nd conversion in ordinary sequence"
|
|
hexmask.long.byte 0x4 0.--4. 1. "OSN23,Number of 23st conversion in ordinary sequence"
|
|
line.long 0x8 "OSQ6,Ordinary sequence register 6"
|
|
hexmask.long.byte 0x8 15.--19. 1. "OSN32,Number of 32th conversion in ordinary sequence"
|
|
hexmask.long.byte 0x8 10.--14. 1. "OSN31,number of 31rd conversion in ordinary sequence"
|
|
hexmask.long.byte 0x8 5.--9. 1. "OSN30,Number of 30nd conversion in ordinary sequence"
|
|
hexmask.long.byte 0x8 0.--4. 1. "OSN29,Number of 29st conversion in ordinary sequence"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "PSQ,Preempted sequence register"
|
|
bitfld.long 0x0 20.--21. "PCLEN,Preempted conversion sequence length" "0,1,2,3"
|
|
hexmask.long.byte 0x0 15.--19. 1. "PSN4,Number of 4th conversion in Preempted sequence"
|
|
hexmask.long.byte 0x0 10.--14. 1. "PSN3,Number of 3rd conversion in Preempted sequence"
|
|
hexmask.long.byte 0x0 5.--9. 1. "PSN2,Number of 2nd conversion in Preempted sequence"
|
|
hexmask.long.byte 0x0 0.--4. 1. "PSN1,Number of 1st conversion in Preempted sequence"
|
|
rgroup.long 0x3C++0x13
|
|
line.long 0x0 "PDT1,Preempted data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "PDT1,Preempted data"
|
|
line.long 0x4 "PDT2,Preempted data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "PDT2,Preempted data"
|
|
line.long 0x8 "PDT3,Preempted data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "PDT3,Preempted data"
|
|
line.long 0xC "PDT4,Preempted data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "PDT4,Preempted data"
|
|
line.long 0x10 "ODT,Ordinary data register"
|
|
hexmask.long.word 0x10 0.--15. 1. "ODT,Conversion data of ordinary channel"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "OVSP,oversampling register"
|
|
bitfld.long 0x0 10. "OOSRSEL,Ordinary oversampling recovery mode select" "0,1"
|
|
bitfld.long 0x0 9. "OOSTREN,Ordinary oversampling trigger mode enable" "0,1"
|
|
hexmask.long.byte 0x0 5.--8. 1. "OSSSEL,Oversampling shift select"
|
|
bitfld.long 0x0 2.--4. "OSRSEL,Oversampling ratio select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "POSEN,Preempted oversampling enable" "0,1"
|
|
bitfld.long 0x0 0. "OOSEN,Ordinary oversampling enable" "0,1"
|
|
group.long 0xB4++0x3
|
|
line.long 0x0 "CALVAL,Calibration value register"
|
|
hexmask.long.byte 0x0 0.--6. 1. "CALVAL,A/D Calibration value"
|
|
tree.end
|
|
tree "ADCCOM"
|
|
base ad:0x40012300
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CCTRL,Common control register"
|
|
bitfld.long 0x0 23. "ITSRVEN,Internal temperature sensor and VINTRV enable" "0,1"
|
|
hexmask.long.byte 0x0 16.--19. 1. "ADCDIV,ADC division"
|
|
tree.end
|
|
tree.end
|
|
tree "CAN (Controller Area Network)"
|
|
base ad:0x0
|
|
tree "CAN1"
|
|
base ad:0x40006400
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "MCTRL,Main control register"
|
|
bitfld.long 0x0 16. "PTD,Prohibit transmission when debug" "0,1"
|
|
bitfld.long 0x0 15. "SPRST,Software partial reset" "0,1"
|
|
bitfld.long 0x0 7. "TTCEN,Time triggered communication mode enable" "0,1"
|
|
bitfld.long 0x0 6. "AEBOEN,Automatic exit bus-off enable" "0,1"
|
|
bitfld.long 0x0 5. "AEDEN,Automatic exit doze mode enable" "0,1"
|
|
bitfld.long 0x0 4. "PRSFEN,Prohibit retransmission when sending fails enable" "0,1"
|
|
bitfld.long 0x0 3. "MDRSEL,Message discarding rule select when overflow" "0,1"
|
|
bitfld.long 0x0 2. "MMSSR,Multiple message sending sequence rule" "0,1"
|
|
bitfld.long 0x0 1. "DZEN,Doze mode enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FZEN,Freeze mode enable" "0,1"
|
|
line.long 0x4 "MSTS,Main status register"
|
|
rbitfld.long 0x4 11. "REALRX,Real time level of RX pin" "0,1"
|
|
rbitfld.long 0x4 10. "LSAMPRX,Last sample level of RX pin" "0,1"
|
|
rbitfld.long 0x4 9. "CURS,Currently receiving status" "0,1"
|
|
rbitfld.long 0x4 8. "CUSS,Currently sending status" "0,1"
|
|
bitfld.long 0x4 4. "EDZIF,Enter doze mode interrupt flag" "0,1"
|
|
bitfld.long 0x4 3. "QDZIF,Quit doze mode interrupt flag" "0,1"
|
|
bitfld.long 0x4 2. "EOIF,Error occur Interrupt flag" "0,1"
|
|
rbitfld.long 0x4 1. "DZC,Doze mode confirm" "0,1"
|
|
rbitfld.long 0x4 0. "FZC,Freeze mode confirm" "0,1"
|
|
line.long 0x8 "TSTS,Transmit status register"
|
|
rbitfld.long 0x8 31. "TM2LPF,Transmit mailbox 2 lowest priority flag" "0,1"
|
|
rbitfld.long 0x8 30. "TM1LPF,Transmit mailbox 1 lowest priority flag" "0,1"
|
|
rbitfld.long 0x8 29. "TM0LPF,Transmit mailbox 0 lowest priority flag" "0,1"
|
|
rbitfld.long 0x8 28. "TM2EF,Transmit mailbox 2 empty flag" "0,1"
|
|
rbitfld.long 0x8 27. "TM1EF,Transmit mailbox 1 empty flag" "0,1"
|
|
rbitfld.long 0x8 26. "TM0EF,Transmit mailbox 0 empty flag" "0,1"
|
|
rbitfld.long 0x8 24.--25. "TMNR,Transmit Mailbox number record" "0,1,2,3"
|
|
bitfld.long 0x8 23. "TM2CT,Transmit mailbox 2 cancel transmission" "0,1"
|
|
bitfld.long 0x8 19. "TM2TEF,Transmit mailbox 2 transmission error flag" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "TM2ALF,Transmit mailbox 2 arbitration lost flag" "0,1"
|
|
bitfld.long 0x8 17. "TM2TSF,Transmit mailbox 2 transmission success flag" "0,1"
|
|
bitfld.long 0x8 16. "TM2TCF,transmit mailbox 2 transmission complete flag" "0,1"
|
|
bitfld.long 0x8 15. "TM1CT,Transmit mailbox 1 cancel transmission" "0,1"
|
|
bitfld.long 0x8 11. "TM1TEF,Transmit mailbox 1 transmission error flag" "0,1"
|
|
bitfld.long 0x8 10. "TM1ALF,Transmit mailbox 1 arbitration lost flag" "0,1"
|
|
bitfld.long 0x8 9. "TM1TSF,Transmit mailbox 1 transmission success flag" "0,1"
|
|
bitfld.long 0x8 8. "TM1TCF,Transmit mailbox 1 transmission complete flag" "0,1"
|
|
bitfld.long 0x8 7. "TM0CT,Transmit mailbox 0 cancel transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "TM0TEF,Transmit mailbox 0 transmission error flag" "0,1"
|
|
bitfld.long 0x8 2. "TM0ALF,Transmit mailbox 0 arbitration lost flag" "0,1"
|
|
bitfld.long 0x8 1. "TM0TSF,Transmit mailbox 0 transmission success flag" "0,1"
|
|
bitfld.long 0x8 0. "TM0TCF,Transmit mailbox 0 transmission complete flag" "0,1"
|
|
line.long 0xC "RF0,Receive FIFO 0 register"
|
|
bitfld.long 0xC 5. "RF0R,Receive FIFO 0 release" "0,1"
|
|
bitfld.long 0xC 4. "RF0OF,Receive FIFO 0 overflow flag" "0,1"
|
|
bitfld.long 0xC 3. "RF0FF,Receive FIFO 0 full flag" "0,1"
|
|
rbitfld.long 0xC 0.--1. "RF0MN,Receive FIFO 0 message num" "0,1,2,3"
|
|
line.long 0x10 "RF1,Receive FIFO 1 register"
|
|
bitfld.long 0x10 5. "RF1R,Receive FIFO 1 release" "0,1"
|
|
bitfld.long 0x10 4. "RF1OF,Receive FIFO 1 overflow flag" "0,1"
|
|
bitfld.long 0x10 3. "RF1FF,Receive FIFO 1 full flag" "0,1"
|
|
rbitfld.long 0x10 0.--1. "RF1MN,Receive FIFO 1 message num" "0,1,2,3"
|
|
line.long 0x14 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x14 17. "EDZIEN,Enter doze mode interrupt enable" "0,1"
|
|
bitfld.long 0x14 16. "QDZIEN,Quit doze mode interrupt enable" "0,1"
|
|
bitfld.long 0x14 15. "EOIEN,Error occur interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "ETRIEN,Error type record interrupt enable" "0,1"
|
|
bitfld.long 0x14 10. "BOIEN,Bus-off interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "EPIEN,Error passive interrupt enable" "0,1"
|
|
bitfld.long 0x14 8. "EAIEN,Error active interrupt enable" "0,1"
|
|
bitfld.long 0x14 6. "RF1OIEN,Receive FIFO 1 overflow interrupt enable" "0,1"
|
|
bitfld.long 0x14 5. "RF1FIEN,Receive FIFO 1 full interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 4. "RF1MIEN,FIFO 1 receive message interrupt enable" "0,1"
|
|
bitfld.long 0x14 3. "RF0OIEN,Receive FIFO 0 overflow interrupt enable" "0,1"
|
|
bitfld.long 0x14 2. "RF0FIEN,Receive FIFO 0 full interrupt enable" "0,1"
|
|
bitfld.long 0x14 1. "RF0MIEN,FIFO 0 receive message interrupt enable" "0,1"
|
|
bitfld.long 0x14 0. "TCIEN,Transmission complete interrupt enable" "0,1"
|
|
line.long 0x18 "ESTS,Error status register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "REC,Receive error counter"
|
|
hexmask.long.byte 0x18 16.--23. 1. "TEC,Transmit error counter"
|
|
bitfld.long 0x18 4.--6. "ETR,Error type record" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x18 2. "BOF,Bus-off flag" "0,1"
|
|
rbitfld.long 0x18 1. "EPF,Error passive flag" "0,1"
|
|
rbitfld.long 0x18 0. "EAF,Error active flag" "0,1"
|
|
line.long 0x1C "BTMG,Bit timing register"
|
|
bitfld.long 0x1C 31. "LOEN,Listen-Only mode" "0,1"
|
|
bitfld.long 0x1C 30. "LBEN,Loop back mode" "0,1"
|
|
bitfld.long 0x1C 24.--25. "RSAW,Resynchronization adjust width" "0,1,2,3"
|
|
bitfld.long 0x1C 20.--22. "BTS2,Bit time segment 2" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "BTS1,Bit time segment 1"
|
|
hexmask.long.word 0x1C 0.--11. 1. "BRDIV,Baud rate division"
|
|
group.long 0x180++0x2F
|
|
line.long 0x0 "TMI0,Transmit mailbox 0 identifier register"
|
|
hexmask.long.word 0x0 21.--31. 1. "TMSID,Transmit mailbox standard identifier or extended identifier high bytes"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "TMEID,Ttransmit mailbox extended identifier"
|
|
bitfld.long 0x0 2. "TMIDSEL,Transmit mailbox identifier type select" "0,1"
|
|
bitfld.long 0x0 1. "TMFRSEL,Transmit mailbox frame type select" "0,1"
|
|
bitfld.long 0x0 0. "TMSR,Transmit mailbox send request" "0,1"
|
|
line.long 0x4 "TMC0,Transmit mailbox 0 data length and time stamp register"
|
|
hexmask.long.word 0x4 16.--31. 1. "TMTS,Transmit mailbox time stamp"
|
|
bitfld.long 0x4 8. "TMTSTEN,Transmit mailbox time stamp transmit enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "TMDTBL,Transmit mailbox data byte length"
|
|
line.long 0x8 "TMDTL0,Transmit mailbox 0 low byte data register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "TMDT3,Transmit mailbox data byte 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "TMDT2,Transmit mailbox data byte 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "TMDT1,Transmit mailbox data byte 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TMDT0,Transmit mailbox data byte 0"
|
|
line.long 0xC "TMDTH0,Transmit mailbox 0 high byte data register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "TMDT7,Transmit mailbox data byte 7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TMDT6,Transmit mailbox data byte 6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "TMDT5,Transmit mailbox data byte 5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TMDT4,Transmit mailbox data byte 4"
|
|
line.long 0x10 "TMI1,Transmit mailbox 1 identifier register"
|
|
hexmask.long.word 0x10 21.--31. 1. "TMSID,Transmit mailbox standard identifier or extended identifier high bytes"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "TMEID,Ttransmit mailbox extended identifier"
|
|
bitfld.long 0x10 2. "TMIDSEL,Transmit mailbox identifier type select" "0,1"
|
|
bitfld.long 0x10 1. "TMFRSEL,Transmit mailbox frame type select" "0,1"
|
|
bitfld.long 0x10 0. "TMSR,Transmit mailbox send request" "0,1"
|
|
line.long 0x14 "TMC1,Transmit mailbox 1 data length and time stamp register"
|
|
hexmask.long.word 0x14 16.--31. 1. "TMTS,Transmit mailbox time stamp"
|
|
bitfld.long 0x14 8. "TMTSTEN,Transmit mailbox time stamp transmit enable" "0,1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "TMDTBL,Transmit mailbox data byte length"
|
|
line.long 0x18 "TMDTL1,Transmit mailbox 1 low byte data register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "TMDT3,Transmit mailbox data byte 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "TMDT2,Transmit mailbox data byte 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "TMDT1,Transmit mailbox data byte 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "TMDT0,Transmit mailbox data byte 0"
|
|
line.long 0x1C "TMDTH1,Transmit mailbox 1 high byte data register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "TMDT7,Transmit mailbox data byte 7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "TMDT6,Transmit mailbox data byte 6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "TMDT5,Transmit mailbox data byte 5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "TMDT4,Transmit mailbox data byte 4"
|
|
line.long 0x20 "TMI2,Transmit mailbox 2 identifier register"
|
|
hexmask.long.word 0x20 21.--31. 1. "TMSID,Transmit mailbox standard identifier or extended identifier high bytes"
|
|
hexmask.long.tbyte 0x20 3.--20. 1. "TMEID,Ttransmit mailbox extended identifier"
|
|
bitfld.long 0x20 2. "TMIDSEL,Transmit mailbox identifier type select" "0,1"
|
|
bitfld.long 0x20 1. "TMFRSEL,Transmit mailbox frame type select" "0,1"
|
|
bitfld.long 0x20 0. "TMSR,Transmit mailbox send request" "0,1"
|
|
line.long 0x24 "TMC2,Transmit mailbox 2 data length and time stamp register"
|
|
hexmask.long.word 0x24 16.--31. 1. "TMTS,Transmit mailbox time stamp"
|
|
bitfld.long 0x24 8. "TMTSTEN,Transmit mailbox time stamp transmit enable" "0,1"
|
|
hexmask.long.byte 0x24 0.--3. 1. "TMDTBL,Transmit mailbox data byte length"
|
|
line.long 0x28 "TMDTL2,Transmit mailbox 2 low byte data register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "TMDT3,Transmit mailbox data byte 3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "TMDT2,Transmit mailbox data byte 2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "TMDT1,Transmit mailbox data byte 1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "TMDT0,Transmit mailbox data byte 0"
|
|
line.long 0x2C "TMDTH2,Transmit mailbox 2 high byte data register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "TMDT7,Transmit mailbox data byte 7"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "TMDT6,Transmit mailbox data byte 6"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "TMDT5,Transmit mailbox data byte 5"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "TMDT4,Transmit mailbox data byte 4"
|
|
rgroup.long 0x1B0++0x1F
|
|
line.long 0x0 "RFI0,Receive FIFO 0 register"
|
|
hexmask.long.word 0x0 21.--31. 1. "RFSID,Receive FIFO standard identifier or receive FIFO extended identifier"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "RFEID,Receive FIFO extended identifier"
|
|
bitfld.long 0x0 2. "RFIDI,Receive FIFO identifier type indication" "0,1"
|
|
bitfld.long 0x0 1. "RFFRI,Receive FIFO frame type indication" "0,1"
|
|
line.long 0x4 "RFC0,Receive FIFO 0 data length and time stamp register"
|
|
hexmask.long.word 0x4 16.--31. 1. "RFTS,Receive FIFO time stamp"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RFFMN,Receive FIFO filter match number"
|
|
hexmask.long.byte 0x4 0.--3. 1. "RFDTL,Receive FIFO data length"
|
|
line.long 0x8 "RFDTL0,Receive FIFO 0 low byte data register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "RFDT3,Receive FIFO data byte 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "RFDT2,Receive FIFO data byte 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "RFDT1,Receive FIFO data byte 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RFDT0,Receive FIFO data byte 0"
|
|
line.long 0xC "RFDTH0,Receive FIFO 0 high byte data register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "RFDT7,Receive FIFO data byte 7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "RFDT6,Receive FIFO data byte 6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RFDT5,Receive FIFO data byte 5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RFDT4,Receive FIFO data byte 4"
|
|
line.long 0x10 "RFI1,Receive FIFO 1 register"
|
|
hexmask.long.word 0x10 21.--31. 1. "RFSID,Receive FIFO standard identifier or receive FIFO extended identifier"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "RFEID,Receive FIFO extended identifier"
|
|
bitfld.long 0x10 2. "RFIDI,Receive FIFO identifier type indication" "0,1"
|
|
bitfld.long 0x10 1. "RFFRI,Receive FIFO frame type indication" "0,1"
|
|
line.long 0x14 "RFC1,Receive FIFO 1 data length and time stamp register"
|
|
hexmask.long.word 0x14 16.--31. 1. "RFTS,Receive FIFO time stamp"
|
|
hexmask.long.byte 0x14 8.--15. 1. "RFFMN,Receive FIFO filter match number"
|
|
hexmask.long.byte 0x14 0.--3. 1. "RFDTL,Receive FIFO data length"
|
|
line.long 0x18 "RFDTL1,Receive FIFO 1 low byte data register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "RFDT3,Receive FIFO data byte 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "RFDT2,Receive FIFO data byte 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "RFDT1,Receive FIFO data byte 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "RFDT0,Receive FIFO data byte 0"
|
|
line.long 0x1C "RFDTH1,Receive FIFO 1 high byte data register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "RFDT7,Receive FIFO data byte 7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "RFDT6,Receive FIFO data byte 6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "RFDT5,Receive FIFO data byte 5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "RFDT4,Receive FIFO data byte 4"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "FCTRL,Filter control register"
|
|
bitfld.long 0x0 0. "FCS,Filters configure switch" "0,1"
|
|
line.long 0x4 "FMCFG,Filter mode config register"
|
|
bitfld.long 0x4 13. "FMSEL13,Filter mode select" "0,1"
|
|
bitfld.long 0x4 12. "FMSEL12,Filter mode select" "0,1"
|
|
bitfld.long 0x4 11. "FMSEL11,Filter mode select" "0,1"
|
|
bitfld.long 0x4 10. "FMSEL10,Filter mode select" "0,1"
|
|
bitfld.long 0x4 9. "FMSEL9,Filter mode select" "0,1"
|
|
bitfld.long 0x4 8. "FMSEL8,Filter mode select" "0,1"
|
|
bitfld.long 0x4 7. "FMSEL7,Filter mode select" "0,1"
|
|
bitfld.long 0x4 6. "FMSEL6,Filter mode select" "0,1"
|
|
bitfld.long 0x4 5. "FMSEL5,Filter mode select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "FMSEL4,Filter mode select" "0,1"
|
|
bitfld.long 0x4 3. "FMSEL3,Filter mode select" "0,1"
|
|
bitfld.long 0x4 2. "FMSEL2,Filter mode select" "0,1"
|
|
bitfld.long 0x4 1. "FMSEL1,Filter mode select" "0,1"
|
|
bitfld.long 0x4 0. "FMSEL0,Filter mode select" "0,1"
|
|
group.long 0x20C++0x3
|
|
line.long 0x0 "FBWCFG,Filter bit width config register"
|
|
bitfld.long 0x0 13. "FBWSEL13,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 12. "FBWSEL12,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 11. "FBWSEL11,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 10. "FBWSEL10,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 9. "FBWSEL9,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 8. "FBWSEL8,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 7. "FBWSEL7,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 6. "FBWSEL6,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 5. "FBWSEL5,Filter bit width select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FBWSEL4,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 3. "FBWSEL3,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 2. "FBWSEL2,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 1. "FBWSEL1,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 0. "FBWSEL0,Filter bit width select" "0,1"
|
|
group.long 0x214++0x3
|
|
line.long 0x0 "FRF,Filter related FIFO register"
|
|
bitfld.long 0x0 13. "FRFSEL13,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 12. "FRFSEL12,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 11. "FRFSEL11,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 10. "FRFSEL10,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 9. "FRFSEL9,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 8. "FRFSEL8,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 7. "FRFSEL7,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 6. "FRFSEL6,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 5. "FRFSEL5,Filter relation FIFO select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FRFSEL4,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 3. "FRFSEL3,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 2. "FRFSEL2,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 1. "FRFSEL1,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 0. "FRFSEL0,Filter relation FIFO select" "0,1"
|
|
group.long 0x21C++0x3
|
|
line.long 0x0 "FACFG,Filter activate configuration register"
|
|
bitfld.long 0x0 13. "FAEN13,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 12. "FAEN12,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 11. "FAEN11,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 10. "FAEN10,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 9. "FAEN9,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 8. "FAEN8,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 7. "FAEN7,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 6. "FAEN6,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 5. "FAEN5,Filter activate enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FAEN4,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 3. "FAEN3,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 2. "FAEN2,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 1. "FAEN1,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 0. "FAEN0,Filter activate enable" "0,1"
|
|
group.long 0x240++0x6F
|
|
line.long 0x0 "F0FB1,Filter bank 0 filtrate bit register 1"
|
|
bitfld.long 0x0 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x0 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x0 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x0 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x0 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x0 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x0 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x0 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x0 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x0 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x0 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x0 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x0 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x0 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x0 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x0 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x0 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x0 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x0 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x0 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x0 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x0 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x0 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x0 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x0 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x0 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x0 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x0 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x0 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x4 "F0FB2,Filter bank 0 filtrate bit register 2"
|
|
bitfld.long 0x4 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x4 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x4 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x4 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x4 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x4 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x4 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x4 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x4 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x4 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x4 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x4 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x4 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x4 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x4 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x4 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x4 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x4 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x4 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x4 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x4 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x4 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x4 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x4 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x4 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x4 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x4 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x4 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x4 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x8 "F1FB1,Filter bank 1 filtrate bit register 1"
|
|
bitfld.long 0x8 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x8 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x8 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x8 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x8 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x8 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x8 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x8 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x8 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x8 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x8 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x8 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x8 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x8 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x8 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x8 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x8 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x8 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x8 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x8 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x8 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x8 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x8 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x8 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x8 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x8 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x8 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x8 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x8 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0xC "F1FB2,Filter bank 1 filtrate bit register 2"
|
|
bitfld.long 0xC 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0xC 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0xC 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0xC 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0xC 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0xC 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0xC 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0xC 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0xC 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0xC 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0xC 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0xC 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0xC 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0xC 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0xC 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0xC 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0xC 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0xC 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0xC 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0xC 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0xC 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0xC 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0xC 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0xC 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0xC 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0xC 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0xC 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0xC 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0xC 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x10 "F2FB1,Filter bank 2 filtrate bit register 1"
|
|
bitfld.long 0x10 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x10 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x10 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x10 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x10 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x10 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x10 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x10 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x10 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x10 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x10 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x10 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x10 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x10 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x10 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x10 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x10 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x10 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x10 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x10 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x10 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x10 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x10 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x10 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x10 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x10 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x10 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x10 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x10 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x10 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x14 "F2FB2,Filter bank 2 filtrate bit register 2"
|
|
bitfld.long 0x14 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x14 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x14 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x14 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x14 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x14 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x14 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x14 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x14 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x14 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x14 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x14 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x14 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x14 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x14 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x14 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x14 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x14 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x14 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x14 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x14 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x14 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x14 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x14 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x14 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x14 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x14 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x14 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x14 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x18 "F3FB1,Filter bank 3 filtrate bit register 1"
|
|
bitfld.long 0x18 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x18 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x18 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x18 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x18 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x18 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x18 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x18 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x18 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x18 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x18 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x18 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x18 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x18 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x18 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x18 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x18 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x18 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x18 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x18 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x18 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x18 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x18 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x18 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x18 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x18 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x18 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x18 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x18 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x18 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x18 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x18 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x1C "F3FB2,Filter bank 3 filtrate bit register 2"
|
|
bitfld.long 0x1C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x20 "F4FB1,Filter bank 4 filtrate bit register 1"
|
|
bitfld.long 0x20 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x20 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x20 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x20 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x20 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x20 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x20 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x20 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x20 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x20 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x20 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x20 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x20 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x20 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x20 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x20 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x20 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x20 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x20 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x20 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x20 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x20 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x20 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x20 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x20 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x20 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x20 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x20 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x20 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x24 "F4FB2,Filter bank 4 filtrate bit register 2"
|
|
bitfld.long 0x24 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x24 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x24 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x24 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x24 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x24 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x24 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x24 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x24 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x24 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x24 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x24 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x24 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x24 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x24 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x24 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x24 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x24 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x24 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x24 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x24 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x24 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x24 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x24 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x24 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x24 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x24 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x24 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x24 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x24 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x24 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x24 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x28 "F5FB1,Filter bank 5 filtrate bit register 1"
|
|
bitfld.long 0x28 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x28 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x28 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x28 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x28 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x28 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x28 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x28 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x28 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x28 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x28 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x28 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x28 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x28 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x28 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x28 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x28 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x28 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x28 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x28 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x28 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x28 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x28 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x28 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x28 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x28 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x28 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x28 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x28 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x28 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x28 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x28 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x2C "F5FB2,Filter bank 5 filtrate bit register 2"
|
|
bitfld.long 0x2C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x30 "F6FB1,Filter bank 6 filtrate bit register 1"
|
|
bitfld.long 0x30 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x30 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x30 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x30 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x30 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x30 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x30 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x30 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x30 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x30 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x30 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x30 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x30 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x30 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x30 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x30 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x30 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x30 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x30 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x30 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x30 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x30 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x30 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x30 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x30 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x30 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x30 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x30 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x30 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x30 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x30 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x30 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x34 "F6FB2,Filter bank 6 filtrate bit register 2"
|
|
bitfld.long 0x34 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x34 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x34 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x34 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x34 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x34 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x34 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x34 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x34 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x34 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x34 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x34 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x34 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x34 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x34 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x34 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x34 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x34 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x34 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x34 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x34 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x34 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x34 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x34 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x34 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x34 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x34 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x34 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x34 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x34 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x34 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x34 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x38 "F7FB1,Filter bank 7 filtrate bit register 1"
|
|
bitfld.long 0x38 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x38 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x38 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x38 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x38 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x38 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x38 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x38 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x38 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x38 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x38 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x38 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x38 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x38 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x38 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x38 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x38 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x38 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x38 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x38 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x38 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x38 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x38 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x38 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x38 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x38 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x38 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x38 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x38 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x38 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x38 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x38 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x3C "F7FB2,Filter bank 7 filtrate bit register 2"
|
|
bitfld.long 0x3C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x40 "F8FB1,Filter bank 8 filtrate bit register 1"
|
|
bitfld.long 0x40 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x40 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x40 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x40 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x40 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x40 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x40 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x40 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x40 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x40 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x40 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x40 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x40 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x40 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x40 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x40 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x40 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x40 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x40 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x40 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x40 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x40 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x40 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x40 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x40 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x40 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x40 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x40 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x40 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x40 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x40 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x40 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x44 "F8FB2,Filter bank 8 filtrate bit register 2"
|
|
bitfld.long 0x44 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x44 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x44 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x44 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x44 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x44 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x44 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x44 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x44 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x44 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x44 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x44 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x44 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x44 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x44 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x44 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x44 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x44 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x44 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x44 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x44 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x44 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x44 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x44 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x44 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x44 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x44 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x44 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x44 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x44 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x44 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x44 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x48 "F9FB1,Filter bank 9 filtrate bit register 1"
|
|
bitfld.long 0x48 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x48 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x48 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x48 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x48 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x48 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x48 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x48 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x48 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x48 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x48 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x48 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x48 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x48 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x48 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x48 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x48 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x48 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x48 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x48 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x48 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x48 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x48 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x48 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x48 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x48 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x48 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x48 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x48 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x48 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x48 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x48 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x4C "F9FB2,Filter bank 9 filtrate bit register 2"
|
|
bitfld.long 0x4C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x50 "F10FB1,Filter bank 10 filtrate bit register 1"
|
|
bitfld.long 0x50 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x50 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x50 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x50 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x50 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x50 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x50 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x50 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x50 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x50 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x50 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x50 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x50 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x50 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x50 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x50 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x50 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x50 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x50 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x50 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x50 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x50 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x50 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x50 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x50 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x50 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x50 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x50 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x50 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x50 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x50 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x50 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x54 "F10FB2,Filter bank 10 filtrate bit register 2"
|
|
bitfld.long 0x54 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x54 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x54 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x54 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x54 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x54 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x54 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x54 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x54 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x54 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x54 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x54 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x54 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x54 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x54 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x54 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x54 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x54 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x54 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x54 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x54 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x54 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x54 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x54 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x54 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x54 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x54 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x54 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x54 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x54 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x54 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x54 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x58 "F11FB1,Filter bank 11 filtrate bit register 1"
|
|
bitfld.long 0x58 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x58 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x58 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x58 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x58 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x58 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x58 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x58 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x58 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x58 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x58 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x58 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x58 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x58 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x58 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x58 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x58 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x58 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x58 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x58 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x58 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x58 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x58 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x58 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x58 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x58 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x58 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x58 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x58 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x58 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x58 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x58 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x5C "F11FB2,Filter bank 11 filtrate bit register 2"
|
|
bitfld.long 0x5C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x60 "F12FB1,Filter bank 12 filtrate bit register 1"
|
|
bitfld.long 0x60 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x60 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x60 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x60 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x60 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x60 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x60 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x60 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x60 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x60 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x60 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x60 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x60 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x60 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x60 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x60 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x60 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x60 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x60 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x60 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x60 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x60 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x60 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x60 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x60 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x60 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x60 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x60 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x60 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x60 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x60 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x60 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x64 "F12FB2,Filter bank 12 filtrate bit register 2"
|
|
bitfld.long 0x64 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x64 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x64 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x64 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x64 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x64 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x64 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x64 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x64 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x64 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x64 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x64 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x64 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x64 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x64 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x64 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x64 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x64 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x64 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x64 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x64 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x64 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x64 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x64 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x64 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x64 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x64 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x64 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x64 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x64 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x64 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x64 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x68 "F13FB1,Filter bank 13 filtrate bit register 1"
|
|
bitfld.long 0x68 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x68 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x68 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x68 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x68 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x68 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x68 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x68 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x68 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x68 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x68 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x68 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x68 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x68 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x68 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x68 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x68 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x68 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x68 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x68 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x68 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x68 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x68 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x68 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x68 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x68 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x68 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x68 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x68 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x68 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x68 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x68 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x6C "F13FB2,Filter bank 13 filtrate bit register 2"
|
|
bitfld.long 0x6C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 0. "FFDB0,Filter data bit" "0,1"
|
|
tree.end
|
|
tree "CAN2"
|
|
base ad:0x40006800
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "MCTRL,Main control register"
|
|
bitfld.long 0x0 16. "PTD,Prohibit transmission when debug" "0,1"
|
|
bitfld.long 0x0 15. "SPRST,Software partial reset" "0,1"
|
|
bitfld.long 0x0 7. "TTCEN,Time triggered communication mode enable" "0,1"
|
|
bitfld.long 0x0 6. "AEBOEN,Automatic exit bus-off enable" "0,1"
|
|
bitfld.long 0x0 5. "AEDEN,Automatic exit doze mode enable" "0,1"
|
|
bitfld.long 0x0 4. "PRSFEN,Prohibit retransmission when sending fails enable" "0,1"
|
|
bitfld.long 0x0 3. "MDRSEL,Message discarding rule select when overflow" "0,1"
|
|
bitfld.long 0x0 2. "MMSSR,Multiple message sending sequence rule" "0,1"
|
|
bitfld.long 0x0 1. "DZEN,Doze mode enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FZEN,Freeze mode enable" "0,1"
|
|
line.long 0x4 "MSTS,Main status register"
|
|
rbitfld.long 0x4 11. "REALRX,Real time level of RX pin" "0,1"
|
|
rbitfld.long 0x4 10. "LSAMPRX,Last sample level of RX pin" "0,1"
|
|
rbitfld.long 0x4 9. "CURS,Currently receiving status" "0,1"
|
|
rbitfld.long 0x4 8. "CUSS,Currently sending status" "0,1"
|
|
bitfld.long 0x4 4. "EDZIF,Enter doze mode interrupt flag" "0,1"
|
|
bitfld.long 0x4 3. "QDZIF,Quit doze mode interrupt flag" "0,1"
|
|
bitfld.long 0x4 2. "EOIF,Error occur Interrupt flag" "0,1"
|
|
rbitfld.long 0x4 1. "DZC,Doze mode confirm" "0,1"
|
|
rbitfld.long 0x4 0. "FZC,Freeze mode confirm" "0,1"
|
|
line.long 0x8 "TSTS,Transmit status register"
|
|
rbitfld.long 0x8 31. "TM2LPF,Transmit mailbox 2 lowest priority flag" "0,1"
|
|
rbitfld.long 0x8 30. "TM1LPF,Transmit mailbox 1 lowest priority flag" "0,1"
|
|
rbitfld.long 0x8 29. "TM0LPF,Transmit mailbox 0 lowest priority flag" "0,1"
|
|
rbitfld.long 0x8 28. "TM2EF,Transmit mailbox 2 empty flag" "0,1"
|
|
rbitfld.long 0x8 27. "TM1EF,Transmit mailbox 1 empty flag" "0,1"
|
|
rbitfld.long 0x8 26. "TM0EF,Transmit mailbox 0 empty flag" "0,1"
|
|
rbitfld.long 0x8 24.--25. "TMNR,Transmit Mailbox number record" "0,1,2,3"
|
|
bitfld.long 0x8 23. "TM2CT,Transmit mailbox 2 cancel transmission" "0,1"
|
|
bitfld.long 0x8 19. "TM2TEF,Transmit mailbox 2 transmission error flag" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "TM2ALF,Transmit mailbox 2 arbitration lost flag" "0,1"
|
|
bitfld.long 0x8 17. "TM2TSF,Transmit mailbox 2 transmission success flag" "0,1"
|
|
bitfld.long 0x8 16. "TM2TCF,transmit mailbox 2 transmission complete flag" "0,1"
|
|
bitfld.long 0x8 15. "TM1CT,Transmit mailbox 1 cancel transmission" "0,1"
|
|
bitfld.long 0x8 11. "TM1TEF,Transmit mailbox 1 transmission error flag" "0,1"
|
|
bitfld.long 0x8 10. "TM1ALF,Transmit mailbox 1 arbitration lost flag" "0,1"
|
|
bitfld.long 0x8 9. "TM1TSF,Transmit mailbox 1 transmission success flag" "0,1"
|
|
bitfld.long 0x8 8. "TM1TCF,Transmit mailbox 1 transmission complete flag" "0,1"
|
|
bitfld.long 0x8 7. "TM0CT,Transmit mailbox 0 cancel transmission" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "TM0TEF,Transmit mailbox 0 transmission error flag" "0,1"
|
|
bitfld.long 0x8 2. "TM0ALF,Transmit mailbox 0 arbitration lost flag" "0,1"
|
|
bitfld.long 0x8 1. "TM0TSF,Transmit mailbox 0 transmission success flag" "0,1"
|
|
bitfld.long 0x8 0. "TM0TCF,Transmit mailbox 0 transmission complete flag" "0,1"
|
|
line.long 0xC "RF0,Receive FIFO 0 register"
|
|
bitfld.long 0xC 5. "RF0R,Receive FIFO 0 release" "0,1"
|
|
bitfld.long 0xC 4. "RF0OF,Receive FIFO 0 overflow flag" "0,1"
|
|
bitfld.long 0xC 3. "RF0FF,Receive FIFO 0 full flag" "0,1"
|
|
rbitfld.long 0xC 0.--1. "RF0MN,Receive FIFO 0 message num" "0,1,2,3"
|
|
line.long 0x10 "RF1,Receive FIFO 1 register"
|
|
bitfld.long 0x10 5. "RF1R,Receive FIFO 1 release" "0,1"
|
|
bitfld.long 0x10 4. "RF1OF,Receive FIFO 1 overflow flag" "0,1"
|
|
bitfld.long 0x10 3. "RF1FF,Receive FIFO 1 full flag" "0,1"
|
|
rbitfld.long 0x10 0.--1. "RF1MN,Receive FIFO 1 message num" "0,1,2,3"
|
|
line.long 0x14 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x14 17. "EDZIEN,Enter doze mode interrupt enable" "0,1"
|
|
bitfld.long 0x14 16. "QDZIEN,Quit doze mode interrupt enable" "0,1"
|
|
bitfld.long 0x14 15. "EOIEN,Error occur interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "ETRIEN,Error type record interrupt enable" "0,1"
|
|
bitfld.long 0x14 10. "BOIEN,Bus-off interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "EPIEN,Error passive interrupt enable" "0,1"
|
|
bitfld.long 0x14 8. "EAIEN,Error active interrupt enable" "0,1"
|
|
bitfld.long 0x14 6. "RF1OIEN,Receive FIFO 1 overflow interrupt enable" "0,1"
|
|
bitfld.long 0x14 5. "RF1FIEN,Receive FIFO 1 full interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 4. "RF1MIEN,FIFO 1 receive message interrupt enable" "0,1"
|
|
bitfld.long 0x14 3. "RF0OIEN,Receive FIFO 0 overflow interrupt enable" "0,1"
|
|
bitfld.long 0x14 2. "RF0FIEN,Receive FIFO 0 full interrupt enable" "0,1"
|
|
bitfld.long 0x14 1. "RF0MIEN,FIFO 0 receive message interrupt enable" "0,1"
|
|
bitfld.long 0x14 0. "TCIEN,Transmission complete interrupt enable" "0,1"
|
|
line.long 0x18 "ESTS,Error status register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "REC,Receive error counter"
|
|
hexmask.long.byte 0x18 16.--23. 1. "TEC,Transmit error counter"
|
|
bitfld.long 0x18 4.--6. "ETR,Error type record" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x18 2. "BOF,Bus-off flag" "0,1"
|
|
rbitfld.long 0x18 1. "EPF,Error passive flag" "0,1"
|
|
rbitfld.long 0x18 0. "EAF,Error active flag" "0,1"
|
|
line.long 0x1C "BTMG,Bit timing register"
|
|
bitfld.long 0x1C 31. "LOEN,Listen-Only mode" "0,1"
|
|
bitfld.long 0x1C 30. "LBEN,Loop back mode" "0,1"
|
|
bitfld.long 0x1C 24.--25. "RSAW,Resynchronization adjust width" "0,1,2,3"
|
|
bitfld.long 0x1C 20.--22. "BTS2,Bit time segment 2" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "BTS1,Bit time segment 1"
|
|
hexmask.long.word 0x1C 0.--11. 1. "BRDIV,Baud rate division"
|
|
group.long 0x180++0x2F
|
|
line.long 0x0 "TMI0,Transmit mailbox 0 identifier register"
|
|
hexmask.long.word 0x0 21.--31. 1. "TMSID,Transmit mailbox standard identifier or extended identifier high bytes"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "TMEID,Ttransmit mailbox extended identifier"
|
|
bitfld.long 0x0 2. "TMIDSEL,Transmit mailbox identifier type select" "0,1"
|
|
bitfld.long 0x0 1. "TMFRSEL,Transmit mailbox frame type select" "0,1"
|
|
bitfld.long 0x0 0. "TMSR,Transmit mailbox send request" "0,1"
|
|
line.long 0x4 "TMC0,Transmit mailbox 0 data length and time stamp register"
|
|
hexmask.long.word 0x4 16.--31. 1. "TMTS,Transmit mailbox time stamp"
|
|
bitfld.long 0x4 8. "TMTSTEN,Transmit mailbox time stamp transmit enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "TMDTBL,Transmit mailbox data byte length"
|
|
line.long 0x8 "TMDTL0,Transmit mailbox 0 low byte data register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "TMDT3,Transmit mailbox data byte 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "TMDT2,Transmit mailbox data byte 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "TMDT1,Transmit mailbox data byte 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TMDT0,Transmit mailbox data byte 0"
|
|
line.long 0xC "TMDTH0,Transmit mailbox 0 high byte data register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "TMDT7,Transmit mailbox data byte 7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TMDT6,Transmit mailbox data byte 6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "TMDT5,Transmit mailbox data byte 5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TMDT4,Transmit mailbox data byte 4"
|
|
line.long 0x10 "TMI1,Transmit mailbox 1 identifier register"
|
|
hexmask.long.word 0x10 21.--31. 1. "TMSID,Transmit mailbox standard identifier or extended identifier high bytes"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "TMEID,Ttransmit mailbox extended identifier"
|
|
bitfld.long 0x10 2. "TMIDSEL,Transmit mailbox identifier type select" "0,1"
|
|
bitfld.long 0x10 1. "TMFRSEL,Transmit mailbox frame type select" "0,1"
|
|
bitfld.long 0x10 0. "TMSR,Transmit mailbox send request" "0,1"
|
|
line.long 0x14 "TMC1,Transmit mailbox 1 data length and time stamp register"
|
|
hexmask.long.word 0x14 16.--31. 1. "TMTS,Transmit mailbox time stamp"
|
|
bitfld.long 0x14 8. "TMTSTEN,Transmit mailbox time stamp transmit enable" "0,1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "TMDTBL,Transmit mailbox data byte length"
|
|
line.long 0x18 "TMDTL1,Transmit mailbox 1 low byte data register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "TMDT3,Transmit mailbox data byte 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "TMDT2,Transmit mailbox data byte 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "TMDT1,Transmit mailbox data byte 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "TMDT0,Transmit mailbox data byte 0"
|
|
line.long 0x1C "TMDTH1,Transmit mailbox 1 high byte data register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "TMDT7,Transmit mailbox data byte 7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "TMDT6,Transmit mailbox data byte 6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "TMDT5,Transmit mailbox data byte 5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "TMDT4,Transmit mailbox data byte 4"
|
|
line.long 0x20 "TMI2,Transmit mailbox 2 identifier register"
|
|
hexmask.long.word 0x20 21.--31. 1. "TMSID,Transmit mailbox standard identifier or extended identifier high bytes"
|
|
hexmask.long.tbyte 0x20 3.--20. 1. "TMEID,Ttransmit mailbox extended identifier"
|
|
bitfld.long 0x20 2. "TMIDSEL,Transmit mailbox identifier type select" "0,1"
|
|
bitfld.long 0x20 1. "TMFRSEL,Transmit mailbox frame type select" "0,1"
|
|
bitfld.long 0x20 0. "TMSR,Transmit mailbox send request" "0,1"
|
|
line.long 0x24 "TMC2,Transmit mailbox 2 data length and time stamp register"
|
|
hexmask.long.word 0x24 16.--31. 1. "TMTS,Transmit mailbox time stamp"
|
|
bitfld.long 0x24 8. "TMTSTEN,Transmit mailbox time stamp transmit enable" "0,1"
|
|
hexmask.long.byte 0x24 0.--3. 1. "TMDTBL,Transmit mailbox data byte length"
|
|
line.long 0x28 "TMDTL2,Transmit mailbox 2 low byte data register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "TMDT3,Transmit mailbox data byte 3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "TMDT2,Transmit mailbox data byte 2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "TMDT1,Transmit mailbox data byte 1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "TMDT0,Transmit mailbox data byte 0"
|
|
line.long 0x2C "TMDTH2,Transmit mailbox 2 high byte data register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "TMDT7,Transmit mailbox data byte 7"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "TMDT6,Transmit mailbox data byte 6"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "TMDT5,Transmit mailbox data byte 5"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "TMDT4,Transmit mailbox data byte 4"
|
|
rgroup.long 0x1B0++0x1F
|
|
line.long 0x0 "RFI0,Receive FIFO 0 register"
|
|
hexmask.long.word 0x0 21.--31. 1. "RFSID,Receive FIFO standard identifier or receive FIFO extended identifier"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "RFEID,Receive FIFO extended identifier"
|
|
bitfld.long 0x0 2. "RFIDI,Receive FIFO identifier type indication" "0,1"
|
|
bitfld.long 0x0 1. "RFFRI,Receive FIFO frame type indication" "0,1"
|
|
line.long 0x4 "RFC0,Receive FIFO 0 data length and time stamp register"
|
|
hexmask.long.word 0x4 16.--31. 1. "RFTS,Receive FIFO time stamp"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RFFMN,Receive FIFO filter match number"
|
|
hexmask.long.byte 0x4 0.--3. 1. "RFDTL,Receive FIFO data length"
|
|
line.long 0x8 "RFDTL0,Receive FIFO 0 low byte data register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "RFDT3,Receive FIFO data byte 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "RFDT2,Receive FIFO data byte 2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "RFDT1,Receive FIFO data byte 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RFDT0,Receive FIFO data byte 0"
|
|
line.long 0xC "RFDTH0,Receive FIFO 0 high byte data register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "RFDT7,Receive FIFO data byte 7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "RFDT6,Receive FIFO data byte 6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "RFDT5,Receive FIFO data byte 5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "RFDT4,Receive FIFO data byte 4"
|
|
line.long 0x10 "RFI1,Receive FIFO 1 register"
|
|
hexmask.long.word 0x10 21.--31. 1. "RFSID,Receive FIFO standard identifier or receive FIFO extended identifier"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "RFEID,Receive FIFO extended identifier"
|
|
bitfld.long 0x10 2. "RFIDI,Receive FIFO identifier type indication" "0,1"
|
|
bitfld.long 0x10 1. "RFFRI,Receive FIFO frame type indication" "0,1"
|
|
line.long 0x14 "RFC1,Receive FIFO 1 data length and time stamp register"
|
|
hexmask.long.word 0x14 16.--31. 1. "RFTS,Receive FIFO time stamp"
|
|
hexmask.long.byte 0x14 8.--15. 1. "RFFMN,Receive FIFO filter match number"
|
|
hexmask.long.byte 0x14 0.--3. 1. "RFDTL,Receive FIFO data length"
|
|
line.long 0x18 "RFDTL1,Receive FIFO 1 low byte data register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "RFDT3,Receive FIFO data byte 3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "RFDT2,Receive FIFO data byte 2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "RFDT1,Receive FIFO data byte 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "RFDT0,Receive FIFO data byte 0"
|
|
line.long 0x1C "RFDTH1,Receive FIFO 1 high byte data register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "RFDT7,Receive FIFO data byte 7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "RFDT6,Receive FIFO data byte 6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "RFDT5,Receive FIFO data byte 5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "RFDT4,Receive FIFO data byte 4"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "FCTRL,Filter control register"
|
|
bitfld.long 0x0 0. "FCS,Filters configure switch" "0,1"
|
|
line.long 0x4 "FMCFG,Filter mode config register"
|
|
bitfld.long 0x4 13. "FMSEL13,Filter mode select" "0,1"
|
|
bitfld.long 0x4 12. "FMSEL12,Filter mode select" "0,1"
|
|
bitfld.long 0x4 11. "FMSEL11,Filter mode select" "0,1"
|
|
bitfld.long 0x4 10. "FMSEL10,Filter mode select" "0,1"
|
|
bitfld.long 0x4 9. "FMSEL9,Filter mode select" "0,1"
|
|
bitfld.long 0x4 8. "FMSEL8,Filter mode select" "0,1"
|
|
bitfld.long 0x4 7. "FMSEL7,Filter mode select" "0,1"
|
|
bitfld.long 0x4 6. "FMSEL6,Filter mode select" "0,1"
|
|
bitfld.long 0x4 5. "FMSEL5,Filter mode select" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "FMSEL4,Filter mode select" "0,1"
|
|
bitfld.long 0x4 3. "FMSEL3,Filter mode select" "0,1"
|
|
bitfld.long 0x4 2. "FMSEL2,Filter mode select" "0,1"
|
|
bitfld.long 0x4 1. "FMSEL1,Filter mode select" "0,1"
|
|
bitfld.long 0x4 0. "FMSEL0,Filter mode select" "0,1"
|
|
group.long 0x20C++0x3
|
|
line.long 0x0 "FBWCFG,Filter bit width config register"
|
|
bitfld.long 0x0 13. "FBWSEL13,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 12. "FBWSEL12,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 11. "FBWSEL11,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 10. "FBWSEL10,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 9. "FBWSEL9,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 8. "FBWSEL8,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 7. "FBWSEL7,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 6. "FBWSEL6,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 5. "FBWSEL5,Filter bit width select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FBWSEL4,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 3. "FBWSEL3,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 2. "FBWSEL2,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 1. "FBWSEL1,Filter bit width select" "0,1"
|
|
bitfld.long 0x0 0. "FBWSEL0,Filter bit width select" "0,1"
|
|
group.long 0x214++0x3
|
|
line.long 0x0 "FRF,Filter related FIFO register"
|
|
bitfld.long 0x0 13. "FRFSEL13,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 12. "FRFSEL12,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 11. "FRFSEL11,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 10. "FRFSEL10,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 9. "FRFSEL9,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 8. "FRFSEL8,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 7. "FRFSEL7,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 6. "FRFSEL6,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 5. "FRFSEL5,Filter relation FIFO select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FRFSEL4,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 3. "FRFSEL3,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 2. "FRFSEL2,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 1. "FRFSEL1,Filter relation FIFO select" "0,1"
|
|
bitfld.long 0x0 0. "FRFSEL0,Filter relation FIFO select" "0,1"
|
|
group.long 0x21C++0x3
|
|
line.long 0x0 "FACFG,Filter activate configuration register"
|
|
bitfld.long 0x0 13. "FAEN13,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 12. "FAEN12,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 11. "FAEN11,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 10. "FAEN10,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 9. "FAEN9,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 8. "FAEN8,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 7. "FAEN7,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 6. "FAEN6,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 5. "FAEN5,Filter activate enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FAEN4,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 3. "FAEN3,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 2. "FAEN2,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 1. "FAEN1,Filter activate enable" "0,1"
|
|
bitfld.long 0x0 0. "FAEN0,Filter activate enable" "0,1"
|
|
group.long 0x240++0x6F
|
|
line.long 0x0 "F0FB1,Filter bank 0 filtrate bit register 1"
|
|
bitfld.long 0x0 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x0 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x0 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x0 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x0 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x0 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x0 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x0 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x0 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x0 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x0 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x0 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x0 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x0 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x0 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x0 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x0 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x0 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x0 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x0 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x0 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x0 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x0 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x0 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x0 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x0 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x0 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x0 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x0 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x4 "F0FB2,Filter bank 0 filtrate bit register 2"
|
|
bitfld.long 0x4 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x4 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x4 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x4 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x4 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x4 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x4 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x4 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x4 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x4 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x4 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x4 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x4 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x4 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x4 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x4 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x4 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x4 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x4 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x4 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x4 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x4 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x4 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x4 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x4 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x4 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x4 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x4 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x4 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x8 "F1FB1,Filter bank 1 filtrate bit register 1"
|
|
bitfld.long 0x8 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x8 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x8 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x8 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x8 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x8 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x8 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x8 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x8 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x8 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x8 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x8 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x8 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x8 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x8 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x8 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x8 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x8 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x8 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x8 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x8 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x8 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x8 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x8 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x8 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x8 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x8 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x8 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x8 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0xC "F1FB2,Filter bank 1 filtrate bit register 2"
|
|
bitfld.long 0xC 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0xC 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0xC 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0xC 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0xC 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0xC 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0xC 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0xC 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0xC 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0xC 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0xC 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0xC 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0xC 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0xC 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0xC 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0xC 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0xC 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0xC 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0xC 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0xC 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0xC 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0xC 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0xC 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0xC 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0xC 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0xC 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0xC 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0xC 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0xC 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x10 "F2FB1,Filter bank 2 filtrate bit register 1"
|
|
bitfld.long 0x10 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x10 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x10 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x10 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x10 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x10 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x10 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x10 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x10 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x10 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x10 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x10 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x10 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x10 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x10 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x10 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x10 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x10 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x10 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x10 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x10 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x10 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x10 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x10 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x10 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x10 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x10 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x10 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x10 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x10 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x14 "F2FB2,Filter bank 2 filtrate bit register 2"
|
|
bitfld.long 0x14 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x14 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x14 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x14 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x14 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x14 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x14 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x14 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x14 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x14 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x14 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x14 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x14 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x14 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x14 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x14 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x14 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x14 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x14 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x14 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x14 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x14 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x14 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x14 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x14 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x14 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x14 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x14 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x14 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x18 "F3FB1,Filter bank 3 filtrate bit register 1"
|
|
bitfld.long 0x18 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x18 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x18 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x18 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x18 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x18 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x18 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x18 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x18 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x18 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x18 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x18 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x18 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x18 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x18 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x18 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x18 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x18 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x18 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x18 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x18 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x18 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x18 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x18 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x18 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x18 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x18 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x18 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x18 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x18 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x18 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x18 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x1C "F3FB2,Filter bank 3 filtrate bit register 2"
|
|
bitfld.long 0x1C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x1C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x20 "F4FB1,Filter bank 4 filtrate bit register 1"
|
|
bitfld.long 0x20 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x20 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x20 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x20 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x20 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x20 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x20 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x20 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x20 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x20 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x20 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x20 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x20 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x20 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x20 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x20 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x20 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x20 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x20 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x20 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x20 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x20 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x20 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x20 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x20 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x20 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x20 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x20 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x20 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x20 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x24 "F4FB2,Filter bank 4 filtrate bit register 2"
|
|
bitfld.long 0x24 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x24 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x24 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x24 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x24 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x24 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x24 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x24 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x24 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x24 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x24 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x24 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x24 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x24 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x24 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x24 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x24 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x24 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x24 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x24 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x24 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x24 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x24 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x24 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x24 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x24 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x24 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x24 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x24 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x24 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x24 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x24 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x28 "F5FB1,Filter bank 5 filtrate bit register 1"
|
|
bitfld.long 0x28 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x28 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x28 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x28 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x28 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x28 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x28 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x28 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x28 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x28 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x28 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x28 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x28 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x28 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x28 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x28 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x28 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x28 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x28 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x28 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x28 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x28 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x28 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x28 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x28 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x28 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x28 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x28 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x28 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x28 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x28 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x28 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x2C "F5FB2,Filter bank 5 filtrate bit register 2"
|
|
bitfld.long 0x2C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x2C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x30 "F6FB1,Filter bank 6 filtrate bit register 1"
|
|
bitfld.long 0x30 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x30 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x30 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x30 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x30 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x30 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x30 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x30 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x30 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x30 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x30 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x30 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x30 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x30 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x30 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x30 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x30 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x30 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x30 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x30 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x30 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x30 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x30 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x30 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x30 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x30 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x30 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x30 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x30 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x30 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x30 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x30 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x34 "F6FB2,Filter bank 6 filtrate bit register 2"
|
|
bitfld.long 0x34 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x34 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x34 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x34 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x34 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x34 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x34 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x34 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x34 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x34 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x34 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x34 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x34 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x34 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x34 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x34 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x34 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x34 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x34 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x34 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x34 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x34 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x34 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x34 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x34 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x34 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x34 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x34 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x34 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x34 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x34 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x34 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x38 "F7FB1,Filter bank 7 filtrate bit register 1"
|
|
bitfld.long 0x38 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x38 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x38 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x38 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x38 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x38 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x38 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x38 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x38 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x38 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x38 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x38 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x38 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x38 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x38 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x38 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x38 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x38 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x38 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x38 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x38 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x38 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x38 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x38 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x38 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x38 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x38 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x38 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x38 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x38 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x38 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x38 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x3C "F7FB2,Filter bank 7 filtrate bit register 2"
|
|
bitfld.long 0x3C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x3C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x40 "F8FB1,Filter bank 8 filtrate bit register 1"
|
|
bitfld.long 0x40 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x40 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x40 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x40 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x40 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x40 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x40 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x40 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x40 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x40 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x40 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x40 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x40 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x40 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x40 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x40 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x40 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x40 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x40 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x40 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x40 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x40 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x40 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x40 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x40 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x40 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x40 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x40 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x40 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x40 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x40 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x40 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x44 "F8FB2,Filter bank 8 filtrate bit register 2"
|
|
bitfld.long 0x44 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x44 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x44 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x44 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x44 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x44 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x44 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x44 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x44 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x44 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x44 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x44 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x44 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x44 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x44 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x44 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x44 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x44 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x44 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x44 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x44 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x44 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x44 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x44 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x44 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x44 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x44 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x44 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x44 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x44 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x44 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x44 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x48 "F9FB1,Filter bank 9 filtrate bit register 1"
|
|
bitfld.long 0x48 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x48 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x48 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x48 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x48 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x48 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x48 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x48 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x48 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x48 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x48 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x48 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x48 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x48 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x48 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x48 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x48 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x48 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x48 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x48 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x48 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x48 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x48 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x48 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x48 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x48 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x48 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x48 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x48 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x48 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x48 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x48 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x4C "F9FB2,Filter bank 9 filtrate bit register 2"
|
|
bitfld.long 0x4C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x4C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x50 "F10FB1,Filter bank 10 filtrate bit register 1"
|
|
bitfld.long 0x50 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x50 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x50 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x50 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x50 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x50 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x50 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x50 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x50 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x50 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x50 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x50 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x50 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x50 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x50 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x50 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x50 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x50 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x50 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x50 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x50 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x50 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x50 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x50 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x50 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x50 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x50 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x50 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x50 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x50 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x50 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x50 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x54 "F10FB2,Filter bank 10 filtrate bit register 2"
|
|
bitfld.long 0x54 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x54 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x54 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x54 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x54 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x54 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x54 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x54 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x54 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x54 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x54 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x54 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x54 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x54 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x54 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x54 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x54 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x54 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x54 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x54 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x54 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x54 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x54 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x54 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x54 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x54 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x54 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x54 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x54 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x54 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x54 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x54 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x58 "F11FB1,Filter bank 11 filtrate bit register 1"
|
|
bitfld.long 0x58 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x58 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x58 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x58 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x58 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x58 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x58 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x58 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x58 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x58 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x58 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x58 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x58 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x58 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x58 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x58 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x58 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x58 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x58 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x58 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x58 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x58 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x58 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x58 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x58 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x58 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x58 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x58 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x58 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x58 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x58 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x58 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x5C "F11FB2,Filter bank 11 filtrate bit register 2"
|
|
bitfld.long 0x5C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x5C 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x60 "F12FB1,Filter bank 12 filtrate bit register 1"
|
|
bitfld.long 0x60 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x60 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x60 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x60 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x60 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x60 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x60 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x60 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x60 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x60 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x60 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x60 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x60 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x60 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x60 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x60 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x60 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x60 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x60 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x60 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x60 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x60 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x60 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x60 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x60 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x60 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x60 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x60 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x60 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x60 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x60 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x60 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x64 "F12FB2,Filter bank 12 filtrate bit register 2"
|
|
bitfld.long 0x64 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x64 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x64 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x64 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x64 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x64 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x64 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x64 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x64 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x64 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x64 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x64 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x64 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x64 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x64 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x64 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x64 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x64 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x64 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x64 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x64 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x64 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x64 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x64 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x64 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x64 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x64 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x64 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x64 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x64 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x64 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x64 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x68 "F13FB1,Filter bank 13 filtrate bit register 1"
|
|
bitfld.long 0x68 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x68 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x68 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x68 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x68 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x68 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x68 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x68 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x68 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x68 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x68 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x68 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x68 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x68 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x68 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x68 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x68 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x68 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x68 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x68 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x68 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x68 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x68 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x68 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x68 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x68 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x68 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x68 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x68 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x68 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x68 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x68 0. "FFDB0,Filter data bit" "0,1"
|
|
line.long 0x6C "F13FB2,Filter bank 13 filtrate bit register 2"
|
|
bitfld.long 0x6C 31. "FFDB31,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 30. "FFDB30,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 29. "FFDB29,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 28. "FFDB28,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 27. "FFDB27,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 26. "FFDB26,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 25. "FFDB25,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 24. "FFDB24,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 23. "FFDB23,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 22. "FFDB22,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 21. "FFDB21,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 20. "FFDB20,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 19. "FFDB19,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 18. "FFDB18,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 17. "FFDB17,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 16. "FFDB16,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 15. "FFDB15,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 14. "FFDB14,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 13. "FFDB13,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 12. "FFDB12,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 11. "FFDB11,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 10. "FFDB10,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 9. "FFDB9,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 8. "FFDB8,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 7. "FFDB7,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 6. "FFDB6,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 5. "FFDB5,Filter data bit" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 4. "FFDB4,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 3. "FFDB3,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 2. "FFDB2,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 1. "FFDB1,Filter data bit" "0,1"
|
|
bitfld.long 0x6C 0. "FFDB0,Filter data bit" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "CRC (CRC Calculation Unit)"
|
|
base ad:0x40023000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "DT,Data register"
|
|
hexmask.long 0x0 0.--31. 1. "DT,Data Register"
|
|
line.long 0x4 "CDT,Common data register"
|
|
bitfld.long 0x4 0. "CDT,Common Data" "0,1"
|
|
line.long 0x8 "CTRL,Control register"
|
|
bitfld.long 0x8 7. "REVOD,Reverse output data" "0,1"
|
|
bitfld.long 0x8 5.--6. "REVID,Reverse input data" "0,1,2,3"
|
|
bitfld.long 0x8 3.--4. "POLY_SIZE,Polynomial size" "0,1,2,3"
|
|
bitfld.long 0x8 0. "RST,Reset bit" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "IDT,Initial data register"
|
|
hexmask.long 0x0 0.--31. 1. "IDT,Initial Data"
|
|
line.long 0x4 "POLY,Polynomial coefficient register"
|
|
hexmask.long 0x4 0.--31. 1. "POLY,polynomial coefficient"
|
|
tree.end
|
|
tree "CRM (Clock and Reset Management)"
|
|
base ad:0x40023800
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL,Clock control register"
|
|
rbitfld.long 0x0 25. "PLLSTBL,PLL clock ready flag" "0,1"
|
|
bitfld.long 0x0 24. "PLLEN,PLL enable" "0,1"
|
|
bitfld.long 0x0 19. "CFDEN,Clock failure detection enable" "0,1"
|
|
bitfld.long 0x0 18. "HEXTBYPS,High speed exernal crystal bypass" "0,1"
|
|
rbitfld.long 0x0 17. "HEXTSTBL,High speed exernal crystal ready flag" "0,1"
|
|
bitfld.long 0x0 16. "HEXTEN,High speed exernal crystal enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "HICKCAL,High speed internal clock calibration"
|
|
hexmask.long.byte 0x0 2.--7. 1. "HICKTRIM,High speed internal clock trimming"
|
|
rbitfld.long 0x0 1. "HICKSTBL,High speed internal clock ready flag" "0,1"
|
|
bitfld.long 0x0 0. "HICKEN,High speed internal clock enable" "0,1"
|
|
line.long 0x4 "PLLCFG,PLL configuration register"
|
|
bitfld.long 0x4 22. "PLLRCS,PLL reference clock select" "0,1"
|
|
bitfld.long 0x4 16.--18. "PLL_FR,PLL post-division" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x4 6.--14. 1. "PLL_NS,PLL frequency multiplication factor"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PLL_MS,PLL pre-division"
|
|
line.long 0x8 "CFG,Clock configuration register (CRM_CFG)"
|
|
bitfld.long 0x8 30.--31. "CLKOUT_SEL1,Clock output selection1" "0,1,2,3"
|
|
bitfld.long 0x8 27.--29. "CLKOUTDIV1,Clock output division1" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x8 16.--20. 1. "ERTCDIV,HEXT division for ERTC clock"
|
|
bitfld.long 0x8 13.--15. "APB2DIV,APB2 division" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 10.--12. "APB1DIV,APB1 division" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AHBDIV,AHB division"
|
|
newline
|
|
rbitfld.long 0x8 2.--3. "SCLKSTS,System Clock select Status" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "SCLKSEL,System clock select" "0,1,2,3"
|
|
line.long 0xC "CLKINT,Clock interrupt register (CRM_CLKINT)"
|
|
bitfld.long 0xC 23. "CFDFC,Clock failure detection interrupt clear" "0,1"
|
|
bitfld.long 0xC 20. "PLLSTBLFC,PLL ready interrupt clear" "0,1"
|
|
bitfld.long 0xC 19. "HEXTSTBLFC,HEXT ready interrupt clear" "0,1"
|
|
bitfld.long 0xC 18. "HICKSTBLFC,HICK ready interrupt clear" "0,1"
|
|
bitfld.long 0xC 17. "LEXTSTBLFC,LEXT ready interrupt clear" "0,1"
|
|
bitfld.long 0xC 16. "LICKSTBLFC,LICK ready interrupt clear" "0,1"
|
|
newline
|
|
bitfld.long 0xC 12. "PLLSTBLIEN,PLL ready interrupt enable" "0,1"
|
|
bitfld.long 0xC 11. "HEXTSTBLIEN,HEXT ready interrupt enable" "0,1"
|
|
bitfld.long 0xC 10. "HICKSTBLIEN,HICK ready interrupt enable" "0,1"
|
|
bitfld.long 0xC 9. "LEXTSTBLIEN,LEXT ready interrupt enable" "0,1"
|
|
bitfld.long 0xC 8. "LICKSTBLIEN,LICK ready interrupt enable" "0,1"
|
|
rbitfld.long 0xC 7. "CFDF,Clock failure detection interrupt flag" "0,1"
|
|
newline
|
|
rbitfld.long 0xC 4. "PLLSTBLF,PLL ready interrupt flag" "0,1"
|
|
rbitfld.long 0xC 3. "HEXTSTBLF,HEXT ready interrupt flag" "0,1"
|
|
rbitfld.long 0xC 2. "HICKSTBLF,HICK ready interrupt flag" "0,1"
|
|
rbitfld.long 0xC 1. "LEXTSTBLF,LEXT ready interrupt flag" "0,1"
|
|
rbitfld.long 0xC 0. "LICKSTBLF,LICK ready interrupt flag" "0,1"
|
|
line.long 0x10 "AHBRST1,AHB peripheral reset register 1 (CRM_AHBRST1)"
|
|
bitfld.long 0x10 24. "DMA2RST,DMA2 reset" "0,1"
|
|
bitfld.long 0x10 22. "DMA1RST,DMA1 reset" "0,1"
|
|
bitfld.long 0x10 12. "CRCRST,CRC reset" "0,1"
|
|
bitfld.long 0x10 5. "GPIOFRST,IO port F reset" "0,1"
|
|
bitfld.long 0x10 4. "GPIOERST,IO port E reset" "0,1"
|
|
bitfld.long 0x10 3. "GPIODRST,IO port D reset" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "GPIOCRST,IO port C reset" "0,1"
|
|
bitfld.long 0x10 1. "GPIOBRST,IO port B reset" "0,1"
|
|
bitfld.long 0x10 0. "GPIOARST,IO port A reset" "0,1"
|
|
line.long 0x14 "AHBRST2,AHB peripheral reset register 2 (CRM_AHBRST2)"
|
|
bitfld.long 0x14 7. "OTGFS1RST,OTGFS1 reset" "0,1"
|
|
line.long 0x18 "AHBRST3,AHB peripheral reset register 3 (CRM_AHBRST3)"
|
|
bitfld.long 0x18 0. "XMCRST,XMC reset" "0,1"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "APB1RST,APB1 peripheral reset register (CRM_APB1RST)"
|
|
bitfld.long 0x0 31. "USART8RST,USART8 reset" "0,1"
|
|
bitfld.long 0x0 30. "USART7RST,USART7 reset" "0,1"
|
|
bitfld.long 0x0 29. "DACRST,DAC reset" "0,1"
|
|
bitfld.long 0x0 28. "PWCRST,PWC reset" "0,1"
|
|
bitfld.long 0x0 26. "CAN2RST,CAN2 reset" "0,1"
|
|
bitfld.long 0x0 25. "CAN1RST,CAN1 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "I2C3RST,I2C3 reset" "0,1"
|
|
bitfld.long 0x0 22. "I2C2RST,I2C2 reset" "0,1"
|
|
bitfld.long 0x0 21. "I2C1RST,I2C1 reset" "0,1"
|
|
bitfld.long 0x0 20. "USART5RST,USART5 reset" "0,1"
|
|
bitfld.long 0x0 19. "USART4RST,USART4 reset" "0,1"
|
|
bitfld.long 0x0 18. "USART3RST,USART3 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "USART2RST,USART2 reset" "0,1"
|
|
bitfld.long 0x0 15. "SPI3RST,SPI3 reset" "0,1"
|
|
bitfld.long 0x0 14. "SPI2RST,SPI2 reset" "0,1"
|
|
bitfld.long 0x0 11. "WWDTRST,Window watchdog reset" "0,1"
|
|
bitfld.long 0x0 8. "TMR14RST,Timer14 reset" "0,1"
|
|
bitfld.long 0x0 7. "TMR13RST,Timer13 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TMR12RST,Timer12 reset" "0,1"
|
|
bitfld.long 0x0 5. "TMR7RST,Timer7 reset" "0,1"
|
|
bitfld.long 0x0 4. "TMR6RST,Timer6 reset" "0,1"
|
|
bitfld.long 0x0 2. "TMR4RST,Timer4 reset" "0,1"
|
|
bitfld.long 0x0 1. "TMR3RST,Timer3 reset" "0,1"
|
|
bitfld.long 0x0 0. "TMR2RST,Timer2 reset" "0,1"
|
|
line.long 0x4 "APB2RST,APB2 peripheral reset register (CRM_APB2RST)"
|
|
bitfld.long 0x4 29. "ACCRST,ACC reset" "0,1"
|
|
bitfld.long 0x4 18. "TMR11RST,Timer 11 reset" "0,1"
|
|
bitfld.long 0x4 17. "TMR10RST,Timer10 reset" "0,1"
|
|
bitfld.long 0x4 16. "TMR9RST,Timer9 reset" "0,1"
|
|
bitfld.long 0x4 14. "SCFGRST,SCFG reset" "0,1"
|
|
bitfld.long 0x4 12. "SPI1RST,SPI1 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ADCRST,ADC reset" "0,1"
|
|
bitfld.long 0x4 5. "USART6RST,USART6 reset" "0,1"
|
|
bitfld.long 0x4 4. "USART1RST,USART1 reset" "0,1"
|
|
bitfld.long 0x4 0. "TMR1RST,Timer1 reset" "0,1"
|
|
group.long 0x30++0xB
|
|
line.long 0x0 "AHBEN1,AHB Peripheral Clock enable register 1 (CRM_AHBEN1)"
|
|
bitfld.long 0x0 24. "DMA2EN,DMA2 clock enable" "0,1"
|
|
bitfld.long 0x0 22. "DMA1EN,DMA1 clock enable" "0,1"
|
|
bitfld.long 0x0 12. "CRCEN,CRC clock enable" "0,1"
|
|
bitfld.long 0x0 5. "GPIOFEN,IO F clock enable" "0,1"
|
|
bitfld.long 0x0 4. "GPIOEEN,IO E clock enable" "0,1"
|
|
bitfld.long 0x0 3. "GPIODEN,IO D clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "GPIOCEN,IO C clock enable" "0,1"
|
|
bitfld.long 0x0 1. "GPIOBEN,IO B clock enable" "0,1"
|
|
bitfld.long 0x0 0. "GPIOAEN,IO A clock enable" "0,1"
|
|
line.long 0x4 "AHBEN2,AHB peripheral clock enable register 2 (CRM_AHBEN2)"
|
|
bitfld.long 0x4 7. "OTGFS1EN,OTGFS1 clock enable" "0,1"
|
|
line.long 0x8 "AHBEN3,AHB peripheral clock enable register 3 (CRM_AHBEN3)"
|
|
bitfld.long 0x8 0. "XMCEN,XMC clock enable" "0,1"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "APB1EN,APB1 peripheral clock enable register (CRM_APB1EN)"
|
|
bitfld.long 0x0 31. "USART8EN,USART8 clock enable" "0,1"
|
|
bitfld.long 0x0 30. "USART7EN,USART7 clock enable" "0,1"
|
|
bitfld.long 0x0 29. "DACEN,DAC clock enable" "0,1"
|
|
bitfld.long 0x0 28. "PWCEN,PWC clock enable" "0,1"
|
|
bitfld.long 0x0 26. "CAN2EN,CAN2 clock enable" "0,1"
|
|
bitfld.long 0x0 25. "CAN1EN,CAN1 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "I2C3EN,I2C3 clock enable" "0,1"
|
|
bitfld.long 0x0 22. "I2C2EN,I2C2 clock enable" "0,1"
|
|
bitfld.long 0x0 21. "I2C1EN,I2C1 clock enable" "0,1"
|
|
bitfld.long 0x0 20. "USART5EN,USART5 clock enable" "0,1"
|
|
bitfld.long 0x0 19. "USART4EN,USART4 clock enable" "0,1"
|
|
bitfld.long 0x0 18. "USART3EN,USART3 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "USART2EN,USART2 clock enable" "0,1"
|
|
bitfld.long 0x0 15. "SPI3EN,SPI3 clock enable" "0,1"
|
|
bitfld.long 0x0 14. "SPI2EN,SPI2 clock enable" "0,1"
|
|
bitfld.long 0x0 11. "WWDTEN,WWDT clock enable" "0,1"
|
|
bitfld.long 0x0 8. "TMR14EN,Timer14 clock enable" "0,1"
|
|
bitfld.long 0x0 7. "TMR13EN,Timer13 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TMR12EN,Timer12 clock enable" "0,1"
|
|
bitfld.long 0x0 5. "TMR7EN,Timer7 clock enable" "0,1"
|
|
bitfld.long 0x0 4. "TMR6EN,Timer6 clock enable" "0,1"
|
|
bitfld.long 0x0 2. "TMR4EN,Timer4 clock enable" "0,1"
|
|
bitfld.long 0x0 1. "TMR3EN,Timer3 clock enable" "0,1"
|
|
bitfld.long 0x0 0. "TMR2EN,Timer2 clock enable" "0,1"
|
|
line.long 0x4 "APB2EN,APB2 peripheral clock enable register (CRM_APB2EN)"
|
|
bitfld.long 0x4 29. "ACCEN,ACC clock enable" "0,1"
|
|
bitfld.long 0x4 18. "TMR11EN,Timer11 clock enable" "0,1"
|
|
bitfld.long 0x4 17. "TMR10EN,Timer10 clock enable" "0,1"
|
|
bitfld.long 0x4 16. "TMR9EN,Timer9 clock enable" "0,1"
|
|
bitfld.long 0x4 14. "SCFGEN,SCFG clock enable" "0,1"
|
|
bitfld.long 0x4 12. "SPI1EN,SPI1 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ADCEN,ADC clock enable" "0,1"
|
|
bitfld.long 0x4 5. "USART6EN,USART6 clock enable" "0,1"
|
|
bitfld.long 0x4 4. "USART1EN,USART1 clock enable" "0,1"
|
|
bitfld.long 0x4 0. "TMR1EN,Timer1 clock enable" "0,1"
|
|
group.long 0x50++0xB
|
|
line.long 0x0 "AHBLPEN1,AHB Low-power Peripheral Clock enable register 1 (CRM_AHBLPEN1)"
|
|
bitfld.long 0x0 24. "DMA2LPEN,DMA2 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 22. "DMA1LPEN,DMA1 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 16. "SRAMLPEN,SRAM clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 15. "FLASHLPEN,Flash clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 12. "CRCLPEN,CRC clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 5. "GPIOFLPEN,IO F clock enable during sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "GPIOELPEN,IO E clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 3. "GPIODLPEN,IO D clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 2. "GPIOCLPEN,IO C clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 1. "GPIOBLPEN,IO B clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 0. "GPIOALPEN,IO A clock enable during sleep mode" "0,1"
|
|
line.long 0x4 "AHBLPEN2,AHB peripheral Low-power clock enable register 2 (CRM_AHBLPEN2)"
|
|
bitfld.long 0x4 7. "OTGFS1LPEN,OTGFS1 clock enable during sleep mode" "0,1"
|
|
line.long 0x8 "AHBLPEN3,AHB peripheral Low-power clock enable register 3 (CRM_AHBLPEN3)"
|
|
bitfld.long 0x8 0. "XMCLPEN,XMC clock enable during sleep mode" "0,1"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "APB1LPEN,APB1 peripheral Low-power clock enable register (CRM_APB1LPEN)"
|
|
bitfld.long 0x0 31. "USART8LPEN,USART8 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 30. "USART7LPEN,USART7 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 29. "DACLPEN,DAC clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 28. "PWCLPEN,PWC clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 26. "CAN2LPEN,CAN2 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 25. "CAN1LPEN,CAN1 clock enable during sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "I2C3CPEN,I2C3 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 22. "I2C2CPEN,I2C2 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 21. "I2C1CPEN,I2C1 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 20. "USART5LPEN,USART5 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 19. "USART4LPEN,USART4 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 18. "USART3LPEN,USART3 clock enable during sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "USART2LPEN,USART2 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 15. "SPI3LPEN,SPI3 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 14. "SPI2LPEN,SPI2 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 11. "WWDTLPEN,WWDT clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 8. "TMR14LPEN,Timer14 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 7. "TMR13LPEN,Timer13 clock enable during sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TMR12LPEN,Timer12 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 5. "TMR7LPEN,Timer7 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 4. "TMR6LPEN,Timer6 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 2. "TMR4LPEN,Timer4 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 1. "TMR3LPEN,Timer3 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x0 0. "TMR2LPEN,Timer2 clock enable during sleep mode" "0,1"
|
|
line.long 0x4 "APB2LPEN,APB2 peripheral Low-power clock enable register (CRM_APB2LPEN)"
|
|
bitfld.long 0x4 29. "ACCLPEN,ACC clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x4 18. "TMR11LPEN,Timer11 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x4 17. "TMR10LPEN,Timer10 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x4 16. "TMR9LPEN,Timer9 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x4 14. "SCFGLPEN,SCFG clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x4 12. "SPI1LPEN,SPI1 clock enable during sleep mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ADCLPEN,ADC clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x4 5. "USART6LPEN,USART6 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x4 4. "USART1LPEN,USART1 clock enable during sleep mode" "0,1"
|
|
bitfld.long 0x4 0. "TMR1LPEN,Timer1 clock enable during sleep mode" "0,1"
|
|
line.long 0x8 "PICLKS,Peripheral independent clock register (CRM_PICLKS)"
|
|
bitfld.long 0x8 12.--13. "I2C1SEL,I2C1 clock select" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "USART3SEL,USART3 clock select" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "USART2SEL,USART2 clock select" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "USART1SEL,USART1 clock select" "0,1,2,3"
|
|
group.long 0x70++0x7
|
|
line.long 0x0 "BPDC,Battery powered domain control register (CRM_BPDC)"
|
|
bitfld.long 0x0 16. "BPDRST,Battery powered domain software reset" "0,1"
|
|
bitfld.long 0x0 15. "ERTCEN,ERTC clock enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "ERTCSEL,ERTC clock source selection" "0,1,2,3"
|
|
bitfld.long 0x0 2. "LEXTBYPS,Low speed external crystal bypass" "0,1"
|
|
rbitfld.long 0x0 1. "LEXTSTBL,Low speed external crystal ready" "0,1"
|
|
bitfld.long 0x0 0. "LEXTEN,Low speed external crystal enable" "0,1"
|
|
line.long 0x4 "CTRLSTS,Control/status register (CRM_CTRLSTS)"
|
|
bitfld.long 0x4 31. "LPRSTF,Low-power reset flag" "0,1"
|
|
bitfld.long 0x4 30. "WWDTRSTF,Window watchdog timer reset flag" "0,1"
|
|
bitfld.long 0x4 29. "WDTRSTF,Watchdog timer reset flag" "0,1"
|
|
bitfld.long 0x4 28. "SWRSTF,Software reset flag" "0,1"
|
|
bitfld.long 0x4 27. "PORRSTF,POR/LVR reset flag" "0,1"
|
|
bitfld.long 0x4 26. "NRSTF,PIN reset flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "RSTFC,Reset reset flag" "0,1"
|
|
rbitfld.long 0x4 1. "LICKSTBL,Low speed internal clock ready" "0,1"
|
|
bitfld.long 0x4 0. "LICKEN,Low speed internal clock enable" "0,1"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "MISC1,Miscellaneous register1"
|
|
hexmask.long.byte 0x0 28.--31. 1. "CLKOUTDIV2,Clock output division2"
|
|
hexmask.long.byte 0x0 16.--19. 1. "CLKOUT_SEL2,Clock output select2"
|
|
bitfld.long 0x0 15. "PLLCLK_TO_ADC,ADC clock source select" "0,1"
|
|
bitfld.long 0x0 14. "HICK_TO_SCLK,HICK to system clock" "0,1"
|
|
bitfld.long 0x0 13. "HICK_TO_USB,HICK to usb clock" "0,1"
|
|
bitfld.long 0x0 12. "HICKDIV,HICK 6 divider selection" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "HICKCAL_KEY,HICKCAL write key value"
|
|
line.long 0x4 "MISC2,Miscellaneous register2"
|
|
bitfld.long 0x4 19.--21. "HEXT_TO_SCLK_DIV,HEXT as system clock frequency division" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 16.--18. "HICK_TO_SCLK_DIV,HICK as system clock frequency division" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 12.--15. 1. "USBDIV,USB division"
|
|
bitfld.long 0x4 4.--5. "AUTO_STEP_EN,AUTO_STEP_EN" "0,1,2,3"
|
|
tree.end
|
|
tree "DAC (Digital-to-Analog Converter)"
|
|
base ad:0x40007400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRL,Control register (DAC_CTRL)"
|
|
bitfld.long 0x0 29. "D2DMAUDRIEN,DAC2 DMA underrun interrupt enable" "0,1"
|
|
bitfld.long 0x0 28. "D2DMAEN,DAC2 DMA enable" "0,1"
|
|
hexmask.long.byte 0x0 24.--27. 1. "D2NBSEL,DAC2 mask/amplitude selector"
|
|
bitfld.long 0x0 22.--23. "D2NM,DAC2 noise/triangle wave generation enable" "0,1,2,3"
|
|
bitfld.long 0x0 19.--21. "D2TRGSEL,DAC2 trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 18. "D2TRGEN,DAC2 trigger enable" "0,1"
|
|
bitfld.long 0x0 17. "D2OBDIS,DAC2 output buffer disable" "0,1"
|
|
bitfld.long 0x0 16. "D2EN,DAC2 enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "D1DMAUDRIEN,DAC1 DMA underrun interrupt enable" "0,1"
|
|
bitfld.long 0x0 12. "D1DMAEN,DAC1 DMA enable" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "D1NBSEL,DAC1 mask/amplitude selector"
|
|
bitfld.long 0x0 6.--7. "D1NM,DAC1 noise/triangle wave generation enable" "0,1,2,3"
|
|
bitfld.long 0x0 3.--5. "D1TRGSEL,DAC1 trigger selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "D1TRGEN,DAC1 trigger enable" "0,1"
|
|
bitfld.long 0x0 1. "D1OBDIS,DAC1 output buffer disable" "0,1"
|
|
bitfld.long 0x0 0. "D1EN,DAC1 enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "SWTRG,DAC software trigger register(DAC_SWTRIGR)"
|
|
bitfld.long 0x0 1. "D2SWTRG,DAC2 software trigger" "0,1"
|
|
bitfld.long 0x0 0. "D1SWTRG,DAC1 software trigger" "0,1"
|
|
group.long 0x8++0x23
|
|
line.long 0x0 "D1DTH12R,DAC1 12-bit right-aligned data holding register(DAC_D1DTH12R)"
|
|
hexmask.long.word 0x0 0.--11. 1. "D1DT12R,DAC1 12-bit right-aligned data"
|
|
line.long 0x4 "D1DTH12L,DAC1 12-bit left aligned data holding register (DAC_D1DTH12L)"
|
|
hexmask.long.word 0x4 4.--15. 1. "D1DT12L,DAC1 12-bit left-aligned data"
|
|
line.long 0x8 "D1DTH8R,DAC1 8-bit right aligned data holding register (DAC_D1DTH8R)"
|
|
hexmask.long.byte 0x8 0.--7. 1. "D1DT8R,DAC1 8-bit right-aligned data"
|
|
line.long 0xC "D2DTH12R,DAC2 12-bit right aligned data holding register (DAC_D2DTH12R)"
|
|
hexmask.long.word 0xC 0.--11. 1. "D2DT12R,DAC2 12-bit right-aligned"
|
|
line.long 0x10 "D2DTH12L,DAC2 12-bit left aligned data holding register (DAC_D2DTH12L)"
|
|
hexmask.long.word 0x10 4.--15. 1. "D2DT12L,DAC2 12-bit left-aligned data"
|
|
line.long 0x14 "D2DTH8R,DAC2 8-bit right-aligned data holding register (DAC_D2DTH8R)"
|
|
hexmask.long.byte 0x14 0.--7. 1. "D2DT8R,DAC2 8-bit right-aligned data"
|
|
line.long 0x18 "DDTH12R,Dual DAC 12-bit right-aligned data holding register (DAC_DDTH12R). Bits 31:28 Reserved. Bits 15:12 Reserved"
|
|
hexmask.long.word 0x18 16.--27. 1. "DD2DT12R,DAC2 12-bit right-aligned data"
|
|
hexmask.long.word 0x18 0.--11. 1. "DD1DT12R,DAC1 12-bit right-aligned data"
|
|
line.long 0x1C "DDTH12L,DUAL DAC 12-bit left aligned data holding register (DAC_DDTH12L). Bits 19:16 Reserved. Bits 3:0 Reserved"
|
|
hexmask.long.word 0x1C 20.--31. 1. "DD2DT12L,DAC2 12-bit right-aligned data"
|
|
hexmask.long.word 0x1C 4.--15. 1. "DD1DT12L,DAC1 12-bit left-aligned data"
|
|
line.long 0x20 "DDTH8R,DUAL DAC 8-bit right aligned data holding register (DAC_DDTH8R). Bits 31:16 Reserved"
|
|
hexmask.long.byte 0x20 8.--15. 1. "DD2DT8R,DAC2 8-bit right-aligned data"
|
|
hexmask.long.byte 0x20 0.--7. 1. "DD1DT8R,DAC1 8-bit right-aligned data"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "D1ODT,DAC1 data output register (DAC_D1ODT)"
|
|
hexmask.long.word 0x0 0.--11. 1. "D1ODT,DAC1 data output"
|
|
line.long 0x4 "D2ODT,DAC2 data output register (DAC_D2ODT)"
|
|
hexmask.long.word 0x4 0.--11. 1. "D2ODT,DAC2 data output"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "STS,DAC2 status register (DAC_STS)"
|
|
bitfld.long 0x0 29. "D2DMAUDRF,DAC2 DMA underrun flag" "0,1"
|
|
bitfld.long 0x0 13. "D1DMAUDRF,DAC1 DMA underrun flag" "0,1"
|
|
tree.end
|
|
tree "DEBUG (Debug Support)"
|
|
base ad:0xE0042000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IDCODE,DEBUG IDCODE"
|
|
hexmask.long 0x0 0.--31. 1. "PID,Product ID"
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "CTRL,DEBUG CTRL"
|
|
bitfld.long 0x0 2. "STANDBY_DEBUG,STANDBY_DEBUG" "0,1"
|
|
bitfld.long 0x0 1. "DEEPSLEEP_DEBUG,DEEPSLEEP_DEBUG" "0,1"
|
|
bitfld.long 0x0 0. "SLEEP_DEBUG,SLEEP_DEBUG" "0,1"
|
|
line.long 0x4 "APB1_PAUSE,DEBUG APB1 PAUSE"
|
|
bitfld.long 0x4 28. "I2C3_SMBUS_TIMEOUT,I2C3_SMBUS_TIMEOUT" "0,1"
|
|
bitfld.long 0x4 27. "I2C2_SMBUS_TIMEOUT,I2C2_SMBUS_TIMEOUT" "0,1"
|
|
bitfld.long 0x4 26. "CAN2_PAUSE,CAN2_PAUSE" "0,1"
|
|
bitfld.long 0x4 25. "CAN1_PAUSE,CAN1_PAUSE" "0,1"
|
|
bitfld.long 0x4 24. "I2C1_SMBUS_TIMEOUT,I2C1_SMBUS_TIMEOUT" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "ERTC512_PAUSE,ERTC512_PAUSE" "0,1"
|
|
bitfld.long 0x4 12. "WDT_PAUSE,WDT_PAUSE" "0,1"
|
|
bitfld.long 0x4 11. "WWDT_PAUSE,WWDT_PAUSE" "0,1"
|
|
bitfld.long 0x4 10. "ERTC_PAUSE,ERTC_PAUSE" "0,1"
|
|
bitfld.long 0x4 8. "TMR14_PAUSE,TMR14_PAUSE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "TMR13_PAUSE,TMR13_PAUSE" "0,1"
|
|
bitfld.long 0x4 6. "TMR12_PAUSE,TMR12_PAUSE" "0,1"
|
|
bitfld.long 0x4 5. "TMR7_PAUSE,TMR7_PAUSE" "0,1"
|
|
bitfld.long 0x4 4. "TMR6_PAUSE,TMR6_PAUSE" "0,1"
|
|
bitfld.long 0x4 2. "TMR4_PAUSE,TMR4_PAUSE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "TMR3_PAUSE,TMR3_PAUSE" "0,1"
|
|
bitfld.long 0x4 0. "TMR2_PAUSE,TMR2_PAUSE" "0,1"
|
|
line.long 0x8 "APB2_PAUSE,DEBUG APB2 PAUSE"
|
|
bitfld.long 0x8 18. "TMR11_PAUSE,TMR11_PAUSE" "0,1"
|
|
bitfld.long 0x8 17. "TMR10_PAUSE,TMR10_PAUSE" "0,1"
|
|
bitfld.long 0x8 16. "TMR9_PAUSE,TMR9_PAUSE" "0,1"
|
|
bitfld.long 0x8 1. "TMR8_PAUSE,TMR8_PAUSE" "0,1"
|
|
bitfld.long 0x8 0. "TMR1_PAUSE,TMR1_PAUSE" "0,1"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SER_ID,SERIES ID"
|
|
hexmask.long.byte 0x0 8.--15. 1. "SER_ID,series ID"
|
|
bitfld.long 0x0 0.--2. "REV_ID,version ID" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "DMA (DMA Controller)"
|
|
base ad:0x0
|
|
tree "DMA1"
|
|
base ad:0x40026000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "STS,DMA interrupt status register (DMA_STS)"
|
|
bitfld.long 0x0 27. "DTERRF7,Channel 7 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 26. "HDTF7,Channel 7 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 25. "FDTF7,Channel 7 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 24. "GF7,Channel 7 Global event flag" "0,1"
|
|
bitfld.long 0x0 23. "DTERRF6,Channel 6 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 22. "HDTF6,Channel 6 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 21. "FDTF6,Channel 6 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 20. "GF6,Channel 6 Global event flag" "0,1"
|
|
bitfld.long 0x0 19. "DTERRF5,Channel 5 data transfer error event flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HDTF5,Channel 5 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 17. "FDTF5,Channel 5 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 16. "GF5,Channel 5 Global event flag" "0,1"
|
|
bitfld.long 0x0 15. "DTERRF4,Channel 4 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 14. "HDTF4,Channel 4 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 13. "FDTF4,Channel 4 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 12. "GF4,Channel 4 Global event flag" "0,1"
|
|
bitfld.long 0x0 11. "DTERRF3,Channel 3 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 10. "HDTF3,Channel 3 half data transfer event flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "FDTF3,Channel 3 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 8. "GF3,Channel 3 Global event flag" "0,1"
|
|
bitfld.long 0x0 7. "DTERRF2,Channel 2 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 6. "HDTF2,Channel 2 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 5. "FDTF2,Channel 2 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 4. "GF2,Channel 2 Global event flag" "0,1"
|
|
bitfld.long 0x0 3. "DTERRF1,Channel 1 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 2. "HDTF1,Channel 1 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 1. "FDTF1,Channel 1 full data transfer event flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GF1,Channel 1 Global event flag" "0,1"
|
|
group.long 0x4++0x13
|
|
line.long 0x0 "CLR,DMA interrupt flag clear register (DMA_CLR)"
|
|
bitfld.long 0x0 27. "DTERRFC7,Channel 7 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 26. "HDTFC7,Channel 7 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 25. "FDTFC7,Channel 7 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 24. "GFC7,Channel 7 Global flag clear" "0,1"
|
|
bitfld.long 0x0 23. "DTERRFC6,Channel 6 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 22. "HDTFC6,Channel 6 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 21. "FDTFC6,Channel 6 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 20. "GFC6,Channel 6 Global flag clear" "0,1"
|
|
bitfld.long 0x0 19. "DTERRFC5,Channel 5 data transfer error flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HDTFC5,Channel 5 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 17. "FDTFC5,Channel 5 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 16. "GFC5,Channel 5 Global flag clear" "0,1"
|
|
bitfld.long 0x0 15. "DTERRFC4,Channel 4 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 14. "HDTFC4,Channel 4 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 13. "FDTFC4,Channel 4 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 12. "GFC4,Channel 4 Global flag clear" "0,1"
|
|
bitfld.long 0x0 11. "DTERRFC3,Channel 3 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 10. "HDTFC3,Channel 3 half data transfer flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "FDTFC3,Channel 3 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 8. "GFC3,Channel 3 Global flag clear" "0,1"
|
|
bitfld.long 0x0 7. "DTERRFC2,Channel 2 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 6. "HDTFC2,Channel 2 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 5. "FDTFC2,Channel 2 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 4. "GFC2,Channel 2 Global flag clear" "0,1"
|
|
bitfld.long 0x0 3. "DTERRFC1,Channel 1 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 2. "HDTFC1,Channel 1 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 1. "FDTFC1,Channel 1 full data transfer flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GFC1,Channel 1 Global flag clear" "0,1"
|
|
line.long 0x4 "C1CTRL,DMA channel configuration register (DMA_C1CTRL)"
|
|
bitfld.long 0x4 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x4 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x4 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x4 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x4 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x4 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x4 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x4 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x8 "C1DTCNT,DMA channel 1 number of data to transfer register"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0xC "C1PADDR,DMA channel 1 peripheral base address register"
|
|
hexmask.long 0xC 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0x10 "C1MADDR,DMA channel 1 memory base address register"
|
|
hexmask.long 0x10 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x1C++0xF
|
|
line.long 0x0 "C2CTRL,DMA channel configuration register (DMA_C2CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C2DTCNT,DMA channel 2 number of data to transferregister"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C2PADDR,DMA channel 2 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C2MADDR,DMA channel 2 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "C3CTRL,DMA channel configuration register (DMA_C3CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C3DTCNT,DMA channel 3 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C3PADDR,DMA channel 3 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C3MADDR,DMA channel 3 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x44++0xF
|
|
line.long 0x0 "C4CTRL,DMA channel configuration register (DMA_C4CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C4DTCNT,DMA channel 4 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C4PADDR,DMA channel 4 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C4MADDR,DMA channel 4 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x58++0xF
|
|
line.long 0x0 "C5CTRL,DMA channel configuration register (DMA_C5CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C5DTCNT,DMA channel 5 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C5PADDR,DMA channel 5 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C5MADDR,DMA channel 5 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x6C++0xF
|
|
line.long 0x0 "C6CTRL,DMA channel configuration register (DMA_C6CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C6DTCNT,DMA channel 6 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C6PADDR,DMA channel 6 peripheral address base register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C6MADDR,DMA channel 6 memory address base register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "C7CTRL,DMA channel configuration register (DMA_C7CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C7DTCNT,DMA channel 7 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C7PADDR,DMA channel 7 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C7MADDR,DMA channel 7 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x100++0x2F
|
|
line.long 0x0 "DMA_MUXSEL,DMAMUX Table Selection"
|
|
bitfld.long 0x0 0. "TBL_SEL,Multiplexer Table Select" "0,1"
|
|
line.long 0x4 "MUXC1CTRL,Channel 1 Configuration Register"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x4 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x4 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x4 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x4 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x4 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x8 "MUXC2CTRL,Channel 2 Configuration Register"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x8 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x8 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x8 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x8 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x8 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x8 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0xC "MUXC3CTRL,Channel 3 Configuration Register"
|
|
hexmask.long.byte 0xC 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0xC 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0xC 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0xC 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0xC 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0xC 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x10 "MUXC4CTRL,Channel 4 Configuration Register"
|
|
hexmask.long.byte 0x10 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x10 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x10 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x10 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x10 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x10 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x10 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x14 "MUXC5CTRL,Channel 5 Configuration Register"
|
|
hexmask.long.byte 0x14 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x14 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x14 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x14 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x14 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x14 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x14 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x18 "MUXC6CTRL,Channel 6 Configuration Register"
|
|
hexmask.long.byte 0x18 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x18 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x18 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x18 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x18 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x18 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x18 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x1C "MUXC7CTRL,Channel 7 Configuration Register"
|
|
hexmask.long.byte 0x1C 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x1C 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x1C 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x1C 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x1C 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x1C 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x1C 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x20 "MUXG1CTRL,Generator 1 Configuration Register"
|
|
hexmask.long.byte 0x20 19.--23. 1. "GREQCNT,Number of DMA requests to be generated"
|
|
bitfld.long 0x20 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x20 16. "GEN,DMA request generator enable" "0,1"
|
|
bitfld.long 0x20 8. "TRGOVIEN,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x20 0.--4. 1. "SIGSEL,Signal select"
|
|
line.long 0x24 "MUXG2CTRL,Generator 2 Configuration Register"
|
|
hexmask.long.byte 0x24 19.--23. 1. "GREQCNT,Number of DMA requests to be generated"
|
|
bitfld.long 0x24 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x24 16. "GEN,DMA request generator enable" "0,1"
|
|
bitfld.long 0x24 8. "TRGOVIEN,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x24 0.--4. 1. "SIGSEL,Signal select"
|
|
line.long 0x28 "MUXG3CTRL,Generator 3 Configuration Register"
|
|
hexmask.long.byte 0x28 19.--23. 1. "GREQCNT,Number of DMA requests to be generated"
|
|
bitfld.long 0x28 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x28 16. "GEN,DMA request generator enable" "0,1"
|
|
bitfld.long 0x28 8. "TRGOVIEN,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x28 0.--4. 1. "SIGSEL,Signal select"
|
|
line.long 0x2C "MUXG4CTRL,Generator 4 Configuration Register"
|
|
hexmask.long.byte 0x2C 19.--23. 1. "GREQCNT,Number of DMA requests to be generated"
|
|
bitfld.long 0x2C 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x2C 16. "GEN,DMA request generator enable" "0,1"
|
|
bitfld.long 0x2C 8. "TRGOVIEN,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x2C 0.--4. 1. "SIGSEL,Signal select"
|
|
rgroup.long 0x130++0x3
|
|
line.long 0x0 "MUXSYNCSTS,Channel Interrupt Status Register"
|
|
bitfld.long 0x0 6. "SYNCOVF7,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 5. "SYNCOVF6,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "SYNCOVF5,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 3. "SYNCOVF4,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "SYNCOVF3,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 1. "SYNCOVF2,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "SYNCOVF1,Synchronizaton overrun interrupt flag" "0,1"
|
|
group.long 0x134++0xB
|
|
line.long 0x0 "MUXSYNCCLR,Channel Interrupt Clear Flag Register"
|
|
bitfld.long 0x0 6. "SYNCOVFC7,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 5. "SYNCOVFC6,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "SYNCOVFC5,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 3. "SYNCOVFC4,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "SYNCOVFC3,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 1. "SYNCOVFC2,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "SYNCOVFC1,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
line.long 0x4 "MUXGSTS,Generator Interrupt Status Register"
|
|
bitfld.long 0x4 3. "TRGOVF4,Trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x4 2. "TRGOVF3,Trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x4 1. "TRGOVF2,Trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x4 0. "TRGOVF1,Trigger overrun interrupt flag" "0,1"
|
|
line.long 0x8 "MUXGCLR,Generator Interrupt Clear Flag Register"
|
|
bitfld.long 0x8 3. "TRGOVFC4,Clear trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x8 2. "TRGOVFC3,Clear trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x8 1. "TRGOVFC2,Clear trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x8 0. "TRGOVFC1,Clear trigger overrun interrupt flag" "0,1"
|
|
tree.end
|
|
tree "DMA2"
|
|
base ad:0x40026400
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "STS,DMA interrupt status register (DMA_STS)"
|
|
bitfld.long 0x0 27. "DTERRF7,Channel 7 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 26. "HDTF7,Channel 7 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 25. "FDTF7,Channel 7 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 24. "GF7,Channel 7 Global event flag" "0,1"
|
|
bitfld.long 0x0 23. "DTERRF6,Channel 6 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 22. "HDTF6,Channel 6 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 21. "FDTF6,Channel 6 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 20. "GF6,Channel 6 Global event flag" "0,1"
|
|
bitfld.long 0x0 19. "DTERRF5,Channel 5 data transfer error event flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HDTF5,Channel 5 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 17. "FDTF5,Channel 5 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 16. "GF5,Channel 5 Global event flag" "0,1"
|
|
bitfld.long 0x0 15. "DTERRF4,Channel 4 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 14. "HDTF4,Channel 4 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 13. "FDTF4,Channel 4 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 12. "GF4,Channel 4 Global event flag" "0,1"
|
|
bitfld.long 0x0 11. "DTERRF3,Channel 3 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 10. "HDTF3,Channel 3 half data transfer event flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "FDTF3,Channel 3 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 8. "GF3,Channel 3 Global event flag" "0,1"
|
|
bitfld.long 0x0 7. "DTERRF2,Channel 2 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 6. "HDTF2,Channel 2 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 5. "FDTF2,Channel 2 full data transfer event flag" "0,1"
|
|
bitfld.long 0x0 4. "GF2,Channel 2 Global event flag" "0,1"
|
|
bitfld.long 0x0 3. "DTERRF1,Channel 1 data transfer error event flag" "0,1"
|
|
bitfld.long 0x0 2. "HDTF1,Channel 1 half data transfer event flag" "0,1"
|
|
bitfld.long 0x0 1. "FDTF1,Channel 1 full data transfer event flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GF1,Channel 1 Global event flag" "0,1"
|
|
group.long 0x4++0x13
|
|
line.long 0x0 "CLR,DMA interrupt flag clear register (DMA_CLR)"
|
|
bitfld.long 0x0 27. "DTERRFC7,Channel 7 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 26. "HDTFC7,Channel 7 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 25. "FDTFC7,Channel 7 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 24. "GFC7,Channel 7 Global flag clear" "0,1"
|
|
bitfld.long 0x0 23. "DTERRFC6,Channel 6 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 22. "HDTFC6,Channel 6 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 21. "FDTFC6,Channel 6 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 20. "GFC6,Channel 6 Global flag clear" "0,1"
|
|
bitfld.long 0x0 19. "DTERRFC5,Channel 5 data transfer error flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HDTFC5,Channel 5 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 17. "FDTFC5,Channel 5 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 16. "GFC5,Channel 5 Global flag clear" "0,1"
|
|
bitfld.long 0x0 15. "DTERRFC4,Channel 4 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 14. "HDTFC4,Channel 4 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 13. "FDTFC4,Channel 4 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 12. "GFC4,Channel 4 Global flag clear" "0,1"
|
|
bitfld.long 0x0 11. "DTERRFC3,Channel 3 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 10. "HDTFC3,Channel 3 half data transfer flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "FDTFC3,Channel 3 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 8. "GFC3,Channel 3 Global flag clear" "0,1"
|
|
bitfld.long 0x0 7. "DTERRFC2,Channel 2 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 6. "HDTFC2,Channel 2 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 5. "FDTFC2,Channel 2 full data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 4. "GFC2,Channel 2 Global flag clear" "0,1"
|
|
bitfld.long 0x0 3. "DTERRFC1,Channel 1 data transfer error flag clear" "0,1"
|
|
bitfld.long 0x0 2. "HDTFC1,Channel 1 half data transfer flag clear" "0,1"
|
|
bitfld.long 0x0 1. "FDTFC1,Channel 1 full data transfer flag clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GFC1,Channel 1 Global flag clear" "0,1"
|
|
line.long 0x4 "C1CTRL,DMA channel configuration register (DMA_C1CTRL)"
|
|
bitfld.long 0x4 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x4 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x4 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x4 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x4 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x4 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x4 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x4 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x4 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x4 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x8 "C1DTCNT,DMA channel 1 number of data to transfer register"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0xC "C1PADDR,DMA channel 1 peripheral base address register"
|
|
hexmask.long 0xC 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0x10 "C1MADDR,DMA channel 1 memory base address register"
|
|
hexmask.long 0x10 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x1C++0xF
|
|
line.long 0x0 "C2CTRL,DMA channel configuration register (DMA_C2CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C2DTCNT,DMA channel 2 number of data to transferregister"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C2PADDR,DMA channel 2 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C2MADDR,DMA channel 2 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "C3CTRL,DMA channel configuration register (DMA_C3CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C3DTCNT,DMA channel 3 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C3PADDR,DMA channel 3 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C3MADDR,DMA channel 3 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x44++0xF
|
|
line.long 0x0 "C4CTRL,DMA channel configuration register (DMA_C4CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C4DTCNT,DMA channel 4 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C4PADDR,DMA channel 4 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C4MADDR,DMA channel 4 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x58++0xF
|
|
line.long 0x0 "C5CTRL,DMA channel configuration register (DMA_C5CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C5DTCNT,DMA channel 5 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C5PADDR,DMA channel 5 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C5MADDR,DMA channel 5 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x6C++0xF
|
|
line.long 0x0 "C6CTRL,DMA channel configuration register (DMA_C6CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C6DTCNT,DMA channel 6 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C6PADDR,DMA channel 6 peripheral address base register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C6MADDR,DMA channel 6 memory address base register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "C7CTRL,DMA channel configuration register (DMA_C7CTRL)"
|
|
bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MWIDTH,Memory data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PWIDTH,Peripheral data bit width" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINCM,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINCM,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "LM,Loop mode" "0,1"
|
|
bitfld.long 0x0 4. "DTD,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "DTERRIEN,Transfer error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDTIEN,Half transfer interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "FDTIEN,Transfer complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "CHEN,Channel enable" "0,1"
|
|
line.long 0x4 "C7DTCNT,DMA channel 7 number of data to transfer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "CNT,Number of data to transfer"
|
|
line.long 0x8 "C7PADDR,DMA channel 7 peripheral base address register"
|
|
hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral address"
|
|
line.long 0xC "C7MADDR,DMA channel 7 memory base address register"
|
|
hexmask.long 0xC 0.--31. 1. "MADDR,Memory address"
|
|
group.long 0x100++0x2F
|
|
line.long 0x0 "DMA_MUXSEL,DMAMUX Table Selection"
|
|
bitfld.long 0x0 0. "TBL_SEL,Multiplexer Table Select" "0,1"
|
|
line.long 0x4 "MUXC1CTRL,Channel 1 Configuration Register"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x4 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x4 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x4 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x4 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x4 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x8 "MUXC2CTRL,Channel 2 Configuration Register"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x8 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x8 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x8 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x8 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x8 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x8 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0xC "MUXC3CTRL,Channel 3 Configuration Register"
|
|
hexmask.long.byte 0xC 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0xC 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0xC 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0xC 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0xC 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0xC 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x10 "MUXC4CTRL,Channel 4 Configuration Register"
|
|
hexmask.long.byte 0x10 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x10 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x10 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x10 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x10 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x10 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x10 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x14 "MUXC5CTRL,Channel 5 Configuration Register"
|
|
hexmask.long.byte 0x14 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x14 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x14 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x14 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x14 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x14 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x14 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x18 "MUXC6CTRL,Channel 6 Configuration Register"
|
|
hexmask.long.byte 0x18 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x18 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x18 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x18 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x18 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x18 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x18 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x1C "MUXC7CTRL,Channel 7 Configuration Register"
|
|
hexmask.long.byte 0x1C 24.--28. 1. "SYNCSEL,Synchronization Identification"
|
|
hexmask.long.byte 0x1C 19.--23. 1. "REQCNT,Number of DMA requests"
|
|
bitfld.long 0x1C 17.--18. "SYNCPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x1C 16. "SYNCEN,Synchroniztion enable" "0,1"
|
|
bitfld.long 0x1C 9. "EVTGEN,Event generation enable" "0,1"
|
|
bitfld.long 0x1C 8. "SYNCOVIEN,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x1C 0.--6. 1. "REQSEL,DMA request select"
|
|
line.long 0x20 "MUXG1CTRL,Generator 1 Configuration Register"
|
|
hexmask.long.byte 0x20 19.--23. 1. "GREQCNT,Number of DMA requests to be generated"
|
|
bitfld.long 0x20 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x20 16. "GEN,DMA request generator enable" "0,1"
|
|
bitfld.long 0x20 8. "TRGOVIEN,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x20 0.--4. 1. "SIGSEL,Signal select"
|
|
line.long 0x24 "MUXG2CTRL,Generator 2 Configuration Register"
|
|
hexmask.long.byte 0x24 19.--23. 1. "GREQCNT,Number of DMA requests to be generated"
|
|
bitfld.long 0x24 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x24 16. "GEN,DMA request generator enable" "0,1"
|
|
bitfld.long 0x24 8. "TRGOVIEN,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x24 0.--4. 1. "SIGSEL,Signal select"
|
|
line.long 0x28 "MUXG3CTRL,Generator 3 Configuration Register"
|
|
hexmask.long.byte 0x28 19.--23. 1. "GREQCNT,Number of DMA requests to be generated"
|
|
bitfld.long 0x28 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x28 16. "GEN,DMA request generator enable" "0,1"
|
|
bitfld.long 0x28 8. "TRGOVIEN,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x28 0.--4. 1. "SIGSEL,Signal select"
|
|
line.long 0x2C "MUXG4CTRL,Generator 4 Configuration Register"
|
|
hexmask.long.byte 0x2C 19.--23. 1. "GREQCNT,Number of DMA requests to be generated"
|
|
bitfld.long 0x2C 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x2C 16. "GEN,DMA request generator enable" "0,1"
|
|
bitfld.long 0x2C 8. "TRGOVIEN,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x2C 0.--4. 1. "SIGSEL,Signal select"
|
|
rgroup.long 0x130++0x3
|
|
line.long 0x0 "MUXSYNCSTS,Channel Interrupt Status Register"
|
|
bitfld.long 0x0 6. "SYNCOVF7,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 5. "SYNCOVF6,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "SYNCOVF5,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 3. "SYNCOVF4,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "SYNCOVF3,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 1. "SYNCOVF2,Synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "SYNCOVF1,Synchronizaton overrun interrupt flag" "0,1"
|
|
group.long 0x134++0xB
|
|
line.long 0x0 "MUXSYNCCLR,Channel Interrupt Clear Flag Register"
|
|
bitfld.long 0x0 6. "SYNCOVFC7,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 5. "SYNCOVFC6,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "SYNCOVFC5,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 3. "SYNCOVFC4,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "SYNCOVFC3,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 1. "SYNCOVFC2,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "SYNCOVFC1,Clear synchronizaton overrun interrupt flag" "0,1"
|
|
line.long 0x4 "MUXGSTS,Generator Interrupt Status Register"
|
|
bitfld.long 0x4 3. "TRGOVF4,Trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x4 2. "TRGOVF3,Trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x4 1. "TRGOVF2,Trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x4 0. "TRGOVF1,Trigger overrun interrupt flag" "0,1"
|
|
line.long 0x8 "MUXGCLR,Generator Interrupt Clear Flag Register"
|
|
bitfld.long 0x8 3. "TRGOVFC4,Clear trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x8 2. "TRGOVFC3,Clear trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x8 1. "TRGOVFC2,Clear trigger overrun interrupt flag" "0,1"
|
|
bitfld.long 0x8 0. "TRGOVFC1,Clear trigger overrun interrupt flag" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "ERTC (Enhanced Real-Time Clock)"
|
|
base ad:0x40002800
|
|
group.long 0x0++0x23
|
|
line.long 0x0 "TIME,time register"
|
|
bitfld.long 0x0 22. "AMPM,AM/PM notation" "0,1"
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units"
|
|
bitfld.long 0x0 12.--14. "MT,Minute tens" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--11. 1. "MU,Minute units"
|
|
bitfld.long 0x0 4.--6. "ST,Second tens" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units"
|
|
line.long 0x4 "DATE,date register"
|
|
hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens"
|
|
hexmask.long.byte 0x4 16.--19. 1. "YU,Year units"
|
|
bitfld.long 0x4 13.--15. "WK,Week" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "MT,Month tens" "0,1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units"
|
|
bitfld.long 0x4 4.--5. "DT,Date tens" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units"
|
|
line.long 0x8 "CTRL,control register"
|
|
bitfld.long 0x8 23. "CALOEN,Calibration output enable" "0,1"
|
|
bitfld.long 0x8 21.--22. "OUTSEL,Output source selection" "0,1,2,3"
|
|
bitfld.long 0x8 20. "OUTP,Output polarity" "0,1"
|
|
bitfld.long 0x8 19. "CALOSEL,Calibration output selection" "0,1"
|
|
bitfld.long 0x8 18. "BPR,Battery power domain data register" "0,1"
|
|
bitfld.long 0x8 17. "DEC1H,Decrease 1 hour" "0,1"
|
|
bitfld.long 0x8 16. "ADD1H,Add 1 hour" "0,1"
|
|
bitfld.long 0x8 15. "TSIEN,Timestamp interrupt enable" "0,1"
|
|
bitfld.long 0x8 14. "WATIEN,Wakeup timer interrupt enable" "0,1"
|
|
bitfld.long 0x8 13. "ALBIEN,Alarm B interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "ALAIEN,Alarm A interrupt enable" "0,1"
|
|
bitfld.long 0x8 11. "TSEN,Timestamp enable" "0,1"
|
|
bitfld.long 0x8 10. "WATEN,Wakeup timer enable" "0,1"
|
|
bitfld.long 0x8 9. "ALBEN,Alarm B enable" "0,1"
|
|
bitfld.long 0x8 8. "ALAEN,Alarm A enable" "0,1"
|
|
bitfld.long 0x8 7. "CCALEN,Coarse calibration enable" "0,1"
|
|
bitfld.long 0x8 6. "HM,Hour mode" "0,1"
|
|
bitfld.long 0x8 5. "DREN,Date/time register direct read enable" "0,1"
|
|
bitfld.long 0x8 4. "RCDEN,Reference clock detection enable" "0,1"
|
|
bitfld.long 0x8 3. "TSEDG,Timestamp trigger edge" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "WATCLK,Wakeup timer clock selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "STS,initialization and status"
|
|
rbitfld.long 0xC 16. "CALUPDF,Calibration value update completed flag" "0,1"
|
|
bitfld.long 0xC 14. "TP2F,Tamper detection 2 flag" "0,1"
|
|
bitfld.long 0xC 13. "TP1F,Tamper detection 1 flag" "0,1"
|
|
bitfld.long 0xC 12. "TSOF,Timestamp overflow flag" "0,1"
|
|
bitfld.long 0xC 11. "TSF,Timestamp flag" "0,1"
|
|
bitfld.long 0xC 10. "WATF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0xC 9. "ALBF,Alarm B flag" "0,1"
|
|
bitfld.long 0xC 8. "ALAF,Alarm A flag" "0,1"
|
|
bitfld.long 0xC 7. "IMEN,Initialization mode enable" "0,1"
|
|
rbitfld.long 0xC 6. "IMF,Enter initialization mode flag" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "UPDF,Calendar update flag" "0,1"
|
|
rbitfld.long 0xC 4. "INITF,Calendar initialization flag" "0,1"
|
|
bitfld.long 0xC 3. "TADJF,Time adjustment flag" "0,1"
|
|
rbitfld.long 0xC 2. "WATWF,Wakeup timer register allows write flag" "0,1"
|
|
rbitfld.long 0xC 1. "ALBWF,Alarm B register allows write flag" "0,1"
|
|
rbitfld.long 0xC 0. "ALAWF,Alarm A register allows write flag" "0,1"
|
|
line.long 0x10 "DIV,Diveder register"
|
|
hexmask.long.byte 0x10 16.--22. 1. "DIVA,Diveder A"
|
|
hexmask.long.word 0x10 0.--14. 1. "DIVB,Diveder B"
|
|
line.long 0x14 "WAT,Wakeup timer register"
|
|
hexmask.long.word 0x14 0.--15. 1. "VAL,Wakeup timer reload value"
|
|
line.long 0x18 "CCAL,Calibration register"
|
|
bitfld.long 0x18 7. "CALDIR,Calibration direction" "0,1"
|
|
hexmask.long.byte 0x18 0.--4. 1. "CALVAL,Calibration value"
|
|
line.long 0x1C "ALA,Alarm A register"
|
|
bitfld.long 0x1C 31. "MASK4,Date/week mask" "0,1"
|
|
bitfld.long 0x1C 30. "WKSEL,Date/week mode select" "0,1"
|
|
bitfld.long 0x1C 28.--29. "DT,Date tens" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 24.--27. 1. "DU,Date units"
|
|
bitfld.long 0x1C 23. "MASK3,Hours mask" "0,1"
|
|
bitfld.long 0x1C 22. "AMPM,AM/PM" "0,1"
|
|
bitfld.long 0x1C 20.--21. "HT,Hour tens" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "HU,Hour units"
|
|
bitfld.long 0x1C 15. "MASK2,Minutes mask" "0,1"
|
|
bitfld.long 0x1C 12.--14. "MT,Minute tens" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--11. 1. "MU,Minute units"
|
|
bitfld.long 0x1C 7. "MASK1,Seconds mask" "0,1"
|
|
bitfld.long 0x1C 4.--6. "ST,Second tens" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SU,Second units"
|
|
line.long 0x20 "ALB,Alarm B register"
|
|
bitfld.long 0x20 31. "MASK4,Date/week mask" "0,1"
|
|
bitfld.long 0x20 30. "WKSEL,Date/week mode select" "0,1"
|
|
bitfld.long 0x20 28.--29. "DT,Date tens" "0,1,2,3"
|
|
hexmask.long.byte 0x20 24.--27. 1. "DU,Date units"
|
|
bitfld.long 0x20 23. "MASK3,Hours mask" "0,1"
|
|
bitfld.long 0x20 22. "AMPM,AM/PM" "0,1"
|
|
bitfld.long 0x20 20.--21. "HT,Hour tens" "0,1,2,3"
|
|
hexmask.long.byte 0x20 16.--19. 1. "HU,Hour units"
|
|
bitfld.long 0x20 15. "MASK2,Minutes mask" "0,1"
|
|
bitfld.long 0x20 12.--14. "MT,Minute tens" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x20 8.--11. 1. "MU,Minute units"
|
|
bitfld.long 0x20 7. "MASK1,Seconds mask" "0,1"
|
|
bitfld.long 0x20 4.--6. "ST,Second tens" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x20 0.--3. 1. "SU,Second units"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "WP,write protection register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CMD,Command register"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SBS,sub second register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SBS,Sub second value"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "TADJ,time adjust register"
|
|
bitfld.long 0x0 31. "ADD1S,Add 1 second" "0,1"
|
|
hexmask.long.word 0x0 0.--14. 1. "DECSBS,Decrease sub-second value"
|
|
rgroup.long 0x30++0xB
|
|
line.long 0x0 "TSTM,time stamp time register"
|
|
bitfld.long 0x0 22. "AMPM,AMPM" "0,1"
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units"
|
|
bitfld.long 0x0 12.--14. "MT,Minute tens" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--11. 1. "MU,Minute units"
|
|
bitfld.long 0x0 4.--6. "ST,Second tens" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units"
|
|
line.long 0x4 "TSDT,timestamp date register"
|
|
bitfld.long 0x4 13.--15. "WK,Week" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "MT,Month tens" "0,1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units"
|
|
bitfld.long 0x4 4.--5. "DT,Date tens" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units"
|
|
line.long 0x8 "TSSBS,timestamp sub second register"
|
|
hexmask.long.word 0x8 0.--15. 1. "SBS,Sub second value"
|
|
group.long 0x3C++0xF
|
|
line.long 0x0 "SCAL,calibration register"
|
|
bitfld.long 0x0 15. "ADD,Add ERTC clock" "0,1"
|
|
bitfld.long 0x0 14. "CAL8,8-second calibration period" "0,1"
|
|
bitfld.long 0x0 13. "CAL16,16 second calibration period" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "DEC,Decrease ERTC clock"
|
|
line.long 0x4 "TAMP,tamper and alternate function configuration register"
|
|
bitfld.long 0x4 18. "OUTTYPE,Output type" "0,1"
|
|
bitfld.long 0x4 17. "TSPIN,Time stamp detection pin selection" "0,1"
|
|
bitfld.long 0x4 16. "TP1PIN,Tamper detection pin selection" "0,1"
|
|
bitfld.long 0x4 15. "TPPU,Tamper detection pull-up" "0,1"
|
|
bitfld.long 0x4 13.--14. "TPPR,Tamper detection pre-charge time" "0,1,2,3"
|
|
bitfld.long 0x4 11.--12. "TPFLT,Tamper detection filter time" "0,1,2,3"
|
|
bitfld.long 0x4 8.--10. "TPFREQ,Tamper detection frequency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 7. "TPTSEN,Tamper detection timestamp enable" "0,1"
|
|
bitfld.long 0x4 4. "TP2EDG,Tamper detection 2 valid edge" "0,1"
|
|
bitfld.long 0x4 3. "TP2EN,Tamper detection 2 enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TPIEN,Tamper detection interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "TP1EDG,Tamper detection 1 valid edge" "0,1"
|
|
bitfld.long 0x4 0. "TP1EN,Tamper detection 1 enable" "0,1"
|
|
line.long 0x8 "ALASBS,alarm A sub second register"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SBSMSK,Sub-second mask"
|
|
hexmask.long.word 0x8 0.--14. 1. "SBS,Sub-seconds value"
|
|
line.long 0xC "ALBSBS,alarm B sub second register"
|
|
hexmask.long.byte 0xC 24.--27. 1. "SBSMSK,Sub-second mask"
|
|
hexmask.long.word 0xC 0.--14. 1. "SBS,Sub-seconds value"
|
|
group.long 0x50++0x4F
|
|
line.long 0x0 "BPR1DT,Battery powered domain register"
|
|
hexmask.long 0x0 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x4 "BPR2DT,Battery powered domain register"
|
|
hexmask.long 0x4 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x8 "BPR3DT,Battery powered domain register"
|
|
hexmask.long 0x8 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0xC "BPR4DT,Battery powered domain register"
|
|
hexmask.long 0xC 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x10 "BPR5DT,Battery powered domain register"
|
|
hexmask.long 0x10 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x14 "BPR6DT,Battery powered domain register"
|
|
hexmask.long 0x14 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x18 "BPR7DT,Battery powered domain register"
|
|
hexmask.long 0x18 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x1C "BPR8DT,Battery powered domain register"
|
|
hexmask.long 0x1C 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x20 "BPR9DT,Battery powered domain register"
|
|
hexmask.long 0x20 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x24 "BPR10DT,Battery powered domain register"
|
|
hexmask.long 0x24 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x28 "BPR11DT,Battery powered domain register"
|
|
hexmask.long 0x28 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x2C "BPR12DT,Battery powered domain register"
|
|
hexmask.long 0x2C 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x30 "BPR13DT,Battery powered domain register"
|
|
hexmask.long 0x30 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x34 "BPR14DT,Battery powered domain register"
|
|
hexmask.long 0x34 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x38 "BPR15DT,Battery powered domain register"
|
|
hexmask.long 0x38 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x3C "BPR16DT,Battery powered domain register"
|
|
hexmask.long 0x3C 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x40 "BPR17DT,Battery powered domain register"
|
|
hexmask.long 0x40 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x44 "BPR18DT,Battery powered domain register"
|
|
hexmask.long 0x44 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x48 "BPR19DT,Battery powered domain register"
|
|
hexmask.long 0x48 0.--31. 1. "DT,Battery powered domain data"
|
|
line.long 0x4C "BPR20DT,Battery powered domain register"
|
|
hexmask.long 0x4C 0.--31. 1. "DT,Battery powered domain data"
|
|
tree.end
|
|
tree "EXINT (External Interrupt/Event Controller)"
|
|
base ad:0x40013C00
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "INTEN,Interrupt enable register"
|
|
bitfld.long 0x0 28. "INTEN28,Interrupt enable or disable on line 28" "0,1"
|
|
bitfld.long 0x0 26. "INTEN26,Interrupt enable or disable on line 26" "0,1"
|
|
bitfld.long 0x0 25. "INTEN25,Interrupt enable or disable on line 25" "0,1"
|
|
bitfld.long 0x0 23. "INTEN23,Interrupt enable or disable on line 23" "0,1"
|
|
bitfld.long 0x0 22. "INTEN22,Interrupt enable or disable on line 22" "0,1"
|
|
bitfld.long 0x0 21. "INTEN21,Interrupt enable or disable on line 21" "0,1"
|
|
bitfld.long 0x0 18. "INTEN18,Interrupt enable or disable on line 18" "0,1"
|
|
bitfld.long 0x0 17. "INTEN17,Interrupt enable or disable on line 17" "0,1"
|
|
bitfld.long 0x0 16. "INTEN16,Interrupt enable or disable on line 16" "0,1"
|
|
bitfld.long 0x0 15. "INTEN15,Interrupt enable or disable on line 15" "0,1"
|
|
bitfld.long 0x0 14. "INTEN14,Interrupt enable or disable on line 14" "0,1"
|
|
bitfld.long 0x0 13. "INTEN13,Interrupt enable or disable on line 13" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "INTEN12,Interrupt enable or disable on line 12" "0,1"
|
|
bitfld.long 0x0 11. "INTEN11,Interrupt enable or disable on line 11" "0,1"
|
|
bitfld.long 0x0 10. "INTEN10,Interrupt enable or disable on line 10" "0,1"
|
|
bitfld.long 0x0 9. "INTEN9,Interrupt enable or disable on line 9" "0,1"
|
|
bitfld.long 0x0 8. "INTEN8,Interrupt enable or disable on line 8" "0,1"
|
|
bitfld.long 0x0 7. "INTEN7,Interrupt enable or disable on line 7" "0,1"
|
|
bitfld.long 0x0 6. "INTEN6,Interrupt enable or disable on line 6" "0,1"
|
|
bitfld.long 0x0 5. "INTEN5,Interrupt enable or disable on line 5" "0,1"
|
|
bitfld.long 0x0 4. "INTEN4,Interrupt enable or disable on line 4" "0,1"
|
|
bitfld.long 0x0 3. "INTEN3,Interrupt enable or disable on line 3" "0,1"
|
|
bitfld.long 0x0 2. "INTEN2,Interrupt enable or disable on line 2" "0,1"
|
|
bitfld.long 0x0 1. "INTEN1,Interrupt enable or disable on line 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "INTEN0,Interrupt enable or disable on line 0" "0,1"
|
|
line.long 0x4 "EVTEN,Event enable register"
|
|
bitfld.long 0x4 28. "EVTEN28,Event enable or disable on line 28" "0,1"
|
|
bitfld.long 0x4 26. "EVTEN26,Event enable or disable on line 26" "0,1"
|
|
bitfld.long 0x4 25. "EVTEN25,Event enable or disable on line 25" "0,1"
|
|
bitfld.long 0x4 23. "EVTEN23,Event enable or disable on line 23" "0,1"
|
|
bitfld.long 0x4 22. "EVTEN22,Event enable or disable on line 22" "0,1"
|
|
bitfld.long 0x4 21. "EVTEN21,Event enable or disable on line 21" "0,1"
|
|
bitfld.long 0x4 18. "EVTEN18,Event enable or disable on line 18" "0,1"
|
|
bitfld.long 0x4 17. "EVTEN17,Event enable or disable on line 17" "0,1"
|
|
bitfld.long 0x4 16. "EVTEN16,Event enable or disable on line 16" "0,1"
|
|
bitfld.long 0x4 15. "EVTEN15,Event enable or disable on line 15" "0,1"
|
|
bitfld.long 0x4 14. "EVTEN14,Event enable or disable on line 14" "0,1"
|
|
bitfld.long 0x4 13. "EVTEN13,Event enable or disable on line 13" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "EVTEN12,Event enable or disable on line 12" "0,1"
|
|
bitfld.long 0x4 11. "EVTEN11,Event enable or disable on line 11" "0,1"
|
|
bitfld.long 0x4 10. "EVTEN10,Event enable or disable on line 10" "0,1"
|
|
bitfld.long 0x4 9. "EVTEN9,Event enable or disable on line 9" "0,1"
|
|
bitfld.long 0x4 8. "EVTEN8,Event enable or disable on line 8" "0,1"
|
|
bitfld.long 0x4 7. "EVTEN7,Event enable or disable on line 7" "0,1"
|
|
bitfld.long 0x4 6. "EVTEN6,Event enable or disable on line 6" "0,1"
|
|
bitfld.long 0x4 5. "EVTEN5,Event enable or disable on line 5" "0,1"
|
|
bitfld.long 0x4 4. "EVTEN4,Event enable or disable on line 4" "0,1"
|
|
bitfld.long 0x4 3. "EVTEN3,Event enable or disable on line 3" "0,1"
|
|
bitfld.long 0x4 2. "EVTEN2,Event enable or disable on line 2" "0,1"
|
|
bitfld.long 0x4 1. "EVTEN1,Event enable or disable on line 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "EVTEN0,Event enable or disable on line 0" "0,1"
|
|
line.long 0x8 "POLCFG1,Rising polarity configuration register"
|
|
bitfld.long 0x8 28. "RP28,Rising polarity configuration bit of line 28" "0,1"
|
|
bitfld.long 0x8 26. "RP26,Rising polarity configuration bit of line 26" "0,1"
|
|
bitfld.long 0x8 25. "RP25,Rising polarity configuration bit of line 25" "0,1"
|
|
bitfld.long 0x8 23. "RP23,Rising polarity configuration bit of line 23" "0,1"
|
|
bitfld.long 0x8 22. "RP22,Rising polarity configuration bit of line 22" "0,1"
|
|
bitfld.long 0x8 21. "RP21,Rising polarity configuration bit of line 21" "0,1"
|
|
bitfld.long 0x8 18. "RP18,Rising polarity configuration bit of line 18" "0,1"
|
|
bitfld.long 0x8 17. "RP17,Rising polarity configuration bit of line 17" "0,1"
|
|
bitfld.long 0x8 16. "RP16,Rising polarity configuration bit of line 16" "0,1"
|
|
bitfld.long 0x8 15. "RP15,Rising polarity configuration bit of line 15" "0,1"
|
|
bitfld.long 0x8 14. "RP14,Rising polarity configuration bit of line 14" "0,1"
|
|
bitfld.long 0x8 13. "RP13,Rising polarity configuration bit of line 13" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "RP12,Rising polarity configuration bit of line 12" "0,1"
|
|
bitfld.long 0x8 11. "RP11,Rising polarity configuration bit of line 11" "0,1"
|
|
bitfld.long 0x8 10. "RP10,Rising polarity configuration bit of line 10" "0,1"
|
|
bitfld.long 0x8 9. "RP9,Rising polarity configuration bit of line 9" "0,1"
|
|
bitfld.long 0x8 8. "RP8,Rising polarity configuration bit of line 8" "0,1"
|
|
bitfld.long 0x8 7. "RP7,Rising polarity configuration bit of line 7" "0,1"
|
|
bitfld.long 0x8 6. "RP6,Rising polarity configuration bit of linee 6" "0,1"
|
|
bitfld.long 0x8 5. "RP5,Rising polarity configuration bit of line 5" "0,1"
|
|
bitfld.long 0x8 4. "RP4,Rising polarity configuration bit of line 4" "0,1"
|
|
bitfld.long 0x8 3. "RP3,Rising polarity configuration bit of line 3" "0,1"
|
|
bitfld.long 0x8 2. "RP2,Rising polarity configuration bit of line 2" "0,1"
|
|
bitfld.long 0x8 1. "RP1,Rising polarity configuration bit of line 1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "RP0,Rising polarity configuration bit of line 0" "0,1"
|
|
line.long 0xC "POLCFG2,Falling polarity configuration register"
|
|
bitfld.long 0xC 28. "FP28,Falling polarity event configuration bit of line 28" "0,1"
|
|
bitfld.long 0xC 26. "FP26,Falling polarity event configuration bit of line 26" "0,1"
|
|
bitfld.long 0xC 25. "FP25,Falling polarity event configuration bit of line 25" "0,1"
|
|
bitfld.long 0xC 23. "FP23,Falling polarity event configuration bit of line 23" "0,1"
|
|
bitfld.long 0xC 22. "FP22,Falling polarity event configuration bit of line 22" "0,1"
|
|
bitfld.long 0xC 21. "FP21,Falling polarity event configuration bit of line 21" "0,1"
|
|
bitfld.long 0xC 18. "FP18,Falling polarity event configuration bit of line 18" "0,1"
|
|
bitfld.long 0xC 17. "FP17,Falling polarity event configuration bit of line 17" "0,1"
|
|
bitfld.long 0xC 16. "FP16,Falling polarity event configuration bit of line 16" "0,1"
|
|
bitfld.long 0xC 15. "FP15,Falling polarity event configuration bit of line 15" "0,1"
|
|
bitfld.long 0xC 14. "FP14,Falling polarity event configuration bit of line 14" "0,1"
|
|
bitfld.long 0xC 13. "FP13,Falling polarity event configuration bit of line 13" "0,1"
|
|
newline
|
|
bitfld.long 0xC 12. "FP12,Falling polarity event configuration bit of line 12" "0,1"
|
|
bitfld.long 0xC 11. "FP11,Falling polarity event configuration bit of line 11" "0,1"
|
|
bitfld.long 0xC 10. "FP10,Falling polarity event configuration bit of line 10" "0,1"
|
|
bitfld.long 0xC 9. "FP9,Falling polarity event configuration bit of line 9" "0,1"
|
|
bitfld.long 0xC 8. "FP8,Falling polarity event configuration bit of line 8" "0,1"
|
|
bitfld.long 0xC 7. "FP7,Falling polarity event configuration bit of line 7" "0,1"
|
|
bitfld.long 0xC 6. "FP6,Falling polarity event configuration bit of line 6" "0,1"
|
|
bitfld.long 0xC 5. "FP5,Falling polarity event configuration bit of line 5" "0,1"
|
|
bitfld.long 0xC 4. "FP4,Falling polarity event configuration bit of line 4" "0,1"
|
|
bitfld.long 0xC 3. "FP3,Falling polarity event configuration bit of line 3" "0,1"
|
|
bitfld.long 0xC 2. "FP2,Falling polarity event configuration bit of line 2" "0,1"
|
|
bitfld.long 0xC 1. "FP1,Falling polarity event configuration bit of line 1" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "FP0,Falling polarity event configuration bit of line 0" "0,1"
|
|
line.long 0x10 "SWTRG,Software triggle register"
|
|
bitfld.long 0x10 28. "SWT28,Software triggle on line 28" "0,1"
|
|
bitfld.long 0x10 26. "SWT26,Software triggle on line 26" "0,1"
|
|
bitfld.long 0x10 25. "SWT25,Software triggle on line 25" "0,1"
|
|
bitfld.long 0x10 23. "SWT23,Software triggle on line 23" "0,1"
|
|
bitfld.long 0x10 22. "SWT22,Software triggle on line 22" "0,1"
|
|
bitfld.long 0x10 21. "SWT21,Software triggle on line 21" "0,1"
|
|
bitfld.long 0x10 18. "SWT18,Software triggle on line 18" "0,1"
|
|
bitfld.long 0x10 17. "SWT17,Software triggle on line 17" "0,1"
|
|
bitfld.long 0x10 16. "SWT16,Software triggle on line 16" "0,1"
|
|
bitfld.long 0x10 15. "SWT15,Software triggle on line 15" "0,1"
|
|
bitfld.long 0x10 14. "SWT14,Software triggle on line 14" "0,1"
|
|
bitfld.long 0x10 13. "SWT13,Software triggle on line 13" "0,1"
|
|
newline
|
|
bitfld.long 0x10 12. "SWT12,Software triggle on line 12" "0,1"
|
|
bitfld.long 0x10 11. "SWT11,Software triggle on line 11" "0,1"
|
|
bitfld.long 0x10 10. "SWT10,Software triggle on line 10" "0,1"
|
|
bitfld.long 0x10 9. "SWT9,Software triggle on line 9" "0,1"
|
|
bitfld.long 0x10 8. "SWT8,Software triggle on line 8" "0,1"
|
|
bitfld.long 0x10 7. "SWT7,Software triggle on line 7" "0,1"
|
|
bitfld.long 0x10 6. "SWT6,Software triggle on line 6" "0,1"
|
|
bitfld.long 0x10 5. "SWT5,Software triggle on line 5" "0,1"
|
|
bitfld.long 0x10 4. "SWT4,Software triggle on line 4" "0,1"
|
|
bitfld.long 0x10 3. "SWT3,Software triggle on line 3" "0,1"
|
|
bitfld.long 0x10 2. "SWT2,Software triggle on line 2" "0,1"
|
|
bitfld.long 0x10 1. "SWT1,Software triggle on line 1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "SWT0,Software triggle on line 0" "0,1"
|
|
line.long 0x14 "INTSTS,Interrupt status register"
|
|
bitfld.long 0x14 28. "LINE28,Line 28 state bit" "0,1"
|
|
bitfld.long 0x14 26. "LINE26,Line 26 state bit" "0,1"
|
|
bitfld.long 0x14 25. "LINE25,Line 25 state bit" "0,1"
|
|
bitfld.long 0x14 23. "LINE23,Line 23 state bit" "0,1"
|
|
bitfld.long 0x14 22. "LINE22,Line 22 state bit" "0,1"
|
|
bitfld.long 0x14 21. "LINE21,Line 21 state bit" "0,1"
|
|
bitfld.long 0x14 18. "LINE18,Line 18 state bit" "0,1"
|
|
bitfld.long 0x14 17. "LINE17,Line 17 state bit" "0,1"
|
|
bitfld.long 0x14 16. "LINE16,Line 16 state bit" "0,1"
|
|
bitfld.long 0x14 15. "LINE15,Line 15 state bit" "0,1"
|
|
bitfld.long 0x14 14. "LINE14,Line 14 state bit" "0,1"
|
|
bitfld.long 0x14 13. "LINE13,Line 13 state bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 12. "LINE12,Line 12 state bit" "0,1"
|
|
bitfld.long 0x14 11. "LINE11,Line 11 state bit" "0,1"
|
|
bitfld.long 0x14 10. "LINE10,Line 10 state bit" "0,1"
|
|
bitfld.long 0x14 9. "LINE9,Line 9 state bit" "0,1"
|
|
bitfld.long 0x14 8. "LINE8,Line 8 state bit" "0,1"
|
|
bitfld.long 0x14 7. "LINE7,Line 7 state bit" "0,1"
|
|
bitfld.long 0x14 6. "LINE6,Line 6 state bit" "0,1"
|
|
bitfld.long 0x14 5. "LINE5,Line 5 state bit" "0,1"
|
|
bitfld.long 0x14 4. "LINE4,Line 4 state bit" "0,1"
|
|
bitfld.long 0x14 3. "LINE3,Line 3 state bit" "0,1"
|
|
bitfld.long 0x14 2. "LINE2,Line 2 state bit" "0,1"
|
|
bitfld.long 0x14 1. "LINE1,Line 1 state bit" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "LINE0,Line 0 state bit" "0,1"
|
|
tree.end
|
|
tree "FLASH (Flash Memory Controler)"
|
|
base ad:0x40023C00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "PSR,Performance selection register"
|
|
bitfld.long 0x0 8. "PFT_LAT_DIS,Prefetch latency disable" "0,1"
|
|
rbitfld.long 0x0 7. "PFT_ENF2,Prefetch enabled flag 2" "0,1"
|
|
bitfld.long 0x0 6. "PFT_EN2,Prefetch enable 2" "0,1"
|
|
rbitfld.long 0x0 5. "PFT_ENF,Prefetch enabled flag" "0,1"
|
|
bitfld.long 0x0 4. "PFT_EN,Prefetch enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WTCYC,Wait cycle" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x4++0x7
|
|
line.long 0x0 "UNLOCK,Unlock register"
|
|
hexmask.long 0x0 0.--31. 1. "UKVAL,Unlock key value"
|
|
line.long 0x4 "USD_UNLOCK,USD unlock register"
|
|
hexmask.long 0x4 0.--31. 1. "USD_UKVAL,User system data Unlock key value"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "STS,Status register"
|
|
bitfld.long 0x0 5. "ODF,Operate done flag" "0,1"
|
|
bitfld.long 0x0 4. "EPPERR,Erase/program protection error" "0,1"
|
|
bitfld.long 0x0 2. "PRGMERR,program error" "0,1"
|
|
rbitfld.long 0x0 0. "OBF,Operate busy flag" "0,1"
|
|
line.long 0x4 "CTRL,Control register"
|
|
bitfld.long 0x4 12. "ODFIE,Operation done flag interrupt enable" "0,1"
|
|
bitfld.long 0x4 10. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 9. "USDULKS,User system data unlock success" "0,1"
|
|
bitfld.long 0x4 7. "OPLK,Operation lock" "0,1"
|
|
bitfld.long 0x4 6. "ERSTR,Erasing start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "USDERS,User system data erase" "0,1"
|
|
bitfld.long 0x4 4. "USDPRGM,User system data program" "0,1"
|
|
bitfld.long 0x4 2. "BANKERS,Bank erase" "0,1"
|
|
bitfld.long 0x4 1. "SECERS,Sector erase" "0,1"
|
|
bitfld.long 0x4 0. "FPRGM,Flash program" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "ADDR,Address register"
|
|
hexmask.long 0x0 0.--31. 1. "FA,Flash Address"
|
|
rgroup.long 0x1C++0x7
|
|
line.long 0x0 "USD,User system data register"
|
|
bitfld.long 0x0 26. "FAP_HL,FAP high level" "0,1"
|
|
hexmask.long.byte 0x0 18.--25. 1. "USER_D1,User data 1"
|
|
hexmask.long.byte 0x0 10.--17. 1. "USER_D0,User data 0"
|
|
bitfld.long 0x0 8. "nSTDBY_WDT,Standby wdt stop count" "0,1"
|
|
bitfld.long 0x0 7. "nDEPSLP_WDT,Deepsleep wdt stop count" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "nBOOT1,boot1" "0,1"
|
|
bitfld.long 0x0 4. "nSTDBY_RST,Standby reset" "0,1"
|
|
bitfld.long 0x0 3. "nDEPSLP_RST,Deepsleep reset" "0,1"
|
|
bitfld.long 0x0 2. "nWDT_ATO_EN,WDT auto enable" "0,1"
|
|
bitfld.long 0x0 1. "FAP,FLASH access protection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "USDERR,User system data error" "0,1"
|
|
line.long 0x4 "EPPS,Erase/program protection status register"
|
|
hexmask.long 0x4 0.--31. 1. "EPPS,Erase/program protection status"
|
|
group.long 0x74++0x7
|
|
line.long 0x0 "SLIB_STS0,sLib status 0 register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EM_SLIB_INST_SS,Extension memory sLib instruction start sector"
|
|
bitfld.long 0x0 3. "SLIB_ENF,sLib enabled flag" "0,1"
|
|
bitfld.long 0x0 2. "EM_SLIB_ENF,Extension memory sLib enabled flag" "0,1"
|
|
bitfld.long 0x0 0. "BTM_AP_ENF,Boot memory store application code enabled flag" "0,1"
|
|
line.long 0x4 "SLIB_STS1,sLib status 1 register"
|
|
hexmask.long.word 0x4 22.--31. 1. "SLIB_ES,sLib end sector"
|
|
hexmask.long.word 0x4 11.--21. 1. "SLIB_INST_SS,sLib instruction start sector"
|
|
hexmask.long.word 0x4 0.--10. 1. "SLIB_SS,sLib start sector"
|
|
wgroup.long 0x7C++0x3
|
|
line.long 0x0 "SLIB_PWD_CLR,SLIB password clear register"
|
|
hexmask.long 0x0 0.--31. 1. "SLIB_PCLR_VAL,sLib password clear value"
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x0 "SLIB_MISC_STS,sLib misc status register"
|
|
bitfld.long 0x0 2. "SLIB_ULKF,sLib unlock flag" "0,1"
|
|
bitfld.long 0x0 1. "SLIB_PWD_OK,sLib password ok" "0,1"
|
|
bitfld.long 0x0 0. "SLIB_PWD_ERR,sLib password error" "0,1"
|
|
wgroup.long 0x84++0x3
|
|
line.long 0x0 "CRC_ADDR,Flash CRC data start address register"
|
|
hexmask.long 0x0 0.--31. 1. "CRC_ADDR,CRC address"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "CRC_CTRL,Flash CRC controll register"
|
|
bitfld.long 0x0 16. "CRC_STRT,CRC start" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CRC_SN,CRC sector numbler"
|
|
rgroup.long 0x8C++0x3
|
|
line.long 0x0 "CRC_CHKR,FLASH CRC check result register"
|
|
hexmask.long 0x0 0.--31. 1. "FCRC_OUT,CRC32 verification result of flash user code or SLIB code"
|
|
wgroup.long 0x160++0x13
|
|
line.long 0x0 "SLIB_SET_PWD,sLib password setting register"
|
|
hexmask.long 0x0 0.--31. 1. "SLIB_PSET_VAL,sLib password setting val"
|
|
line.long 0x4 "SLIB_SET_RANGE,Configure sLib range register"
|
|
hexmask.long.word 0x4 22.--31. 1. "SLIB_ES_SET,sLib end sector setting"
|
|
hexmask.long.word 0x4 11.--21. 1. "SLIB_ISS_SET,sLib instruction start sector setting"
|
|
hexmask.long.word 0x4 0.--10. 1. "SLIB_SS_SET,sLib start sector setting"
|
|
line.long 0x8 "EM_SLIB_SET,Extension momery slib set register"
|
|
hexmask.long.byte 0x8 16.--23. 1. "EM_SLIB_ISS_SET,Extension memory sLib instruction start sector setting"
|
|
hexmask.long.word 0x8 0.--15. 1. "EM_SLIB_SET,Extension memory sLib setting"
|
|
line.long 0xC "BTM_MODE_SET,Boot memory mode setting register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "BTM_MODE_SET,Boot memory mode setting"
|
|
line.long 0x10 "SLIB_UNLOCK,sLib unlock register"
|
|
hexmask.long 0x10 0.--31. 1. "SLIB_UKVAL,sLib unlock key value"
|
|
tree.end
|
|
tree "GPIO (General purpose IO)"
|
|
base ad:0x0
|
|
tree "GPIOA"
|
|
base ad:0x40020000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CFGR,GPIO configuration register"
|
|
bitfld.long 0x0 30.--31. "IOMC15,GPIOx pin 15 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "IOMC14,GPIOx pin 14 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "IOMC13,GPIOx pin 13 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "IOMC12,GPIOx pin 12 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "IOMC11,GPIOx pin 11 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "IOMC10,GPIOx pin 10 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "IOMC9,GPIOx pin 9 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "IOMC8,GPIOx pin 8 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "IOMC7,GPIOx pin 7 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "IOMC6,GPIOx pin 6 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "IOMC5,GPIOx pin 5 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "IOMC4,GPIOx pin 4 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "IOMC3,GPIOx pin 3 mode configurate" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IOMC2,GPIOx pin 2 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "IOMC1,GPIOx pin 1 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "IOMC0,GPIOx pin 0 mode configurate" "0,1,2,3"
|
|
line.long 0x4 "OMODE,GPIO output mode register"
|
|
bitfld.long 0x4 15. "OM15,GPIOx pin 15 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 14. "OM14,GPIOx pin 14 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 13. "OM13,GPIOx pin 13 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 12. "OM12,GPIOx pin 12 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 11. "OM11,GPIOx pin 11 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 10. "OM10,GPIOx pin 10 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 9. "OM9,GPIOx pin 9 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 8. "OM8,GPIOx pin 8 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 7. "OM7,GPIOx pin 7 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 6. "OM6,GPIOx pin 6 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 5. "OM5,GPIOx pin 5 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 4. "OM4,GPIOx pin 4 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 3. "OM3,GPIOx pin 3 outpu mode configurate" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "OM2,GPIOx pin 2 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 1. "OM1,GPIOx pin 1 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 0. "OM0,GPIOx pin 0 outpu mode configurate" "0,1"
|
|
line.long 0x8 "ODRVR,GPIO drive capability register"
|
|
bitfld.long 0x8 30.--31. "ODRV15,GPIOx pin 15 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "ODRV14,GPIOx pin 14 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "ODRV13,GPIOx pin 13 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "ODRV12,GPIOx pin 12 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "ODRV11,GPIOx pin 11 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "ODRV10,GPIOx pin 10 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "ODRV9,GPIOx pin 9 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "ODRV8,GPIOx pin 8 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "ODRV7,GPIOx pin 7 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "ODRV6,GPIOx pin 6 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 10.--11. "ODRV5,GPIOx pin 5 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "ODRV4,GPIOx pin 4 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "ODRV3,GPIOx pin 3 output drive capability" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "ODRV2,GPIOx pin 2 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "ODRV1,GPIOx pin 1 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "ODRV0,GPIOx pin 0 output drive capability" "0,1,2,3"
|
|
line.long 0xC "PULL,GPIO pull-up/pull-down register"
|
|
bitfld.long 0xC 30.--31. "PULL15,GPIOx pin 15 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PULL14,GPIOx pin 14 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PULL13,GPIOx pin 13 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PULL12,GPIOx pin 12 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PULL11,GPIOx pin 11 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PULL10,GPIOx pin 10 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PULL9,GPIOx pin 9 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PULL8,GPIOx pin 8 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PULL7,GPIOx pin 7 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PULL6,GPIOx pin 6 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 10.--11. "PULL5,GPIOx pin 5 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PULL4,GPIOx pin 4 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PULL3,GPIOx pin 3 pull configuration" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PULL2,GPIOx pin 2 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PULL1,GPIOx pin 1 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PULL0,GPIOx pin 0 pull configuration" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDT,GPIO input data register"
|
|
bitfld.long 0x0 15. "IDT15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDT14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDT13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDT12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDT11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDT10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDT9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDT8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDT7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDT6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDT5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDT4,Port input data" "0,1"
|
|
bitfld.long 0x0 3. "IDT3,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IDT2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDT1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDT0,Port input data" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODT,GPIO output data register"
|
|
bitfld.long 0x0 15. "ODT15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODT14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODT13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODT12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODT11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODT10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODT9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODT8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODT7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODT6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODT5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODT4,Port output data" "0,1"
|
|
bitfld.long 0x0 3. "ODT3,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ODT2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODT1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODT0,Port output data" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "SCR,Port bit set/clear register"
|
|
bitfld.long 0x0 31. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 19. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "IOCB0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "IOSB15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOSB14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOSB13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOSB12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOSB11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOSB10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOSB9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOSB8,Set bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOSB7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOSB6,Set bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IOSB5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOSB4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOSB3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "IOSB2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "IOSB1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOSB0,Set bit 0" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "WPR,Port write protect register"
|
|
bitfld.long 0x0 16. "WPSEQ,Write protect sequence" "0,1"
|
|
bitfld.long 0x0 15. "WPEN15,Write protect enable 15" "0,1"
|
|
bitfld.long 0x0 14. "WPEN14,Write protect enable 14" "0,1"
|
|
bitfld.long 0x0 13. "WPEN13,Write protect enable 13" "0,1"
|
|
bitfld.long 0x0 12. "WPEN12,Write protect enable 12" "0,1"
|
|
bitfld.long 0x0 11. "WPEN11,Write protect enable 11" "0,1"
|
|
bitfld.long 0x0 10. "WPEN10,Write protect enable 10" "0,1"
|
|
bitfld.long 0x0 9. "WPEN9,Write protect enable 9" "0,1"
|
|
bitfld.long 0x0 8. "WPEN8,Write protect enable 8" "0,1"
|
|
bitfld.long 0x0 7. "WPEN7,Write protect enable 7" "0,1"
|
|
bitfld.long 0x0 6. "WPEN6,Write protect enable 6" "0,1"
|
|
bitfld.long 0x0 5. "WPEN5,Write protect enable 5" "0,1"
|
|
bitfld.long 0x0 4. "WPEN4,Write protect enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WPEN3,Write protect enable 3" "0,1"
|
|
bitfld.long 0x0 2. "WPEN2,Write protect enable 2" "0,1"
|
|
bitfld.long 0x0 1. "WPEN1,Write protect enable 1" "0,1"
|
|
bitfld.long 0x0 0. "WPEN0,Write protect enable 0" "0,1"
|
|
line.long 0x4 "MUXL,GPIO muxing function low register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MUXL7,GPIOx pin 7 muxing"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MUXL6,GPIOx pin 6 muxing"
|
|
hexmask.long.byte 0x4 20.--23. 1. "MUXL5,GPIOx pin 5 muxing"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MUXL4,GPIOx pin 4 muxing"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MUXL3,GPIOx pin 3 muxing"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MUXL2,GPIOx pin 2 muxing"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MUXL1,GPIOx pin 1 muxing"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MUXL0,GPIOx pin 0 muxing"
|
|
line.long 0x8 "MUXH,GPIO muxing function high register"
|
|
hexmask.long.byte 0x8 28.--31. 1. "MUXH15,GPIOx pin 15 muxing"
|
|
hexmask.long.byte 0x8 24.--27. 1. "MUXH14,GPIOx pin 14 muxing"
|
|
hexmask.long.byte 0x8 20.--23. 1. "MUXH13,GPIOx pin 13 muxing"
|
|
hexmask.long.byte 0x8 16.--19. 1. "MUXH12,GPIOx pin 12 muxing"
|
|
hexmask.long.byte 0x8 12.--15. 1. "MUXH11,GPIOx pin 11 muxing"
|
|
hexmask.long.byte 0x8 8.--11. 1. "MUXH10,GPIOx pin 10 muxing"
|
|
hexmask.long.byte 0x8 4.--7. 1. "MUXH9,GPIOx pin 9 muxing"
|
|
hexmask.long.byte 0x8 0.--3. 1. "MUXH8,GPIOx pin 8 muxing"
|
|
wgroup.long 0x28++0x7
|
|
line.long 0x0 "CLR,GPIO bit reset register"
|
|
bitfld.long 0x0 15. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 5. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 1. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOCB0,Clear bit 0" "0,1"
|
|
line.long 0x4 "TOGR,GPIO bit toggle register"
|
|
bitfld.long 0x4 15. "IOTB15,Toggle bit 15" "0,1"
|
|
bitfld.long 0x4 14. "IOTB14,Toggle bit 14" "0,1"
|
|
bitfld.long 0x4 13. "IOTB13,Toggle bit 13" "0,1"
|
|
bitfld.long 0x4 12. "IOTB12,Toggle bit 12" "0,1"
|
|
bitfld.long 0x4 11. "IOTB11,Toggle bit 11" "0,1"
|
|
bitfld.long 0x4 10. "IOTB10,Toggle bit 10" "0,1"
|
|
bitfld.long 0x4 9. "IOTB9,Toggle bit 9" "0,1"
|
|
bitfld.long 0x4 8. "IOTB8,Toggle bit 8" "0,1"
|
|
bitfld.long 0x4 7. "IOTB7,Toggle bit 7" "0,1"
|
|
bitfld.long 0x4 6. "IOTB6,Toggle bit 6" "0,1"
|
|
bitfld.long 0x4 5. "IOTB5,Toggle bit 5" "0,1"
|
|
bitfld.long 0x4 4. "IOTB4,Toggle bit 4" "0,1"
|
|
bitfld.long 0x4 3. "IOTB3,Toggle bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "IOTB2,Toggle bit 2" "0,1"
|
|
bitfld.long 0x4 1. "IOTB1,Toggle bit 1" "0,1"
|
|
bitfld.long 0x4 0. "IOTB0,Toggle bit 0" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "HDRV,Huge current driver"
|
|
bitfld.long 0x0 15. "HDRV15,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 14. "HDRV14,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 13. "HDRV13,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 12. "HDRV12,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 11. "HDRV11,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 10. "HDRV10,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 9. "HDRV9,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 8. "HDRV8,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 7. "HDRV7,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 6. "HDRV6,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 5. "HDRV5,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 4. "HDRV4,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 3. "HDRV3,Port x driver bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDRV2,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 1. "HDRV1,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 0. "HDRV0,Port x driver bit y" "0,1"
|
|
tree.end
|
|
tree "GPIOB"
|
|
base ad:0x40020400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CFGR,GPIO configuration register"
|
|
bitfld.long 0x0 30.--31. "IOMC15,GPIOx pin 15 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "IOMC14,GPIOx pin 14 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "IOMC13,GPIOx pin 13 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "IOMC12,GPIOx pin 12 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "IOMC11,GPIOx pin 11 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "IOMC10,GPIOx pin 10 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "IOMC9,GPIOx pin 9 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "IOMC8,GPIOx pin 8 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "IOMC7,GPIOx pin 7 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "IOMC6,GPIOx pin 6 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "IOMC5,GPIOx pin 5 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "IOMC4,GPIOx pin 4 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "IOMC3,GPIOx pin 3 mode configurate" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IOMC2,GPIOx pin 2 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "IOMC1,GPIOx pin 1 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "IOMC0,GPIOx pin 0 mode configurate" "0,1,2,3"
|
|
line.long 0x4 "OMODE,GPIO output mode register"
|
|
bitfld.long 0x4 15. "OM15,GPIOx pin 15 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 14. "OM14,GPIOx pin 14 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 13. "OM13,GPIOx pin 13 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 12. "OM12,GPIOx pin 12 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 11. "OM11,GPIOx pin 11 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 10. "OM10,GPIOx pin 10 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 9. "OM9,GPIOx pin 9 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 8. "OM8,GPIOx pin 8 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 7. "OM7,GPIOx pin 7 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 6. "OM6,GPIOx pin 6 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 5. "OM5,GPIOx pin 5 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 4. "OM4,GPIOx pin 4 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 3. "OM3,GPIOx pin 3 outpu mode configurate" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "OM2,GPIOx pin 2 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 1. "OM1,GPIOx pin 1 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 0. "OM0,GPIOx pin 0 outpu mode configurate" "0,1"
|
|
line.long 0x8 "ODRVR,GPIO drive capability register"
|
|
bitfld.long 0x8 30.--31. "ODRV15,GPIOx pin 15 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "ODRV14,GPIOx pin 14 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "ODRV13,GPIOx pin 13 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "ODRV12,GPIOx pin 12 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "ODRV11,GPIOx pin 11 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "ODRV10,GPIOx pin 10 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "ODRV9,GPIOx pin 9 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "ODRV8,GPIOx pin 8 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "ODRV7,GPIOx pin 7 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "ODRV6,GPIOx pin 6 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 10.--11. "ODRV5,GPIOx pin 5 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "ODRV4,GPIOx pin 4 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "ODRV3,GPIOx pin 3 output drive capability" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "ODRV2,GPIOx pin 2 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "ODRV1,GPIOx pin 1 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "ODRV0,GPIOx pin 0 output drive capability" "0,1,2,3"
|
|
line.long 0xC "PULL,GPIO pull-up/pull-down register"
|
|
bitfld.long 0xC 30.--31. "PULL15,GPIOx pin 15 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PULL14,GPIOx pin 14 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PULL13,GPIOx pin 13 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PULL12,GPIOx pin 12 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PULL11,GPIOx pin 11 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PULL10,GPIOx pin 10 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PULL9,GPIOx pin 9 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PULL8,GPIOx pin 8 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PULL7,GPIOx pin 7 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PULL6,GPIOx pin 6 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 10.--11. "PULL5,GPIOx pin 5 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PULL4,GPIOx pin 4 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PULL3,GPIOx pin 3 pull configuration" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PULL2,GPIOx pin 2 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PULL1,GPIOx pin 1 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PULL0,GPIOx pin 0 pull configuration" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDT,GPIO input data register"
|
|
bitfld.long 0x0 15. "IDT15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDT14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDT13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDT12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDT11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDT10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDT9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDT8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDT7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDT6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDT5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDT4,Port input data" "0,1"
|
|
bitfld.long 0x0 3. "IDT3,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IDT2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDT1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDT0,Port input data" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODT,GPIO output data register"
|
|
bitfld.long 0x0 15. "ODT15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODT14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODT13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODT12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODT11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODT10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODT9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODT8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODT7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODT6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODT5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODT4,Port output data" "0,1"
|
|
bitfld.long 0x0 3. "ODT3,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ODT2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODT1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODT0,Port output data" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "SCR,Port bit set/clear register"
|
|
bitfld.long 0x0 31. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 19. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "IOCB0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "IOSB15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOSB14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOSB13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOSB12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOSB11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOSB10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOSB9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOSB8,Set bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOSB7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOSB6,Set bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IOSB5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOSB4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOSB3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "IOSB2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "IOSB1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOSB0,Set bit 0" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "WPR,Port write protect register"
|
|
bitfld.long 0x0 16. "WPSEQ,Write protect sequence" "0,1"
|
|
bitfld.long 0x0 15. "WPEN15,Write protect enable 15" "0,1"
|
|
bitfld.long 0x0 14. "WPEN14,Write protect enable 14" "0,1"
|
|
bitfld.long 0x0 13. "WPEN13,Write protect enable 13" "0,1"
|
|
bitfld.long 0x0 12. "WPEN12,Write protect enable 12" "0,1"
|
|
bitfld.long 0x0 11. "WPEN11,Write protect enable 11" "0,1"
|
|
bitfld.long 0x0 10. "WPEN10,Write protect enable 10" "0,1"
|
|
bitfld.long 0x0 9. "WPEN9,Write protect enable 9" "0,1"
|
|
bitfld.long 0x0 8. "WPEN8,Write protect enable 8" "0,1"
|
|
bitfld.long 0x0 7. "WPEN7,Write protect enable 7" "0,1"
|
|
bitfld.long 0x0 6. "WPEN6,Write protect enable 6" "0,1"
|
|
bitfld.long 0x0 5. "WPEN5,Write protect enable 5" "0,1"
|
|
bitfld.long 0x0 4. "WPEN4,Write protect enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WPEN3,Write protect enable 3" "0,1"
|
|
bitfld.long 0x0 2. "WPEN2,Write protect enable 2" "0,1"
|
|
bitfld.long 0x0 1. "WPEN1,Write protect enable 1" "0,1"
|
|
bitfld.long 0x0 0. "WPEN0,Write protect enable 0" "0,1"
|
|
line.long 0x4 "MUXL,GPIO muxing function low register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MUXL7,GPIOx pin 7 muxing"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MUXL6,GPIOx pin 6 muxing"
|
|
hexmask.long.byte 0x4 20.--23. 1. "MUXL5,GPIOx pin 5 muxing"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MUXL4,GPIOx pin 4 muxing"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MUXL3,GPIOx pin 3 muxing"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MUXL2,GPIOx pin 2 muxing"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MUXL1,GPIOx pin 1 muxing"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MUXL0,GPIOx pin 0 muxing"
|
|
line.long 0x8 "MUXH,GPIO muxing function high register"
|
|
hexmask.long.byte 0x8 28.--31. 1. "MUXH15,GPIOx pin 15 muxing"
|
|
hexmask.long.byte 0x8 24.--27. 1. "MUXH14,GPIOx pin 14 muxing"
|
|
hexmask.long.byte 0x8 20.--23. 1. "MUXH13,GPIOx pin 13 muxing"
|
|
hexmask.long.byte 0x8 16.--19. 1. "MUXH12,GPIOx pin 12 muxing"
|
|
hexmask.long.byte 0x8 12.--15. 1. "MUXH11,GPIOx pin 11 muxing"
|
|
hexmask.long.byte 0x8 8.--11. 1. "MUXH10,GPIOx pin 10 muxing"
|
|
hexmask.long.byte 0x8 4.--7. 1. "MUXH9,GPIOx pin 9 muxing"
|
|
hexmask.long.byte 0x8 0.--3. 1. "MUXH8,GPIOx pin 8 muxing"
|
|
wgroup.long 0x28++0x7
|
|
line.long 0x0 "CLR,GPIO bit reset register"
|
|
bitfld.long 0x0 15. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 5. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 1. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOCB0,Clear bit 0" "0,1"
|
|
line.long 0x4 "TOGR,GPIO bit toggle register"
|
|
bitfld.long 0x4 15. "IOTB15,Toggle bit 15" "0,1"
|
|
bitfld.long 0x4 14. "IOTB14,Toggle bit 14" "0,1"
|
|
bitfld.long 0x4 13. "IOTB13,Toggle bit 13" "0,1"
|
|
bitfld.long 0x4 12. "IOTB12,Toggle bit 12" "0,1"
|
|
bitfld.long 0x4 11. "IOTB11,Toggle bit 11" "0,1"
|
|
bitfld.long 0x4 10. "IOTB10,Toggle bit 10" "0,1"
|
|
bitfld.long 0x4 9. "IOTB9,Toggle bit 9" "0,1"
|
|
bitfld.long 0x4 8. "IOTB8,Toggle bit 8" "0,1"
|
|
bitfld.long 0x4 7. "IOTB7,Toggle bit 7" "0,1"
|
|
bitfld.long 0x4 6. "IOTB6,Toggle bit 6" "0,1"
|
|
bitfld.long 0x4 5. "IOTB5,Toggle bit 5" "0,1"
|
|
bitfld.long 0x4 4. "IOTB4,Toggle bit 4" "0,1"
|
|
bitfld.long 0x4 3. "IOTB3,Toggle bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "IOTB2,Toggle bit 2" "0,1"
|
|
bitfld.long 0x4 1. "IOTB1,Toggle bit 1" "0,1"
|
|
bitfld.long 0x4 0. "IOTB0,Toggle bit 0" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "HDRV,Huge current driver"
|
|
bitfld.long 0x0 15. "HDRV15,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 14. "HDRV14,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 13. "HDRV13,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 12. "HDRV12,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 11. "HDRV11,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 10. "HDRV10,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 9. "HDRV9,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 8. "HDRV8,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 7. "HDRV7,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 6. "HDRV6,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 5. "HDRV5,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 4. "HDRV4,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 3. "HDRV3,Port x driver bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDRV2,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 1. "HDRV1,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 0. "HDRV0,Port x driver bit y" "0,1"
|
|
tree.end
|
|
tree "GPIOC"
|
|
base ad:0x40020800
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CFGR,GPIO configuration register"
|
|
bitfld.long 0x0 30.--31. "IOMC15,GPIOx pin 15 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "IOMC14,GPIOx pin 14 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "IOMC13,GPIOx pin 13 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "IOMC12,GPIOx pin 12 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "IOMC11,GPIOx pin 11 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "IOMC10,GPIOx pin 10 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "IOMC9,GPIOx pin 9 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "IOMC8,GPIOx pin 8 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "IOMC7,GPIOx pin 7 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "IOMC6,GPIOx pin 6 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "IOMC5,GPIOx pin 5 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "IOMC4,GPIOx pin 4 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "IOMC3,GPIOx pin 3 mode configurate" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IOMC2,GPIOx pin 2 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "IOMC1,GPIOx pin 1 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "IOMC0,GPIOx pin 0 mode configurate" "0,1,2,3"
|
|
line.long 0x4 "OMODE,GPIO output mode register"
|
|
bitfld.long 0x4 15. "OM15,GPIOx pin 15 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 14. "OM14,GPIOx pin 14 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 13. "OM13,GPIOx pin 13 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 12. "OM12,GPIOx pin 12 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 11. "OM11,GPIOx pin 11 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 10. "OM10,GPIOx pin 10 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 9. "OM9,GPIOx pin 9 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 8. "OM8,GPIOx pin 8 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 7. "OM7,GPIOx pin 7 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 6. "OM6,GPIOx pin 6 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 5. "OM5,GPIOx pin 5 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 4. "OM4,GPIOx pin 4 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 3. "OM3,GPIOx pin 3 outpu mode configurate" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "OM2,GPIOx pin 2 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 1. "OM1,GPIOx pin 1 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 0. "OM0,GPIOx pin 0 outpu mode configurate" "0,1"
|
|
line.long 0x8 "ODRVR,GPIO drive capability register"
|
|
bitfld.long 0x8 30.--31. "ODRV15,GPIOx pin 15 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "ODRV14,GPIOx pin 14 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "ODRV13,GPIOx pin 13 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "ODRV12,GPIOx pin 12 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "ODRV11,GPIOx pin 11 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "ODRV10,GPIOx pin 10 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "ODRV9,GPIOx pin 9 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "ODRV8,GPIOx pin 8 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "ODRV7,GPIOx pin 7 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "ODRV6,GPIOx pin 6 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 10.--11. "ODRV5,GPIOx pin 5 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "ODRV4,GPIOx pin 4 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "ODRV3,GPIOx pin 3 output drive capability" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "ODRV2,GPIOx pin 2 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "ODRV1,GPIOx pin 1 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "ODRV0,GPIOx pin 0 output drive capability" "0,1,2,3"
|
|
line.long 0xC "PULL,GPIO pull-up/pull-down register"
|
|
bitfld.long 0xC 30.--31. "PULL15,GPIOx pin 15 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PULL14,GPIOx pin 14 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PULL13,GPIOx pin 13 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PULL12,GPIOx pin 12 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PULL11,GPIOx pin 11 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PULL10,GPIOx pin 10 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PULL9,GPIOx pin 9 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PULL8,GPIOx pin 8 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PULL7,GPIOx pin 7 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PULL6,GPIOx pin 6 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 10.--11. "PULL5,GPIOx pin 5 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PULL4,GPIOx pin 4 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PULL3,GPIOx pin 3 pull configuration" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PULL2,GPIOx pin 2 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PULL1,GPIOx pin 1 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PULL0,GPIOx pin 0 pull configuration" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDT,GPIO input data register"
|
|
bitfld.long 0x0 15. "IDT15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDT14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDT13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDT12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDT11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDT10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDT9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDT8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDT7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDT6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDT5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDT4,Port input data" "0,1"
|
|
bitfld.long 0x0 3. "IDT3,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IDT2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDT1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDT0,Port input data" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODT,GPIO output data register"
|
|
bitfld.long 0x0 15. "ODT15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODT14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODT13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODT12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODT11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODT10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODT9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODT8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODT7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODT6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODT5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODT4,Port output data" "0,1"
|
|
bitfld.long 0x0 3. "ODT3,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ODT2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODT1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODT0,Port output data" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "SCR,Port bit set/clear register"
|
|
bitfld.long 0x0 31. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 19. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "IOCB0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "IOSB15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOSB14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOSB13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOSB12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOSB11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOSB10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOSB9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOSB8,Set bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOSB7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOSB6,Set bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IOSB5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOSB4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOSB3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "IOSB2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "IOSB1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOSB0,Set bit 0" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "WPR,Port write protect register"
|
|
bitfld.long 0x0 16. "WPSEQ,Write protect sequence" "0,1"
|
|
bitfld.long 0x0 15. "WPEN15,Write protect enable 15" "0,1"
|
|
bitfld.long 0x0 14. "WPEN14,Write protect enable 14" "0,1"
|
|
bitfld.long 0x0 13. "WPEN13,Write protect enable 13" "0,1"
|
|
bitfld.long 0x0 12. "WPEN12,Write protect enable 12" "0,1"
|
|
bitfld.long 0x0 11. "WPEN11,Write protect enable 11" "0,1"
|
|
bitfld.long 0x0 10. "WPEN10,Write protect enable 10" "0,1"
|
|
bitfld.long 0x0 9. "WPEN9,Write protect enable 9" "0,1"
|
|
bitfld.long 0x0 8. "WPEN8,Write protect enable 8" "0,1"
|
|
bitfld.long 0x0 7. "WPEN7,Write protect enable 7" "0,1"
|
|
bitfld.long 0x0 6. "WPEN6,Write protect enable 6" "0,1"
|
|
bitfld.long 0x0 5. "WPEN5,Write protect enable 5" "0,1"
|
|
bitfld.long 0x0 4. "WPEN4,Write protect enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WPEN3,Write protect enable 3" "0,1"
|
|
bitfld.long 0x0 2. "WPEN2,Write protect enable 2" "0,1"
|
|
bitfld.long 0x0 1. "WPEN1,Write protect enable 1" "0,1"
|
|
bitfld.long 0x0 0. "WPEN0,Write protect enable 0" "0,1"
|
|
line.long 0x4 "MUXL,GPIO muxing function low register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MUXL7,GPIOx pin 7 muxing"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MUXL6,GPIOx pin 6 muxing"
|
|
hexmask.long.byte 0x4 20.--23. 1. "MUXL5,GPIOx pin 5 muxing"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MUXL4,GPIOx pin 4 muxing"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MUXL3,GPIOx pin 3 muxing"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MUXL2,GPIOx pin 2 muxing"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MUXL1,GPIOx pin 1 muxing"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MUXL0,GPIOx pin 0 muxing"
|
|
line.long 0x8 "MUXH,GPIO muxing function high register"
|
|
hexmask.long.byte 0x8 28.--31. 1. "MUXH15,GPIOx pin 15 muxing"
|
|
hexmask.long.byte 0x8 24.--27. 1. "MUXH14,GPIOx pin 14 muxing"
|
|
hexmask.long.byte 0x8 20.--23. 1. "MUXH13,GPIOx pin 13 muxing"
|
|
hexmask.long.byte 0x8 16.--19. 1. "MUXH12,GPIOx pin 12 muxing"
|
|
hexmask.long.byte 0x8 12.--15. 1. "MUXH11,GPIOx pin 11 muxing"
|
|
hexmask.long.byte 0x8 8.--11. 1. "MUXH10,GPIOx pin 10 muxing"
|
|
hexmask.long.byte 0x8 4.--7. 1. "MUXH9,GPIOx pin 9 muxing"
|
|
hexmask.long.byte 0x8 0.--3. 1. "MUXH8,GPIOx pin 8 muxing"
|
|
wgroup.long 0x28++0x7
|
|
line.long 0x0 "CLR,GPIO bit reset register"
|
|
bitfld.long 0x0 15. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 5. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 1. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOCB0,Clear bit 0" "0,1"
|
|
line.long 0x4 "TOGR,GPIO bit toggle register"
|
|
bitfld.long 0x4 15. "IOTB15,Toggle bit 15" "0,1"
|
|
bitfld.long 0x4 14. "IOTB14,Toggle bit 14" "0,1"
|
|
bitfld.long 0x4 13. "IOTB13,Toggle bit 13" "0,1"
|
|
bitfld.long 0x4 12. "IOTB12,Toggle bit 12" "0,1"
|
|
bitfld.long 0x4 11. "IOTB11,Toggle bit 11" "0,1"
|
|
bitfld.long 0x4 10. "IOTB10,Toggle bit 10" "0,1"
|
|
bitfld.long 0x4 9. "IOTB9,Toggle bit 9" "0,1"
|
|
bitfld.long 0x4 8. "IOTB8,Toggle bit 8" "0,1"
|
|
bitfld.long 0x4 7. "IOTB7,Toggle bit 7" "0,1"
|
|
bitfld.long 0x4 6. "IOTB6,Toggle bit 6" "0,1"
|
|
bitfld.long 0x4 5. "IOTB5,Toggle bit 5" "0,1"
|
|
bitfld.long 0x4 4. "IOTB4,Toggle bit 4" "0,1"
|
|
bitfld.long 0x4 3. "IOTB3,Toggle bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "IOTB2,Toggle bit 2" "0,1"
|
|
bitfld.long 0x4 1. "IOTB1,Toggle bit 1" "0,1"
|
|
bitfld.long 0x4 0. "IOTB0,Toggle bit 0" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "HDRV,Huge current driver"
|
|
bitfld.long 0x0 15. "HDRV15,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 14. "HDRV14,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 13. "HDRV13,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 12. "HDRV12,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 11. "HDRV11,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 10. "HDRV10,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 9. "HDRV9,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 8. "HDRV8,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 7. "HDRV7,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 6. "HDRV6,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 5. "HDRV5,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 4. "HDRV4,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 3. "HDRV3,Port x driver bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDRV2,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 1. "HDRV1,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 0. "HDRV0,Port x driver bit y" "0,1"
|
|
tree.end
|
|
tree "GPIOD"
|
|
base ad:0x40020C00
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CFGR,GPIO configuration register"
|
|
bitfld.long 0x0 30.--31. "IOMC15,GPIOx pin 15 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "IOMC14,GPIOx pin 14 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "IOMC13,GPIOx pin 13 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "IOMC12,GPIOx pin 12 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "IOMC11,GPIOx pin 11 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "IOMC10,GPIOx pin 10 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "IOMC9,GPIOx pin 9 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "IOMC8,GPIOx pin 8 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "IOMC7,GPIOx pin 7 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "IOMC6,GPIOx pin 6 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "IOMC5,GPIOx pin 5 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "IOMC4,GPIOx pin 4 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "IOMC3,GPIOx pin 3 mode configurate" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IOMC2,GPIOx pin 2 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "IOMC1,GPIOx pin 1 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "IOMC0,GPIOx pin 0 mode configurate" "0,1,2,3"
|
|
line.long 0x4 "OMODE,GPIO output mode register"
|
|
bitfld.long 0x4 15. "OM15,GPIOx pin 15 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 14. "OM14,GPIOx pin 14 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 13. "OM13,GPIOx pin 13 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 12. "OM12,GPIOx pin 12 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 11. "OM11,GPIOx pin 11 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 10. "OM10,GPIOx pin 10 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 9. "OM9,GPIOx pin 9 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 8. "OM8,GPIOx pin 8 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 7. "OM7,GPIOx pin 7 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 6. "OM6,GPIOx pin 6 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 5. "OM5,GPIOx pin 5 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 4. "OM4,GPIOx pin 4 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 3. "OM3,GPIOx pin 3 outpu mode configurate" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "OM2,GPIOx pin 2 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 1. "OM1,GPIOx pin 1 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 0. "OM0,GPIOx pin 0 outpu mode configurate" "0,1"
|
|
line.long 0x8 "ODRVR,GPIO drive capability register"
|
|
bitfld.long 0x8 30.--31. "ODRV15,GPIOx pin 15 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "ODRV14,GPIOx pin 14 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "ODRV13,GPIOx pin 13 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "ODRV12,GPIOx pin 12 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "ODRV11,GPIOx pin 11 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "ODRV10,GPIOx pin 10 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "ODRV9,GPIOx pin 9 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "ODRV8,GPIOx pin 8 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "ODRV7,GPIOx pin 7 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "ODRV6,GPIOx pin 6 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 10.--11. "ODRV5,GPIOx pin 5 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "ODRV4,GPIOx pin 4 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "ODRV3,GPIOx pin 3 output drive capability" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "ODRV2,GPIOx pin 2 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "ODRV1,GPIOx pin 1 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "ODRV0,GPIOx pin 0 output drive capability" "0,1,2,3"
|
|
line.long 0xC "PULL,GPIO pull-up/pull-down register"
|
|
bitfld.long 0xC 30.--31. "PULL15,GPIOx pin 15 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PULL14,GPIOx pin 14 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PULL13,GPIOx pin 13 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PULL12,GPIOx pin 12 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PULL11,GPIOx pin 11 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PULL10,GPIOx pin 10 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PULL9,GPIOx pin 9 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PULL8,GPIOx pin 8 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PULL7,GPIOx pin 7 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PULL6,GPIOx pin 6 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 10.--11. "PULL5,GPIOx pin 5 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PULL4,GPIOx pin 4 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PULL3,GPIOx pin 3 pull configuration" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PULL2,GPIOx pin 2 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PULL1,GPIOx pin 1 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PULL0,GPIOx pin 0 pull configuration" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDT,GPIO input data register"
|
|
bitfld.long 0x0 15. "IDT15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDT14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDT13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDT12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDT11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDT10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDT9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDT8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDT7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDT6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDT5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDT4,Port input data" "0,1"
|
|
bitfld.long 0x0 3. "IDT3,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IDT2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDT1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDT0,Port input data" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODT,GPIO output data register"
|
|
bitfld.long 0x0 15. "ODT15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODT14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODT13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODT12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODT11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODT10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODT9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODT8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODT7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODT6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODT5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODT4,Port output data" "0,1"
|
|
bitfld.long 0x0 3. "ODT3,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ODT2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODT1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODT0,Port output data" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "SCR,Port bit set/clear register"
|
|
bitfld.long 0x0 31. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 19. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "IOCB0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "IOSB15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOSB14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOSB13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOSB12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOSB11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOSB10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOSB9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOSB8,Set bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOSB7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOSB6,Set bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IOSB5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOSB4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOSB3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "IOSB2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "IOSB1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOSB0,Set bit 0" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "WPR,Port write protect register"
|
|
bitfld.long 0x0 16. "WPSEQ,Write protect sequence" "0,1"
|
|
bitfld.long 0x0 15. "WPEN15,Write protect enable 15" "0,1"
|
|
bitfld.long 0x0 14. "WPEN14,Write protect enable 14" "0,1"
|
|
bitfld.long 0x0 13. "WPEN13,Write protect enable 13" "0,1"
|
|
bitfld.long 0x0 12. "WPEN12,Write protect enable 12" "0,1"
|
|
bitfld.long 0x0 11. "WPEN11,Write protect enable 11" "0,1"
|
|
bitfld.long 0x0 10. "WPEN10,Write protect enable 10" "0,1"
|
|
bitfld.long 0x0 9. "WPEN9,Write protect enable 9" "0,1"
|
|
bitfld.long 0x0 8. "WPEN8,Write protect enable 8" "0,1"
|
|
bitfld.long 0x0 7. "WPEN7,Write protect enable 7" "0,1"
|
|
bitfld.long 0x0 6. "WPEN6,Write protect enable 6" "0,1"
|
|
bitfld.long 0x0 5. "WPEN5,Write protect enable 5" "0,1"
|
|
bitfld.long 0x0 4. "WPEN4,Write protect enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WPEN3,Write protect enable 3" "0,1"
|
|
bitfld.long 0x0 2. "WPEN2,Write protect enable 2" "0,1"
|
|
bitfld.long 0x0 1. "WPEN1,Write protect enable 1" "0,1"
|
|
bitfld.long 0x0 0. "WPEN0,Write protect enable 0" "0,1"
|
|
line.long 0x4 "MUXL,GPIO muxing function low register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MUXL7,GPIOx pin 7 muxing"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MUXL6,GPIOx pin 6 muxing"
|
|
hexmask.long.byte 0x4 20.--23. 1. "MUXL5,GPIOx pin 5 muxing"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MUXL4,GPIOx pin 4 muxing"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MUXL3,GPIOx pin 3 muxing"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MUXL2,GPIOx pin 2 muxing"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MUXL1,GPIOx pin 1 muxing"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MUXL0,GPIOx pin 0 muxing"
|
|
line.long 0x8 "MUXH,GPIO muxing function high register"
|
|
hexmask.long.byte 0x8 28.--31. 1. "MUXH15,GPIOx pin 15 muxing"
|
|
hexmask.long.byte 0x8 24.--27. 1. "MUXH14,GPIOx pin 14 muxing"
|
|
hexmask.long.byte 0x8 20.--23. 1. "MUXH13,GPIOx pin 13 muxing"
|
|
hexmask.long.byte 0x8 16.--19. 1. "MUXH12,GPIOx pin 12 muxing"
|
|
hexmask.long.byte 0x8 12.--15. 1. "MUXH11,GPIOx pin 11 muxing"
|
|
hexmask.long.byte 0x8 8.--11. 1. "MUXH10,GPIOx pin 10 muxing"
|
|
hexmask.long.byte 0x8 4.--7. 1. "MUXH9,GPIOx pin 9 muxing"
|
|
hexmask.long.byte 0x8 0.--3. 1. "MUXH8,GPIOx pin 8 muxing"
|
|
wgroup.long 0x28++0x7
|
|
line.long 0x0 "CLR,GPIO bit reset register"
|
|
bitfld.long 0x0 15. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 5. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 1. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOCB0,Clear bit 0" "0,1"
|
|
line.long 0x4 "TOGR,GPIO bit toggle register"
|
|
bitfld.long 0x4 15. "IOTB15,Toggle bit 15" "0,1"
|
|
bitfld.long 0x4 14. "IOTB14,Toggle bit 14" "0,1"
|
|
bitfld.long 0x4 13. "IOTB13,Toggle bit 13" "0,1"
|
|
bitfld.long 0x4 12. "IOTB12,Toggle bit 12" "0,1"
|
|
bitfld.long 0x4 11. "IOTB11,Toggle bit 11" "0,1"
|
|
bitfld.long 0x4 10. "IOTB10,Toggle bit 10" "0,1"
|
|
bitfld.long 0x4 9. "IOTB9,Toggle bit 9" "0,1"
|
|
bitfld.long 0x4 8. "IOTB8,Toggle bit 8" "0,1"
|
|
bitfld.long 0x4 7. "IOTB7,Toggle bit 7" "0,1"
|
|
bitfld.long 0x4 6. "IOTB6,Toggle bit 6" "0,1"
|
|
bitfld.long 0x4 5. "IOTB5,Toggle bit 5" "0,1"
|
|
bitfld.long 0x4 4. "IOTB4,Toggle bit 4" "0,1"
|
|
bitfld.long 0x4 3. "IOTB3,Toggle bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "IOTB2,Toggle bit 2" "0,1"
|
|
bitfld.long 0x4 1. "IOTB1,Toggle bit 1" "0,1"
|
|
bitfld.long 0x4 0. "IOTB0,Toggle bit 0" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "HDRV,Huge current driver"
|
|
bitfld.long 0x0 15. "HDRV15,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 14. "HDRV14,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 13. "HDRV13,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 12. "HDRV12,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 11. "HDRV11,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 10. "HDRV10,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 9. "HDRV9,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 8. "HDRV8,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 7. "HDRV7,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 6. "HDRV6,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 5. "HDRV5,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 4. "HDRV4,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 3. "HDRV3,Port x driver bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDRV2,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 1. "HDRV1,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 0. "HDRV0,Port x driver bit y" "0,1"
|
|
tree.end
|
|
tree "GPIOE"
|
|
base ad:0x40021000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CFGR,GPIO configuration register"
|
|
bitfld.long 0x0 30.--31. "IOMC15,GPIOx pin 15 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "IOMC14,GPIOx pin 14 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "IOMC13,GPIOx pin 13 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "IOMC12,GPIOx pin 12 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "IOMC11,GPIOx pin 11 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "IOMC10,GPIOx pin 10 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "IOMC9,GPIOx pin 9 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "IOMC8,GPIOx pin 8 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "IOMC7,GPIOx pin 7 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "IOMC6,GPIOx pin 6 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "IOMC5,GPIOx pin 5 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "IOMC4,GPIOx pin 4 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "IOMC3,GPIOx pin 3 mode configurate" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IOMC2,GPIOx pin 2 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "IOMC1,GPIOx pin 1 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "IOMC0,GPIOx pin 0 mode configurate" "0,1,2,3"
|
|
line.long 0x4 "OMODE,GPIO output mode register"
|
|
bitfld.long 0x4 15. "OM15,GPIOx pin 15 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 14. "OM14,GPIOx pin 14 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 13. "OM13,GPIOx pin 13 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 12. "OM12,GPIOx pin 12 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 11. "OM11,GPIOx pin 11 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 10. "OM10,GPIOx pin 10 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 9. "OM9,GPIOx pin 9 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 8. "OM8,GPIOx pin 8 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 7. "OM7,GPIOx pin 7 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 6. "OM6,GPIOx pin 6 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 5. "OM5,GPIOx pin 5 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 4. "OM4,GPIOx pin 4 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 3. "OM3,GPIOx pin 3 outpu mode configurate" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "OM2,GPIOx pin 2 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 1. "OM1,GPIOx pin 1 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 0. "OM0,GPIOx pin 0 outpu mode configurate" "0,1"
|
|
line.long 0x8 "ODRVR,GPIO drive capability register"
|
|
bitfld.long 0x8 30.--31. "ODRV15,GPIOx pin 15 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "ODRV14,GPIOx pin 14 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "ODRV13,GPIOx pin 13 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "ODRV12,GPIOx pin 12 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "ODRV11,GPIOx pin 11 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "ODRV10,GPIOx pin 10 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "ODRV9,GPIOx pin 9 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "ODRV8,GPIOx pin 8 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "ODRV7,GPIOx pin 7 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "ODRV6,GPIOx pin 6 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 10.--11. "ODRV5,GPIOx pin 5 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "ODRV4,GPIOx pin 4 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "ODRV3,GPIOx pin 3 output drive capability" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "ODRV2,GPIOx pin 2 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "ODRV1,GPIOx pin 1 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "ODRV0,GPIOx pin 0 output drive capability" "0,1,2,3"
|
|
line.long 0xC "PULL,GPIO pull-up/pull-down register"
|
|
bitfld.long 0xC 30.--31. "PULL15,GPIOx pin 15 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PULL14,GPIOx pin 14 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PULL13,GPIOx pin 13 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PULL12,GPIOx pin 12 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PULL11,GPIOx pin 11 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PULL10,GPIOx pin 10 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PULL9,GPIOx pin 9 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PULL8,GPIOx pin 8 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PULL7,GPIOx pin 7 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PULL6,GPIOx pin 6 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 10.--11. "PULL5,GPIOx pin 5 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PULL4,GPIOx pin 4 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PULL3,GPIOx pin 3 pull configuration" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PULL2,GPIOx pin 2 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PULL1,GPIOx pin 1 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PULL0,GPIOx pin 0 pull configuration" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDT,GPIO input data register"
|
|
bitfld.long 0x0 15. "IDT15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDT14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDT13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDT12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDT11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDT10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDT9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDT8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDT7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDT6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDT5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDT4,Port input data" "0,1"
|
|
bitfld.long 0x0 3. "IDT3,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IDT2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDT1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDT0,Port input data" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODT,GPIO output data register"
|
|
bitfld.long 0x0 15. "ODT15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODT14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODT13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODT12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODT11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODT10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODT9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODT8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODT7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODT6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODT5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODT4,Port output data" "0,1"
|
|
bitfld.long 0x0 3. "ODT3,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ODT2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODT1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODT0,Port output data" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "SCR,Port bit set/clear register"
|
|
bitfld.long 0x0 31. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 19. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "IOCB0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "IOSB15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOSB14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOSB13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOSB12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOSB11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOSB10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOSB9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOSB8,Set bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOSB7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOSB6,Set bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IOSB5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOSB4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOSB3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "IOSB2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "IOSB1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOSB0,Set bit 0" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "WPR,Port write protect register"
|
|
bitfld.long 0x0 16. "WPSEQ,Write protect sequence" "0,1"
|
|
bitfld.long 0x0 15. "WPEN15,Write protect enable 15" "0,1"
|
|
bitfld.long 0x0 14. "WPEN14,Write protect enable 14" "0,1"
|
|
bitfld.long 0x0 13. "WPEN13,Write protect enable 13" "0,1"
|
|
bitfld.long 0x0 12. "WPEN12,Write protect enable 12" "0,1"
|
|
bitfld.long 0x0 11. "WPEN11,Write protect enable 11" "0,1"
|
|
bitfld.long 0x0 10. "WPEN10,Write protect enable 10" "0,1"
|
|
bitfld.long 0x0 9. "WPEN9,Write protect enable 9" "0,1"
|
|
bitfld.long 0x0 8. "WPEN8,Write protect enable 8" "0,1"
|
|
bitfld.long 0x0 7. "WPEN7,Write protect enable 7" "0,1"
|
|
bitfld.long 0x0 6. "WPEN6,Write protect enable 6" "0,1"
|
|
bitfld.long 0x0 5. "WPEN5,Write protect enable 5" "0,1"
|
|
bitfld.long 0x0 4. "WPEN4,Write protect enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WPEN3,Write protect enable 3" "0,1"
|
|
bitfld.long 0x0 2. "WPEN2,Write protect enable 2" "0,1"
|
|
bitfld.long 0x0 1. "WPEN1,Write protect enable 1" "0,1"
|
|
bitfld.long 0x0 0. "WPEN0,Write protect enable 0" "0,1"
|
|
line.long 0x4 "MUXL,GPIO muxing function low register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MUXL7,GPIOx pin 7 muxing"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MUXL6,GPIOx pin 6 muxing"
|
|
hexmask.long.byte 0x4 20.--23. 1. "MUXL5,GPIOx pin 5 muxing"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MUXL4,GPIOx pin 4 muxing"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MUXL3,GPIOx pin 3 muxing"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MUXL2,GPIOx pin 2 muxing"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MUXL1,GPIOx pin 1 muxing"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MUXL0,GPIOx pin 0 muxing"
|
|
line.long 0x8 "MUXH,GPIO muxing function high register"
|
|
hexmask.long.byte 0x8 28.--31. 1. "MUXH15,GPIOx pin 15 muxing"
|
|
hexmask.long.byte 0x8 24.--27. 1. "MUXH14,GPIOx pin 14 muxing"
|
|
hexmask.long.byte 0x8 20.--23. 1. "MUXH13,GPIOx pin 13 muxing"
|
|
hexmask.long.byte 0x8 16.--19. 1. "MUXH12,GPIOx pin 12 muxing"
|
|
hexmask.long.byte 0x8 12.--15. 1. "MUXH11,GPIOx pin 11 muxing"
|
|
hexmask.long.byte 0x8 8.--11. 1. "MUXH10,GPIOx pin 10 muxing"
|
|
hexmask.long.byte 0x8 4.--7. 1. "MUXH9,GPIOx pin 9 muxing"
|
|
hexmask.long.byte 0x8 0.--3. 1. "MUXH8,GPIOx pin 8 muxing"
|
|
wgroup.long 0x28++0x7
|
|
line.long 0x0 "CLR,GPIO bit reset register"
|
|
bitfld.long 0x0 15. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 5. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 1. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOCB0,Clear bit 0" "0,1"
|
|
line.long 0x4 "TOGR,GPIO bit toggle register"
|
|
bitfld.long 0x4 15. "IOTB15,Toggle bit 15" "0,1"
|
|
bitfld.long 0x4 14. "IOTB14,Toggle bit 14" "0,1"
|
|
bitfld.long 0x4 13. "IOTB13,Toggle bit 13" "0,1"
|
|
bitfld.long 0x4 12. "IOTB12,Toggle bit 12" "0,1"
|
|
bitfld.long 0x4 11. "IOTB11,Toggle bit 11" "0,1"
|
|
bitfld.long 0x4 10. "IOTB10,Toggle bit 10" "0,1"
|
|
bitfld.long 0x4 9. "IOTB9,Toggle bit 9" "0,1"
|
|
bitfld.long 0x4 8. "IOTB8,Toggle bit 8" "0,1"
|
|
bitfld.long 0x4 7. "IOTB7,Toggle bit 7" "0,1"
|
|
bitfld.long 0x4 6. "IOTB6,Toggle bit 6" "0,1"
|
|
bitfld.long 0x4 5. "IOTB5,Toggle bit 5" "0,1"
|
|
bitfld.long 0x4 4. "IOTB4,Toggle bit 4" "0,1"
|
|
bitfld.long 0x4 3. "IOTB3,Toggle bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "IOTB2,Toggle bit 2" "0,1"
|
|
bitfld.long 0x4 1. "IOTB1,Toggle bit 1" "0,1"
|
|
bitfld.long 0x4 0. "IOTB0,Toggle bit 0" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "HDRV,Huge current driver"
|
|
bitfld.long 0x0 15. "HDRV15,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 14. "HDRV14,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 13. "HDRV13,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 12. "HDRV12,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 11. "HDRV11,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 10. "HDRV10,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 9. "HDRV9,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 8. "HDRV8,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 7. "HDRV7,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 6. "HDRV6,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 5. "HDRV5,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 4. "HDRV4,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 3. "HDRV3,Port x driver bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDRV2,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 1. "HDRV1,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 0. "HDRV0,Port x driver bit y" "0,1"
|
|
tree.end
|
|
tree "GPIOF"
|
|
base ad:0x40021400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CFGR,GPIO configuration register"
|
|
bitfld.long 0x0 30.--31. "IOMC15,GPIOx pin 15 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "IOMC14,GPIOx pin 14 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "IOMC13,GPIOx pin 13 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "IOMC12,GPIOx pin 12 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "IOMC11,GPIOx pin 11 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "IOMC10,GPIOx pin 10 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "IOMC9,GPIOx pin 9 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "IOMC8,GPIOx pin 8 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "IOMC7,GPIOx pin 7 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "IOMC6,GPIOx pin 6 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "IOMC5,GPIOx pin 5 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "IOMC4,GPIOx pin 4 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "IOMC3,GPIOx pin 3 mode configurate" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "IOMC2,GPIOx pin 2 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "IOMC1,GPIOx pin 1 mode configurate" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "IOMC0,GPIOx pin 0 mode configurate" "0,1,2,3"
|
|
line.long 0x4 "OMODE,GPIO output mode register"
|
|
bitfld.long 0x4 15. "OM15,GPIOx pin 15 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 14. "OM14,GPIOx pin 14 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 13. "OM13,GPIOx pin 13 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 12. "OM12,GPIOx pin 12 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 11. "OM11,GPIOx pin 11 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 10. "OM10,GPIOx pin 10 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 9. "OM9,GPIOx pin 9 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 8. "OM8,GPIOx pin 8 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 7. "OM7,GPIOx pin 7 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 6. "OM6,GPIOx pin 6 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 5. "OM5,GPIOx pin 5 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 4. "OM4,GPIOx pin 4 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 3. "OM3,GPIOx pin 3 outpu mode configurate" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "OM2,GPIOx pin 2 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 1. "OM1,GPIOx pin 1 outpu mode configurate" "0,1"
|
|
bitfld.long 0x4 0. "OM0,GPIOx pin 0 outpu mode configurate" "0,1"
|
|
line.long 0x8 "ODRVR,GPIO drive capability register"
|
|
bitfld.long 0x8 30.--31. "ODRV15,GPIOx pin 15 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "ODRV14,GPIOx pin 14 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "ODRV13,GPIOx pin 13 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "ODRV12,GPIOx pin 12 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "ODRV11,GPIOx pin 11 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "ODRV10,GPIOx pin 10 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "ODRV9,GPIOx pin 9 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "ODRV8,GPIOx pin 8 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "ODRV7,GPIOx pin 7 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "ODRV6,GPIOx pin 6 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 10.--11. "ODRV5,GPIOx pin 5 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "ODRV4,GPIOx pin 4 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "ODRV3,GPIOx pin 3 output drive capability" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "ODRV2,GPIOx pin 2 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "ODRV1,GPIOx pin 1 output drive capability" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "ODRV0,GPIOx pin 0 output drive capability" "0,1,2,3"
|
|
line.long 0xC "PULL,GPIO pull-up/pull-down register"
|
|
bitfld.long 0xC 30.--31. "PULL15,GPIOx pin 15 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PULL14,GPIOx pin 14 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PULL13,GPIOx pin 13 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PULL12,GPIOx pin 12 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PULL11,GPIOx pin 11 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PULL10,GPIOx pin 10 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PULL9,GPIOx pin 9 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PULL8,GPIOx pin 8 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PULL7,GPIOx pin 7 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PULL6,GPIOx pin 6 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 10.--11. "PULL5,GPIOx pin 5 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PULL4,GPIOx pin 4 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PULL3,GPIOx pin 3 pull configuration" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 4.--5. "PULL2,GPIOx pin 2 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PULL1,GPIOx pin 1 pull configuration" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PULL0,GPIOx pin 0 pull configuration" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDT,GPIO input data register"
|
|
bitfld.long 0x0 15. "IDT15,Port input data" "0,1"
|
|
bitfld.long 0x0 14. "IDT14,Port input data" "0,1"
|
|
bitfld.long 0x0 13. "IDT13,Port input data" "0,1"
|
|
bitfld.long 0x0 12. "IDT12,Port input data" "0,1"
|
|
bitfld.long 0x0 11. "IDT11,Port input data" "0,1"
|
|
bitfld.long 0x0 10. "IDT10,Port input data" "0,1"
|
|
bitfld.long 0x0 9. "IDT9,Port input data" "0,1"
|
|
bitfld.long 0x0 8. "IDT8,Port input data" "0,1"
|
|
bitfld.long 0x0 7. "IDT7,Port input data" "0,1"
|
|
bitfld.long 0x0 6. "IDT6,Port input data" "0,1"
|
|
bitfld.long 0x0 5. "IDT5,Port input data" "0,1"
|
|
bitfld.long 0x0 4. "IDT4,Port input data" "0,1"
|
|
bitfld.long 0x0 3. "IDT3,Port input data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IDT2,Port input data" "0,1"
|
|
bitfld.long 0x0 1. "IDT1,Port input data" "0,1"
|
|
bitfld.long 0x0 0. "IDT0,Port input data" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODT,GPIO output data register"
|
|
bitfld.long 0x0 15. "ODT15,Port output data" "0,1"
|
|
bitfld.long 0x0 14. "ODT14,Port output data" "0,1"
|
|
bitfld.long 0x0 13. "ODT13,Port output data" "0,1"
|
|
bitfld.long 0x0 12. "ODT12,Port output data" "0,1"
|
|
bitfld.long 0x0 11. "ODT11,Port output data" "0,1"
|
|
bitfld.long 0x0 10. "ODT10,Port output data" "0,1"
|
|
bitfld.long 0x0 9. "ODT9,Port output data" "0,1"
|
|
bitfld.long 0x0 8. "ODT8,Port output data" "0,1"
|
|
bitfld.long 0x0 7. "ODT7,Port output data" "0,1"
|
|
bitfld.long 0x0 6. "ODT6,Port output data" "0,1"
|
|
bitfld.long 0x0 5. "ODT5,Port output data" "0,1"
|
|
bitfld.long 0x0 4. "ODT4,Port output data" "0,1"
|
|
bitfld.long 0x0 3. "ODT3,Port output data" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ODT2,Port output data" "0,1"
|
|
bitfld.long 0x0 1. "ODT1,Port output data" "0,1"
|
|
bitfld.long 0x0 0. "ODT0,Port output data" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "SCR,Port bit set/clear register"
|
|
bitfld.long 0x0 31. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 30. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 29. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 28. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 27. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 26. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 25. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 24. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 23. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 22. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 21. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 20. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 19. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 17. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 16. "IOCB0,Clear bit 0" "0,1"
|
|
bitfld.long 0x0 15. "IOSB15,Set bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOSB14,Set bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOSB13,Set bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOSB12,Set bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOSB11,Set bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOSB10,Set bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOSB9,Set bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOSB8,Set bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOSB7,Set bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOSB6,Set bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IOSB5,Set bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOSB4,Set bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOSB3,Set bit 3" "0,1"
|
|
bitfld.long 0x0 2. "IOSB2,Set bit 1" "0,1"
|
|
bitfld.long 0x0 1. "IOSB1,Set bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOSB0,Set bit 0" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "WPR,Port write protect register"
|
|
bitfld.long 0x0 16. "WPSEQ,Write protect sequence" "0,1"
|
|
bitfld.long 0x0 15. "WPEN15,Write protect enable 15" "0,1"
|
|
bitfld.long 0x0 14. "WPEN14,Write protect enable 14" "0,1"
|
|
bitfld.long 0x0 13. "WPEN13,Write protect enable 13" "0,1"
|
|
bitfld.long 0x0 12. "WPEN12,Write protect enable 12" "0,1"
|
|
bitfld.long 0x0 11. "WPEN11,Write protect enable 11" "0,1"
|
|
bitfld.long 0x0 10. "WPEN10,Write protect enable 10" "0,1"
|
|
bitfld.long 0x0 9. "WPEN9,Write protect enable 9" "0,1"
|
|
bitfld.long 0x0 8. "WPEN8,Write protect enable 8" "0,1"
|
|
bitfld.long 0x0 7. "WPEN7,Write protect enable 7" "0,1"
|
|
bitfld.long 0x0 6. "WPEN6,Write protect enable 6" "0,1"
|
|
bitfld.long 0x0 5. "WPEN5,Write protect enable 5" "0,1"
|
|
bitfld.long 0x0 4. "WPEN4,Write protect enable 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WPEN3,Write protect enable 3" "0,1"
|
|
bitfld.long 0x0 2. "WPEN2,Write protect enable 2" "0,1"
|
|
bitfld.long 0x0 1. "WPEN1,Write protect enable 1" "0,1"
|
|
bitfld.long 0x0 0. "WPEN0,Write protect enable 0" "0,1"
|
|
line.long 0x4 "MUXL,GPIO muxing function low register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "MUXL7,GPIOx pin 7 muxing"
|
|
hexmask.long.byte 0x4 24.--27. 1. "MUXL6,GPIOx pin 6 muxing"
|
|
hexmask.long.byte 0x4 20.--23. 1. "MUXL5,GPIOx pin 5 muxing"
|
|
hexmask.long.byte 0x4 16.--19. 1. "MUXL4,GPIOx pin 4 muxing"
|
|
hexmask.long.byte 0x4 12.--15. 1. "MUXL3,GPIOx pin 3 muxing"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MUXL2,GPIOx pin 2 muxing"
|
|
hexmask.long.byte 0x4 4.--7. 1. "MUXL1,GPIOx pin 1 muxing"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MUXL0,GPIOx pin 0 muxing"
|
|
line.long 0x8 "MUXH,GPIO muxing function high register"
|
|
hexmask.long.byte 0x8 28.--31. 1. "MUXH15,GPIOx pin 15 muxing"
|
|
hexmask.long.byte 0x8 24.--27. 1. "MUXH14,GPIOx pin 14 muxing"
|
|
hexmask.long.byte 0x8 20.--23. 1. "MUXH13,GPIOx pin 13 muxing"
|
|
hexmask.long.byte 0x8 16.--19. 1. "MUXH12,GPIOx pin 12 muxing"
|
|
hexmask.long.byte 0x8 12.--15. 1. "MUXH11,GPIOx pin 11 muxing"
|
|
hexmask.long.byte 0x8 8.--11. 1. "MUXH10,GPIOx pin 10 muxing"
|
|
hexmask.long.byte 0x8 4.--7. 1. "MUXH9,GPIOx pin 9 muxing"
|
|
hexmask.long.byte 0x8 0.--3. 1. "MUXH8,GPIOx pin 8 muxing"
|
|
wgroup.long 0x28++0x7
|
|
line.long 0x0 "CLR,GPIO bit reset register"
|
|
bitfld.long 0x0 15. "IOCB15,Clear bit 15" "0,1"
|
|
bitfld.long 0x0 14. "IOCB14,Clear bit 14" "0,1"
|
|
bitfld.long 0x0 13. "IOCB13,Clear bit 13" "0,1"
|
|
bitfld.long 0x0 12. "IOCB12,Clear bit 12" "0,1"
|
|
bitfld.long 0x0 11. "IOCB11,Clear bit 11" "0,1"
|
|
bitfld.long 0x0 10. "IOCB10,Clear bit 10" "0,1"
|
|
bitfld.long 0x0 9. "IOCB9,Clear bit 9" "0,1"
|
|
bitfld.long 0x0 8. "IOCB8,Clear bit 8" "0,1"
|
|
bitfld.long 0x0 7. "IOCB7,Clear bit 7" "0,1"
|
|
bitfld.long 0x0 6. "IOCB6,Clear bit 6" "0,1"
|
|
bitfld.long 0x0 5. "IOCB5,Clear bit 5" "0,1"
|
|
bitfld.long 0x0 4. "IOCB4,Clear bit 4" "0,1"
|
|
bitfld.long 0x0 3. "IOCB3,Clear bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "IOCB2,Clear bit 2" "0,1"
|
|
bitfld.long 0x0 1. "IOCB1,Clear bit 1" "0,1"
|
|
bitfld.long 0x0 0. "IOCB0,Clear bit 0" "0,1"
|
|
line.long 0x4 "TOGR,GPIO bit toggle register"
|
|
bitfld.long 0x4 15. "IOTB15,Toggle bit 15" "0,1"
|
|
bitfld.long 0x4 14. "IOTB14,Toggle bit 14" "0,1"
|
|
bitfld.long 0x4 13. "IOTB13,Toggle bit 13" "0,1"
|
|
bitfld.long 0x4 12. "IOTB12,Toggle bit 12" "0,1"
|
|
bitfld.long 0x4 11. "IOTB11,Toggle bit 11" "0,1"
|
|
bitfld.long 0x4 10. "IOTB10,Toggle bit 10" "0,1"
|
|
bitfld.long 0x4 9. "IOTB9,Toggle bit 9" "0,1"
|
|
bitfld.long 0x4 8. "IOTB8,Toggle bit 8" "0,1"
|
|
bitfld.long 0x4 7. "IOTB7,Toggle bit 7" "0,1"
|
|
bitfld.long 0x4 6. "IOTB6,Toggle bit 6" "0,1"
|
|
bitfld.long 0x4 5. "IOTB5,Toggle bit 5" "0,1"
|
|
bitfld.long 0x4 4. "IOTB4,Toggle bit 4" "0,1"
|
|
bitfld.long 0x4 3. "IOTB3,Toggle bit 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "IOTB2,Toggle bit 2" "0,1"
|
|
bitfld.long 0x4 1. "IOTB1,Toggle bit 1" "0,1"
|
|
bitfld.long 0x4 0. "IOTB0,Toggle bit 0" "0,1"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "HDRV,Huge current driver"
|
|
bitfld.long 0x0 15. "HDRV15,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 14. "HDRV14,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 13. "HDRV13,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 12. "HDRV12,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 11. "HDRV11,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 10. "HDRV10,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 9. "HDRV9,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 8. "HDRV8,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 7. "HDRV7,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 6. "HDRV6,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 5. "HDRV5,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 4. "HDRV4,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 3. "HDRV3,Port x driver bit y" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "HDRV2,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 1. "HDRV1,Port x driver bit y" "0,1"
|
|
bitfld.long 0x0 0. "HDRV0,Port x driver bit y" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "I2C (Inter Integrated Circuit)"
|
|
base ad:0x0
|
|
tree "I2C1"
|
|
base ad:0x40005400
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 23. "PECEN,PEC calculation enable" "0,1"
|
|
bitfld.long 0x0 22. "SMBALERT,SMBus alert enable / pin set" "0,1"
|
|
bitfld.long 0x0 21. "DEVADDREN,SMBus device default address enable" "0,1"
|
|
bitfld.long 0x0 20. "HADDREN,SMBus host address enable" "0,1"
|
|
bitfld.long 0x0 19. "GCAEN,General call address enable" "0,1"
|
|
bitfld.long 0x0 17. "STRETCH,Clock stretching mode" "0,1"
|
|
bitfld.long 0x0 16. "SCTRL,Slave receiving data control" "0,1"
|
|
bitfld.long 0x0 15. "DMAREN,DMA receive data request enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "DMATEN,DMA Transmit data request enable" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "DFLT,Digital filter value"
|
|
bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1"
|
|
bitfld.long 0x0 6. "TDCIEN,Transfer data complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 5. "STOPIEN,Stop generation complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 4. "ACKFAILIEN,Acknowledge fail interrupt enable" "0,1"
|
|
bitfld.long 0x0 3. "ADDRIEN,Address match interrupt enable" "0,1"
|
|
bitfld.long 0x0 2. "RDIEN,Receive data interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TDIEN,Transmit data interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "I2CEN,I2C peripheral enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 26. "PECTEN,Request PEC transmission enable" "0,1"
|
|
bitfld.long 0x4 25. "ASTOPEN,Automatically send stop condition enable" "0,1"
|
|
bitfld.long 0x4 24. "RLDEN,Send data reload mode enable" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "CNT,Transmit data counter"
|
|
bitfld.long 0x4 15. "NACKEN,Not acknowledge enable" "0,1"
|
|
bitfld.long 0x4 14. "GENSTOP,Generate stop condition" "0,1"
|
|
bitfld.long 0x4 13. "GENSTART,Generate start condition" "0,1"
|
|
bitfld.long 0x4 12. "READH10,10-bit address header read enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "ADDR10,Host send 10-bit address mode enable" "0,1"
|
|
bitfld.long 0x4 10. "DIR,Master data transmission direction" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "SADDR,Slave address"
|
|
line.long 0x8 "OADDR1,Own address register 1"
|
|
bitfld.long 0x8 15. "ADDR1EN,Own address 1 enable" "0,1"
|
|
bitfld.long 0x8 10. "ADDR1MODE,Own Address mode" "0,1"
|
|
hexmask.long.word 0x8 0.--9. 1. "ADDR1,Interface address"
|
|
line.long 0xC "OADDR2,Own address register 2"
|
|
bitfld.long 0xC 15. "ADDR2EN,Own address 2 enable" "0,1"
|
|
bitfld.long 0xC 8.--10. "ADDR2MASK,Own address 2-bit mask" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Own address 2"
|
|
line.long 0x10 "CLKCTRL,Clock contorl register"
|
|
hexmask.long.byte 0x10 28.--31. 1. "DIVL,Low 4 bits of clock divider value"
|
|
hexmask.long.byte 0x10 24.--27. 1. "DIVH,High 4 bits of clock divider value"
|
|
hexmask.long.byte 0x10 20.--23. 1. "SCLD,SCL output delay"
|
|
hexmask.long.byte 0x10 16.--19. 1. "SDAD,SDA output delay"
|
|
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high level"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low level"
|
|
line.long 0x14 "TIMEOUT,Timeout register"
|
|
bitfld.long 0x14 31. "EXTEN,Cumulative clock low extend timeout enable" "0,1"
|
|
hexmask.long.word 0x14 16.--27. 1. "EXTTIME,Cumulative clock low extend timeout value"
|
|
bitfld.long 0x14 15. "TOEN,Detect clock low/high timeout enable" "0,1"
|
|
bitfld.long 0x14 12. "TOMOED,Clock timeout detection mode" "0,1"
|
|
hexmask.long.word 0x14 0.--11. 1. "TOTIME,Clock timeout detection time"
|
|
line.long 0x18 "STS,Interrupt and Status register"
|
|
hexmask.long.byte 0x18 17.--23. 1. "ADDR,Slave address matching value"
|
|
rbitfld.long 0x18 16. "SDIR,Slave data transmit direction" "0,1"
|
|
rbitfld.long 0x18 15. "BUSYF,Bus busy" "0,1"
|
|
rbitfld.long 0x18 13. "ALERTF,SMBus alert flag" "0,1"
|
|
rbitfld.long 0x18 12. "TMOUT,SMBus timeout flag" "0,1"
|
|
rbitfld.long 0x18 11. "PECERR,PEC receive error flag" "0,1"
|
|
rbitfld.long 0x18 10. "OUF,Overflow or underflow flag" "0,1"
|
|
rbitfld.long 0x18 9. "ARLOST,Arbitration lost flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 8. "BUSERR,Bus error flag" "0,1"
|
|
rbitfld.long 0x18 7. "TCRLD,Transmission is complete waiting to load data" "0,1"
|
|
rbitfld.long 0x18 6. "TDC,Transmit data complete flag" "0,1"
|
|
rbitfld.long 0x18 5. "STOPF,Stop condition generation complete flag" "0,1"
|
|
rbitfld.long 0x18 4. "ACKFAIL,Acknowledge failure flag" "0,1"
|
|
rbitfld.long 0x18 3. "ADDRF,0~7 bit address match flag" "0,1"
|
|
rbitfld.long 0x18 2. "RDBF,Receive data buffer full flag" "0,1"
|
|
bitfld.long 0x18 1. "TDIS,Send interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0. "TDBE,Transmit data buffer empty flag" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "CLR,Interrupt clear register"
|
|
bitfld.long 0x0 13. "ALERTC,Clear SMBus alert flag" "0,1"
|
|
bitfld.long 0x0 12. "TMOUTC,Clear SMBus timeout flag" "0,1"
|
|
bitfld.long 0x0 11. "PECERRC,Clear PEC receive error flag" "0,1"
|
|
bitfld.long 0x0 10. "OUFC,Clear overload / underload flag" "0,1"
|
|
bitfld.long 0x0 9. "ARLOSTC,Clear arbitration lost flag" "0,1"
|
|
bitfld.long 0x0 8. "BUSERRC,Clear bus error flag" "0,1"
|
|
bitfld.long 0x0 5. "STOPC,Clear stop condition generation complete flag" "0,1"
|
|
bitfld.long 0x0 4. "ACKFAILC,Clear acknowledge failure flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ADDRC,Clear 0~7 bit address match flag" "0,1"
|
|
rgroup.long 0x20++0x7
|
|
line.long 0x0 "PEC,PEC register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PECVAL,PEC value"
|
|
line.long 0x4 "RXDT,Receive data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DT,Receive data register"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "TXDT,Transmit data register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DT,Transmit data register"
|
|
tree.end
|
|
tree "I2C2"
|
|
base ad:0x40005800
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 23. "PECEN,PEC calculation enable" "0,1"
|
|
bitfld.long 0x0 22. "SMBALERT,SMBus alert enable / pin set" "0,1"
|
|
bitfld.long 0x0 21. "DEVADDREN,SMBus device default address enable" "0,1"
|
|
bitfld.long 0x0 20. "HADDREN,SMBus host address enable" "0,1"
|
|
bitfld.long 0x0 19. "GCAEN,General call address enable" "0,1"
|
|
bitfld.long 0x0 17. "STRETCH,Clock stretching mode" "0,1"
|
|
bitfld.long 0x0 16. "SCTRL,Slave receiving data control" "0,1"
|
|
bitfld.long 0x0 15. "DMAREN,DMA receive data request enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "DMATEN,DMA Transmit data request enable" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "DFLT,Digital filter value"
|
|
bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1"
|
|
bitfld.long 0x0 6. "TDCIEN,Transfer data complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 5. "STOPIEN,Stop generation complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 4. "ACKFAILIEN,Acknowledge fail interrupt enable" "0,1"
|
|
bitfld.long 0x0 3. "ADDRIEN,Address match interrupt enable" "0,1"
|
|
bitfld.long 0x0 2. "RDIEN,Receive data interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TDIEN,Transmit data interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "I2CEN,I2C peripheral enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 26. "PECTEN,Request PEC transmission enable" "0,1"
|
|
bitfld.long 0x4 25. "ASTOPEN,Automatically send stop condition enable" "0,1"
|
|
bitfld.long 0x4 24. "RLDEN,Send data reload mode enable" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "CNT,Transmit data counter"
|
|
bitfld.long 0x4 15. "NACKEN,Not acknowledge enable" "0,1"
|
|
bitfld.long 0x4 14. "GENSTOP,Generate stop condition" "0,1"
|
|
bitfld.long 0x4 13. "GENSTART,Generate start condition" "0,1"
|
|
bitfld.long 0x4 12. "READH10,10-bit address header read enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "ADDR10,Host send 10-bit address mode enable" "0,1"
|
|
bitfld.long 0x4 10. "DIR,Master data transmission direction" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "SADDR,Slave address"
|
|
line.long 0x8 "OADDR1,Own address register 1"
|
|
bitfld.long 0x8 15. "ADDR1EN,Own address 1 enable" "0,1"
|
|
bitfld.long 0x8 10. "ADDR1MODE,Own Address mode" "0,1"
|
|
hexmask.long.word 0x8 0.--9. 1. "ADDR1,Interface address"
|
|
line.long 0xC "OADDR2,Own address register 2"
|
|
bitfld.long 0xC 15. "ADDR2EN,Own address 2 enable" "0,1"
|
|
bitfld.long 0xC 8.--10. "ADDR2MASK,Own address 2-bit mask" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Own address 2"
|
|
line.long 0x10 "CLKCTRL,Clock contorl register"
|
|
hexmask.long.byte 0x10 28.--31. 1. "DIVL,Low 4 bits of clock divider value"
|
|
hexmask.long.byte 0x10 24.--27. 1. "DIVH,High 4 bits of clock divider value"
|
|
hexmask.long.byte 0x10 20.--23. 1. "SCLD,SCL output delay"
|
|
hexmask.long.byte 0x10 16.--19. 1. "SDAD,SDA output delay"
|
|
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high level"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low level"
|
|
line.long 0x14 "TIMEOUT,Timeout register"
|
|
bitfld.long 0x14 31. "EXTEN,Cumulative clock low extend timeout enable" "0,1"
|
|
hexmask.long.word 0x14 16.--27. 1. "EXTTIME,Cumulative clock low extend timeout value"
|
|
bitfld.long 0x14 15. "TOEN,Detect clock low/high timeout enable" "0,1"
|
|
bitfld.long 0x14 12. "TOMOED,Clock timeout detection mode" "0,1"
|
|
hexmask.long.word 0x14 0.--11. 1. "TOTIME,Clock timeout detection time"
|
|
line.long 0x18 "STS,Interrupt and Status register"
|
|
hexmask.long.byte 0x18 17.--23. 1. "ADDR,Slave address matching value"
|
|
rbitfld.long 0x18 16. "SDIR,Slave data transmit direction" "0,1"
|
|
rbitfld.long 0x18 15. "BUSYF,Bus busy" "0,1"
|
|
rbitfld.long 0x18 13. "ALERTF,SMBus alert flag" "0,1"
|
|
rbitfld.long 0x18 12. "TMOUT,SMBus timeout flag" "0,1"
|
|
rbitfld.long 0x18 11. "PECERR,PEC receive error flag" "0,1"
|
|
rbitfld.long 0x18 10. "OUF,Overflow or underflow flag" "0,1"
|
|
rbitfld.long 0x18 9. "ARLOST,Arbitration lost flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 8. "BUSERR,Bus error flag" "0,1"
|
|
rbitfld.long 0x18 7. "TCRLD,Transmission is complete waiting to load data" "0,1"
|
|
rbitfld.long 0x18 6. "TDC,Transmit data complete flag" "0,1"
|
|
rbitfld.long 0x18 5. "STOPF,Stop condition generation complete flag" "0,1"
|
|
rbitfld.long 0x18 4. "ACKFAIL,Acknowledge failure flag" "0,1"
|
|
rbitfld.long 0x18 3. "ADDRF,0~7 bit address match flag" "0,1"
|
|
rbitfld.long 0x18 2. "RDBF,Receive data buffer full flag" "0,1"
|
|
bitfld.long 0x18 1. "TDIS,Send interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0. "TDBE,Transmit data buffer empty flag" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "CLR,Interrupt clear register"
|
|
bitfld.long 0x0 13. "ALERTC,Clear SMBus alert flag" "0,1"
|
|
bitfld.long 0x0 12. "TMOUTC,Clear SMBus timeout flag" "0,1"
|
|
bitfld.long 0x0 11. "PECERRC,Clear PEC receive error flag" "0,1"
|
|
bitfld.long 0x0 10. "OUFC,Clear overload / underload flag" "0,1"
|
|
bitfld.long 0x0 9. "ARLOSTC,Clear arbitration lost flag" "0,1"
|
|
bitfld.long 0x0 8. "BUSERRC,Clear bus error flag" "0,1"
|
|
bitfld.long 0x0 5. "STOPC,Clear stop condition generation complete flag" "0,1"
|
|
bitfld.long 0x0 4. "ACKFAILC,Clear acknowledge failure flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ADDRC,Clear 0~7 bit address match flag" "0,1"
|
|
rgroup.long 0x20++0x7
|
|
line.long 0x0 "PEC,PEC register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PECVAL,PEC value"
|
|
line.long 0x4 "RXDT,Receive data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DT,Receive data register"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "TXDT,Transmit data register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DT,Transmit data register"
|
|
tree.end
|
|
tree "I2C3"
|
|
base ad:0x40005C00
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 23. "PECEN,PEC calculation enable" "0,1"
|
|
bitfld.long 0x0 22. "SMBALERT,SMBus alert enable / pin set" "0,1"
|
|
bitfld.long 0x0 21. "DEVADDREN,SMBus device default address enable" "0,1"
|
|
bitfld.long 0x0 20. "HADDREN,SMBus host address enable" "0,1"
|
|
bitfld.long 0x0 19. "GCAEN,General call address enable" "0,1"
|
|
bitfld.long 0x0 17. "STRETCH,Clock stretching mode" "0,1"
|
|
bitfld.long 0x0 16. "SCTRL,Slave receiving data control" "0,1"
|
|
bitfld.long 0x0 15. "DMAREN,DMA receive data request enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "DMATEN,DMA Transmit data request enable" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "DFLT,Digital filter value"
|
|
bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1"
|
|
bitfld.long 0x0 6. "TDCIEN,Transfer data complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 5. "STOPIEN,Stop generation complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 4. "ACKFAILIEN,Acknowledge fail interrupt enable" "0,1"
|
|
bitfld.long 0x0 3. "ADDRIEN,Address match interrupt enable" "0,1"
|
|
bitfld.long 0x0 2. "RDIEN,Receive data interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TDIEN,Transmit data interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "I2CEN,I2C peripheral enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 26. "PECTEN,Request PEC transmission enable" "0,1"
|
|
bitfld.long 0x4 25. "ASTOPEN,Automatically send stop condition enable" "0,1"
|
|
bitfld.long 0x4 24. "RLDEN,Send data reload mode enable" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "CNT,Transmit data counter"
|
|
bitfld.long 0x4 15. "NACKEN,Not acknowledge enable" "0,1"
|
|
bitfld.long 0x4 14. "GENSTOP,Generate stop condition" "0,1"
|
|
bitfld.long 0x4 13. "GENSTART,Generate start condition" "0,1"
|
|
bitfld.long 0x4 12. "READH10,10-bit address header read enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "ADDR10,Host send 10-bit address mode enable" "0,1"
|
|
bitfld.long 0x4 10. "DIR,Master data transmission direction" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "SADDR,Slave address"
|
|
line.long 0x8 "OADDR1,Own address register 1"
|
|
bitfld.long 0x8 15. "ADDR1EN,Own address 1 enable" "0,1"
|
|
bitfld.long 0x8 10. "ADDR1MODE,Own Address mode" "0,1"
|
|
hexmask.long.word 0x8 0.--9. 1. "ADDR1,Interface address"
|
|
line.long 0xC "OADDR2,Own address register 2"
|
|
bitfld.long 0xC 15. "ADDR2EN,Own address 2 enable" "0,1"
|
|
bitfld.long 0xC 8.--10. "ADDR2MASK,Own address 2-bit mask" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Own address 2"
|
|
line.long 0x10 "CLKCTRL,Clock contorl register"
|
|
hexmask.long.byte 0x10 28.--31. 1. "DIVL,Low 4 bits of clock divider value"
|
|
hexmask.long.byte 0x10 24.--27. 1. "DIVH,High 4 bits of clock divider value"
|
|
hexmask.long.byte 0x10 20.--23. 1. "SCLD,SCL output delay"
|
|
hexmask.long.byte 0x10 16.--19. 1. "SDAD,SDA output delay"
|
|
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high level"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low level"
|
|
line.long 0x14 "TIMEOUT,Timeout register"
|
|
bitfld.long 0x14 31. "EXTEN,Cumulative clock low extend timeout enable" "0,1"
|
|
hexmask.long.word 0x14 16.--27. 1. "EXTTIME,Cumulative clock low extend timeout value"
|
|
bitfld.long 0x14 15. "TOEN,Detect clock low/high timeout enable" "0,1"
|
|
bitfld.long 0x14 12. "TOMOED,Clock timeout detection mode" "0,1"
|
|
hexmask.long.word 0x14 0.--11. 1. "TOTIME,Clock timeout detection time"
|
|
line.long 0x18 "STS,Interrupt and Status register"
|
|
hexmask.long.byte 0x18 17.--23. 1. "ADDR,Slave address matching value"
|
|
rbitfld.long 0x18 16. "SDIR,Slave data transmit direction" "0,1"
|
|
rbitfld.long 0x18 15. "BUSYF,Bus busy" "0,1"
|
|
rbitfld.long 0x18 13. "ALERTF,SMBus alert flag" "0,1"
|
|
rbitfld.long 0x18 12. "TMOUT,SMBus timeout flag" "0,1"
|
|
rbitfld.long 0x18 11. "PECERR,PEC receive error flag" "0,1"
|
|
rbitfld.long 0x18 10. "OUF,Overflow or underflow flag" "0,1"
|
|
rbitfld.long 0x18 9. "ARLOST,Arbitration lost flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 8. "BUSERR,Bus error flag" "0,1"
|
|
rbitfld.long 0x18 7. "TCRLD,Transmission is complete waiting to load data" "0,1"
|
|
rbitfld.long 0x18 6. "TDC,Transmit data complete flag" "0,1"
|
|
rbitfld.long 0x18 5. "STOPF,Stop condition generation complete flag" "0,1"
|
|
rbitfld.long 0x18 4. "ACKFAIL,Acknowledge failure flag" "0,1"
|
|
rbitfld.long 0x18 3. "ADDRF,0~7 bit address match flag" "0,1"
|
|
rbitfld.long 0x18 2. "RDBF,Receive data buffer full flag" "0,1"
|
|
bitfld.long 0x18 1. "TDIS,Send interrupt status" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0. "TDBE,Transmit data buffer empty flag" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "CLR,Interrupt clear register"
|
|
bitfld.long 0x0 13. "ALERTC,Clear SMBus alert flag" "0,1"
|
|
bitfld.long 0x0 12. "TMOUTC,Clear SMBus timeout flag" "0,1"
|
|
bitfld.long 0x0 11. "PECERRC,Clear PEC receive error flag" "0,1"
|
|
bitfld.long 0x0 10. "OUFC,Clear overload / underload flag" "0,1"
|
|
bitfld.long 0x0 9. "ARLOSTC,Clear arbitration lost flag" "0,1"
|
|
bitfld.long 0x0 8. "BUSERRC,Clear bus error flag" "0,1"
|
|
bitfld.long 0x0 5. "STOPC,Clear stop condition generation complete flag" "0,1"
|
|
bitfld.long 0x0 4. "ACKFAILC,Clear acknowledge failure flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ADDRC,Clear 0~7 bit address match flag" "0,1"
|
|
rgroup.long 0x20++0x7
|
|
line.long 0x0 "PEC,PEC register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PECVAL,PEC value"
|
|
line.long 0x4 "RXDT,Receive data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "DT,Receive data register"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "TXDT,Transmit data register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DT,Transmit data register"
|
|
tree.end
|
|
tree.end
|
|
tree "NVIC (Nested Vectored Interrupt)"
|
|
base ad:0xE000E000
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ICTR,Interrupt Controller Type Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "INTLINESNUM,Total number of interrupt lines in groups"
|
|
wgroup.long 0xF00++0x3
|
|
line.long 0x0 "STIR,Software Triggered Interrupt Register"
|
|
hexmask.long.word 0x0 0.--8. 1. "INTID,interrupt to be triggered"
|
|
group.long 0x100++0x7
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x180++0x7
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x280++0x7
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x300++0x7
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x400++0x3B
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
tree.end
|
|
tree "PWC (Power Control)"
|
|
base ad:0x40007000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL,Power control register"
|
|
bitfld.long 0x0 8. "BPWEN,Battery powered domain write enable" "0,1"
|
|
bitfld.long 0x0 5.--7. "PVMSEL,Power voltage monitoring boundary select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4. "PVMEN,Power voltage monitoring enable" "0,1"
|
|
bitfld.long 0x0 3. "CLSEF,Clear SEF flag" "0,1"
|
|
bitfld.long 0x0 2. "CLSWEF,Clear SWEF flag" "0,1"
|
|
bitfld.long 0x0 1. "LPSEL,Low power mode select when Cortex-M4F sleepdeep" "0,1"
|
|
bitfld.long 0x0 0. "VRSEL,Voltage regulator state select when deepsleep mode" "0,1"
|
|
line.long 0x4 "CTRLSTS,Power control and status register (PWC_CTRLSTS)"
|
|
bitfld.long 0x4 14. "SWPEN7,Standby wake-up pin 7 enable" "0,1"
|
|
bitfld.long 0x4 13. "SWPEN6,Standby wake-up pin 6 enable" "0,1"
|
|
bitfld.long 0x4 9. "SWPEN2,Standby wake-up pin 2 enable" "0,1"
|
|
bitfld.long 0x4 8. "SWPEN1,Standby wake-up pin 1 enable" "0,1"
|
|
rbitfld.long 0x4 2. "PVMOF,Power voltage monitoring output flag" "0,1"
|
|
rbitfld.long 0x4 1. "SEF,Standby mode entry flag" "0,1"
|
|
rbitfld.long 0x4 0. "SWEF,Standby wake-up event flag" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "LDOOV,LDO output voltage register"
|
|
bitfld.long 0x0 4. "VREXLPEN,Voltage regulator extra low power mode enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "LDOOVSEL,LDO output voltage select" "0,1,2,3"
|
|
tree.end
|
|
tree "QSPI (Quad Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "QSPI1"
|
|
base ad:0xA0001000
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CMD_W0,Command word 0"
|
|
hexmask.long 0x0 0.--31. 1. "SPIADR,SPI flash address"
|
|
line.long 0x4 "CMD_W1,Command word 1"
|
|
bitfld.long 0x4 28. "PEMEN,Perfrmance enhance mode enable" "0,1"
|
|
bitfld.long 0x4 24.--25. "INSLEN,Instruction code length" "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "DUM2,Second dummy state cycle"
|
|
bitfld.long 0x4 0.--2. "ADRLEN,SPI address length" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "CMD_W2,Command word 2"
|
|
hexmask.long 0x8 0.--31. 1. "DCNT,Read write data counter"
|
|
line.long 0xC "CMD_W3,Command word 3"
|
|
hexmask.long.byte 0xC 24.--31. 1. "INSC,Instruction code"
|
|
hexmask.long.byte 0xC 16.--23. 1. "PEMOPC,Performance enhance mode operate code"
|
|
bitfld.long 0xC 5.--7. "OPMODE,SPI operate mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3. "RSTSC,Read spi status configure" "0,1"
|
|
bitfld.long 0xC 2. "RSTSEN,Read spi status enable" "0,1"
|
|
bitfld.long 0xC 1. "WEN,Write data enable" "0,1"
|
|
line.long 0x10 "CTRL,Control register"
|
|
bitfld.long 0x10 21. "KEYEN,encryption key enable" "0,1"
|
|
bitfld.long 0x10 20. "XIPSEL,XIP port selection" "0,1"
|
|
bitfld.long 0x10 19. "XIPRCMDF,XIP read command flush" "0,1"
|
|
bitfld.long 0x10 16.--18. "BUSY,Busy bit of spi status" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 8. "ABORT,Abort instruction" "0,1"
|
|
bitfld.long 0x10 7. "XIPIDLE,XIP port idle status" "0,1"
|
|
bitfld.long 0x10 4. "SCKMODE,Sckout mode" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0.--2. "CLKDIV,SPI clock divider" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "ACTR,AC timing control register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "CSDLY,CS delay"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FIFOSTS,FIFO Status register"
|
|
bitfld.long 0x0 1. "RXFIFORDY,RxFIFO ready status" "0,1"
|
|
bitfld.long 0x0 0. "TXFIFORDY,TxFIFO ready status" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CTRL2,control register 2"
|
|
bitfld.long 0x0 12.--13. "RXFIFOTHOD,RxFIFO thod" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "TXFIFOTHOD,TxFIFO thod" "0,1,2,3"
|
|
bitfld.long 0x0 1. "CMDIE,Command complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "DMAEN,DMA handshake enable" "0,1"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "CMDSTS,CMD status register"
|
|
bitfld.long 0x0 0. "CMDSTS,Command complete status" "0,1"
|
|
line.long 0x4 "RSTS,SPI read status register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SPISTS,SPI read status"
|
|
group.long 0x2C++0x13
|
|
line.long 0x0 "FSIZE,SPI flash size"
|
|
hexmask.long 0x0 0.--31. 1. "SPIFSIZE,SPI flash size"
|
|
line.long 0x4 "XIP_CMD_W0,XIP command word 0"
|
|
hexmask.long.byte 0x4 12.--19. 1. "XIPR_INSC,XIP read instruction code"
|
|
bitfld.long 0x4 11. "XIPR_ADRLEN,XIP read address length" "0,1"
|
|
bitfld.long 0x4 8.--10. "XIPR_OPMODE,XIP read operate mode" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "XIPR_DUM2,XIP read second dummy cycle"
|
|
line.long 0x8 "XIP_CMD_W1,XIP command word 1"
|
|
hexmask.long.byte 0x8 12.--19. 1. "XIPW_INSC,XIP write instruction code"
|
|
bitfld.long 0x8 11. "XIPW_ADRLEN,XIP write address length" "0,1"
|
|
bitfld.long 0x8 8.--10. "XIPW_OPMODE,XIP write operate mode" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x8 0.--7. 1. "XIPW_DUM2,XIP write second dummy cycle"
|
|
line.long 0xC "XIP_CMD_W2,XIP command word 2"
|
|
bitfld.long 0xC 31. "XIPW_SEL,XIP write continue mode select" "0,1"
|
|
hexmask.long.byte 0xC 24.--30. 1. "XIPW_TCNT,XIP continue write cycle counter"
|
|
hexmask.long.byte 0xC 16.--21. 1. "XIPW_DCNT,XIP write data counter"
|
|
bitfld.long 0xC 15. "XIPR_SEL,XIP read continue mode select" "0,1"
|
|
hexmask.long.byte 0xC 8.--14. 1. "XIPR_TCNT,XIP continue read cycle counter"
|
|
hexmask.long.byte 0xC 0.--5. 1. "XIPR_DCNT,XIP read data counter"
|
|
line.long 0x10 "XIP_CMD_W3,XIP command word 3"
|
|
bitfld.long 0x10 3. "CSTS,Cache status" "0,1"
|
|
bitfld.long 0x10 0. "BYPASSC,Bypass cache function" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "REV,Revision"
|
|
hexmask.long 0x0 0.--30. 1. "REVISION,Revision number"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "DT,32/16/8 bit data port register"
|
|
tree.end
|
|
tree "QSPI2"
|
|
base ad:0xA0002000
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CMD_W0,Command word 0"
|
|
hexmask.long 0x0 0.--31. 1. "SPIADR,SPI flash address"
|
|
line.long 0x4 "CMD_W1,Command word 1"
|
|
bitfld.long 0x4 28. "PEMEN,Perfrmance enhance mode enable" "0,1"
|
|
bitfld.long 0x4 24.--25. "INSLEN,Instruction code length" "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "DUM2,Second dummy state cycle"
|
|
bitfld.long 0x4 0.--2. "ADRLEN,SPI address length" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "CMD_W2,Command word 2"
|
|
hexmask.long 0x8 0.--31. 1. "DCNT,Read write data counter"
|
|
line.long 0xC "CMD_W3,Command word 3"
|
|
hexmask.long.byte 0xC 24.--31. 1. "INSC,Instruction code"
|
|
hexmask.long.byte 0xC 16.--23. 1. "PEMOPC,Performance enhance mode operate code"
|
|
bitfld.long 0xC 5.--7. "OPMODE,SPI operate mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3. "RSTSC,Read spi status configure" "0,1"
|
|
bitfld.long 0xC 2. "RSTSEN,Read spi status enable" "0,1"
|
|
bitfld.long 0xC 1. "WEN,Write data enable" "0,1"
|
|
line.long 0x10 "CTRL,Control register"
|
|
bitfld.long 0x10 21. "KEYEN,encryption key enable" "0,1"
|
|
bitfld.long 0x10 20. "XIPSEL,XIP port selection" "0,1"
|
|
bitfld.long 0x10 19. "XIPRCMDF,XIP read command flush" "0,1"
|
|
bitfld.long 0x10 16.--18. "BUSY,Busy bit of spi status" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 8. "ABORT,Abort instruction" "0,1"
|
|
bitfld.long 0x10 7. "XIPIDLE,XIP port idle status" "0,1"
|
|
bitfld.long 0x10 4. "SCKMODE,Sckout mode" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0.--2. "CLKDIV,SPI clock divider" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "ACTR,AC timing control register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "CSDLY,CS delay"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FIFOSTS,FIFO Status register"
|
|
bitfld.long 0x0 1. "RXFIFORDY,RxFIFO ready status" "0,1"
|
|
bitfld.long 0x0 0. "TXFIFORDY,TxFIFO ready status" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CTRL2,control register 2"
|
|
bitfld.long 0x0 12.--13. "RXFIFOTHOD,RxFIFO thod" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "TXFIFOTHOD,TxFIFO thod" "0,1,2,3"
|
|
bitfld.long 0x0 1. "CMDIE,Command complete interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "DMAEN,DMA handshake enable" "0,1"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "CMDSTS,CMD status register"
|
|
bitfld.long 0x0 0. "CMDSTS,Command complete status" "0,1"
|
|
line.long 0x4 "RSTS,SPI read status register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SPISTS,SPI read status"
|
|
group.long 0x2C++0x13
|
|
line.long 0x0 "FSIZE,SPI flash size"
|
|
hexmask.long 0x0 0.--31. 1. "SPIFSIZE,SPI flash size"
|
|
line.long 0x4 "XIP_CMD_W0,XIP command word 0"
|
|
hexmask.long.byte 0x4 12.--19. 1. "XIPR_INSC,XIP read instruction code"
|
|
bitfld.long 0x4 11. "XIPR_ADRLEN,XIP read address length" "0,1"
|
|
bitfld.long 0x4 8.--10. "XIPR_OPMODE,XIP read operate mode" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "XIPR_DUM2,XIP read second dummy cycle"
|
|
line.long 0x8 "XIP_CMD_W1,XIP command word 1"
|
|
hexmask.long.byte 0x8 12.--19. 1. "XIPW_INSC,XIP write instruction code"
|
|
bitfld.long 0x8 11. "XIPW_ADRLEN,XIP write address length" "0,1"
|
|
bitfld.long 0x8 8.--10. "XIPW_OPMODE,XIP write operate mode" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x8 0.--7. 1. "XIPW_DUM2,XIP write second dummy cycle"
|
|
line.long 0xC "XIP_CMD_W2,XIP command word 2"
|
|
bitfld.long 0xC 31. "XIPW_SEL,XIP write continue mode select" "0,1"
|
|
hexmask.long.byte 0xC 24.--30. 1. "XIPW_TCNT,XIP continue write cycle counter"
|
|
hexmask.long.byte 0xC 16.--21. 1. "XIPW_DCNT,XIP write data counter"
|
|
bitfld.long 0xC 15. "XIPR_SEL,XIP read continue mode select" "0,1"
|
|
hexmask.long.byte 0xC 8.--14. 1. "XIPR_TCNT,XIP continue read cycle counter"
|
|
hexmask.long.byte 0xC 0.--5. 1. "XIPR_DCNT,XIP read data counter"
|
|
line.long 0x10 "XIP_CMD_W3,XIP command word 3"
|
|
bitfld.long 0x10 3. "CSTS,Cache status" "0,1"
|
|
bitfld.long 0x10 0. "BYPASSC,Bypass cache function" "0,1"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "REV,Revision"
|
|
hexmask.long 0x0 0.--30. 1. "REVISION,Revision number"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "DT,32/16/8 bit data port register"
|
|
tree.end
|
|
tree.end
|
|
tree "SCFG (System Configuration Controller)"
|
|
base ad:0x40013800
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CFG1,configuration register 1"
|
|
bitfld.long 0x0 6.--7. "IR_SRC_SEL,IR signal source selection" "0,1,2,3"
|
|
bitfld.long 0x0 5. "IR_POL,IR output polarity selection" "0,1"
|
|
bitfld.long 0x0 0.--2. "MEM_MAP_SEL,Memory address mapping selection bits" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "CFG2,configuration register 2"
|
|
bitfld.long 0x4 30.--31. "I2S_FD,I2S full duplex configuration bit" "0,1,2,3"
|
|
bitfld.long 0x4 2. "PVM_LK,PVM lock enable" "0,1"
|
|
bitfld.long 0x4 0. "LOCKUP_LK,CM4 LOCKUP bit enable" "0,1"
|
|
line.long 0x8 "EXINTC1,external interrupt configuration register 1"
|
|
hexmask.long.byte 0x8 12.--15. 1. "EXINT3,EXINT 3 configuration bits"
|
|
hexmask.long.byte 0x8 8.--11. 1. "EXINT2,EXINT 2 configuration bits"
|
|
hexmask.long.byte 0x8 4.--7. 1. "EXINT1,EXINT 1 configuration bits"
|
|
hexmask.long.byte 0x8 0.--3. 1. "EXINT0,EXINT 0 configuration bits"
|
|
line.long 0xC "EXINTC2,external interrupt configuration register 2"
|
|
hexmask.long.byte 0xC 12.--15. 1. "EXINT7,EXINT 7 configuration bits"
|
|
hexmask.long.byte 0xC 8.--11. 1. "EXINT6,EXINT 6 configuration bits"
|
|
hexmask.long.byte 0xC 4.--7. 1. "EXINT5,EXINT 5 configuration bits"
|
|
hexmask.long.byte 0xC 0.--3. 1. "EXINT4,EXINT 4 configuration bits"
|
|
line.long 0x10 "EXINTC3,external interrupt configuration register 3"
|
|
hexmask.long.byte 0x10 12.--15. 1. "EXINT11,EXINT 11 configuration bits"
|
|
hexmask.long.byte 0x10 8.--11. 1. "EXINT10,EXINT 10 configuration bits"
|
|
hexmask.long.byte 0x10 4.--7. 1. "EXINT9,EXINT 9 configuration bits"
|
|
hexmask.long.byte 0x10 0.--3. 1. "EXINT8,EXINT 8 configuration bits"
|
|
line.long 0x14 "EXINTC4,external interrupt configuration register 4"
|
|
hexmask.long.byte 0x14 12.--15. 1. "EXINT15,EXINT 15 configuration bits"
|
|
hexmask.long.byte 0x14 8.--11. 1. "EXINT14,EXINT 14 configuration bits"
|
|
hexmask.long.byte 0x14 4.--7. 1. "EXINT13,EXINT 13 configuration bits"
|
|
hexmask.long.byte 0x14 0.--3. 1. "EXINT12,EXINT 12 configuration bits"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "UHDRV,Ultra high drive register"
|
|
bitfld.long 0x0 6. "PD13_UH,PD13 ultra high sourcing/sinking strength" "0,1"
|
|
bitfld.long 0x0 5. "PD12_UH,PD12 ultra high sourcing/sinking strength" "0,1"
|
|
bitfld.long 0x0 3. "PB8_UH,PB8 ultra high sourcing/sinking strength" "0,1"
|
|
bitfld.long 0x0 1. "PB9_UH,PB9 ultra high sourcing/sinking strength" "0,1"
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "SPI1"
|
|
base ad:0x40013000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 15. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x0 14. "SLBTD,Single line bidirectional half-duplex transmission direction" "0,1"
|
|
bitfld.long 0x0 13. "CCEN,CRC calculation enable" "0,1"
|
|
bitfld.long 0x0 12. "NTC,Next transmission CRC" "0,1"
|
|
bitfld.long 0x0 11. "FBN,frame bit num" "0,1"
|
|
bitfld.long 0x0 10. "ORA,Only receive active" "0,1"
|
|
bitfld.long 0x0 9. "SWCSEN,Software CS enable" "0,1"
|
|
bitfld.long 0x0 8. "SWCSIL,Software CS internal level" "0,1"
|
|
bitfld.long 0x0 7. "LTF,LSB transmit first" "0,1"
|
|
bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "MDIV2_0,Master clock frequency division bit2-0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "MSTEN,Master enable" "0,1"
|
|
bitfld.long 0x0 1. "CLKPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CLKPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 9. "MDIV3EN,Master clock frequency3 division enable" "0,1"
|
|
bitfld.long 0x4 8. "MDIV3,Master clock frequency division bit3" "0,1"
|
|
bitfld.long 0x4 7. "TDBEIE,Transmit data buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x4 6. "RDBFIE,Receive data buffer full interrupt enable" "0,1"
|
|
bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "TIEN,TI mode enable" "0,1"
|
|
bitfld.long 0x4 2. "HWCSOE,Hardware CS output enable" "0,1"
|
|
bitfld.long 0x4 1. "DMATEN,DMA transmit enable" "0,1"
|
|
bitfld.long 0x4 0. "DMAREN,DMA receive enable" "0,1"
|
|
line.long 0x8 "STS,status register"
|
|
bitfld.long 0x8 8. "CSPAS,CS pulse abnormal setting fiag" "0,1"
|
|
rbitfld.long 0x8 7. "BF,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x8 5. "MMERR,Master mode error" "0,1"
|
|
bitfld.long 0x8 4. "CCERR,CRC calculation error" "0,1"
|
|
rbitfld.long 0x8 3. "TUERR,Transmitter underload error" "0,1"
|
|
rbitfld.long 0x8 2. "ACS,Audio channel state" "0,1"
|
|
rbitfld.long 0x8 1. "TDBE,Transmit data buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RDBF,Receive data buffer full" "0,1"
|
|
line.long 0xC "DT,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DT,Data value"
|
|
line.long 0x10 "CPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CPOLY,CRC polynomial"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RCRC,Receive CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RCRC,Receive CRC"
|
|
line.long 0x4 "TCRC,Transmit CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TCRC,Transmit CRC"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "I2SCTRL,I2S control register"
|
|
bitfld.long 0x0 11. "I2SMSEL,I2S mode select" "0,1"
|
|
bitfld.long 0x0 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "OPERSEL,I2S operation select" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PCMFSSEL,PCM frame synchronization select" "0,1"
|
|
bitfld.long 0x0 4.--5. "STDSEL,I2S standard select" "0,1,2,3"
|
|
bitfld.long 0x0 3. "I2SCLKPOL,I2S clock polarity" "0,1"
|
|
bitfld.long 0x0 1.--2. "I2SDBN,I2S data bit num" "0,1,2,3"
|
|
bitfld.long 0x0 0. "I2SCBN,I2S channel bit num" "0,1"
|
|
line.long 0x4 "I2SCLKP,I2S clock register"
|
|
bitfld.long 0x4 10.--11. "I2SDIV9_8,I2S division bit9 and bit8" "0,1,2,3"
|
|
bitfld.long 0x4 9. "I2SMCLKOE,I2S master clock output enable" "0,1"
|
|
bitfld.long 0x4 8. "I2SODD,Odd result for I2S division" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "I2SDIV7_0,I2S division bit7 to bit0"
|
|
tree.end
|
|
tree "SPI2"
|
|
base ad:0x40003800
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 15. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x0 14. "SLBTD,Single line bidirectional half-duplex transmission direction" "0,1"
|
|
bitfld.long 0x0 13. "CCEN,CRC calculation enable" "0,1"
|
|
bitfld.long 0x0 12. "NTC,Next transmission CRC" "0,1"
|
|
bitfld.long 0x0 11. "FBN,frame bit num" "0,1"
|
|
bitfld.long 0x0 10. "ORA,Only receive active" "0,1"
|
|
bitfld.long 0x0 9. "SWCSEN,Software CS enable" "0,1"
|
|
bitfld.long 0x0 8. "SWCSIL,Software CS internal level" "0,1"
|
|
bitfld.long 0x0 7. "LTF,LSB transmit first" "0,1"
|
|
bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "MDIV2_0,Master clock frequency division bit2-0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "MSTEN,Master enable" "0,1"
|
|
bitfld.long 0x0 1. "CLKPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CLKPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 9. "MDIV3EN,Master clock frequency3 division enable" "0,1"
|
|
bitfld.long 0x4 8. "MDIV3,Master clock frequency division bit3" "0,1"
|
|
bitfld.long 0x4 7. "TDBEIE,Transmit data buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x4 6. "RDBFIE,Receive data buffer full interrupt enable" "0,1"
|
|
bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "TIEN,TI mode enable" "0,1"
|
|
bitfld.long 0x4 2. "HWCSOE,Hardware CS output enable" "0,1"
|
|
bitfld.long 0x4 1. "DMATEN,DMA transmit enable" "0,1"
|
|
bitfld.long 0x4 0. "DMAREN,DMA receive enable" "0,1"
|
|
line.long 0x8 "STS,status register"
|
|
bitfld.long 0x8 8. "CSPAS,CS pulse abnormal setting fiag" "0,1"
|
|
rbitfld.long 0x8 7. "BF,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x8 5. "MMERR,Master mode error" "0,1"
|
|
bitfld.long 0x8 4. "CCERR,CRC calculation error" "0,1"
|
|
rbitfld.long 0x8 3. "TUERR,Transmitter underload error" "0,1"
|
|
rbitfld.long 0x8 2. "ACS,Audio channel state" "0,1"
|
|
rbitfld.long 0x8 1. "TDBE,Transmit data buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RDBF,Receive data buffer full" "0,1"
|
|
line.long 0xC "DT,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DT,Data value"
|
|
line.long 0x10 "CPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CPOLY,CRC polynomial"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RCRC,Receive CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RCRC,Receive CRC"
|
|
line.long 0x4 "TCRC,Transmit CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TCRC,Transmit CRC"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "I2SCTRL,I2S control register"
|
|
bitfld.long 0x0 11. "I2SMSEL,I2S mode select" "0,1"
|
|
bitfld.long 0x0 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "OPERSEL,I2S operation select" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PCMFSSEL,PCM frame synchronization select" "0,1"
|
|
bitfld.long 0x0 4.--5. "STDSEL,I2S standard select" "0,1,2,3"
|
|
bitfld.long 0x0 3. "I2SCLKPOL,I2S clock polarity" "0,1"
|
|
bitfld.long 0x0 1.--2. "I2SDBN,I2S data bit num" "0,1,2,3"
|
|
bitfld.long 0x0 0. "I2SCBN,I2S channel bit num" "0,1"
|
|
line.long 0x4 "I2SCLKP,I2S clock register"
|
|
bitfld.long 0x4 10.--11. "I2SDIV9_8,I2S division bit9 and bit8" "0,1,2,3"
|
|
bitfld.long 0x4 9. "I2SMCLKOE,I2S master clock output enable" "0,1"
|
|
bitfld.long 0x4 8. "I2SODD,Odd result for I2S division" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "I2SDIV7_0,I2S division bit7 to bit0"
|
|
tree.end
|
|
tree "SPI3"
|
|
base ad:0x40003C00
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL1,control register 1"
|
|
bitfld.long 0x0 15. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x0 14. "SLBTD,Single line bidirectional half-duplex transmission direction" "0,1"
|
|
bitfld.long 0x0 13. "CCEN,CRC calculation enable" "0,1"
|
|
bitfld.long 0x0 12. "NTC,Next transmission CRC" "0,1"
|
|
bitfld.long 0x0 11. "FBN,frame bit num" "0,1"
|
|
bitfld.long 0x0 10. "ORA,Only receive active" "0,1"
|
|
bitfld.long 0x0 9. "SWCSEN,Software CS enable" "0,1"
|
|
bitfld.long 0x0 8. "SWCSIL,Software CS internal level" "0,1"
|
|
bitfld.long 0x0 7. "LTF,LSB transmit first" "0,1"
|
|
bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "MDIV2_0,Master clock frequency division bit2-0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "MSTEN,Master enable" "0,1"
|
|
bitfld.long 0x0 1. "CLKPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CLKPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CTRL2,control register 2"
|
|
bitfld.long 0x4 9. "MDIV3EN,Master clock frequency3 division enable" "0,1"
|
|
bitfld.long 0x4 8. "MDIV3,Master clock frequency division bit3" "0,1"
|
|
bitfld.long 0x4 7. "TDBEIE,Transmit data buffer empty interrupt enable" "0,1"
|
|
bitfld.long 0x4 6. "RDBFIE,Receive data buffer full interrupt enable" "0,1"
|
|
bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "TIEN,TI mode enable" "0,1"
|
|
bitfld.long 0x4 2. "HWCSOE,Hardware CS output enable" "0,1"
|
|
bitfld.long 0x4 1. "DMATEN,DMA transmit enable" "0,1"
|
|
bitfld.long 0x4 0. "DMAREN,DMA receive enable" "0,1"
|
|
line.long 0x8 "STS,status register"
|
|
bitfld.long 0x8 8. "CSPAS,CS pulse abnormal setting fiag" "0,1"
|
|
rbitfld.long 0x8 7. "BF,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x8 5. "MMERR,Master mode error" "0,1"
|
|
bitfld.long 0x8 4. "CCERR,CRC calculation error" "0,1"
|
|
rbitfld.long 0x8 3. "TUERR,Transmitter underload error" "0,1"
|
|
rbitfld.long 0x8 2. "ACS,Audio channel state" "0,1"
|
|
rbitfld.long 0x8 1. "TDBE,Transmit data buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RDBF,Receive data buffer full" "0,1"
|
|
line.long 0xC "DT,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DT,Data value"
|
|
line.long 0x10 "CPOLY,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CPOLY,CRC polynomial"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RCRC,Receive CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RCRC,Receive CRC"
|
|
line.long 0x4 "TCRC,Transmit CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TCRC,Transmit CRC"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "I2SCTRL,I2S control register"
|
|
bitfld.long 0x0 11. "I2SMSEL,I2S mode select" "0,1"
|
|
bitfld.long 0x0 10. "I2SEN,I2S Enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "OPERSEL,I2S operation select" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PCMFSSEL,PCM frame synchronization select" "0,1"
|
|
bitfld.long 0x0 4.--5. "STDSEL,I2S standard select" "0,1,2,3"
|
|
bitfld.long 0x0 3. "I2SCLKPOL,I2S clock polarity" "0,1"
|
|
bitfld.long 0x0 1.--2. "I2SDBN,I2S data bit num" "0,1,2,3"
|
|
bitfld.long 0x0 0. "I2SCBN,I2S channel bit num" "0,1"
|
|
line.long 0x4 "I2SCLKP,I2S clock register"
|
|
bitfld.long 0x4 10.--11. "I2SDIV9_8,I2S division bit9 and bit8" "0,1,2,3"
|
|
bitfld.long 0x4 9. "I2SMCLKOE,I2S master clock output enable" "0,1"
|
|
bitfld.long 0x4 8. "I2SODD,Odd result for I2S division" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "I2SDIV7_0,I2S division bit7 to bit0"
|
|
tree.end
|
|
tree.end
|
|
tree "TIMER"
|
|
base ad:0x0
|
|
tree "TMR1 (Advanced timer)"
|
|
base ad:0x40010000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 31. "TRGOUT2EN,TRGOUT2 enable" "0,1"
|
|
bitfld.long 0x4 14. "C4IOS,Channel 4 idle output state" "0,1"
|
|
bitfld.long 0x4 13. "C3CIOS,Channel 3 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 12. "C3IOS,Channel 3 idle output state" "0,1"
|
|
bitfld.long 0x4 11. "C2CIOS,Channel 2 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 10. "C2IOS,Channel 2 idle output state" "0,1"
|
|
bitfld.long 0x4 9. "C1CIOS,Channel 1 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 8. "C1IOS,Channel 1 idle output state" "0,1"
|
|
bitfld.long 0x4 7. "C1INSEL,C1IN selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--6. "PTOS,Primary TMR output selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
bitfld.long 0x4 2. "CCFS,Channel control bit flash select" "0,1"
|
|
bitfld.long 0x4 0. "CBCTRL,Channel buffer control" "0,1"
|
|
line.long 0x8 "STCTRL,Subordinate TMR control register"
|
|
bitfld.long 0x8 15. "ESP,External signal polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECMBEN,External clock mode B enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ESDIV,External signal divider" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ESF,External signal filter"
|
|
bitfld.long 0x8 7. "STS,Subordinate TMR synchronization" "0,1"
|
|
bitfld.long 0x8 4.--6. "STIS,Subordinate TMR input selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMSEL,Subordinate TMR mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0xC 14. "TDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 13. "HALLDE,HALL DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "C4DEN,Channel 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "C3DEN,Channel 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "C2DEN,Channel 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0xC 7. "BRKIE,Brake interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TIEN,Trigger interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "HALLIEN,HALL interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "C4IEN,Channel 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "C3IEN,Channel 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "C2IEN,Channel 2 interrupt" "0,1"
|
|
bitfld.long 0xC 1. "C1IEN,Channel 1 interrupt" "0,1"
|
|
bitfld.long 0xC 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x10 "ISTS,Interrupt status register"
|
|
bitfld.long 0x10 12. "C4RF,Channel 4 recapture flag" "0,1"
|
|
bitfld.long 0x10 11. "C3RF,Channel 3 recapture flag" "0,1"
|
|
bitfld.long 0x10 10. "C2RF,Channel 2 recapture flag" "0,1"
|
|
bitfld.long 0x10 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x10 7. "BRKIF,Brake interrupt flag" "0,1"
|
|
bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 5. "HALLIF,HALL interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "C4IF,Channel 4 interrupt flag" "0,1"
|
|
bitfld.long 0x10 3. "C3IF,Channel 3 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "C2IF,Channel 2 interrupt flag" "0,1"
|
|
bitfld.long 0x10 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x10 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x14 "SWEVT,Software event register"
|
|
bitfld.long 0x14 7. "BRKSWTR,Brake event triggered by software" "0,1"
|
|
bitfld.long 0x14 6. "TRGSWTR,Trigger event triggered by software" "0,1"
|
|
bitfld.long 0x14 5. "HALLSWTR,HALL event triggered by software" "0,1"
|
|
bitfld.long 0x14 4. "C4SWTR,Channel 4 event triggered by software" "0,1"
|
|
bitfld.long 0x14 3. "C3SWTR,Channel 3 event triggered by software" "0,1"
|
|
bitfld.long 0x14 2. "C2SWTR,Channel 2 event triggered by software" "0,1"
|
|
bitfld.long 0x14 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x14 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0x18 "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0x18 15. "C2OSEN,Channel 2 output switch enable" "0,1"
|
|
bitfld.long 0x18 12.--14. "C2OCTRL,Channel 2 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 11. "C2OBEN,Channel 2 output buffer enable" "0,1"
|
|
bitfld.long 0x18 10. "C2OIEN,Channel 2 output immediately enable" "0,1"
|
|
bitfld.long 0x18 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
bitfld.long 0x18 7. "C1OSEN,Channel 1 output switch enable" "0,1"
|
|
bitfld.long 0x18 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0x18 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C2DF,Channel 2 digital filter"
|
|
bitfld.long 0x0 10.--11. "C2IDIV,Channel 2 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
line.long 0x4 "CM2_OUTPUT,Channel output mode register 2"
|
|
bitfld.long 0x4 15. "C4OSEN,Channel 4 output switch enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "C4OCTRL,Channel 4 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "C4OBEN,Channel 4 output buffer enable" "0,1"
|
|
bitfld.long 0x4 10. "C4OIEN,Channel 4 output immediately enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "C4C,Channel 4 configure" "0,1,2,3"
|
|
bitfld.long 0x4 7. "C3OSEN,Channel 3 output switch enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "C3OCTRL,Channel 3 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "C3OBEN,Channel 3 output buffer enable" "0,1"
|
|
bitfld.long 0x4 2. "C3OIEN,Channel 3 output immediately enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "C3C,Channel 3 configure" "0,1,2,3"
|
|
group.long 0x1C++0x33
|
|
line.long 0x0 "CM2_INPUT,Channel input mode register 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C4DF,Channel 4 digital filter"
|
|
bitfld.long 0x0 10.--11. "C4IDIV,Channel 4 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C4C,Channel 4 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C3DF,Channel 3 digital filter"
|
|
bitfld.long 0x0 2.--3. "C3IDIV,Channel 3 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C3C,Channel 3 configure" "0,1,2,3"
|
|
line.long 0x4 "CCTRL,Channel control"
|
|
bitfld.long 0x4 13. "C4P,Channel 4 Polarity" "0,1"
|
|
bitfld.long 0x4 12. "C4EN,Channel 4 enable" "0,1"
|
|
bitfld.long 0x4 11. "C3CP,Channel 3 complementary polarity" "0,1"
|
|
bitfld.long 0x4 10. "C3CEN,Channel 3 complementary enable" "0,1"
|
|
bitfld.long 0x4 9. "C3P,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x4 8. "C3EN,Channel 3 enable" "0,1"
|
|
bitfld.long 0x4 7. "C2CP,Channel 2 complementary polarity" "0,1"
|
|
bitfld.long 0x4 6. "C2CEN,Channel 2 complementary enable" "0,1"
|
|
bitfld.long 0x4 5. "C2P,Channel 2 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "C2EN,Channel 2 enable" "0,1"
|
|
bitfld.long 0x4 3. "C1CP,Channel 1 complementary polarity" "0,1"
|
|
bitfld.long 0x4 2. "C1CEN,Channel 1 complementary enable" "0,1"
|
|
bitfld.long 0x4 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x4 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x8 "CVAL,Counter value"
|
|
hexmask.long.word 0x8 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0xC "DIV,Divider value"
|
|
hexmask.long.word 0xC 0.--15. 1. "DIV,Divider value"
|
|
line.long 0x10 "PR,Period value"
|
|
hexmask.long.word 0x10 0.--15. 1. "PR,Period value"
|
|
line.long 0x14 "RPR,Repetition of period value"
|
|
hexmask.long.word 0x14 0.--15. 1. "RPR,Repetition of period value"
|
|
line.long 0x18 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x18 0.--15. 1. "C1DT,Channel 1 data register"
|
|
line.long 0x1C "C2DT,Channel 2 data register"
|
|
hexmask.long.word 0x1C 0.--15. 1. "C2DT,Channel 2 data register"
|
|
line.long 0x20 "C3DT,Channel 3 data register"
|
|
hexmask.long.word 0x20 0.--15. 1. "C3DT,Channel 3 data register"
|
|
line.long 0x24 "C4DT,Channel 4 data register"
|
|
hexmask.long.word 0x24 0.--15. 1. "C4DT,Channel 4 data register"
|
|
line.long 0x28 "BRK,Brake register"
|
|
hexmask.long.byte 0x28 16.--19. 1. "BKF,brake input filter"
|
|
bitfld.long 0x28 15. "OEN,Output enable" "0,1"
|
|
bitfld.long 0x28 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x28 13. "BRKV,Brake input validity" "0,1"
|
|
bitfld.long 0x28 12. "BRKEN,Brake enable" "0,1"
|
|
bitfld.long 0x28 11. "FCSOEN,Frozen channel status when" "0,1"
|
|
bitfld.long 0x28 10. "FCSODIS,Frozen channel status when" "0,1"
|
|
bitfld.long 0x28 8.--9. "WPC,Write protected configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x28 0.--7. 1. "DTC,Dead-time configuration"
|
|
line.long 0x2C "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x2C 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x2C 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x30 "DMADT,DMA data register"
|
|
hexmask.long.word 0x30 0.--15. 1. "DMADT,DMA data register"
|
|
group.long 0x70++0x7
|
|
line.long 0x0 "CM3_OUTPUT,Channel output mode register"
|
|
bitfld.long 0x0 7. "C5OSEN,Channel 5 output switch enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "C5OCTRL,Channel 5 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "C5OBEN,Channel 5 output buffer enable" "0,1"
|
|
bitfld.long 0x0 2. "C5OIEN,Channel 5 output immediately enable" "0,1"
|
|
line.long 0x4 "C5DT,Channel 5 data register"
|
|
hexmask.long.word 0x4 0.--15. 1. "C5DT,Channel 5 data register"
|
|
tree.end
|
|
tree "TMR2 (General purpose timer)"
|
|
base ad:0x40000000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 10. "PMEN,Plus Mode Enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 7. "C1INSEL,C1IN selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "PTOS,Primary TMR output selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
line.long 0x8 "STCTRL,Subordinate TMR control register"
|
|
bitfld.long 0x8 15. "ESP,External signal polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECMBEN,External clock mode B enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ESDIV,External signal divider" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ESF,External signal filter"
|
|
bitfld.long 0x8 7. "STS,Subordinate TMR synchronization" "0,1"
|
|
bitfld.long 0x8 4.--6. "STIS,Subordinate TMR input selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMSEL,Subordinate TMR mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0xC 14. "TDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "C4DEN,Channel 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "C3DEN,Channel 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "C2DEN,Channel 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0xC 6. "TIEN,Trigger interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "C4IEN,Channel 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "C3IEN,Channel 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "C2IEN,Channel 2 interrupt" "0,1"
|
|
bitfld.long 0xC 1. "C1IEN,Channel 1 interrupt" "0,1"
|
|
bitfld.long 0xC 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x10 "ISTS,Interrupt status register"
|
|
bitfld.long 0x10 12. "C4RF,Channel 4 recapture flag" "0,1"
|
|
bitfld.long 0x10 11. "C3RF,Channel 3 recapture flag" "0,1"
|
|
bitfld.long 0x10 10. "C2RF,Channel 2 recapture flag" "0,1"
|
|
bitfld.long 0x10 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "C4IF,Channel 4 interrupt flag" "0,1"
|
|
bitfld.long 0x10 3. "C3IF,Channel 3 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "C2IF,Channel 2 interrupt flag" "0,1"
|
|
bitfld.long 0x10 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x10 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x14 "SWEVT,Software event register"
|
|
bitfld.long 0x14 6. "TRGSWTR,Trigger event triggered by software" "0,1"
|
|
bitfld.long 0x14 4. "C4SWTR,Channel 4 event triggered by software" "0,1"
|
|
bitfld.long 0x14 3. "C3SWTR,Channel 3 event triggered by software" "0,1"
|
|
bitfld.long 0x14 2. "C2SWTR,Channel 2 event triggered by software" "0,1"
|
|
bitfld.long 0x14 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x14 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0x18 "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0x18 15. "C2OSEN,Channel 2 output switch enable" "0,1"
|
|
bitfld.long 0x18 12.--14. "C2OCTRL,Channel 2 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 11. "C2OBEN,Channel 2 output buffer enable" "0,1"
|
|
bitfld.long 0x18 10. "C2OIEN,Channel 2 output immediately enable" "0,1"
|
|
bitfld.long 0x18 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
bitfld.long 0x18 7. "C1OSEN,Channel 1 output switch enable" "0,1"
|
|
bitfld.long 0x18 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0x18 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0x18 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C2DF,Channel 2 digital filter"
|
|
bitfld.long 0x0 10.--11. "C2IDIV,Channel 2 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
line.long 0x4 "CM2_OUTPUT,Channel output mode register 2"
|
|
bitfld.long 0x4 15. "C4OSEN,Channel 4 output switch enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "C4OCTRL,Channel 4 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "C4OBEN,Channel 4 output buffer enable" "0,1"
|
|
bitfld.long 0x4 10. "C4OIEN,Channel 4 output immediately enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "C4C,Channel 4 configure" "0,1,2,3"
|
|
bitfld.long 0x4 7. "C3OSEN,Channel 3 output switch enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "C3OCTRL,Channel 3 output control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 3. "C3OBEN,Channel 3 output buffer enable" "0,1"
|
|
bitfld.long 0x4 2. "C3OIEN,Channel 3 output immediately enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "C3C,Channel 3 configure" "0,1,2,3"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "CM2_INPUT,Channel input mode register 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C4DF,Channel 4 digital filter"
|
|
bitfld.long 0x0 10.--11. "C4IDIV,Channel 4 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C4C,Channel 4 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C3DF,Channel 3 digital filter"
|
|
bitfld.long 0x0 2.--3. "C3IDIV,Channel 3 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C3C,Channel 3 configure" "0,1,2,3"
|
|
line.long 0x4 "CCTRL,Channel control"
|
|
bitfld.long 0x4 13. "C4P,Channel 4 Polarity" "0,1"
|
|
bitfld.long 0x4 12. "C4EN,Channel 4 enable" "0,1"
|
|
bitfld.long 0x4 9. "C3P,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x4 8. "C3EN,Channel 3 enable" "0,1"
|
|
bitfld.long 0x4 5. "C2P,Channel 2 Polarity" "0,1"
|
|
bitfld.long 0x4 4. "C2EN,Channel 2 enable" "0,1"
|
|
bitfld.long 0x4 1. "C1P,Channel 1 Polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x8 "CVAL,Counter value"
|
|
hexmask.long 0x8 0.--31. 1. "CVAL,Counter value"
|
|
line.long 0xC "DIV,Divider value"
|
|
hexmask.long.word 0xC 0.--15. 1. "DIV,Divider value"
|
|
line.long 0x10 "PR,Period value"
|
|
hexmask.long 0x10 0.--31. 1. "PR,Period value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "C1DT,Channel 1 data register"
|
|
hexmask.long 0x0 0.--31. 1. "C1DT,Channel 1 data register"
|
|
line.long 0x4 "C2DT,Channel 2 data register"
|
|
hexmask.long 0x4 0.--31. 1. "C2DT,Channel 2 data register"
|
|
line.long 0x8 "C3DT,Channel 3 data register"
|
|
hexmask.long 0x8 0.--31. 1. "C3DT,Channel 3 data register"
|
|
line.long 0xC "C4DT,Channel 4 data register"
|
|
hexmask.long 0xC 0.--31. 1. "C4DT,Channel 4 data register"
|
|
group.long 0x48++0xB
|
|
line.long 0x0 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x0 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x4 "DMADT,DMA data register"
|
|
hexmask.long.word 0x4 0.--15. 1. "DMADT,DMA data register"
|
|
line.long 0x8 "TMR2_RMP,TMR2 channel input remap register"
|
|
bitfld.long 0x8 10.--11. "TMR2_CH1_IRMP,TMR2 channel 1 input remap" "0,1,2,3"
|
|
tree.end
|
|
tree "TMR3 (General purpose timer)"
|
|
base ad:0x40000400
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 7. "C1INSEL,C1IN selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "PTOS,Primary TMR output selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
line.long 0x8 "STCTRL,Subordinate TMR control register"
|
|
bitfld.long 0x8 15. "ESP,External signal polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECMBEN,External clock mode B enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ESDIV,External signal divider" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ESF,External signal filter"
|
|
bitfld.long 0x8 7. "STS,Subordinate TMR synchronization" "0,1"
|
|
bitfld.long 0x8 4.--6. "STIS,Subordinate TMR input selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMSEL,Subordinate TMR mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0xC 14. "TDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "C4DEN,Channel 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "C3DEN,Channel 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "C2DEN,Channel 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0xC 6. "TIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "C4IEN,Channel 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "C3IEN,Channel 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "C2IEN,Channel 2 interrupt" "0,1"
|
|
bitfld.long 0xC 1. "C1IEN,Channel 1 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x10 "ISTS,Interrupt status register"
|
|
bitfld.long 0x10 12. "C4RF,Channel 4 recapture flag" "0,1"
|
|
bitfld.long 0x10 11. "C3RF,Channel 3 recapture flag" "0,1"
|
|
bitfld.long 0x10 10. "C2RF,Channel 2 recapture flag" "0,1"
|
|
bitfld.long 0x10 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "C4IF,Channel 4 interrupt flag" "0,1"
|
|
bitfld.long 0x10 3. "C3IF,Channel 3 interrupt flag" "0,1"
|
|
bitfld.long 0x10 2. "C2IF,Channel 2 interrupt flag" "0,1"
|
|
bitfld.long 0x10 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x10 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x14 "SWEVT,Software event register"
|
|
bitfld.long 0x14 6. "TRGSWTR,Trigger event triggered by software" "0,1"
|
|
bitfld.long 0x14 4. "C4SWTR,Channel 4 event triggered by software" "0,1"
|
|
bitfld.long 0x14 3. "C3SWTR,Channel 3 event triggered by software" "0,1"
|
|
bitfld.long 0x14 2. "C2SWTR,Channel 2 event triggered by software" "0,1"
|
|
bitfld.long 0x14 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x14 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0x18 "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0x18 15. "C2OSEN,Channel 2 output switch enable" "0,1"
|
|
bitfld.long 0x18 12.--14. "C2OCTRL,Channel 2 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 11. "C2OBEN,Channel 2 output buffer enable" "0,1"
|
|
bitfld.long 0x18 10. "C2OIEN,Channel 2 output immediately enable" "0,1"
|
|
bitfld.long 0x18 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
bitfld.long 0x18 7. "C1OSEN,Channel 1 output switch enable" "0,1"
|
|
bitfld.long 0x18 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0x18 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0x18 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C2DF,Channel 2 digital filter"
|
|
bitfld.long 0x0 10.--11. "C2IDIV,Channel 2 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
line.long 0x4 "CM2_OUTPUT,Channel output mode register 2"
|
|
bitfld.long 0x4 15. "C4OSEN,Channel 4 output switch enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "C4OCTRL,Channel 4 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "C4OBEN,Channel 4 output buffer enable" "0,1"
|
|
bitfld.long 0x4 10. "C4OIEN,Channel 4 output immediately enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "C4C,Channel 4 configure" "0,1,2,3"
|
|
bitfld.long 0x4 7. "C3OSEN,Channel 3 output switch enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "C3OCTRL,Channel 3 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "C3OBEN,Channel 3 output buffer enable" "0,1"
|
|
bitfld.long 0x4 2. "C3OIEN,Channel 3 output immediately enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "C3C,Channel 3 configure" "0,1,2,3"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "CM2_INPUT,Channel input mode register 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C4DF,Channel 4 digital filter"
|
|
bitfld.long 0x0 10.--11. "C4IDIV,Channel 4 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C4C,Channel 4 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C3DF,Channel 3 digital filter"
|
|
bitfld.long 0x0 2.--3. "C3IDIV,Channel 3 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C3C,Channel 3 configure" "0,1,2,3"
|
|
line.long 0x4 "CCTRL,Channel control"
|
|
bitfld.long 0x4 13. "C4P,Channel 4 Polarity" "0,1"
|
|
bitfld.long 0x4 12. "C4EN,Channel 4 enable" "0,1"
|
|
bitfld.long 0x4 9. "C3P,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x4 8. "C3EN,Channel 3 enable" "0,1"
|
|
bitfld.long 0x4 5. "C2P,Channel 2 Polarity" "0,1"
|
|
bitfld.long 0x4 4. "C2EN,Channel 2 enable" "0,1"
|
|
bitfld.long 0x4 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x4 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x8 "CVAL,Counter value"
|
|
hexmask.long.word 0x8 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0xC "DIV,Divider value"
|
|
hexmask.long.word 0xC 0.--15. 1. "DIV,Divider value"
|
|
line.long 0x10 "PR,Period value"
|
|
hexmask.long.word 0x10 0.--15. 1. "PR,Period value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x0 0.--15. 1. "C1DT,Channel 1 data register"
|
|
line.long 0x4 "C2DT,Channel 2 data register"
|
|
hexmask.long.word 0x4 0.--15. 1. "C2DT,Channel 2 data register"
|
|
line.long 0x8 "C3DT,Channel 3 data register"
|
|
hexmask.long.word 0x8 0.--15. 1. "C3DT,Channel 3 data register"
|
|
line.long 0xC "C4DT,Channel 4 data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "C4DT,Channel 4 data register"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x0 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x4 "DMADT,DMA data register"
|
|
hexmask.long.word 0x4 0.--15. 1. "DMADT,DMA data register"
|
|
tree.end
|
|
tree "TMR4 (General purpose timer)"
|
|
base ad:0x40000800
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 7. "C1INSEL,C1IN selection" "0,1"
|
|
bitfld.long 0x4 4.--6. "PTOS,Primary TMR output selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
line.long 0x8 "STCTRL,Subordinate TMR control register"
|
|
bitfld.long 0x8 15. "ESP,External signal polarity" "0,1"
|
|
bitfld.long 0x8 14. "ECMBEN,External clock mode B enable" "0,1"
|
|
bitfld.long 0x8 12.--13. "ESDIV,External signal divider" "0,1,2,3"
|
|
hexmask.long.byte 0x8 8.--11. 1. "ESF,External signal filter"
|
|
bitfld.long 0x8 7. "STS,Subordinate TMR synchronization" "0,1"
|
|
bitfld.long 0x8 4.--6. "STIS,Subordinate TMR input selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMSEL,Subordinate TMR mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0xC 14. "TDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 12. "C4DEN,Channel 4 DMA request" "0,1"
|
|
bitfld.long 0xC 11. "C3DEN,Channel 3 DMA request" "0,1"
|
|
bitfld.long 0xC 10. "C2DEN,Channel 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0xC 6. "TIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "C4IEN,Channel 4 interrupt" "0,1"
|
|
bitfld.long 0xC 3. "C3IEN,Channel 3 interrupt" "0,1"
|
|
bitfld.long 0xC 2. "C2IEN,Channel 2 interrupt" "0,1"
|
|
bitfld.long 0xC 1. "C1IEN,Channel 1 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x10 "ISTS,Interrupt status register"
|
|
bitfld.long 0x10 12. "C4RF,Channel 4 recapture flag" "0,1"
|
|
bitfld.long 0x10 11. "C3RF,Channel 3 recapture flag" "0,1"
|
|
bitfld.long 0x10 10. "C2RF,Channel 2 recapture flag" "0,1"
|
|
bitfld.long 0x10 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 4. "C4IF,Channel 4 interrupt flag" "0,1"
|
|
bitfld.long 0x10 3. "C3IF,Channel 3 interrupt flag" "0,1"
|
|
bitfld.long 0x10 2. "C2IF,Channel 2 interrupt flag" "0,1"
|
|
bitfld.long 0x10 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x10 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x14 "SWEVT,Software event register"
|
|
bitfld.long 0x14 6. "TRGSWTR,Trigger event triggered by software" "0,1"
|
|
bitfld.long 0x14 4. "C4SWTR,Channel 4 event triggered by software" "0,1"
|
|
bitfld.long 0x14 3. "C3SWTR,Channel 3 event triggered by software" "0,1"
|
|
bitfld.long 0x14 2. "C2SWTR,Channel 2 event triggered by software" "0,1"
|
|
bitfld.long 0x14 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x14 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0x18 "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0x18 15. "C2OSEN,Channel 2 output switch enable" "0,1"
|
|
bitfld.long 0x18 12.--14. "C2OCTRL,Channel 2 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 11. "C2OBEN,Channel 2 output buffer enable" "0,1"
|
|
bitfld.long 0x18 10. "C2OIEN,Channel 2 output immediately enable" "0,1"
|
|
bitfld.long 0x18 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
bitfld.long 0x18 7. "C1OSEN,Channel 1 output switch enable" "0,1"
|
|
bitfld.long 0x18 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0x18 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0x18 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C2DF,Channel 2 digital filter"
|
|
bitfld.long 0x0 10.--11. "C2IDIV,Channel 2 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
line.long 0x4 "CM2_OUTPUT,Channel output mode register 2"
|
|
bitfld.long 0x4 15. "C4OSEN,Channel 4 output switch enable" "0,1"
|
|
bitfld.long 0x4 12.--14. "C4OCTRL,Channel 4 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 11. "C4OBEN,Channel 4 output buffer enable" "0,1"
|
|
bitfld.long 0x4 10. "C4OIEN,Channel 4 output immediately enable" "0,1"
|
|
bitfld.long 0x4 8.--9. "C4C,Channel 4 configure" "0,1,2,3"
|
|
bitfld.long 0x4 7. "C3OSEN,Channel 3 output switch enable" "0,1"
|
|
bitfld.long 0x4 4.--6. "C3OCTRL,Channel 3 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "C3OBEN,Channel 3 output buffer enable" "0,1"
|
|
bitfld.long 0x4 2. "C3OIEN,Channel 3 output immediately enable" "0,1"
|
|
bitfld.long 0x4 0.--1. "C3C,Channel 3 configure" "0,1,2,3"
|
|
group.long 0x1C++0x13
|
|
line.long 0x0 "CM2_INPUT,Channel input mode register 2"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C4DF,Channel 4 digital filter"
|
|
bitfld.long 0x0 10.--11. "C4IDIV,Channel 4 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C4C,Channel 4 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C3DF,Channel 3 digital filter"
|
|
bitfld.long 0x0 2.--3. "C3IDIV,Channel 3 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C3C,Channel 3 configure" "0,1,2,3"
|
|
line.long 0x4 "CCTRL,Channel control"
|
|
bitfld.long 0x4 13. "C4P,Channel 4 Polarity" "0,1"
|
|
bitfld.long 0x4 12. "C4EN,Channel 4 enable" "0,1"
|
|
bitfld.long 0x4 9. "C3P,Channel 3 Polarity" "0,1"
|
|
bitfld.long 0x4 8. "C3EN,Channel 3 enable" "0,1"
|
|
bitfld.long 0x4 5. "C2P,Channel 2 Polarity" "0,1"
|
|
bitfld.long 0x4 4. "C2EN,Channel 2 enable" "0,1"
|
|
bitfld.long 0x4 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x4 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x8 "CVAL,Counter value"
|
|
hexmask.long.word 0x8 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0xC "DIV,Divider value"
|
|
hexmask.long.word 0xC 0.--15. 1. "DIV,Divider value"
|
|
line.long 0x10 "PR,Period value"
|
|
hexmask.long.word 0x10 0.--15. 1. "PR,Period value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x0 0.--15. 1. "C1DT,Channel 1 data register"
|
|
line.long 0x4 "C2DT,Channel 2 data register"
|
|
hexmask.long.word 0x4 0.--15. 1. "C2DT,Channel 2 data register"
|
|
line.long 0x8 "C3DT,Channel 3 data register"
|
|
hexmask.long.word 0x8 0.--15. 1. "C3DT,Channel 3 data register"
|
|
line.long 0xC "C4DT,Channel 4 data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "C4DT,Channel 4 data register"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x0 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x4 "DMADT,DMA data register"
|
|
hexmask.long.word 0x4 0.--15. 1. "DMADT,DMA data register"
|
|
tree.end
|
|
tree "TMR6 (Basic timer)"
|
|
base ad:0x40001000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 4.--6. "PTOS,Primary TMR output selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC++0xB
|
|
line.long 0x0 "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0x0 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0x0 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x4 "ISTS,Interrupt status register"
|
|
bitfld.long 0x4 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x8 "SWEVT,Software event register"
|
|
bitfld.long 0x8 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "CVAL,Counter value"
|
|
hexmask.long.word 0x0 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0x4 "DIV,Divider value"
|
|
hexmask.long.word 0x4 0.--15. 1. "DIV,Divider value"
|
|
line.long 0x8 "PR,Period value"
|
|
hexmask.long.word 0x8 0.--15. 1. "PR,Period value"
|
|
tree.end
|
|
tree "TMR7 (Basic timer)"
|
|
base ad:0x40001400
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 4.--6. "PTOS,Primary TMR output selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC++0xB
|
|
line.long 0x0 "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0x0 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0x0 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x4 "ISTS,Interrupt status register"
|
|
bitfld.long 0x4 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x8 "SWEVT,Software event register"
|
|
bitfld.long 0x8 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "CVAL,Counter value"
|
|
hexmask.long.word 0x0 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0x4 "DIV,Divider value"
|
|
hexmask.long.word 0x4 0.--15. 1. "DIV,Divider value"
|
|
line.long 0x8 "PR,Period value"
|
|
hexmask.long.word 0x8 0.--15. 1. "PR,Period value"
|
|
tree.end
|
|
tree "TMR9 (General purpose timer)"
|
|
base ad:0x40014000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode selection" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 11. "C2CIOS,Channel 2 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 10. "C2IOS,Channel 2 idle output state" "0,1"
|
|
bitfld.long 0x4 9. "C1CIOS,Channel 1 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 8. "C1IOS,Channel 1 idle output state" "0,1"
|
|
bitfld.long 0x4 4.--6. "PTOS,Primary TMR output selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
bitfld.long 0x4 2. "CCFS,Channel control bit flash select" "0,1"
|
|
bitfld.long 0x4 0. "CBCTRL,Channel buffer control" "0,1"
|
|
line.long 0x8 "STCTRL,Subordinate TMR control register"
|
|
bitfld.long 0x8 7. "STS,Subordinate TMR synchronization" "0,1"
|
|
bitfld.long 0x8 4.--6. "STIS,Subordinate TMR input selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMSEL,Subordinate TMR mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0xC 14. "TDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 13. "HALLDE,HALL DMA request enable" "0,1"
|
|
bitfld.long 0xC 10. "C2DEN,Channel 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0xC 7. "BRKIE,Brake interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "HALLIEN,HALL interrupt enable" "0,1"
|
|
bitfld.long 0xC 2. "C2IEN,Channel 2 interrupt" "0,1"
|
|
bitfld.long 0xC 1. "C1IEN,Channel 1 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x10 "ISTS,Interrupt status register"
|
|
bitfld.long 0x10 10. "C2RF,Channel 2 recapture flag" "0,1"
|
|
bitfld.long 0x10 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x10 7. "BRKIF,Brake interrupt flag" "0,1"
|
|
bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 5. "HALLIF,HALL interrupt flag" "0,1"
|
|
bitfld.long 0x10 2. "C2IF,Channel 2 interrupt flag" "0,1"
|
|
bitfld.long 0x10 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x10 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x14 "SWEVT,Software event register"
|
|
bitfld.long 0x14 7. "BRKSWTR,Brake event triggered by software" "0,1"
|
|
bitfld.long 0x14 6. "TRGSWTR,Trigger event triggered by software" "0,1"
|
|
bitfld.long 0x14 5. "HALLSWTR,HALL event triggered by software" "0,1"
|
|
bitfld.long 0x14 2. "C2SWTR,Channel 2 event triggered by software" "0,1"
|
|
bitfld.long 0x14 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x14 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0x18 "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0x18 12.--14. "C2OCTRL,Channel 2 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 11. "C2OBEN,Channel 2 output buffer enable" "0,1"
|
|
bitfld.long 0x18 10. "C2OIEN,Channel 2 output immediately enable" "0,1"
|
|
bitfld.long 0x18 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
bitfld.long 0x18 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0x18 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0x18 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C2DF,Channel 2 digital filter"
|
|
bitfld.long 0x0 10.--11. "C2IDIV,Channel 2 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x20++0x1B
|
|
line.long 0x0 "CCTRL,Channel control"
|
|
bitfld.long 0x0 7. "C2CP,Channel 2 complementary polarity" "0,1"
|
|
bitfld.long 0x0 6. "C2CEN,Channel 2 complementary enable" "0,1"
|
|
bitfld.long 0x0 5. "C2P,Channel 2 Polarity" "0,1"
|
|
bitfld.long 0x0 4. "C2EN,Channel 2 enable" "0,1"
|
|
bitfld.long 0x0 3. "C1CP,Channel 1 complementary polarity" "0,1"
|
|
bitfld.long 0x0 2. "C1CEN,Channel 1 complementary enable" "0,1"
|
|
bitfld.long 0x0 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x4 "CVAL,Counter value"
|
|
hexmask.long.word 0x4 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0x8 "DIV,Divider value"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Divider value"
|
|
line.long 0xC "PR,Period value"
|
|
hexmask.long.word 0xC 0.--15. 1. "PR,Period value"
|
|
line.long 0x10 "RPR,Repetition of period value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "RPR,Repetition of period value"
|
|
line.long 0x14 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x14 0.--15. 1. "C1DT,Channel 1 data register"
|
|
line.long 0x18 "C2DT,Channel 2 data register"
|
|
hexmask.long.word 0x18 0.--15. 1. "C2DT,Channel 2 data register"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "BRK,Brake register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,brake input filter"
|
|
bitfld.long 0x0 15. "OEN,Output enable" "0,1"
|
|
bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x0 13. "BRKV,Brake input validity" "0,1"
|
|
bitfld.long 0x0 12. "BRKEN,Brake enable" "0,1"
|
|
bitfld.long 0x0 11. "FCSOEN,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 10. "FCSODIS,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 8.--9. "WPC,Write protected configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTC,Dead-time configuration"
|
|
line.long 0x4 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x4 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x8 "DMADT,DMA data register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DMADT,DMA data register"
|
|
tree.end
|
|
tree "TMR10 (General purpose timer)"
|
|
base ad:0x40014400
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode selection" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 9. "C1CIOS,Channel 1 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 8. "C1IOS,Channel 1 idle output state" "0,1"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
bitfld.long 0x4 2. "CCFS,Channel control bit flash select" "0,1"
|
|
bitfld.long 0x4 0. "CBCTRL,Channel buffer control" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0x0 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0x0 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0x0 7. "BRKIE,Brake interrupt enable" "0,1"
|
|
bitfld.long 0x0 5. "HALLIEN,HALL interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "C1IEN,Channel 1 interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x4 "ISTS,Interrupt status register"
|
|
bitfld.long 0x4 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x4 7. "BRKIF,Brake interrupt flag" "0,1"
|
|
bitfld.long 0x4 5. "HALLIF,HALL interrupt flag" "0,1"
|
|
bitfld.long 0x4 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x4 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x8 "SWEVT,Software event register"
|
|
bitfld.long 0x8 7. "BRKSWTR,Brake event triggered by software" "0,1"
|
|
bitfld.long 0x8 5. "HALLSWTR,HALL event triggered by software" "0,1"
|
|
bitfld.long 0x8 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x8 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0xC "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0xC 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0xC 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0xC 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "CCTRL,Channel control register"
|
|
bitfld.long 0x0 3. "C1CP,Channel 1 complementary polarity" "0,1"
|
|
bitfld.long 0x0 2. "C1CEN,Channel 1 complementary enable" "0,1"
|
|
bitfld.long 0x0 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x4 "CVAL,Counter value"
|
|
hexmask.long.word 0x4 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0x8 "DIV,Divider value"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Divider value"
|
|
line.long 0xC "PR,Period value"
|
|
hexmask.long.word 0xC 0.--15. 1. "PR,Period value"
|
|
line.long 0x10 "RPR,Repetition of period value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "RPR,Repetition of period value"
|
|
line.long 0x14 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x14 0.--15. 1. "C1DT,Channel 1 data register"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "BRK,Brake register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,brake input filter"
|
|
bitfld.long 0x0 15. "OEN,Output enable" "0,1"
|
|
bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x0 13. "BRKV,Brake input validity" "0,1"
|
|
bitfld.long 0x0 12. "BRKEN,Brake enable" "0,1"
|
|
bitfld.long 0x0 11. "FCSOEN,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 10. "FCSODIS,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 8.--9. "WPC,Write protected configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTC,Dead-time configuration"
|
|
line.long 0x4 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x4 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x8 "DMADT,DMA data register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DMADT,DMA data register"
|
|
tree.end
|
|
tree "TMR11 (General purpose timer)"
|
|
base ad:0x40014800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode selection" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 9. "C1CIOS,Channel 1 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 8. "C1IOS,Channel 1 idle output state" "0,1"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
bitfld.long 0x4 2. "CCFS,Channel control bit flash select" "0,1"
|
|
bitfld.long 0x4 0. "CBCTRL,Channel buffer control" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0x0 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0x0 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0x0 7. "BRKIE,Brake interrupt enable" "0,1"
|
|
bitfld.long 0x0 5. "HALLIEN,HALL interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "C1IEN,Channel 1 interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x4 "ISTS,Interrupt status register"
|
|
bitfld.long 0x4 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x4 7. "BRKIF,Brake interrupt flag" "0,1"
|
|
bitfld.long 0x4 5. "HALLIF,HALL interrupt flag" "0,1"
|
|
bitfld.long 0x4 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x4 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x8 "SWEVT,Software event register"
|
|
bitfld.long 0x8 7. "BRKSWTR,Brake event triggered by software" "0,1"
|
|
bitfld.long 0x8 5. "HALLSWTR,HALL event triggered by software" "0,1"
|
|
bitfld.long 0x8 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x8 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0xC "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0xC 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0xC 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0xC 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "CCTRL,Channel control register"
|
|
bitfld.long 0x0 3. "C1CP,Channel 1 complementary polarity" "0,1"
|
|
bitfld.long 0x0 2. "C1CEN,Channel 1 complementary enable" "0,1"
|
|
bitfld.long 0x0 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x4 "CVAL,Counter value"
|
|
hexmask.long.word 0x4 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0x8 "DIV,Divider value"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Divider value"
|
|
line.long 0xC "PR,Period value"
|
|
hexmask.long.word 0xC 0.--15. 1. "PR,Period value"
|
|
line.long 0x10 "RPR,Repetition of period value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "RPR,Repetition of period value"
|
|
line.long 0x14 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x14 0.--15. 1. "C1DT,Channel 1 data register"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "BRK,Brake register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,brake input filter"
|
|
bitfld.long 0x0 15. "OEN,Output enable" "0,1"
|
|
bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x0 13. "BRKV,Brake input validity" "0,1"
|
|
bitfld.long 0x0 12. "BRKEN,Brake enable" "0,1"
|
|
bitfld.long 0x0 11. "FCSOEN,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 10. "FCSODIS,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 8.--9. "WPC,Write protected configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTC,Dead-time configuration"
|
|
line.long 0x4 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x4 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x8 "DMADT,DMA data register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DMADT,DMA data register"
|
|
tree.end
|
|
tree "TMR12 (General purpose timer)"
|
|
base ad:0x40001800
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode selection" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 11. "C2CIOS,Channel 2 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 10. "C2IOS,Channel 2 idle output state" "0,1"
|
|
bitfld.long 0x4 9. "C1CIOS,Channel 1 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 8. "C1IOS,Channel 1 idle output state" "0,1"
|
|
bitfld.long 0x4 4.--6. "PTOS,Primary TMR output selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
bitfld.long 0x4 2. "CCFS,Channel control bit flash select" "0,1"
|
|
bitfld.long 0x4 0. "CBCTRL,Channel buffer control" "0,1"
|
|
line.long 0x8 "STCTRL,Subordinate TMR control register"
|
|
bitfld.long 0x8 7. "STS,Subordinate TMR synchronization" "0,1"
|
|
bitfld.long 0x8 4.--6. "STIS,Subordinate TMR input selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "SMSEL,Subordinate TMR mode selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0xC 14. "TDEN,Trigger DMA request enable" "0,1"
|
|
bitfld.long 0xC 13. "HALLDE,HALL DMA request enable" "0,1"
|
|
bitfld.long 0xC 10. "C2DEN,Channel 2 DMA request" "0,1"
|
|
bitfld.long 0xC 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0xC 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0xC 7. "BRKIE,Brake interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TIEN,Trigger interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "HALLIEN,HALL interrupt enable" "0,1"
|
|
bitfld.long 0xC 2. "C2IEN,Channel 2 interrupt" "0,1"
|
|
bitfld.long 0xC 1. "C1IEN,Channel 1 interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x10 "ISTS,Interrupt status register"
|
|
bitfld.long 0x10 10. "C2RF,Channel 2 recapture flag" "0,1"
|
|
bitfld.long 0x10 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x10 7. "BRKIF,Brake interrupt flag" "0,1"
|
|
bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1"
|
|
bitfld.long 0x10 5. "HALLIF,HALL interrupt flag" "0,1"
|
|
bitfld.long 0x10 2. "C2IF,Channel 2 interrupt flag" "0,1"
|
|
bitfld.long 0x10 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x10 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x14 "SWEVT,Software event register"
|
|
bitfld.long 0x14 7. "BRKSWTR,Brake event triggered by software" "0,1"
|
|
bitfld.long 0x14 6. "TRGSWTR,Trigger event triggered by software" "0,1"
|
|
bitfld.long 0x14 5. "HALLSWTR,HALL event triggered by software" "0,1"
|
|
bitfld.long 0x14 2. "C2SWTR,Channel 2 event triggered by software" "0,1"
|
|
bitfld.long 0x14 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x14 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0x18 "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0x18 12.--14. "C2OCTRL,Channel 2 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 11. "C2OBEN,Channel 2 output buffer enable" "0,1"
|
|
bitfld.long 0x18 10. "C2OIEN,Channel 2 output immediately enable" "0,1"
|
|
bitfld.long 0x18 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
bitfld.long 0x18 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0x18 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0x18 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "C2DF,Channel 2 digital filter"
|
|
bitfld.long 0x0 10.--11. "C2IDIV,Channel 2 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "C2C,Channel 2 configure" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x20++0x1B
|
|
line.long 0x0 "CCTRL,Channel control"
|
|
bitfld.long 0x0 7. "C2CP,Channel 2 complementary polarity" "0,1"
|
|
bitfld.long 0x0 6. "C2CEN,Channel 2 complementary enable" "0,1"
|
|
bitfld.long 0x0 5. "C2P,Channel 2 Polarity" "0,1"
|
|
bitfld.long 0x0 4. "C2EN,Channel 2 enable" "0,1"
|
|
bitfld.long 0x0 3. "C1CP,Channel 1 complementary polarity" "0,1"
|
|
bitfld.long 0x0 2. "C1CEN,Channel 1 complementary enable" "0,1"
|
|
bitfld.long 0x0 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x4 "CVAL,Counter value"
|
|
hexmask.long.word 0x4 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0x8 "DIV,Divider value"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Divider value"
|
|
line.long 0xC "PR,Period value"
|
|
hexmask.long.word 0xC 0.--15. 1. "PR,Period value"
|
|
line.long 0x10 "RPR,Repetition of period value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "RPR,Repetition of period value"
|
|
line.long 0x14 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x14 0.--15. 1. "C1DT,Channel 1 data register"
|
|
line.long 0x18 "C2DT,Channel 2 data register"
|
|
hexmask.long.word 0x18 0.--15. 1. "C2DT,Channel 2 data register"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "BRK,Brake register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,brake input filter"
|
|
bitfld.long 0x0 15. "OEN,Output enable" "0,1"
|
|
bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x0 13. "BRKV,Brake input validity" "0,1"
|
|
bitfld.long 0x0 12. "BRKEN,Brake enable" "0,1"
|
|
bitfld.long 0x0 11. "FCSOEN,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 10. "FCSODIS,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 8.--9. "WPC,Write protected configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTC,Dead-time configuration"
|
|
line.long 0x4 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x4 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x8 "DMADT,DMA data register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DMADT,DMA data register"
|
|
tree.end
|
|
tree "TMR13 (General purpose timer)"
|
|
base ad:0x40001C00
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode selection" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 9. "C1CIOS,Channel 1 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 8. "C1IOS,Channel 1 idle output state" "0,1"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
bitfld.long 0x4 2. "CCFS,Channel control bit flash select" "0,1"
|
|
bitfld.long 0x4 0. "CBCTRL,Channel buffer control" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0x0 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0x0 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0x0 7. "BRKIE,Brake interrupt enable" "0,1"
|
|
bitfld.long 0x0 5. "HALLIEN,HALL interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "C1IEN,Channel 1 interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x4 "ISTS,Interrupt status register"
|
|
bitfld.long 0x4 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x4 7. "BRKIF,Brake interrupt flag" "0,1"
|
|
bitfld.long 0x4 5. "HALLIF,HALL interrupt flag" "0,1"
|
|
bitfld.long 0x4 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x4 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x8 "SWEVT,Software event register"
|
|
bitfld.long 0x8 7. "BRKSWTR,Brake event triggered by software" "0,1"
|
|
bitfld.long 0x8 5. "HALLSWTR,HALL event triggered by software" "0,1"
|
|
bitfld.long 0x8 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x8 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0xC "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0xC 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0xC 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0xC 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "CCTRL,Channel control register"
|
|
bitfld.long 0x0 3. "C1CP,Channel 1 complementary polarity" "0,1"
|
|
bitfld.long 0x0 2. "C1CEN,Channel 1 complementary enable" "0,1"
|
|
bitfld.long 0x0 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x4 "CVAL,Counter value"
|
|
hexmask.long.word 0x4 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0x8 "DIV,Divider value"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Divider value"
|
|
line.long 0xC "PR,Period value"
|
|
hexmask.long.word 0xC 0.--15. 1. "PR,Period value"
|
|
line.long 0x10 "RPR,Repetition of period value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "RPR,Repetition of period value"
|
|
line.long 0x14 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x14 0.--15. 1. "C1DT,Channel 1 data register"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "BRK,Brake register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,brake input filter"
|
|
bitfld.long 0x0 15. "OEN,Output enable" "0,1"
|
|
bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x0 13. "BRKV,Brake input validity" "0,1"
|
|
bitfld.long 0x0 12. "BRKEN,Brake enable" "0,1"
|
|
bitfld.long 0x0 11. "FCSOEN,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 10. "FCSODIS,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 8.--9. "WPC,Write protected configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTC,Dead-time configuration"
|
|
line.long 0x4 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x4 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x8 "DMADT,DMA data register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DMADT,DMA data register"
|
|
tree.end
|
|
tree "TMR14 (General purpose timer)"
|
|
base ad:0x40002000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL1,Control register 1"
|
|
bitfld.long 0x0 8.--9. "CLKDIV,Clock divider" "0,1,2,3"
|
|
bitfld.long 0x0 7. "PRBEN,Period buffer enable" "0,1"
|
|
bitfld.long 0x0 5.--6. "TWCMSEL,Two-way count mode selection" "0,1,2,3"
|
|
bitfld.long 0x0 4. "OWCDIR,One-way count direction" "0,1"
|
|
bitfld.long 0x0 3. "OCMEN,One cycle mode enable" "0,1"
|
|
bitfld.long 0x0 2. "OVFS,Overflow event source" "0,1"
|
|
bitfld.long 0x0 1. "OVFEN,Overflow event enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TMREN,TMR enable" "0,1"
|
|
line.long 0x4 "CTRL2,Control register 2"
|
|
bitfld.long 0x4 9. "C1CIOS,Channel 1 complementary idle output state" "0,1"
|
|
bitfld.long 0x4 8. "C1IOS,Channel 1 idle output state" "0,1"
|
|
bitfld.long 0x4 3. "DRS,DMA request source" "0,1"
|
|
bitfld.long 0x4 2. "CCFS,Channel control bit flash select" "0,1"
|
|
bitfld.long 0x4 0. "CBCTRL,Channel buffer control" "0,1"
|
|
group.long 0xC++0xF
|
|
line.long 0x0 "IDEN,Interrupt/DMA enable register"
|
|
bitfld.long 0x0 9. "C1DEN,Channel 1 DMA request" "0,1"
|
|
bitfld.long 0x0 8. "OVFDEN,Overflow DMA request enable" "0,1"
|
|
bitfld.long 0x0 7. "BRKIE,Brake interrupt enable" "0,1"
|
|
bitfld.long 0x0 5. "HALLIEN,HALL interrupt enable" "0,1"
|
|
bitfld.long 0x0 1. "C1IEN,Channel 1 interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "OVFIEN,Overflow interrupt enable" "0,1"
|
|
line.long 0x4 "ISTS,Interrupt status register"
|
|
bitfld.long 0x4 9. "C1RF,Channel 1 recapture flag" "0,1"
|
|
bitfld.long 0x4 7. "BRKIF,Brake interrupt flag" "0,1"
|
|
bitfld.long 0x4 5. "HALLIF,HALL interrupt flag" "0,1"
|
|
bitfld.long 0x4 1. "C1IF,Channel 1 interrupt flag" "0,1"
|
|
bitfld.long 0x4 0. "OVFIF,Overflow interrupt flag" "0,1"
|
|
line.long 0x8 "SWEVT,Software event register"
|
|
bitfld.long 0x8 7. "BRKSWTR,Brake event triggered by software" "0,1"
|
|
bitfld.long 0x8 5. "HALLSWTR,HALL event triggered by software" "0,1"
|
|
bitfld.long 0x8 1. "C1SWTR,Channel 1 event triggered by software" "0,1"
|
|
bitfld.long 0x8 0. "OVFSWTR,Overflow event triggered by software" "0,1"
|
|
line.long 0xC "CM1_OUTPUT,Channel output mode register"
|
|
bitfld.long 0xC 4.--6. "C1OCTRL,Channel 1 output control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3. "C1OBEN,Channel 1 output buffer enable" "0,1"
|
|
bitfld.long 0xC 2. "C1OIEN,Channel 1 output immediately enable" "0,1"
|
|
bitfld.long 0xC 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CM1_INPUT,Channel input mode register 1"
|
|
hexmask.long.byte 0x0 4.--7. 1. "C1DF,Channel 1 digital filter"
|
|
bitfld.long 0x0 2.--3. "C1IDIV,Channel 1 input divider" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "C1C,Channel 1 configure" "0,1,2,3"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "CCTRL,Channel control register"
|
|
bitfld.long 0x0 3. "C1CP,Channel 1 complementary polarity" "0,1"
|
|
bitfld.long 0x0 2. "C1CEN,Channel 1 complementary enable" "0,1"
|
|
bitfld.long 0x0 1. "C1P,Channel 1 Polarity" "0,1"
|
|
bitfld.long 0x0 0. "C1EN,Channel 1 enable" "0,1"
|
|
line.long 0x4 "CVAL,Counter value"
|
|
hexmask.long.word 0x4 0.--15. 1. "CVAL,Counter value"
|
|
line.long 0x8 "DIV,Divider value"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Divider value"
|
|
line.long 0xC "PR,Period value"
|
|
hexmask.long.word 0xC 0.--15. 1. "PR,Period value"
|
|
line.long 0x10 "RPR,Repetition of period value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "RPR,Repetition of period value"
|
|
line.long 0x14 "C1DT,Channel 1 data register"
|
|
hexmask.long.word 0x14 0.--15. 1. "C1DT,Channel 1 data register"
|
|
group.long 0x44++0xF
|
|
line.long 0x0 "BRK,Brake register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,brake input filter"
|
|
bitfld.long 0x0 15. "OEN,Output enable" "0,1"
|
|
bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1"
|
|
bitfld.long 0x0 13. "BRKV,Brake input validity" "0,1"
|
|
bitfld.long 0x0 12. "BRKEN,Brake enable" "0,1"
|
|
bitfld.long 0x0 11. "FCSOEN,Frozen channel status when" "0,1"
|
|
bitfld.long 0x0 10. "FCSODIS,Frozen channel status when" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "WPC,Write protected configuration" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTC,Dead-time configuration"
|
|
line.long 0x4 "DMACTRL,DMA control register"
|
|
hexmask.long.byte 0x4 8.--12. 1. "DTB,DMA transfer bytes"
|
|
hexmask.long.byte 0x4 0.--4. 1. "ADDR,DMA transfer address offset"
|
|
line.long 0x8 "DMADT,DMA data register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DMADT,DMA data register"
|
|
line.long 0xC "RMP,TMR14 channel 1 input remap"
|
|
bitfld.long 0xC 6.--7. "TMR14_CH1_IRMP,TMR14 channel 1 input remap" "0,1,2,3"
|
|
tree.end
|
|
tree.end
|
|
tree "USART (Universal Synchronous/Asynchronous Receiver/Transmitter)"
|
|
base ad:0x0
|
|
tree "USART1"
|
|
base ad:0x40011000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "STS,Status register"
|
|
rbitfld.long 0x0 22. "RXON,Receiver enabled flag" "0,1"
|
|
rbitfld.long 0x0 21. "TXON,Transmitter enabled flag" "0,1"
|
|
rbitfld.long 0x0 20. "LPWUF,Low power wakeup flag" "0,1"
|
|
rbitfld.long 0x0 17. "CMDF,Character match detect flag" "0,1"
|
|
rbitfld.long 0x0 16. "OCCUPY,Receiver occupied flag" "0,1"
|
|
rbitfld.long 0x0 11. "RTODF,Receiver time out detection flag" "0,1"
|
|
bitfld.long 0x0 9. "CTSCF,CTS change flag" "0,1"
|
|
bitfld.long 0x0 8. "BFF,Break frame flag" "0,1"
|
|
rbitfld.long 0x0 7. "TDBE,Transmit data buffer empty" "0,1"
|
|
bitfld.long 0x0 6. "TDC,Transmit data complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RDBF,Receive data buffer full" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEF,IDLE flag" "0,1"
|
|
rbitfld.long 0x0 3. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x0 2. "NERR,Noise error" "0,1"
|
|
rbitfld.long 0x0 1. "FERR,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PERR,Parity error" "0,1"
|
|
line.long 0x4 "DT,Data register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DT,Data value"
|
|
line.long 0x8 "BAUDR,Baud rate register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Division"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 28. "DBN1,high bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 27. "RTODEN,Receiver time out detection enable" "0,1"
|
|
bitfld.long 0xC 26. "RETODIE,Receiver time out detection interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 21.--25. 1. "TSDT,transmit start delay time"
|
|
hexmask.long.byte 0xC 16.--20. 1. "TCDT,transmit complete delay time"
|
|
bitfld.long 0xC 14. "CMDIE,Character match detection interrupt enable" "0,1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBN0,low bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 11. "WUM,Wake up mode" "0,1"
|
|
bitfld.long 0xC 10. "PEN,Parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PSEL,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PERRIEN,PERR interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TDBEIEN,TDBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TDCIEN,TDC interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RDBFIEN,RDBF interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0xC 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RM,Receiver mute" "0,1"
|
|
bitfld.long 0xC 0. "SBF,Send break frame" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
hexmask.long.byte 0x10 28.--31. 1. "IDH,bit 7-4 for usart identification"
|
|
bitfld.long 0x10 19. "MTF,MSB transmit first" "0,1"
|
|
bitfld.long 0x10 18. "DTREV,DT register polarity reverse" "0,1"
|
|
bitfld.long 0x10 17. "TXREV,TX polarity reverse" "0,1"
|
|
bitfld.long 0x10 16. "RXREV,RX polarity reverse" "0,1"
|
|
bitfld.long 0x10 15. "TRPSWAP,Transmit receive pin swap" "0,1"
|
|
bitfld.long 0x10 14. "LINEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPBN,STOP bit num" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CLKPOL,Clock polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "CLKPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCP,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "BFIEN,Break frame interrupt enable" "0,1"
|
|
bitfld.long 0x10 5. "BFBN,Break frame bit num" "0,1"
|
|
bitfld.long 0x10 4. "IDBN,Identification bit num" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IDL,bit 3-0 for usart identification"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 16.--17. "LPWUM,Low power wakeup method" "0,1,2,3"
|
|
bitfld.long 0x14 15. "DEP,DE polarity selection" "0,1"
|
|
bitfld.long 0x14 14. "RS485EN,RS485 enable" "0,1"
|
|
bitfld.long 0x14 13. "LPWUFIE,Low power wakeup flag interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "SMUSEN,Deepsleep mode usart enable" "0,1"
|
|
bitfld.long 0x14 10. "CTSCFIEN,CTSCF interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATEN,DMA transmitter enable" "0,1"
|
|
bitfld.long 0x14 6. "DMAREN,DMA receiver enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "SCMEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x14 2. "IRDALP,IrDA low-power mode" "0,1"
|
|
bitfld.long 0x14 1. "IRDAEN,IrDA enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GDIV,Guard time and division register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "SCGT,Smart card guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "ISDIV,IrDA/smartcard division value"
|
|
line.long 0x1C "RTOV,Receiver time out value register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. "RTOV,Receiver time out value"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "IFC,Interrupt flag clear register"
|
|
bitfld.long 0x0 20. "LPWUFC,Low power wake up flag clear" "0,1"
|
|
bitfld.long 0x0 17. "CMDFC,Character match flag clear" "0,1"
|
|
bitfld.long 0x0 11. "RTODFC,Receiver time out detection flag clear" "0,1"
|
|
tree.end
|
|
tree "USART2"
|
|
base ad:0x40004400
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "STS,Status register"
|
|
rbitfld.long 0x0 22. "RXON,Receiver enabled flag" "0,1"
|
|
rbitfld.long 0x0 21. "TXON,Transmitter enabled flag" "0,1"
|
|
rbitfld.long 0x0 20. "LPWUF,Low power wakeup flag" "0,1"
|
|
rbitfld.long 0x0 17. "CMDF,Character match detect flag" "0,1"
|
|
rbitfld.long 0x0 16. "OCCUPY,Receiver occupied flag" "0,1"
|
|
rbitfld.long 0x0 11. "RTODF,Receiver time out detection flag" "0,1"
|
|
bitfld.long 0x0 9. "CTSCF,CTS change flag" "0,1"
|
|
bitfld.long 0x0 8. "BFF,Break frame flag" "0,1"
|
|
rbitfld.long 0x0 7. "TDBE,Transmit data buffer empty" "0,1"
|
|
bitfld.long 0x0 6. "TDC,Transmit data complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RDBF,Receive data buffer full" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEF,IDLE flag" "0,1"
|
|
rbitfld.long 0x0 3. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x0 2. "NERR,Noise error" "0,1"
|
|
rbitfld.long 0x0 1. "FERR,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PERR,Parity error" "0,1"
|
|
line.long 0x4 "DT,Data register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DT,Data value"
|
|
line.long 0x8 "BAUDR,Baud rate register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Division"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 28. "DBN1,high bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 27. "RTODEN,Receiver time out detection enable" "0,1"
|
|
bitfld.long 0xC 26. "RETODIE,Receiver time out detection interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 21.--25. 1. "TSDT,transmit start delay time"
|
|
hexmask.long.byte 0xC 16.--20. 1. "TCDT,transmit complete delay time"
|
|
bitfld.long 0xC 14. "CMDIE,Character match detection interrupt enable" "0,1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBN0,low bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 11. "WUM,Wake up mode" "0,1"
|
|
bitfld.long 0xC 10. "PEN,Parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PSEL,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PERRIEN,PERR interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TDBEIEN,TDBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TDCIEN,TDC interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RDBFIEN,RDBF interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0xC 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RM,Receiver mute" "0,1"
|
|
bitfld.long 0xC 0. "SBF,Send break frame" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
hexmask.long.byte 0x10 28.--31. 1. "IDH,bit 7-4 for usart identification"
|
|
bitfld.long 0x10 19. "MTF,MSB transmit first" "0,1"
|
|
bitfld.long 0x10 18. "DTREV,DT register polarity reverse" "0,1"
|
|
bitfld.long 0x10 17. "TXREV,TX polarity reverse" "0,1"
|
|
bitfld.long 0x10 16. "RXREV,RX polarity reverse" "0,1"
|
|
bitfld.long 0x10 15. "TRPSWAP,Transmit receive pin swap" "0,1"
|
|
bitfld.long 0x10 14. "LINEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPBN,STOP bit num" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CLKPOL,Clock polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "CLKPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCP,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "BFIEN,Break frame interrupt enable" "0,1"
|
|
bitfld.long 0x10 5. "BFBN,Break frame bit num" "0,1"
|
|
bitfld.long 0x10 4. "IDBN,Identification bit num" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IDL,bit 3-0 for usart identification"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 16.--17. "LPWUM,Low power wakeup method" "0,1,2,3"
|
|
bitfld.long 0x14 15. "DEP,DE polarity selection" "0,1"
|
|
bitfld.long 0x14 14. "RS485EN,RS485 enable" "0,1"
|
|
bitfld.long 0x14 13. "LPWUFIE,Low power wakeup flag interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "SMUSEN,Deepsleep mode usart enable" "0,1"
|
|
bitfld.long 0x14 10. "CTSCFIEN,CTSCF interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATEN,DMA transmitter enable" "0,1"
|
|
bitfld.long 0x14 6. "DMAREN,DMA receiver enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "SCMEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x14 2. "IRDALP,IrDA low-power mode" "0,1"
|
|
bitfld.long 0x14 1. "IRDAEN,IrDA enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GDIV,Guard time and division register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "SCGT,Smart card guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "ISDIV,IrDA/smartcard division value"
|
|
line.long 0x1C "RTOV,Receiver time out value register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. "RTOV,Receiver time out value"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "IFC,Interrupt flag clear register"
|
|
bitfld.long 0x0 20. "LPWUFC,Low power wake up flag clear" "0,1"
|
|
bitfld.long 0x0 17. "CMDFC,Character match flag clear" "0,1"
|
|
bitfld.long 0x0 11. "RTODFC,Receiver time out detection flag clear" "0,1"
|
|
tree.end
|
|
tree "USART3"
|
|
base ad:0x40004800
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "STS,Status register"
|
|
rbitfld.long 0x0 22. "RXON,Receiver enabled flag" "0,1"
|
|
rbitfld.long 0x0 21. "TXON,Transmitter enabled flag" "0,1"
|
|
rbitfld.long 0x0 20. "LPWUF,Low power wakeup flag" "0,1"
|
|
rbitfld.long 0x0 17. "CMDF,Character match detect flag" "0,1"
|
|
rbitfld.long 0x0 16. "OCCUPY,Receiver occupied flag" "0,1"
|
|
rbitfld.long 0x0 11. "RTODF,Receiver time out detection flag" "0,1"
|
|
bitfld.long 0x0 9. "CTSCF,CTS change flag" "0,1"
|
|
bitfld.long 0x0 8. "BFF,Break frame flag" "0,1"
|
|
rbitfld.long 0x0 7. "TDBE,Transmit data buffer empty" "0,1"
|
|
bitfld.long 0x0 6. "TDC,Transmit data complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RDBF,Receive data buffer full" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEF,IDLE flag" "0,1"
|
|
rbitfld.long 0x0 3. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x0 2. "NERR,Noise error" "0,1"
|
|
rbitfld.long 0x0 1. "FERR,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PERR,Parity error" "0,1"
|
|
line.long 0x4 "DT,Data register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DT,Data value"
|
|
line.long 0x8 "BAUDR,Baud rate register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Division"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 28. "DBN1,high bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 27. "RTODEN,Receiver time out detection enable" "0,1"
|
|
bitfld.long 0xC 26. "RETODIE,Receiver time out detection interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 21.--25. 1. "TSDT,transmit start delay time"
|
|
hexmask.long.byte 0xC 16.--20. 1. "TCDT,transmit complete delay time"
|
|
bitfld.long 0xC 14. "CMDIE,Character match detection interrupt enable" "0,1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBN0,low bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 11. "WUM,Wake up mode" "0,1"
|
|
bitfld.long 0xC 10. "PEN,Parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PSEL,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PERRIEN,PERR interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TDBEIEN,TDBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TDCIEN,TDC interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RDBFIEN,RDBF interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0xC 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RM,Receiver mute" "0,1"
|
|
bitfld.long 0xC 0. "SBF,Send break frame" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
hexmask.long.byte 0x10 28.--31. 1. "IDH,bit 7-4 for usart identification"
|
|
bitfld.long 0x10 19. "MTF,MSB transmit first" "0,1"
|
|
bitfld.long 0x10 18. "DTREV,DT register polarity reverse" "0,1"
|
|
bitfld.long 0x10 17. "TXREV,TX polarity reverse" "0,1"
|
|
bitfld.long 0x10 16. "RXREV,RX polarity reverse" "0,1"
|
|
bitfld.long 0x10 15. "TRPSWAP,Transmit receive pin swap" "0,1"
|
|
bitfld.long 0x10 14. "LINEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPBN,STOP bit num" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CLKPOL,Clock polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "CLKPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCP,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "BFIEN,Break frame interrupt enable" "0,1"
|
|
bitfld.long 0x10 5. "BFBN,Break frame bit num" "0,1"
|
|
bitfld.long 0x10 4. "IDBN,Identification bit num" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IDL,bit 3-0 for usart identification"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 16.--17. "LPWUM,Low power wakeup method" "0,1,2,3"
|
|
bitfld.long 0x14 15. "DEP,DE polarity selection" "0,1"
|
|
bitfld.long 0x14 14. "RS485EN,RS485 enable" "0,1"
|
|
bitfld.long 0x14 13. "LPWUFIE,Low power wakeup flag interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "SMUSEN,Deepsleep mode usart enable" "0,1"
|
|
bitfld.long 0x14 10. "CTSCFIEN,CTSCF interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATEN,DMA transmitter enable" "0,1"
|
|
bitfld.long 0x14 6. "DMAREN,DMA receiver enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "SCMEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x14 2. "IRDALP,IrDA low-power mode" "0,1"
|
|
bitfld.long 0x14 1. "IRDAEN,IrDA enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GDIV,Guard time and division register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "SCGT,Smart card guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "ISDIV,IrDA/smartcard division value"
|
|
line.long 0x1C "RTOV,Receiver time out value register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. "RTOV,Receiver time out value"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "IFC,Interrupt flag clear register"
|
|
bitfld.long 0x0 20. "LPWUFC,Low power wake up flag clear" "0,1"
|
|
bitfld.long 0x0 17. "CMDFC,Character match flag clear" "0,1"
|
|
bitfld.long 0x0 11. "RTODFC,Receiver time out detection flag clear" "0,1"
|
|
tree.end
|
|
tree "USART4"
|
|
base ad:0x40004C00
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "STS,Status register"
|
|
rbitfld.long 0x0 22. "RXON,Receiver enabled flag" "0,1"
|
|
rbitfld.long 0x0 21. "TXON,Transmitter enabled flag" "0,1"
|
|
rbitfld.long 0x0 20. "LPWUF,Low power wakeup flag" "0,1"
|
|
rbitfld.long 0x0 17. "CMDF,Character match detect flag" "0,1"
|
|
rbitfld.long 0x0 16. "OCCUPY,Receiver occupied flag" "0,1"
|
|
rbitfld.long 0x0 11. "RTODF,Receiver time out detection flag" "0,1"
|
|
bitfld.long 0x0 9. "CTSCF,CTS change flag" "0,1"
|
|
bitfld.long 0x0 8. "BFF,Break frame flag" "0,1"
|
|
rbitfld.long 0x0 7. "TDBE,Transmit data buffer empty" "0,1"
|
|
bitfld.long 0x0 6. "TDC,Transmit data complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RDBF,Receive data buffer full" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEF,IDLE flag" "0,1"
|
|
rbitfld.long 0x0 3. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x0 2. "NERR,Noise error" "0,1"
|
|
rbitfld.long 0x0 1. "FERR,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PERR,Parity error" "0,1"
|
|
line.long 0x4 "DT,Data register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DT,Data value"
|
|
line.long 0x8 "BAUDR,Baud rate register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Division"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 28. "DBN1,high bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 27. "RTODEN,Receiver time out detection enable" "0,1"
|
|
bitfld.long 0xC 26. "RETODIE,Receiver time out detection interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 21.--25. 1. "TSDT,transmit start delay time"
|
|
hexmask.long.byte 0xC 16.--20. 1. "TCDT,transmit complete delay time"
|
|
bitfld.long 0xC 14. "CMDIE,Character match detection interrupt enable" "0,1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBN0,low bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 11. "WUM,Wake up mode" "0,1"
|
|
bitfld.long 0xC 10. "PEN,Parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PSEL,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PERRIEN,PERR interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TDBEIEN,TDBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TDCIEN,TDC interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RDBFIEN,RDBF interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0xC 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RM,Receiver mute" "0,1"
|
|
bitfld.long 0xC 0. "SBF,Send break frame" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
hexmask.long.byte 0x10 28.--31. 1. "IDH,bit 7-4 for usart identification"
|
|
bitfld.long 0x10 19. "MTF,MSB transmit first" "0,1"
|
|
bitfld.long 0x10 18. "DTREV,DT register polarity reverse" "0,1"
|
|
bitfld.long 0x10 17. "TXREV,TX polarity reverse" "0,1"
|
|
bitfld.long 0x10 16. "RXREV,RX polarity reverse" "0,1"
|
|
bitfld.long 0x10 15. "TRPSWAP,Transmit receive pin swap" "0,1"
|
|
bitfld.long 0x10 14. "LINEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPBN,STOP bit num" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CLKPOL,Clock polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "CLKPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCP,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "BFIEN,Break frame interrupt enable" "0,1"
|
|
bitfld.long 0x10 5. "BFBN,Break frame bit num" "0,1"
|
|
bitfld.long 0x10 4. "IDBN,Identification bit num" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IDL,bit 3-0 for usart identification"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 16.--17. "LPWUM,Low power wakeup method" "0,1,2,3"
|
|
bitfld.long 0x14 15. "DEP,DE polarity selection" "0,1"
|
|
bitfld.long 0x14 14. "RS485EN,RS485 enable" "0,1"
|
|
bitfld.long 0x14 13. "LPWUFIE,Low power wakeup flag interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "SMUSEN,Deepsleep mode usart enable" "0,1"
|
|
bitfld.long 0x14 10. "CTSCFIEN,CTSCF interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATEN,DMA transmitter enable" "0,1"
|
|
bitfld.long 0x14 6. "DMAREN,DMA receiver enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "SCMEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x14 2. "IRDALP,IrDA low-power mode" "0,1"
|
|
bitfld.long 0x14 1. "IRDAEN,IrDA enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GDIV,Guard time and division register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "SCGT,Smart card guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "ISDIV,IrDA/smartcard division value"
|
|
line.long 0x1C "RTOV,Receiver time out value register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. "RTOV,Receiver time out value"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "IFC,Interrupt flag clear register"
|
|
bitfld.long 0x0 20. "LPWUFC,Low power wake up flag clear" "0,1"
|
|
bitfld.long 0x0 17. "CMDFC,Character match flag clear" "0,1"
|
|
bitfld.long 0x0 11. "RTODFC,Receiver time out detection flag clear" "0,1"
|
|
tree.end
|
|
tree "USART5"
|
|
base ad:0x40005000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "STS,Status register"
|
|
rbitfld.long 0x0 22. "RXON,Receiver enabled flag" "0,1"
|
|
rbitfld.long 0x0 21. "TXON,Transmitter enabled flag" "0,1"
|
|
rbitfld.long 0x0 20. "LPWUF,Low power wakeup flag" "0,1"
|
|
rbitfld.long 0x0 17. "CMDF,Character match detect flag" "0,1"
|
|
rbitfld.long 0x0 16. "OCCUPY,Receiver occupied flag" "0,1"
|
|
rbitfld.long 0x0 11. "RTODF,Receiver time out detection flag" "0,1"
|
|
bitfld.long 0x0 9. "CTSCF,CTS change flag" "0,1"
|
|
bitfld.long 0x0 8. "BFF,Break frame flag" "0,1"
|
|
rbitfld.long 0x0 7. "TDBE,Transmit data buffer empty" "0,1"
|
|
bitfld.long 0x0 6. "TDC,Transmit data complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RDBF,Receive data buffer full" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEF,IDLE flag" "0,1"
|
|
rbitfld.long 0x0 3. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x0 2. "NERR,Noise error" "0,1"
|
|
rbitfld.long 0x0 1. "FERR,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PERR,Parity error" "0,1"
|
|
line.long 0x4 "DT,Data register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DT,Data value"
|
|
line.long 0x8 "BAUDR,Baud rate register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Division"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 28. "DBN1,high bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 27. "RTODEN,Receiver time out detection enable" "0,1"
|
|
bitfld.long 0xC 26. "RETODIE,Receiver time out detection interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 21.--25. 1. "TSDT,transmit start delay time"
|
|
hexmask.long.byte 0xC 16.--20. 1. "TCDT,transmit complete delay time"
|
|
bitfld.long 0xC 14. "CMDIE,Character match detection interrupt enable" "0,1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBN0,low bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 11. "WUM,Wake up mode" "0,1"
|
|
bitfld.long 0xC 10. "PEN,Parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PSEL,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PERRIEN,PERR interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TDBEIEN,TDBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TDCIEN,TDC interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RDBFIEN,RDBF interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0xC 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RM,Receiver mute" "0,1"
|
|
bitfld.long 0xC 0. "SBF,Send break frame" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
hexmask.long.byte 0x10 28.--31. 1. "IDH,bit 7-4 for usart identification"
|
|
bitfld.long 0x10 19. "MTF,MSB transmit first" "0,1"
|
|
bitfld.long 0x10 18. "DTREV,DT register polarity reverse" "0,1"
|
|
bitfld.long 0x10 17. "TXREV,TX polarity reverse" "0,1"
|
|
bitfld.long 0x10 16. "RXREV,RX polarity reverse" "0,1"
|
|
bitfld.long 0x10 15. "TRPSWAP,Transmit receive pin swap" "0,1"
|
|
bitfld.long 0x10 14. "LINEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPBN,STOP bit num" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CLKPOL,Clock polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "CLKPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCP,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "BFIEN,Break frame interrupt enable" "0,1"
|
|
bitfld.long 0x10 5. "BFBN,Break frame bit num" "0,1"
|
|
bitfld.long 0x10 4. "IDBN,Identification bit num" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IDL,bit 3-0 for usart identification"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 16.--17. "LPWUM,Low power wakeup method" "0,1,2,3"
|
|
bitfld.long 0x14 15. "DEP,DE polarity selection" "0,1"
|
|
bitfld.long 0x14 14. "RS485EN,RS485 enable" "0,1"
|
|
bitfld.long 0x14 13. "LPWUFIE,Low power wakeup flag interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "SMUSEN,Deepsleep mode usart enable" "0,1"
|
|
bitfld.long 0x14 10. "CTSCFIEN,CTSCF interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATEN,DMA transmitter enable" "0,1"
|
|
bitfld.long 0x14 6. "DMAREN,DMA receiver enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "SCMEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x14 2. "IRDALP,IrDA low-power mode" "0,1"
|
|
bitfld.long 0x14 1. "IRDAEN,IrDA enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GDIV,Guard time and division register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "SCGT,Smart card guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "ISDIV,IrDA/smartcard division value"
|
|
line.long 0x1C "RTOV,Receiver time out value register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. "RTOV,Receiver time out value"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "IFC,Interrupt flag clear register"
|
|
bitfld.long 0x0 20. "LPWUFC,Low power wake up flag clear" "0,1"
|
|
bitfld.long 0x0 17. "CMDFC,Character match flag clear" "0,1"
|
|
bitfld.long 0x0 11. "RTODFC,Receiver time out detection flag clear" "0,1"
|
|
tree.end
|
|
tree "USART6"
|
|
base ad:0x40011400
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "STS,Status register"
|
|
rbitfld.long 0x0 22. "RXON,Receiver enabled flag" "0,1"
|
|
rbitfld.long 0x0 21. "TXON,Transmitter enabled flag" "0,1"
|
|
rbitfld.long 0x0 20. "LPWUF,Low power wakeup flag" "0,1"
|
|
rbitfld.long 0x0 17. "CMDF,Character match detect flag" "0,1"
|
|
rbitfld.long 0x0 16. "OCCUPY,Receiver occupied flag" "0,1"
|
|
rbitfld.long 0x0 11. "RTODF,Receiver time out detection flag" "0,1"
|
|
bitfld.long 0x0 9. "CTSCF,CTS change flag" "0,1"
|
|
bitfld.long 0x0 8. "BFF,Break frame flag" "0,1"
|
|
rbitfld.long 0x0 7. "TDBE,Transmit data buffer empty" "0,1"
|
|
bitfld.long 0x0 6. "TDC,Transmit data complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RDBF,Receive data buffer full" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEF,IDLE flag" "0,1"
|
|
rbitfld.long 0x0 3. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x0 2. "NERR,Noise error" "0,1"
|
|
rbitfld.long 0x0 1. "FERR,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PERR,Parity error" "0,1"
|
|
line.long 0x4 "DT,Data register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DT,Data value"
|
|
line.long 0x8 "BAUDR,Baud rate register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Division"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 28. "DBN1,high bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 27. "RTODEN,Receiver time out detection enable" "0,1"
|
|
bitfld.long 0xC 26. "RETODIE,Receiver time out detection interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 21.--25. 1. "TSDT,transmit start delay time"
|
|
hexmask.long.byte 0xC 16.--20. 1. "TCDT,transmit complete delay time"
|
|
bitfld.long 0xC 14. "CMDIE,Character match detection interrupt enable" "0,1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBN0,low bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 11. "WUM,Wake up mode" "0,1"
|
|
bitfld.long 0xC 10. "PEN,Parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PSEL,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PERRIEN,PERR interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TDBEIEN,TDBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TDCIEN,TDC interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RDBFIEN,RDBF interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0xC 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RM,Receiver mute" "0,1"
|
|
bitfld.long 0xC 0. "SBF,Send break frame" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
hexmask.long.byte 0x10 28.--31. 1. "IDH,bit 7-4 for usart identification"
|
|
bitfld.long 0x10 19. "MTF,MSB transmit first" "0,1"
|
|
bitfld.long 0x10 18. "DTREV,DT register polarity reverse" "0,1"
|
|
bitfld.long 0x10 17. "TXREV,TX polarity reverse" "0,1"
|
|
bitfld.long 0x10 16. "RXREV,RX polarity reverse" "0,1"
|
|
bitfld.long 0x10 15. "TRPSWAP,Transmit receive pin swap" "0,1"
|
|
bitfld.long 0x10 14. "LINEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPBN,STOP bit num" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CLKPOL,Clock polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "CLKPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCP,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "BFIEN,Break frame interrupt enable" "0,1"
|
|
bitfld.long 0x10 5. "BFBN,Break frame bit num" "0,1"
|
|
bitfld.long 0x10 4. "IDBN,Identification bit num" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IDL,bit 3-0 for usart identification"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 16.--17. "LPWUM,Low power wakeup method" "0,1,2,3"
|
|
bitfld.long 0x14 15. "DEP,DE polarity selection" "0,1"
|
|
bitfld.long 0x14 14. "RS485EN,RS485 enable" "0,1"
|
|
bitfld.long 0x14 13. "LPWUFIE,Low power wakeup flag interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "SMUSEN,Deepsleep mode usart enable" "0,1"
|
|
bitfld.long 0x14 10. "CTSCFIEN,CTSCF interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATEN,DMA transmitter enable" "0,1"
|
|
bitfld.long 0x14 6. "DMAREN,DMA receiver enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "SCMEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x14 2. "IRDALP,IrDA low-power mode" "0,1"
|
|
bitfld.long 0x14 1. "IRDAEN,IrDA enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GDIV,Guard time and division register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "SCGT,Smart card guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "ISDIV,IrDA/smartcard division value"
|
|
line.long 0x1C "RTOV,Receiver time out value register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. "RTOV,Receiver time out value"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "IFC,Interrupt flag clear register"
|
|
bitfld.long 0x0 20. "LPWUFC,Low power wake up flag clear" "0,1"
|
|
bitfld.long 0x0 17. "CMDFC,Character match flag clear" "0,1"
|
|
bitfld.long 0x0 11. "RTODFC,Receiver time out detection flag clear" "0,1"
|
|
tree.end
|
|
tree "USART7"
|
|
base ad:0x40007800
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "STS,Status register"
|
|
rbitfld.long 0x0 22. "RXON,Receiver enabled flag" "0,1"
|
|
rbitfld.long 0x0 21. "TXON,Transmitter enabled flag" "0,1"
|
|
rbitfld.long 0x0 20. "LPWUF,Low power wakeup flag" "0,1"
|
|
rbitfld.long 0x0 17. "CMDF,Character match detect flag" "0,1"
|
|
rbitfld.long 0x0 16. "OCCUPY,Receiver occupied flag" "0,1"
|
|
rbitfld.long 0x0 11. "RTODF,Receiver time out detection flag" "0,1"
|
|
bitfld.long 0x0 9. "CTSCF,CTS change flag" "0,1"
|
|
bitfld.long 0x0 8. "BFF,Break frame flag" "0,1"
|
|
rbitfld.long 0x0 7. "TDBE,Transmit data buffer empty" "0,1"
|
|
bitfld.long 0x0 6. "TDC,Transmit data complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RDBF,Receive data buffer full" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEF,IDLE flag" "0,1"
|
|
rbitfld.long 0x0 3. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x0 2. "NERR,Noise error" "0,1"
|
|
rbitfld.long 0x0 1. "FERR,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PERR,Parity error" "0,1"
|
|
line.long 0x4 "DT,Data register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DT,Data value"
|
|
line.long 0x8 "BAUDR,Baud rate register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Division"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 28. "DBN1,high bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 27. "RTODEN,Receiver time out detection enable" "0,1"
|
|
bitfld.long 0xC 26. "RETODIE,Receiver time out detection interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 21.--25. 1. "TSDT,transmit start delay time"
|
|
hexmask.long.byte 0xC 16.--20. 1. "TCDT,transmit complete delay time"
|
|
bitfld.long 0xC 14. "CMDIE,Character match detection interrupt enable" "0,1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBN0,low bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 11. "WUM,Wake up mode" "0,1"
|
|
bitfld.long 0xC 10. "PEN,Parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PSEL,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PERRIEN,PERR interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TDBEIEN,TDBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TDCIEN,TDC interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RDBFIEN,RDBF interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0xC 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RM,Receiver mute" "0,1"
|
|
bitfld.long 0xC 0. "SBF,Send break frame" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
hexmask.long.byte 0x10 28.--31. 1. "IDH,bit 7-4 for usart identification"
|
|
bitfld.long 0x10 19. "MTF,MSB transmit first" "0,1"
|
|
bitfld.long 0x10 18. "DTREV,DT register polarity reverse" "0,1"
|
|
bitfld.long 0x10 17. "TXREV,TX polarity reverse" "0,1"
|
|
bitfld.long 0x10 16. "RXREV,RX polarity reverse" "0,1"
|
|
bitfld.long 0x10 15. "TRPSWAP,Transmit receive pin swap" "0,1"
|
|
bitfld.long 0x10 14. "LINEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPBN,STOP bit num" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CLKPOL,Clock polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "CLKPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCP,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "BFIEN,Break frame interrupt enable" "0,1"
|
|
bitfld.long 0x10 5. "BFBN,Break frame bit num" "0,1"
|
|
bitfld.long 0x10 4. "IDBN,Identification bit num" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IDL,bit 3-0 for usart identification"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 16.--17. "LPWUM,Low power wakeup method" "0,1,2,3"
|
|
bitfld.long 0x14 15. "DEP,DE polarity selection" "0,1"
|
|
bitfld.long 0x14 14. "RS485EN,RS485 enable" "0,1"
|
|
bitfld.long 0x14 13. "LPWUFIE,Low power wakeup flag interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "SMUSEN,Deepsleep mode usart enable" "0,1"
|
|
bitfld.long 0x14 10. "CTSCFIEN,CTSCF interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATEN,DMA transmitter enable" "0,1"
|
|
bitfld.long 0x14 6. "DMAREN,DMA receiver enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "SCMEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x14 2. "IRDALP,IrDA low-power mode" "0,1"
|
|
bitfld.long 0x14 1. "IRDAEN,IrDA enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GDIV,Guard time and division register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "SCGT,Smart card guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "ISDIV,IrDA/smartcard division value"
|
|
line.long 0x1C "RTOV,Receiver time out value register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. "RTOV,Receiver time out value"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "IFC,Interrupt flag clear register"
|
|
bitfld.long 0x0 20. "LPWUFC,Low power wake up flag clear" "0,1"
|
|
bitfld.long 0x0 17. "CMDFC,Character match flag clear" "0,1"
|
|
bitfld.long 0x0 11. "RTODFC,Receiver time out detection flag clear" "0,1"
|
|
tree.end
|
|
tree "USART8"
|
|
base ad:0x40007C00
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "STS,Status register"
|
|
rbitfld.long 0x0 22. "RXON,Receiver enabled flag" "0,1"
|
|
rbitfld.long 0x0 21. "TXON,Transmitter enabled flag" "0,1"
|
|
rbitfld.long 0x0 20. "LPWUF,Low power wakeup flag" "0,1"
|
|
rbitfld.long 0x0 17. "CMDF,Character match detect flag" "0,1"
|
|
rbitfld.long 0x0 16. "OCCUPY,Receiver occupied flag" "0,1"
|
|
rbitfld.long 0x0 11. "RTODF,Receiver time out detection flag" "0,1"
|
|
bitfld.long 0x0 9. "CTSCF,CTS change flag" "0,1"
|
|
bitfld.long 0x0 8. "BFF,Break frame flag" "0,1"
|
|
rbitfld.long 0x0 7. "TDBE,Transmit data buffer empty" "0,1"
|
|
bitfld.long 0x0 6. "TDC,Transmit data complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RDBF,Receive data buffer full" "0,1"
|
|
rbitfld.long 0x0 4. "IDLEF,IDLE flag" "0,1"
|
|
rbitfld.long 0x0 3. "ROERR,Receiver overflow error" "0,1"
|
|
rbitfld.long 0x0 2. "NERR,Noise error" "0,1"
|
|
rbitfld.long 0x0 1. "FERR,Framing error" "0,1"
|
|
rbitfld.long 0x0 0. "PERR,Parity error" "0,1"
|
|
line.long 0x4 "DT,Data register"
|
|
hexmask.long.word 0x4 0.--8. 1. "DT,Data value"
|
|
line.long 0x8 "BAUDR,Baud rate register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DIV,Division"
|
|
line.long 0xC "CTRL1,Control register 1"
|
|
bitfld.long 0xC 28. "DBN1,high bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 27. "RTODEN,Receiver time out detection enable" "0,1"
|
|
bitfld.long 0xC 26. "RETODIE,Receiver time out detection interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 21.--25. 1. "TSDT,transmit start delay time"
|
|
hexmask.long.byte 0xC 16.--20. 1. "TCDT,transmit complete delay time"
|
|
bitfld.long 0xC 14. "CMDIE,Character match detection interrupt enable" "0,1"
|
|
bitfld.long 0xC 13. "UEN,USART enable" "0,1"
|
|
bitfld.long 0xC 12. "DBN0,low bit for Data bit num" "0,1"
|
|
bitfld.long 0xC 11. "WUM,Wake up mode" "0,1"
|
|
bitfld.long 0xC 10. "PEN,Parity enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PSEL,Parity selection" "0,1"
|
|
bitfld.long 0xC 8. "PERRIEN,PERR interrupt enable" "0,1"
|
|
bitfld.long 0xC 7. "TDBEIEN,TDBE interrupt enable" "0,1"
|
|
bitfld.long 0xC 6. "TDCIEN,TDC interrupt enable" "0,1"
|
|
bitfld.long 0xC 5. "RDBFIEN,RDBF interrupt enable" "0,1"
|
|
bitfld.long 0xC 4. "IDLEIEN,IDLE interrupt enable" "0,1"
|
|
bitfld.long 0xC 3. "TEN,Transmitter enable" "0,1"
|
|
bitfld.long 0xC 2. "REN,Receiver enable" "0,1"
|
|
bitfld.long 0xC 1. "RM,Receiver mute" "0,1"
|
|
bitfld.long 0xC 0. "SBF,Send break frame" "0,1"
|
|
line.long 0x10 "CTRL2,Control register 2"
|
|
hexmask.long.byte 0x10 28.--31. 1. "IDH,bit 7-4 for usart identification"
|
|
bitfld.long 0x10 19. "MTF,MSB transmit first" "0,1"
|
|
bitfld.long 0x10 18. "DTREV,DT register polarity reverse" "0,1"
|
|
bitfld.long 0x10 17. "TXREV,TX polarity reverse" "0,1"
|
|
bitfld.long 0x10 16. "RXREV,RX polarity reverse" "0,1"
|
|
bitfld.long 0x10 15. "TRPSWAP,Transmit receive pin swap" "0,1"
|
|
bitfld.long 0x10 14. "LINEN,LIN mode enable" "0,1"
|
|
bitfld.long 0x10 12.--13. "STOPBN,STOP bit num" "0,1,2,3"
|
|
bitfld.long 0x10 11. "CLKEN,Clock enable" "0,1"
|
|
bitfld.long 0x10 10. "CLKPOL,Clock polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "CLKPHA,Clock phase" "0,1"
|
|
bitfld.long 0x10 8. "LBCP,Last bit clock pulse" "0,1"
|
|
bitfld.long 0x10 6. "BFIEN,Break frame interrupt enable" "0,1"
|
|
bitfld.long 0x10 5. "BFBN,Break frame bit num" "0,1"
|
|
bitfld.long 0x10 4. "IDBN,Identification bit num" "0,1"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IDL,bit 3-0 for usart identification"
|
|
line.long 0x14 "CTRL3,Control register 3"
|
|
bitfld.long 0x14 16.--17. "LPWUM,Low power wakeup method" "0,1,2,3"
|
|
bitfld.long 0x14 15. "DEP,DE polarity selection" "0,1"
|
|
bitfld.long 0x14 14. "RS485EN,RS485 enable" "0,1"
|
|
bitfld.long 0x14 13. "LPWUFIE,Low power wakeup flag interrupt enable" "0,1"
|
|
bitfld.long 0x14 11. "SMUSEN,Deepsleep mode usart enable" "0,1"
|
|
bitfld.long 0x14 10. "CTSCFIEN,CTSCF interrupt enable" "0,1"
|
|
bitfld.long 0x14 9. "CTSEN,CTS enable" "0,1"
|
|
bitfld.long 0x14 8. "RTSEN,RTS enable" "0,1"
|
|
bitfld.long 0x14 7. "DMATEN,DMA transmitter enable" "0,1"
|
|
bitfld.long 0x14 6. "DMAREN,DMA receiver enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "SCMEN,Smartcard mode enable" "0,1"
|
|
bitfld.long 0x14 4. "SCNACKEN,Smartcard NACK enable" "0,1"
|
|
bitfld.long 0x14 3. "SLBEN,Single line bidirectional half-duplex enable" "0,1"
|
|
bitfld.long 0x14 2. "IRDALP,IrDA low-power mode" "0,1"
|
|
bitfld.long 0x14 1. "IRDAEN,IrDA enable" "0,1"
|
|
bitfld.long 0x14 0. "ERRIEN,Error interrupt enable" "0,1"
|
|
line.long 0x18 "GDIV,Guard time and division register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "SCGT,Smart card guard time value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "ISDIV,IrDA/smartcard division value"
|
|
line.long 0x1C "RTOV,Receiver time out value register"
|
|
hexmask.long.tbyte 0x1C 0.--23. 1. "RTOV,Receiver time out value"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "IFC,Interrupt flag clear register"
|
|
bitfld.long 0x0 20. "LPWUFC,Low power wake up flag clear" "0,1"
|
|
bitfld.long 0x0 17. "CMDFC,Character match flag clear" "0,1"
|
|
bitfld.long 0x0 11. "RTODFC,Receiver time out detection flag clear" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "USB_OTGFS (USB On-The-Go Full Speed)"
|
|
base ad:0x0
|
|
tree "USB_OTGFS_DEVICE"
|
|
base ad:0x50000800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "DCFG,OTGFS device configuration register (OTGFS_DCFG)"
|
|
bitfld.long 0x0 11.--12. "PERFRINT,Periodic frame interval" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--10. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 2. "NZSTSOUTHSHK,Non-zero-length status OUT handshake" "0,1"
|
|
bitfld.long 0x0 0.--1. "DEVSPD,Device speed" "0,1,2,3"
|
|
line.long 0x4 "DCTL,OTGFS device control register (OTGFS_DCTL)"
|
|
bitfld.long 0x4 11. "PWROPRGDNE,Power-on programming done" "0,1"
|
|
bitfld.long 0x4 10. "CGOUTNAK,Clear global OUT NAK" "0,1"
|
|
bitfld.long 0x4 9. "SGOUTNAK,Set global OUT NAK" "0,1"
|
|
bitfld.long 0x4 8. "CGNPINNAK,Clear global IN NAK" "0,1"
|
|
bitfld.long 0x4 7. "SGNPINNAK,Set global IN NAK" "0,1"
|
|
bitfld.long 0x4 4.--6. "TSTCTL,Test control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x4 3. "GOUTNAKSTS,Global OUT NAK status" "0,1"
|
|
rbitfld.long 0x4 2. "GNPINNAKSTS,Global IN NAK status" "0,1"
|
|
bitfld.long 0x4 1. "SFTDISCON,Soft disconnect" "0,1"
|
|
bitfld.long 0x4 0. "RWKUPSIG,Remote wakeup signaling" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "DSTS,OTGFS device status register (OTGFS_DSTS)"
|
|
hexmask.long.word 0x0 8.--21. 1. "SOFFN,Frame number of the received SOF"
|
|
bitfld.long 0x0 3. "ETICERR,Erratic error" "0,1"
|
|
bitfld.long 0x0 1.--2. "ENUMSPD,Enumerated speed" "0,1,2,3"
|
|
bitfld.long 0x0 0. "SUSPSTS,Suspend status" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "DIEPMSK,OTGFS device IN endpoint common interrupt mask register (OTGFS_DIEPMSK)"
|
|
bitfld.long 0x0 9. "BNAINMSK,BNA interrupt mask" "0,1"
|
|
bitfld.long 0x0 8. "TXFIFOUDRMSK,FIFO underrun mask" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAKMSK,IN endpoint NAK effective mask" "0,1"
|
|
bitfld.long 0x0 5. "INTKNEPTMISMSK,IN token received with EP mismatch mask" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMPMSK,IN token received when TxFIFO empty mask" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUTMSK,Timeout condition mask (Non-isochronous endpoints)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EPTDISMSK,Endpoint disabled interrupt mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed interrupt mask" "0,1"
|
|
line.long 0x4 "DOEPMSK,OTGFS device OUT endpoint common interrupt mask register (OTGFS_DOEPMSK)"
|
|
bitfld.long 0x4 9. "BNAOUTMSK,BNA interrupt mask" "0,1"
|
|
bitfld.long 0x4 8. "OUTPERRMSK,OUT packet error mask" "0,1"
|
|
bitfld.long 0x4 6. "B2BSETUPMSK,Back-to-back SETUP packets received mask" "0,1"
|
|
bitfld.long 0x4 4. "OUTTEPDMSK,OUT token received when endpoint disabled mask" "0,1"
|
|
bitfld.long 0x4 3. "SETUPMSK,SETUP phase done mask" "0,1"
|
|
bitfld.long 0x4 1. "EPTDISMSK,Endpoint disabled interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "XFERCMSK,Transfer completed interrupt mask" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "DAINT,OTGFS device all endpoints interrupt register (OTGFS_DAINT)"
|
|
hexmask.long.word 0x0 16.--31. 1. "OUTEPTINT,OUT endpoint interrupt"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTINT,IN endpoint interrupt bits"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "DAINTMSK,OTGFS all endpoints interrupt mask register (OTGFS_DAINTMSK)"
|
|
hexmask.long.word 0x0 16.--31. 1. "OUTEPTMSK,OUT endpoint interrupt"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTMSK,IN EP interrupt mask bits"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "DIEPEMPMSK,OTGFS device IN endpoint FIFO empty interrupt mask register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFEMSK,IN EP Tx FIFO empty interrupt mask bits"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "DIEPCTL0,OTGFS device control IN endpoint 0 control register (OTGFS_DIEPCTL0)"
|
|
rbitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
rbitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
bitfld.long 0x0 0.--1. "MPS,Maximum packet size" "0,1,2,3"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "DIEPCTL1,OTGFS device IN endpoint-1 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 29. "SETD1PID,Set DATA1 PID" "0,1"
|
|
bitfld.long 0x0 28. "SETD0PID,Set DATA0 PID" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint Data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "DIEPCTL2,OTGFS device IN endpoint-2 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 29. "SETD1PID,Set DATA1 PID" "0,1"
|
|
bitfld.long 0x0 28. "SETD0PID,Set DATA0 PID" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint Data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x160++0x3
|
|
line.long 0x0 "DIEPCTL3,OTGFS device IN endpoint-3 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 29. "SETD1PID,Set DATA1 PID" "0,1"
|
|
bitfld.long 0x0 28. "SETD0PID,Set DATA0 PID" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint Data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "DIEPCTL4,OTGFS device IN endpoint-4 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 29. "SETD1PID,Set DATA1 PID" "0,1"
|
|
bitfld.long 0x0 28. "SETD0PID,Set DATA0 PID" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint Data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "DIEPCTL5,OTGFS device IN endpoint-5 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 29. "SETD1PID,Set DATA1 PID" "0,1"
|
|
bitfld.long 0x0 28. "SETD0PID,Set DATA0 PID" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint Data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x1C0++0x3
|
|
line.long 0x0 "DIEPCTL6,OTGFS device IN endpoint-6 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 29. "SETD1PID,Set DATA1 PID" "0,1"
|
|
bitfld.long 0x0 28. "SETD0PID,Set DATA0 PID" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint Data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x1E0++0x3
|
|
line.long 0x0 "DIEPCTL7,OTGFS device IN endpoint-7 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 29. "SETD1PID,Set DATA1 PID" "0,1"
|
|
bitfld.long 0x0 28. "SETD0PID,Set DATA0 PID" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint Data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x300++0x3
|
|
line.long 0x0 "DOEPCTL0,OTGFS device OUT endpoint-0 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 20. "SNP,Snoop mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
rbitfld.long 0x0 0.--1. "MPS,Maximum packet size" "0,1,2,3"
|
|
group.long 0x320++0x3
|
|
line.long 0x0 "DOEPCTL1,OTGFS device OUT endpoint-1 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 20. "SNP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x340++0x3
|
|
line.long 0x0 "DOEPCTL2,OTGFS device OUT endpoint-2 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 20. "SNP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x360++0x3
|
|
line.long 0x0 "DOEPCTL3,OTGFS device OUT endpoint-3 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 20. "SNP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x380++0x3
|
|
line.long 0x0 "DOEPCTL4,OTGFS device OUT endpoint-4 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 20. "SNP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x3A0++0x3
|
|
line.long 0x0 "DOEPCTL5,OTGFS device OUT endpoint-5 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 20. "SNP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x3C0++0x3
|
|
line.long 0x0 "DOEPCTL6,OTGFS device OUT endpoint-6 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 20. "SNP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x3E0++0x3
|
|
line.long 0x0 "DOEPCTL7,OTGFS device OUT endpoint-7 control register"
|
|
bitfld.long 0x0 31. "EPTENA,Endpoint enable" "0,1"
|
|
bitfld.long 0x0 30. "EPTDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
bitfld.long 0x0 20. "SNP,Snoop mode" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 16. "DPID,Endpoint data PID" "0,1"
|
|
bitfld.long 0x0 15. "USBACEPT,USB active endpoint" "0,1"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "DIEPINT0,OTGFS device IN endpoint-0 interrupt register"
|
|
rbitfld.long 0x0 7. "TXFEMP,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAK,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMP,IN token received when TxFIFO is empty" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUT,Timeout condition" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "DIEPINT1,OTGFS device IN endpoint-1 interrupt register"
|
|
rbitfld.long 0x0 7. "TXFEMP,Transmit FIFO" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAK,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMP,IN token received when TxFIFO is empty" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUT,Timeout condition" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x148++0x3
|
|
line.long 0x0 "DIEPINT2,OTGFS device IN endpoint-2 interrupt register"
|
|
rbitfld.long 0x0 7. "TXFEMP,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAK,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMP,IN token received when TxFIFO is empty" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUT,Timeout condition" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x168++0x3
|
|
line.long 0x0 "DIEPINT3,OTGFS device IN endpoint-3 interrupt register"
|
|
rbitfld.long 0x0 7. "TXFEMP,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAK,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMP,IN token received when TxFIFO is empty" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUT,Timeout condition" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "DIEPINT4,OTGFS device IN endpoint-4 interrupt register"
|
|
rbitfld.long 0x0 7. "TXFEMP,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAK,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMP,IN token received when TxFIFO is empty" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUT,Timeout condition" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x1A8++0x3
|
|
line.long 0x0 "DIEPINT5,OTGFS device IN endpoint-5 interrupt register"
|
|
rbitfld.long 0x0 7. "TXFEMP,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAK,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMP,IN token received when TxFIFO is empty" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUT,Timeout condition" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x1C8++0x3
|
|
line.long 0x0 "DIEPINT6,OTGFS device IN endpoint-6 interrupt register"
|
|
rbitfld.long 0x0 7. "TXFEMP,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAK,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMP,IN token received when TxFIFO is empty" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUT,Timeout condition" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x1E8++0x3
|
|
line.long 0x0 "DIEPINT7,OTGFS device IN endpoint-7 interrupt register"
|
|
rbitfld.long 0x0 7. "TXFEMP,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x0 6. "INEPTNAK,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 4. "INTKNTXFEMP,IN token received when TxFIFO is empty" "0,1"
|
|
bitfld.long 0x0 3. "TIMEOUT,Timeout condition" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x308++0x3
|
|
line.long 0x0 "DOEPINT0,OTGFS device OUT endpoint-0 interrupt register"
|
|
bitfld.long 0x0 6. "B2BSTUP,Back-to-back SETUP packets received" "0,1"
|
|
bitfld.long 0x0 4. "OUTTEPD,OUT token received when endpoint disabled" "0,1"
|
|
bitfld.long 0x0 3. "SETUP,SETUP phase done" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x328++0x3
|
|
line.long 0x0 "DOEPINT1,OTGFS device OUT endpoint-1 interrupt register"
|
|
bitfld.long 0x0 6. "B2BSTUP,Back-to-back SETUP packets received" "0,1"
|
|
bitfld.long 0x0 4. "OUTTEPD,OUT token received when endpoint disabled" "0,1"
|
|
bitfld.long 0x0 3. "SETUP,SETUP phase done" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x348++0x3
|
|
line.long 0x0 "DOEPINT2,OTGFS device OUT endpoint-2 interrupt register"
|
|
bitfld.long 0x0 6. "B2BSTUP,Back-to-back SETUP packets received" "0,1"
|
|
bitfld.long 0x0 4. "OUTTEPD,OUT token received when endpoint disabled" "0,1"
|
|
bitfld.long 0x0 3. "SETUP,SETUP phase done" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x368++0x3
|
|
line.long 0x0 "DOEPINT3,OTGFS device OUT endpoint-3 interrupt register"
|
|
bitfld.long 0x0 6. "B2BSTUP,Back-to-back SETUP packets received" "0,1"
|
|
bitfld.long 0x0 4. "OUTTEPD,OUT token received when endpoint disabled" "0,1"
|
|
bitfld.long 0x0 3. "SETUP,SETUP phase done" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x388++0x3
|
|
line.long 0x0 "DOEPINT4,OTGFS device OUT endpoint-4 interrupt register"
|
|
bitfld.long 0x0 6. "B2BSTUP,Back-to-back SETUP packets received" "0,1"
|
|
bitfld.long 0x0 4. "OUTTEPD,OUT token received when endpoint disabled" "0,1"
|
|
bitfld.long 0x0 3. "SETUP,SETUP phase done" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x3A8++0x3
|
|
line.long 0x0 "DOEPINT5,OTGFS device OUT endpoint-5 interrupt register"
|
|
bitfld.long 0x0 6. "B2BSTUP,Back-to-back SETUP packets received" "0,1"
|
|
bitfld.long 0x0 4. "OUTTEPD,OUT token received when endpoint disabled" "0,1"
|
|
bitfld.long 0x0 3. "SETUP,SETUP phase done" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x3C8++0x3
|
|
line.long 0x0 "DOEPINT6,OTGFS device OUT endpoint-6 interrupt register"
|
|
bitfld.long 0x0 6. "B2BSTUP,Back-to-back SETUP packets received" "0,1"
|
|
bitfld.long 0x0 4. "OUTTEPD,OUT token received when endpoint disabled" "0,1"
|
|
bitfld.long 0x0 3. "SETUP,SETUP phase done" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x3E8++0x3
|
|
line.long 0x0 "DOEPINT7,OTGFS device OUT endpoint-7 interrupt register"
|
|
bitfld.long 0x0 6. "B2BSTUP,Back-to-back SETUP packets received" "0,1"
|
|
bitfld.long 0x0 4. "OUTTEPD,OUT token received when endpoint disabled" "0,1"
|
|
bitfld.long 0x0 3. "SETUP,SETUP phase done" "0,1"
|
|
bitfld.long 0x0 1. "EPTDISD,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed interrupt" "0,1"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "DIEPTSIZ0,OTGFS device IN endpoint-0 transfer size register"
|
|
bitfld.long 0x0 19.--20. "PKTCNT,Packet count" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--6. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x310++0x3
|
|
line.long 0x0 "DOEPTSIZ0,OTGFS device OUT endpoint-0 transfer size register"
|
|
bitfld.long 0x0 29.--30. "SETUPCNT,SETUP packet count" "0,1,2,3"
|
|
bitfld.long 0x0 19. "PKTCNT,Packet count" "0,1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "DIEPTSIZ1,OTGFS device IN endpoint-1 transfer size register"
|
|
bitfld.long 0x0 29.--30. "MC,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "DIEPTSIZ2,OTGFS device IN endpoint-2 transfer size register"
|
|
bitfld.long 0x0 29.--30. "MC,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "DIEPTSIZ3,OTG device IN endpoint-3 transfer size register"
|
|
bitfld.long 0x0 29.--30. "MC,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "DIEPTSIZ4,OTG device IN endpoint-4 transfer size register"
|
|
bitfld.long 0x0 29.--30. "MC,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x1B0++0x3
|
|
line.long 0x0 "DIEPTSIZ5,OTG device IN endpoint-5 transfer size register"
|
|
bitfld.long 0x0 29.--30. "MC,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x1D0++0x3
|
|
line.long 0x0 "DIEPTSIZ6,OTG device IN endpoint-6 transfer size register"
|
|
bitfld.long 0x0 29.--30. "MC,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x1F0++0x3
|
|
line.long 0x0 "DIEPTSIZ7,OTG device IN endpoint-7 transfer size register"
|
|
bitfld.long 0x0 29.--30. "MC,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
rgroup.long 0x118++0x3
|
|
line.long 0x0 "DTXFSTS0,OTGFS device IN endpoint-0 transmit FIFO status register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFSAV,IN endpoint TxFIFO space available"
|
|
rgroup.long 0x138++0x3
|
|
line.long 0x0 "DTXFSTS1,OTGFS device IN endpoint-1 transmit FIFO status register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFSAV,IN endpoint TxFIFO space available"
|
|
rgroup.long 0x158++0x3
|
|
line.long 0x0 "DTXFSTS2,OTGFS device IN endpoint-2 transmit FIFO status register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFSAV,IN endpoint TxFIFO space available"
|
|
rgroup.long 0x178++0x3
|
|
line.long 0x0 "DTXFSTS3,OTGFS device IN endpoint-3 transmit FIFO status register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFSAV,IN endpoint TxFIFO space available"
|
|
rgroup.long 0x198++0x3
|
|
line.long 0x0 "DTXFSTS4,OTGFS device IN endpoint-4 transmit FIFO status register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFSAV,IN endpoint TxFIFO space available"
|
|
rgroup.long 0x1B8++0x3
|
|
line.long 0x0 "DTXFSTS5,OTGFS device IN endpoint-5 transmit FIFO status register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFSAV,IN endpoint TxFIFO space available"
|
|
rgroup.long 0x1D8++0x3
|
|
line.long 0x0 "DTXFSTS6,OTGFS device IN endpoint-6 transmit FIFO status register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFSAV,IN endpoint TxFIFO space"
|
|
rgroup.long 0x1F8++0x3
|
|
line.long 0x0 "DTXFSTS7,OTGFS device IN endpoint-7 transmit FIFO status register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFSAV,IN endpoint TxFIFO space available"
|
|
group.long 0x330++0x3
|
|
line.long 0x0 "DOEPTSIZ1,OTGFS device OUT endpoint-1 transfer size register"
|
|
bitfld.long 0x0 29.--30. "RXDPID,Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x350++0x3
|
|
line.long 0x0 "DOEPTSIZ2,OTGFS device OUT endpoint-2 transfer size register"
|
|
bitfld.long 0x0 29.--30. "RXDPID,Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x370++0x3
|
|
line.long 0x0 "DOEPTSIZ3,OTGFS device OUT endpoint-3 transfer size register"
|
|
bitfld.long 0x0 29.--30. "RXDPID,Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x390++0x3
|
|
line.long 0x0 "DOEPTSIZ4,OTGFS device OUT endpoint-4 transfer size register"
|
|
bitfld.long 0x0 29.--30. "RXDPID,Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x3B0++0x3
|
|
line.long 0x0 "DOEPTSIZ5,OTGFS device OUT endpoint-5 transfer size register"
|
|
bitfld.long 0x0 29.--30. "RXDPID,Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x3D0++0x3
|
|
line.long 0x0 "DOEPTSIZ6,OTGFS device OUT endpoint-6 transfer size register"
|
|
bitfld.long 0x0 29.--30. "RXDPID,Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x3F0++0x3
|
|
line.long 0x0 "DOEPTSIZ7,OTGFS device OUT endpoint-7 transfer size register"
|
|
bitfld.long 0x0 29.--30. "RXDPID,Received data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
tree.end
|
|
tree "USB_OTGFS_GLOBAL"
|
|
base ad:0x50000000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "GOTGCTL,OTGFS control and status register (OTGFS_GOTGCTL)"
|
|
bitfld.long 0x0 21. "CURMOD,Current Mode of Operation" "0,1"
|
|
bitfld.long 0x0 16. "CONIDSTS,Connector ID status" "0,1"
|
|
group.long 0x4++0x17
|
|
line.long 0x0 "GOTGINT,OTGFS interrupt register (OTGFS_GOTGINT)"
|
|
bitfld.long 0x0 2. "SESENDDET,VBUS is deasserted" "0,1"
|
|
line.long 0x4 "GAHBCFG,OTGFS AHB configuration register (OTGFS_GAHBCFG)"
|
|
bitfld.long 0x4 8. "PTXFEMPLVL,Periodic TxFIFO empty" "0,1"
|
|
bitfld.long 0x4 7. "NPTXFEMPLVL,Non-Periodic TxFIFO empty level" "0,1"
|
|
bitfld.long 0x4 0. "GLBINTMSK,Global interrupt mask" "0,1"
|
|
line.long 0x8 "GUSBCFG,USB configuration register (OTGFS_GUSBCFG)"
|
|
bitfld.long 0x8 31. "COTXPKT,Corrupt Tx packet" "0,1"
|
|
bitfld.long 0x8 30. "FDEVMODE,Force device mode" "0,1"
|
|
bitfld.long 0x8 29. "FHSTMODE,Force host mode" "0,1"
|
|
hexmask.long.byte 0x8 10.--13. 1. "USBTRDTIM,USB turnaround time"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "TOUTCAL,FS timeout calibration" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "GRSTCTL,OTGFS reset register (OTGFS_GRSTCTL)"
|
|
rbitfld.long 0xC 31. "AHBIDLE,AHB master idle" "0,1"
|
|
hexmask.long.byte 0xC 6.--10. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0xC 5. "TXFFLSH,TxFIFO flush" "0,1"
|
|
bitfld.long 0xC 4. "RXFFLSH,RxFIFO flush" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "FRMCNTRST,Host frame counter reset" "0,1"
|
|
bitfld.long 0xC 1. "PIUSFTRST,PIU FS Dedicated Controller Soft Reset" "0,1"
|
|
bitfld.long 0xC 0. "CSFTRST,Core soft reset" "0,1"
|
|
line.long 0x10 "GINTSTS,OTGFS core interrupt register (OTGFS_GINTSTS)"
|
|
bitfld.long 0x10 31. "WKUPINT,Resume/remote wakeup detected" "0,1"
|
|
bitfld.long 0x10 29. "DISCONINT,Disconnect detected" "0,1"
|
|
bitfld.long 0x10 28. "CONIDSCHG,Connector ID status change" "0,1"
|
|
rbitfld.long 0x10 26. "PTXFEMP,Periodic TxFIFO empty" "0,1"
|
|
newline
|
|
rbitfld.long 0x10 25. "HCHINT,Host channels interrupt" "0,1"
|
|
rbitfld.long 0x10 24. "PRTINT,Host port interrupt" "0,1"
|
|
bitfld.long 0x10 21. "INCOMPIP_INCOMPISOOUT,Incomplete periodic transfer(Host mode)/Incomplete isochronous OUT transfer(Device mode)" "0,1"
|
|
bitfld.long 0x10 20. "INCOMPISOIN,Incomplete isochronous IN transfer" "0,1"
|
|
newline
|
|
rbitfld.long 0x10 19. "OEPTINT,OUT endpoint interrupt" "0,1"
|
|
rbitfld.long 0x10 18. "IEPTINT,IN endpoint interrupt" "0,1"
|
|
bitfld.long 0x10 15. "EOPF,End of periodic frame interrupt" "0,1"
|
|
bitfld.long 0x10 14. "ISOOUTDROP,Isochronous OUT packet dropped interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "ENUMDONE,Enumeration done" "0,1"
|
|
bitfld.long 0x10 12. "USBRST,USB reset" "0,1"
|
|
bitfld.long 0x10 11. "USBSUSP,USB suspend" "0,1"
|
|
bitfld.long 0x10 10. "ERLYSUSP,Early suspend" "0,1"
|
|
newline
|
|
rbitfld.long 0x10 7. "GOUTNAKEFF,Global OUT NAK effective" "0,1"
|
|
rbitfld.long 0x10 6. "GINNAKEFF,Global IN non-periodic NAK" "0,1"
|
|
rbitfld.long 0x10 5. "NPTXFEMP,Non-periodic TxFIFO empty" "0,1"
|
|
rbitfld.long 0x10 4. "RXFLVL,RxFIFO non-empty" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "SOF,Start of frame" "0,1"
|
|
rbitfld.long 0x10 2. "OTGINT,OTG interrupt" "0,1"
|
|
bitfld.long 0x10 1. "MODEMIS,Mode mismatch interrupt" "0,1"
|
|
rbitfld.long 0x10 0. "CURMOD,Current mode of operation" "0,1"
|
|
line.long 0x14 "GINTMSK,OTG_FS interrupt mask register"
|
|
bitfld.long 0x14 31. "WKUPINTMSK,Resume/remote wakeup detected interrupt mask" "0,1"
|
|
bitfld.long 0x14 29. "DISCONINTMSK,Disconnect detected interrupt mask" "0,1"
|
|
bitfld.long 0x14 28. "CONIDSCHGMSK,Connector ID status change mask" "0,1"
|
|
bitfld.long 0x14 26. "PTXFEMPMSK,Periodic TxFIFO empty mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 25. "HCHINTMSK,Host channels interrupt mask" "0,1"
|
|
bitfld.long 0x14 24. "PRTINTMSK,Host port interrupt mask" "0,1"
|
|
bitfld.long 0x14 21. "INCOMPIP_INCOMPISOOUTMSK,Incomplete periodic transfer mask(Host mode)/Incomplete isochronous OUT transfer mask(Device mode)" "0,1"
|
|
bitfld.long 0x14 20. "INCOMISOINMSK,Incomplete isochronous IN transfer" "0,1"
|
|
newline
|
|
bitfld.long 0x14 19. "OEPTINTMSK,OUT endpoints interrupt" "0,1"
|
|
bitfld.long 0x14 18. "IEPTINTMSK,IN endpoints interrupt" "0,1"
|
|
bitfld.long 0x14 15. "EOPFMSK,End of periodic frame interrupt" "0,1"
|
|
bitfld.long 0x14 14. "ISOOUTDROPMSK,Isochronous OUT packet dropped interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x14 13. "ENUMDONEMSK,Enumeration done mask" "0,1"
|
|
bitfld.long 0x14 12. "USBRSTMSK,USB reset mask" "0,1"
|
|
bitfld.long 0x14 11. "USBSUSPMSK,USB suspend mask" "0,1"
|
|
bitfld.long 0x14 10. "ERLYSUSPMSK,Early suspend mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "GOUTNAKEFFMSK,Global OUT NAK effective" "0,1"
|
|
bitfld.long 0x14 6. "GINNAKEFFMSK,Global non-periodic IN NAK effective" "0,1"
|
|
bitfld.long 0x14 5. "NPTXFEMPMSK,Non-periodic TxFIFO empty" "0,1"
|
|
bitfld.long 0x14 4. "RXFLVLMSK,Receive FIFO non-empty" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "SOFMSK,Start of frame mask" "0,1"
|
|
bitfld.long 0x14 2. "OTGINTMSK,OTG interrupt mask" "0,1"
|
|
bitfld.long 0x14 1. "MODEMISMSK,Mode mismatch interrupt" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "GRXSTSR_Device,OTGFS Receive status debug read(Device mode)"
|
|
hexmask.long.byte 0x0 21.--24. 1. "FN,Frame number"
|
|
hexmask.long.byte 0x0 17.--20. 1. "PKTSTS,Packet status"
|
|
bitfld.long 0x0 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 4.--14. 1. "BCNT,Byte count"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "EPTNUM,Endpoint number"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "GRXSTSR_Host,OTGFS Receive status debug read(Host mode)"
|
|
hexmask.long.byte 0x0 17.--20. 1. "PKTSTS,Packet status"
|
|
bitfld.long 0x0 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 4.--14. 1. "BCNT,Byte count"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CHNUM,Channel number"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "GRXFSIZ,OTGFS Receive FIFO size register (OTGFS_GRXFSIZ)"
|
|
hexmask.long.word 0x0 0.--15. 1. "RXFDEP,RxFIFO depth"
|
|
line.long 0x4 "DIEPTXF0,IN Endpoint TxFIFO 0 transmit FIFO size register (Device mode)"
|
|
hexmask.long.word 0x4 16.--31. 1. "INEPT0TXDEP,Endpoint 0 TxFIFO depth"
|
|
hexmask.long.word 0x4 0.--15. 1. "INEPT0TXSTADDR,Endpoint 0 transmit RAM start address"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "GNPTXFSIZ,OTGFS non-periodic transmit FIFO size register (Host mode)"
|
|
hexmask.long.word 0x0 16.--31. 1. "NPTXFDEP,Non-periodic TxFIFO depth"
|
|
hexmask.long.word 0x0 0.--15. 1. "NPTXFSTADDR,Non-periodic Transmit RAM Start address"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "GNPTXSTS,OTGFS non-periodic transmit FIFO/queue status register (OTGFS_GNPTXSTS)"
|
|
hexmask.long.byte 0x0 24.--30. 1. "NPTXQTOP,Top of the non-periodic transmit request queue"
|
|
hexmask.long.byte 0x0 16.--23. 1. "NPTXQSPCAVAIL,Non-periodic transmit request queue space available"
|
|
hexmask.long.word 0x0 0.--15. 1. "NPTXFSPCAVAIL,Non-periodic TxFIFO space available"
|
|
group.long 0x38++0x7
|
|
line.long 0x0 "GCCFG,OTGFS general core configuration register (OTGFS_GCCFG)"
|
|
bitfld.long 0x0 21. "VBUSIG,VBUS Ignored" "0,1"
|
|
bitfld.long 0x0 20. "SOFOUTEN,SOF output enable" "0,1"
|
|
bitfld.long 0x0 17. "LP_MODE,Low power mode" "0,1"
|
|
bitfld.long 0x0 16. "PWRDOWN,Power down" "0,1"
|
|
line.long 0x4 "GUID,Product ID register"
|
|
hexmask.long 0x4 0.--31. 1. "USERID,Product ID field"
|
|
group.long 0x100++0x1F
|
|
line.long 0x0 "HPTXFSIZ,OTGFS Host periodic transmit FIFO size register (OTGFS_HPTXFSIZ)"
|
|
hexmask.long.word 0x0 16.--31. 1. "PTXFSIZE,Host periodic TxFIFO depth"
|
|
hexmask.long.word 0x0 0.--15. 1. "PTXFSTADDR,Host periodic TxFIFO start address"
|
|
line.long 0x4 "DIEPTXF1,OTGFS device IN endpoint transmit FIFO size register (OTGFS_DIEPTXF1)"
|
|
hexmask.long.word 0x4 16.--31. 1. "INEPTXFDEP,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x4 0.--15. 1. "INEPTXFSTADDR,IN endpoint FIFO1 transmit RAM start address"
|
|
line.long 0x8 "DIEPTXF2,OTGFS device IN endpoint transmit FIFO size register (OTGFS_DIEPTXF2)"
|
|
hexmask.long.word 0x8 16.--31. 1. "INEPTXFDEP,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x8 0.--15. 1. "INEPTXFSTADDR,IN endpoint FIFO2 transmit RAM start address"
|
|
line.long 0xC "DIEPTXF3,OTGFS device IN endpoint transmit FIFO size register (OTGFS_DIEPTXF3)"
|
|
hexmask.long.word 0xC 16.--31. 1. "INEPTXFDEP,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0xC 0.--15. 1. "INEPTXFSTADDR,IN endpoint FIFO3 transmit RAM start address"
|
|
line.long 0x10 "DIEPTXF4,OTGFS device IN endpoint transmit FIFO size register (OTGFS_DIEPTXF4)"
|
|
hexmask.long.word 0x10 16.--31. 1. "INEPTXFDEP,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x10 0.--15. 1. "INEPTXFSTADDR,IN endpoint FIFO4 transmit RAM start address"
|
|
line.long 0x14 "DIEPTXF5,OTGFS device IN endpoint transmit FIFO size register (OTGFS_DIEPTXF5)"
|
|
hexmask.long.word 0x14 16.--31. 1. "INEPTXFDEP,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x14 0.--15. 1. "INEPTXFSTADDR,IN endpoint FIFO5 transmit RAM start address"
|
|
line.long 0x18 "DIEPTXF6,OTGFS device IN endpoint transmit FIFO size register (OTGFS_DIEPTXF6)"
|
|
hexmask.long.word 0x18 16.--31. 1. "INEPTXFDEP,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x18 0.--15. 1. "INEPTXFSTADDR,IN endpoint FIFO6 transmit RAM start address"
|
|
line.long 0x1C "DIEPTXF7,OTGFS device IN endpoint transmit FIFO size register (OTGFS_DIEPTXF7)"
|
|
hexmask.long.word 0x1C 16.--31. 1. "INEPTXFDEP,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x1C 0.--15. 1. "INEPTXFSTADDR,IN endpoint FIFO7 transmit RAM start address"
|
|
tree.end
|
|
tree "USB_OTGFS_HOST"
|
|
base ad:0x50000400
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "HCFG,OTGFS host configuration register (OTGFS_HCFG)"
|
|
rbitfld.long 0x0 2. "FSLSSUPP,FS- and LS-only support" "0,1"
|
|
bitfld.long 0x0 0.--1. "FSLSPCLKSEL,FS/LS PHY clock select" "0,1,2,3"
|
|
line.long 0x4 "HFIR,OTGFS Host frame interval"
|
|
hexmask.long.word 0x4 0.--15. 1. "FRINT,Frame interval"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "HFNUM,OTGFS host frame number/frame time remaining register (OTGFS_HFNUM)"
|
|
hexmask.long.word 0x0 16.--31. 1. "FTREM,Frame time remaining"
|
|
hexmask.long.word 0x0 0.--15. 1. "FRNUM,Frame number"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HPTXSTS,OTGFS_Host periodic transmit FIFO/queue status register (OTGFS_HPTXSTS)"
|
|
hexmask.long.byte 0x0 24.--31. 1. "PTXQTOP,Top of the periodic transmit request queue"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PTXQSPCAVAIL,Periodic transmit request queue space available"
|
|
hexmask.long.word 0x0 0.--15. 1. "PTXFSPCAVAIL,Periodic transmit data FIFO space available"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HAINT,OTGFS Host all channels interrupt register"
|
|
hexmask.long.word 0x0 0.--15. 1. "HAINT,Channel interrupts"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "HAINTMSK,OTGFS host all channels interrupt mask register"
|
|
hexmask.long.word 0x0 0.--15. 1. "HAINTMSK,Channel interrupt mask"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "HPRT,OTGFS host port control and status register (OTGFS_HPRT)"
|
|
rbitfld.long 0x0 17.--18. "PRTSPD,Port speed" "0,1,2,3"
|
|
hexmask.long.byte 0x0 13.--16. 1. "PRTTSTCTL,Port test control"
|
|
bitfld.long 0x0 12. "PRTPWR,Port power" "0,1"
|
|
rbitfld.long 0x0 10.--11. "PRTLNSTS,Port line status" "0,1,2,3"
|
|
bitfld.long 0x0 8. "PRTRST,Port reset" "0,1"
|
|
bitfld.long 0x0 7. "PRTSUSP,Port suspend" "0,1"
|
|
bitfld.long 0x0 6. "PRTRES,Port resume" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PRTOVRCCHNG,Port overcurrent change" "0,1"
|
|
rbitfld.long 0x0 4. "PRTOVRCACT,Port overcurrent active" "0,1"
|
|
bitfld.long 0x0 3. "PRTENCHNG,Port enable/disable change" "0,1"
|
|
bitfld.long 0x0 2. "PRTENA,Port enable" "0,1"
|
|
bitfld.long 0x0 1. "PRTCONDET,Port connect detected" "0,1"
|
|
rbitfld.long 0x0 0. "PRTCONSTS,Port connect status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "HCCHAR0,OTGFS host channel-0 characteristics register (OTGFS_HCCHAR0)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "HCCHAR1,OTGFS host channel-1 characteristics register (OTGFS_HCCHAR1)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "HCCHAR2,OTGFS host channel-2 characteristics register (OTGFS_HCCHAR2)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x160++0x3
|
|
line.long 0x0 "HCCHAR3,OTGFS host channel-3 characteristics register (OTGFS_HCCHAR3)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "HCCHAR4,OTGFS host channel-4 characteristics register (OTGFS_HCCHAR4)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "HCCHAR5,OTGFS host channel-5 characteristics register (OTGFS_HCCHAR5)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x1C0++0x3
|
|
line.long 0x0 "HCCHAR6,OTGFS host channel-6 characteristics register (OTGFS_HCCHAR6)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x1E0++0x3
|
|
line.long 0x0 "HCCHAR7,OTGFS host channel-7 characteristics register (OTGFS_HCCHAR7)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HCCHAR8,OTGFS host channel-8 characteristics register (OTGFS_HCCHAR8)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x220++0x3
|
|
line.long 0x0 "HCCHAR9,OTGFS host channel-9 characteristics register (OTGFS_HCCHAR9)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x240++0x3
|
|
line.long 0x0 "HCCHAR10,OTGFS host channel-10 characteristics register (OTGFS_HCCHAR10)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x260++0x3
|
|
line.long 0x0 "HCCHAR11,OTGFS host channel-7 characteristics register (OTGFS_HCCHAR11)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x280++0x3
|
|
line.long 0x0 "HCCHAR12,OTGFS host channel-12 characteristics register (OTGFS_HCCHAR12)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x0 "HCCHAR13,OTGFS host channel-13 characteristics register (OTGFS_HCCHAR13)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x2C0++0x3
|
|
line.long 0x0 "HCCHAR14,OTGFS host channel-14 characteristics register (OTGFS_HCCHAR14)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x2E0++0x3
|
|
line.long 0x0 "HCCHAR15,OTGFS host channel-15 characteristics register (OTGFS_HCCHAR15)"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DEVADDR,Device address"
|
|
bitfld.long 0x0 20.--21. "MC,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYPE,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSPDDEV,Low-speed device" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "EPTDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPTNUM,Endpoint number"
|
|
hexmask.long.word 0x0 0.--10. 1. "MPS,Maximum packet size"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "HCINT0,OTGFS host channel-0 interrupt register (OTGFS_HCINT0)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "HCINT1,OTG_FS host channel-1 interrupt register (OTG_FS_HCINT1)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x148++0x3
|
|
line.long 0x0 "HCINT2,OTGFS host channel-2 interrupt register (OTGFS_HCINT2)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x168++0x3
|
|
line.long 0x0 "HCINT3,OTGFS host channel-3 interrupt register (OTGFS_HCINT3)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "HCINT4,OTGFS host channel-4 interrupt register (OTGFS_HCINT4)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x1A8++0x3
|
|
line.long 0x0 "HCINT5,OTGFS host channel-5 interrupt register (OTGFS_HCINT5)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x1C8++0x3
|
|
line.long 0x0 "HCINT6,OTGFS host channel-6 interrupt register (OTGFS_HCINT6)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x1E8++0x3
|
|
line.long 0x0 "HCINT7,OTGFS host channel-7 interrupt register (OTGFS_HCINT7)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x208++0x3
|
|
line.long 0x0 "HCINT8,OTGFS host channel-8 interrupt register (OTGFS_HCINT8)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x228++0x3
|
|
line.long 0x0 "HCINT9,OTGFS host channel-9 interrupt register (OTGFS_HCINT9)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x248++0x3
|
|
line.long 0x0 "HCINT10,OTGFS host channel-10 interrupt register (OTGFS_HCINT10)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x268++0x3
|
|
line.long 0x0 "HCINT11,OTGFS host channel-11 interrupt register (OTGFS_HCINT11)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x288++0x3
|
|
line.long 0x0 "HCINT12,OTGFS host channel-12 interrupt register (OTGFS_HCINT12)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x2A8++0x3
|
|
line.long 0x0 "HCINT13,OTGFS host channel-13 interrupt register (OTGFS_HCINT13)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x2C8++0x3
|
|
line.long 0x0 "HCINT14,OTGFS host channel-14 interrupt register (OTGFS_HCINT14)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x2E8++0x3
|
|
line.long 0x0 "HCINT15,OTGFS host channel-15 interrupt register (OTGFS_HCINT15)"
|
|
bitfld.long 0x0 10. "DTGLERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUN,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBLERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "XACTERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTD,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFERC,Transfer completed" "0,1"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "HCINTMSK0,OTGFS host channel-0 mask register (OTGFS_HCINTMSK0)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x12C++0x3
|
|
line.long 0x0 "HCINTMSK1,OTGFS host channel-1 mask register (OTGFS_HCINTMSK1)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x14C++0x3
|
|
line.long 0x0 "HCINTMSK2,OTGFS host channel-2 mask register (OTGFS_HCINTMSK2)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x16C++0x3
|
|
line.long 0x0 "HCINTMSK3,OTGFS host channel-3 mask register (OTGFS_HCINTMSK3)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x18C++0x3
|
|
line.long 0x0 "HCINTMSK4,OTGFS host channel-4 mask register (OTGFS_HCINTMSK4)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x1AC++0x3
|
|
line.long 0x0 "HCINTMSK5,OTGFS host channel-5 mask register (OTGFS_HCINTMSK5)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x1CC++0x3
|
|
line.long 0x0 "HCINTMSK6,OTGFS host channel-6 mask register (OTGFS_HCINTMSK6)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x1EC++0x3
|
|
line.long 0x0 "HCINTMSK7,OTGFS host channel-7 mask register (OTGFS_HCINTMSK7)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x20C++0x3
|
|
line.long 0x0 "HCINTMSK8,OTGFS host channel-8 mask register (OTGFS_HCINTMSK8)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x22C++0x3
|
|
line.long 0x0 "HCINTMSK9,OTGFS host channel-9 mask register (OTGFS_HCINTMSK9)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x24C++0x3
|
|
line.long 0x0 "HCINTMSK10,OTGFS host channel-10 mask register (OTGFS_HCINTMSK10)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x26C++0x3
|
|
line.long 0x0 "HCINTMSK11,OTGFS host channel-11 mask register (OTGFS_HCINTMSK11)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x28C++0x3
|
|
line.long 0x0 "HCINTMSK12,OTGFS host channel-12 mask register (OTGFS_HCINTMSK12)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x2AC++0x3
|
|
line.long 0x0 "HCINTMSK13,OTGFS host channel-13 mask register (OTGFS_HCINTMSK13)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x2CC++0x3
|
|
line.long 0x0 "HCINTMSK14,OTGFS host channel-14 mask register (OTGFS_HCINTMSK14)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x2EC++0x3
|
|
line.long 0x0 "HCINTMSK15,OTGFS host channel-15 mask register (OTGFS_HCINTMSK15)"
|
|
bitfld.long 0x0 10. "DTGLERRMSK,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMOVRUNMSK,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBLERRMSK,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "XACTERRMSK,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 5. "ACKMSK,ACK response received/transmitted interrupt mask" "0,1"
|
|
bitfld.long 0x0 4. "NAKMSK,NAK response received interrupt mask" "0,1"
|
|
bitfld.long 0x0 3. "STALLMSK,STALL response received interrupt mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CHHLTDMSK,Channel halted mask" "0,1"
|
|
bitfld.long 0x0 0. "XFERCMSK,Transfer completed mask" "0,1"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "HCTSIZ0,OTGFS host channel-0 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "HCTSIZ1,OTGFS host channel-1 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "HCTSIZ2,OTGFS host channel-2 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "HCTSIZ3,OTGFS host channel-3 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "HCTSIZ4,OTGFS host channel-4 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x1B0++0x3
|
|
line.long 0x0 "HCTSIZ5,OTGFS host channel-5 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x1D0++0x3
|
|
line.long 0x0 "HCTSIZ6,OTGFS host channel-6 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x1F0++0x3
|
|
line.long 0x0 "HCTSIZ7,OTGFS host channel-7 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x210++0x3
|
|
line.long 0x0 "HCTSIZ8,OTGFS host channel-8 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x230++0x3
|
|
line.long 0x0 "HCTSIZ9,OTGFS host channel-9 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x250++0x3
|
|
line.long 0x0 "HCTSIZ10,OTGFS host channel-10 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x270++0x3
|
|
line.long 0x0 "HCTSIZ11,OTGFS host channel-11 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x290++0x3
|
|
line.long 0x0 "HCTSIZ12,OTGFS host channel-12 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x2B0++0x3
|
|
line.long 0x0 "HCTSIZ13,OTGFS host channel-13 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x2D0++0x3
|
|
line.long 0x0 "HCTSIZ14,OTGFS host channel-14 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
group.long 0x2F0++0x3
|
|
line.long 0x0 "HCTSIZ15,OTGFS host channel-15 transfer size register"
|
|
bitfld.long 0x0 29.--30. "PID,PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFERSIZE,Transfer size"
|
|
tree.end
|
|
tree "USB_OTGFS_PWRCLK"
|
|
base ad:0x50000E00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "PCGCCTL,OTGFS power and clock gating control register (OTGFS_PCGCCTL)"
|
|
rbitfld.long 0x0 4. "SUSPENDM,PHY Suspended" "0,1"
|
|
bitfld.long 0x0 0. "STOPPCLK,Stop PHY clock" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "WDT (Watchdog Timer)"
|
|
base ad:0x40003000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "CMD,Command register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CMD,Command register"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "DIV,Division register"
|
|
bitfld.long 0x0 0.--2. "DIV,Division divider" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "RLD,Reload register"
|
|
hexmask.long.word 0x4 0.--11. 1. "RLD,Reload value"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "STS,Status register"
|
|
bitfld.long 0x0 2. "WINF,Window value update complete flag" "0,1"
|
|
bitfld.long 0x0 1. "RLDF,Reload value update complete flag" "0,1"
|
|
bitfld.long 0x0 0. "DIVF,Division value update complete flag" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "WIN,Window register"
|
|
hexmask.long.word 0x0 0.--11. 1. "WIN,Window value"
|
|
tree.end
|
|
tree "WWDT (Window Watchdog Timer)"
|
|
base ad:0x40002C00
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRL,Control register"
|
|
bitfld.long 0x0 7. "WWDTEN,Window watchdog enable" "0,1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "CNT,Decrement counter"
|
|
line.long 0x4 "CFG,Configuration register"
|
|
bitfld.long 0x4 9. "RLDIEN,Reload counter interrupt" "0,1"
|
|
bitfld.long 0x4 7.--8. "DIV,Clock division value" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--6. 1. "WIN,Window value"
|
|
line.long 0x8 "STS,Status register"
|
|
bitfld.long 0x8 0. "RLDF,Reload counter interrupt flag" "0,1"
|
|
tree.end
|
|
tree "XMC (Flexible Static Memory Controller)"
|
|
base ad:0xA0000000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "BK1CTRL1,SRAM/NOR-Flash chip-select control register 1"
|
|
bitfld.long 0x0 19. "MWMC,Memory write mode control" "0,1"
|
|
bitfld.long 0x0 16.--18. "CRPGS,CRAM page size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 15. "NWASEN,NWAIT in asynchronous transfer enable" "0,1"
|
|
bitfld.long 0x0 14. "RWTD,Read-write timing different" "0,1"
|
|
bitfld.long 0x0 13. "NWSEN,NWAIT in synchronous transfer enable" "0,1"
|
|
bitfld.long 0x0 12. "WEN,Write enable" "0,1"
|
|
bitfld.long 0x0 11. "NWTCFG,Wait timing configuration" "0,1"
|
|
bitfld.long 0x0 10. "WRAPEN,Wrapped enable" "0,1"
|
|
bitfld.long 0x0 9. "NWPOL,NWAIT polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SYNCBEN,Synchronous burst enable" "0,1"
|
|
bitfld.long 0x0 6. "NOREN,Nor flash access enable" "0,1"
|
|
bitfld.long 0x0 4.--5. "EXTMDBW,External memory data bus width" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "DEV,Memory device type" "0,1,2,3"
|
|
bitfld.long 0x0 1. "ADMUXEN,Address and data multiplexing enable" "0,1"
|
|
bitfld.long 0x0 0. "EN,Memory bank enable" "0,1"
|
|
line.long 0x4 "BK1TMG1,SRAM/NOR-Flash chip-select timing register 1"
|
|
bitfld.long 0x4 28.--29. "ASYNCM,Asynchronous mode" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DTLAT,Data latency"
|
|
hexmask.long.byte 0x4 20.--23. 1. "CLKPSC,Clock prescale"
|
|
hexmask.long.byte 0x4 16.--19. 1. "BUSLAT,Bus latency"
|
|
hexmask.long.byte 0x4 8.--15. 1. "DTST,Asynchronous data setup time"
|
|
hexmask.long.byte 0x4 4.--7. 1. "ADDRHT,Address-hold time"
|
|
hexmask.long.byte 0x4 0.--3. 1. "ADDRST,Address setup time"
|
|
line.long 0x8 "BK1CTRL2,SRAM/NOR-Flash chip-select control register 2"
|
|
bitfld.long 0x8 19. "MWMC,Memory write mode control" "0,1"
|
|
bitfld.long 0x8 16.--18. "CRPGS,CRAM page size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 15. "NWASEN,NWAIT in asynchronous transfer enable" "0,1"
|
|
bitfld.long 0x8 14. "RWTD,Read-write timing different" "0,1"
|
|
bitfld.long 0x8 13. "NWSEN,NWAIT in synchronous transfer enable" "0,1"
|
|
bitfld.long 0x8 12. "WEN,Write enable" "0,1"
|
|
bitfld.long 0x8 11. "NWTCFG,Wait timing configuration" "0,1"
|
|
bitfld.long 0x8 10. "WRAPEN,Wrapped enable" "0,1"
|
|
bitfld.long 0x8 9. "NWPOL,NWAIT polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8. "SYNCBEN,Synchronous burst enable" "0,1"
|
|
bitfld.long 0x8 6. "NOREN,Nor flash access enable" "0,1"
|
|
bitfld.long 0x8 4.--5. "EXTMDBW,External memory data bus width" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "DEV,Memory device type" "0,1,2,3"
|
|
bitfld.long 0x8 1. "ADMUXEN,Address and data multiplexing enable" "0,1"
|
|
bitfld.long 0x8 0. "EN,Memory bank enable" "0,1"
|
|
line.long 0xC "BK1TMG2,SRAM/NOR-Flash chip-select timing register 2"
|
|
bitfld.long 0xC 28.--29. "ASYNCM,Asynchronous mode" "0,1,2,3"
|
|
hexmask.long.byte 0xC 24.--27. 1. "DTLAT,Data latency"
|
|
hexmask.long.byte 0xC 20.--23. 1. "CLKPSC,Clock prescale"
|
|
hexmask.long.byte 0xC 16.--19. 1. "BUSLAT,Bus latency"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DTST,Asynchronous data setup time"
|
|
hexmask.long.byte 0xC 4.--7. 1. "ADDRHT,Address-hold time"
|
|
hexmask.long.byte 0xC 0.--3. 1. "ADDRST,Address setup time"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "BK1CTRL4,SRAM/NOR-Flash chip-select control register 4"
|
|
bitfld.long 0x0 19. "MWMC,Memory write mode control" "0,1"
|
|
bitfld.long 0x0 16.--18. "CRPGS,CRAM page size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 15. "NWASEN,NWAIT in asynchronous transfer enable" "0,1"
|
|
bitfld.long 0x0 14. "RWTD,Read-write timing different" "0,1"
|
|
bitfld.long 0x0 13. "NWSEN,NWAIT in synchronous transfer enable" "0,1"
|
|
bitfld.long 0x0 12. "WEN,Write enable" "0,1"
|
|
bitfld.long 0x0 11. "NWTCFG,Wait timing configuration" "0,1"
|
|
bitfld.long 0x0 10. "WRAPEN,Wrapped enable" "0,1"
|
|
bitfld.long 0x0 9. "NWPOL,NWAIT polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SYNCBEN,Synchronous burst enable" "0,1"
|
|
bitfld.long 0x0 6. "NOREN,Nor flash access enable" "0,1"
|
|
bitfld.long 0x0 4.--5. "EXTMDBW,External memory data bus width" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "DEV,Memory device type" "0,1,2,3"
|
|
bitfld.long 0x0 1. "ADMUXEN,Address and data multiplexing enable" "0,1"
|
|
bitfld.long 0x0 0. "EN,Memory bank enable" "0,1"
|
|
line.long 0x4 "BK1TMG4,SRAM/NOR-Flash chip-select timing register 4"
|
|
bitfld.long 0x4 28.--29. "ASYNCM,Asynchronous mode" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DTLAT,Data latency"
|
|
hexmask.long.byte 0x4 20.--23. 1. "CLKPSC,Clock prescale"
|
|
hexmask.long.byte 0x4 16.--19. 1. "BUSLAT,Bus latency"
|
|
hexmask.long.byte 0x4 8.--15. 1. "DTST,Asynchronous data setup time"
|
|
hexmask.long.byte 0x4 4.--7. 1. "ADDRHT,Address-hold time"
|
|
hexmask.long.byte 0x4 0.--3. 1. "ADDRST,Address setup time"
|
|
group.long 0x104++0x3
|
|
line.long 0x0 "BK1TMGWR1,SRAM/NOR-Flash write timing registers 1"
|
|
bitfld.long 0x0 28.--29. "ASYNCM,Asynchronous mode" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BUSLAT,Bus latency"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DTST,Asynchronous data setup time"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDRHT,Address-hold time"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDRST,Address setup time"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "BK1TMGWR2,SRAM/NOR-Flash write timing registers 2"
|
|
bitfld.long 0x0 28.--29. "ASYNCM,Asynchronous mode" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BUSLAT,Bus latency"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DTST,Asynchronous data setup time"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDRHT,Address-hold time"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDRST,Address setup time"
|
|
group.long 0x11C++0x3
|
|
line.long 0x0 "BK1TMGWR4,SRAM/NOR-Flash write timing registers 4"
|
|
bitfld.long 0x0 28.--29. "ASYNCM,Asynchronous mode" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BUSLAT,Bus latency"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DTST,Asynchronous data setup time"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDRHT,Address-hold time"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDRST,Address setup time"
|
|
group.long 0x220++0x7
|
|
line.long 0x0 "EXT1,externl timeing register 1"
|
|
hexmask.long.byte 0x0 8.--15. 1. "BUSLATR2R,Bus turnaround phase for consecutive read duration"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BUSLATW2W,Bus turnaround phase for consecutive write duration"
|
|
line.long 0x4 "EXT2,externl timeing register 2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "BUSLATR2R,Bus turnaround phase for consecutive read duration"
|
|
hexmask.long.byte 0x4 0.--7. 1. "BUSLATW2W,Bus turnaround phase for consecutive write duration"
|
|
group.long 0x22C++0x3
|
|
line.long 0x0 "EXT4,externl timeing register 4"
|
|
hexmask.long.byte 0x0 8.--15. 1. "BUSLATR2R,Bus turnaround phase for consecutive read duration"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BUSLATW2W,Bus turnaround phase for consecutive write duration"
|
|
tree.end
|
|
newline
|
|
AUTOINDENT.OFF
|