70746 lines
5.1 MiB
70746 lines
5.1 MiB
; --------------------------------------------------------------------------------
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; @Title: IMXRT1020 On-Chip Peripherals
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; @Props: Released
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; @Author: BBP, PIJ, MSZ, DAB
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; @Changelog: 2018-10-24 PIJ
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; 2019-01-28 TRJ
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; 2022-01-19 DAB
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; @Manufacturer: NXP - NXP Semiconductors
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; @Doc: IMXRT1020XEC_Rev_B.pdf (Rev. B, 02/2018)
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; IMXRT1020XEC_Rev_C.pdf (Rev. C, 05/2018)
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; IMX1020RT_RM_Rev_B.pdf (Rev. B, 12/2017)
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; @Core: Cortex-M7F
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; @Chip: IMXRT1021
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; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perimxrt1020.per 17736 2024-04-08 09:26:07Z kwisniewski $
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; Known Problems:
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; Module Register Description
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; --------------------------------------------------------------------------------
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; GPIO DR_SET, DR_CLEAR, Bit values not described
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; DR_TOGGLE
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; FLEXCAN ESR1 RX/TX bit descriptions inconsistent with
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; Table 24-19
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; IOMUXC IOMUXC_GPR_GPR4 CANx_STOP_REQ / CANx_STOP_ACK bits not defined
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; (required to check if FlexCAN is in Stop Mode)
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; OCOTP HW_OCOTP_READ_CTRL Register name (OTP Controller Write Data)
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; inconsistent with its purpose
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; uSDHC PRES_STATE Listed states inconsistent with DLSL bitfield
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; description
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; CLK_TUNE_CTRL_STATUS Function description states that 'all bits are
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; read only' while the diagram has also rw fields
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; USB HWGENERAL To many states described in PHYM bitfield
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tree.close "Core Registers (Cortex-M7F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 28. " DISFPUISSOPT ,DISFPUISSOPT" "No,Yes"
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bitfld.long 0x00 27. " DISCRITAXIRUW ,Disables critical AXI read-under-write" "No,Yes"
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bitfld.long 0x00 26. " DISDYNADD ,Disables dynamic allocation of ADD and SUB instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 21.--25. " DISISSCH1 ,DISISSCH1" "Normal,Not issued in ch1,,,,,,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..."
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bitfld.long 0x00 16.--20. " DISDI ,DISDI" "Normal,ch1,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..."
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bitfld.long 0x00 15. " DISCRITAXIRUR ,Disables critical AXI read-under-read" "No,Yes"
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textline " "
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bitfld.long 0x00 14. " DISBTACALLOC ,DISBTACALLOC" "No,Yes"
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bitfld.long 0x00 13. " DISBTACREAD ,DISBTACREAD" "No,Yes"
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bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
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textline " "
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bitfld.long 0x00 11. " DISRAMODE ,Disables dynamic read allocate mode for Write-Back Write-Allocate memory regions" "No,Yes"
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bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
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textline ""
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group.long 0x10++0x03
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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group.long 0x14++0x07
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line.long 0x00 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x04 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPUID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,Revision 1,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Patch 0,Patch 1,Patch 2,?..."
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control and State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,On writes, makes the NMI exception active. On reads, indicates the state of the exception" "Inactive,Active"
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setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes, sets the PendSV exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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textline " "
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rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
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rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
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textline " "
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rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
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rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,Writing 1 to this bit causes a local system reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration and Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,Determines whether the exception entry sequence guarantees 8-byte stack frame alignment, adjusting the SP if necessary before saving state" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise data access faults on handlers running at priority -1 or priority -2" "Lockup,Ignored"
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bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
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bitfld.long 0x10 0. " NONBASETHRDENA ,Controls whether the processor can enter Thread mode at an execution priority level other than base level" "Disabled,Enabled"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,MemManage" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall status" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault status" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage status" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault status" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick status" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV status" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor status" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall status" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault status" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault status" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage status" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x13
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line.long 0x00 "HFSR,HardFault Status Register"
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eventfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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eventfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
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eventfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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eventfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not occurred,Occurred"
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eventfld.long 0x04 3. " VCATCH ,Indicates triggering of a Vector catch" "Not occurred,Occurred"
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eventfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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eventfld.long 0x04 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not occurred,Occurred"
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eventfld.long 0x04 0. " HALTED ,Indicates a debug event generated by a C_HALT or C_STEP request or a step request triggered by setting DEMCR.MON_STEP to 1" "Not occurred,Occurred"
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line.long 0x08 "MMFAR,MemManage Fault Address Register"
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line.long 0x0C "BFAR,BusFault Address Register"
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line.long 0x10 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Denied,Privileged,,Full"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Triggered Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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tree "Memory System"
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width 10.
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rgroup.long 0xD78++0x0B
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line.long 0x00 "CLIDR,Cache Level ID Register"
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bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,level 2,?..."
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bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,level 2,?..."
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bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,?..."
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textline " "
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bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
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bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
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bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
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textline " "
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bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
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bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
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bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
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line.long 0x04 "CTR,Cache Type Register"
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bitfld.long 0x04 29.--31. " FORMAT ,Indicates the implemented CTR format" ",,,,ARMv7,?..."
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bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
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bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
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textline " "
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bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x08 "CCSIDR,Cache Size ID Register"
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bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
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bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
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bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
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textline " "
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bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
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hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
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hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
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textline " "
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bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
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group.long 0xD84++0x03
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line.long 0x00 "CSSELR,Cache Size Selection Register"
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bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,?..."
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bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data,Instruction"
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wgroup.long 0xF50++0x03
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line.long 0x00 "ICIALLU,Instruction cache invalidate all to Point of Unification"
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wgroup.long 0xF58++0x1F
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line.long 0x00 "ICIMVAU,Instruction cache invalidate by address to PoU"
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line.long 0x04 "DCIMVAC,Data cache invalidate by address to Point of Coherency (PoC)"
|
|
line.long 0x08 "DCISW,Data cache invalidate by set/way"
|
|
line.long 0x0C "DCCMVAU,Data cache by address to PoU"
|
|
line.long 0x10 "DCCMVAC,Data cache clean by address to PoC"
|
|
line.long 0x14 "DCCSW,Data cache clean by set/way"
|
|
line.long 0x18 "DCCIMVAC,Data cache clean and invalidate by address to PoC"
|
|
line.long 0x1C "DCCISW,Data cache clean and invalidate by set/way"
|
|
group.long 0xF90++0x13
|
|
line.long 0x00 "ITCMCR,Instruction Tightly-Coupled Memory Control Register"
|
|
bitfld.long 0x00 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB"
|
|
bitfld.long 0x00 2. " RETEN ,Retry phase enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,TCM enable" "Disabled,Enabled"
|
|
line.long 0x04 "DTCMCR,Data Tightly-Coupled Memory Control Register"
|
|
bitfld.long 0x04 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB"
|
|
bitfld.long 0x04 2. " RETEN ,Retry phase enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " EN ,TCM enable" "Disabled,Enabled"
|
|
line.long 0x08 "AHBPCR,AHBP control register"
|
|
bitfld.long 0x08 1.--3. " SZ ,AHBP size" "AHBP disabled,64 MB,128 MB,256 MB,512 MB,?..."
|
|
bitfld.long 0x08 0. " EN ,AHBP enable" "Disabled,Enabled"
|
|
line.long 0x0C "CACR,L1 Cache Control Register"
|
|
bitfld.long 0x0C 2. " FORCEWT ,Enables Force Write-through in the data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " ECCDIS ,Disables ECC in the instruction and data cache" "No,Yes"
|
|
bitfld.long 0x0C 0. " SIWT ,Enables limited cache coherency usage" "Disabled,Enabled"
|
|
line.long 0x10 "AHBSCR,AHB Slave Control Register"
|
|
bitfld.long 0x10 11.--15. " INITCOUNT ,Fairness counter initialization value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x10 2.--10. 1. " TPRI ,Threshold execution priority for AHBS traffic demotion"
|
|
bitfld.long 0x10 0.--1. " CTL ,AHBS prioritization control" "AHBS,Software,AHBSCR.INITCOUNT,AHBSPRI"
|
|
group.long 0xFA8++0x03
|
|
line.long 0x00 "ABFSR,Auxiliary Bus Fault Status Register"
|
|
bitfld.long 0x00 8.--9. " AXIMTYPE ,Indicates the type of fault on the AXIM interface" "OKAY,EXOKAY,SLVERR,DECERR"
|
|
bitfld.long 0x00 4. " EPPB ,Asynchronous fault on EPPB interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " AXIM ,Asynchronous fault on AXIM interface" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBP ,Asynchronous fault on AHBP interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " DTCM ,Asynchronous fault on DTCM interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ITCM ,Asynchronous fault on ITCM interface" "Not occurred,Occurred"
|
|
group.long 0xFB0++0x03
|
|
line.long 0x00 "IEBR0,Instruction Error bank Register 0"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFB4++0x03
|
|
line.long 0x00 "IEBR1,Instruction Error bank Register 1"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFB8++0x03
|
|
line.long 0x00 "DEBR0,Data Error bank Register 0"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFBC++0x03
|
|
line.long 0x00 "DEBR1,Data Error bank Register 1"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
tree.end
|
|
tree "Feature Registers"
|
|
width 10.
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
tree "CoreSight Identification Registers"
|
|
width 6.
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM7F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
newline
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x0B
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
newline
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
|
|
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
newline
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
newline
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
newline
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
config 16. 8.
|
|
tree.open "CMP (Comparator)"
|
|
tree "CMP 1"
|
|
base ad:0x40094000
|
|
width 7.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "CR0,Control Register 0"
|
|
bitfld.byte 0x00 4.--6. " FILTER_CNT ,Filter sample count" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--1. " HYSTCTR ,Comparator hard block hysteresis control" "0,1,2,3"
|
|
line.byte 0x01 "CR1,Control Register 1"
|
|
bitfld.byte 0x01 7. " SE ,Sample enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " WE ,Windowing enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 4. " PMODE ,Power mode select" "LS,HS"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " INV ,Comparator invert" "Not inverted,Inverted"
|
|
bitfld.byte 0x01 2. " COS ,Comparator output select" "COUT,COUTA"
|
|
bitfld.byte 0x01 1. " OPE ,Comparator output pin enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " EN ,Comparator module enable" "Disabled,Enabled"
|
|
line.byte 0x02 "FPR,Filter Period Register"
|
|
line.byte 0x03 "SCR,Status And Control Register"
|
|
bitfld.byte 0x03 6. " DMAEN ,DMA enable control" "Disabled,Enabled"
|
|
bitfld.byte 0x03 4. " IER ,Comparator interrupt enable rising" "Disabled,Enabled"
|
|
bitfld.byte 0x03 3. " IEF ,Comparator interrupt enable falling" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.byte 0x03 2. " CFR ,Analog comparator flag rising" "Not occurred,Occurred"
|
|
eventfld.byte 0x03 1. " CFF ,Analog comparator flag falling" "Not occurred,Occurred"
|
|
rbitfld.byte 0x03 0. " COUT ,Analog comparator output" "0,1"
|
|
line.byte 0x04 "DACCR,DAC Control Register"
|
|
bitfld.byte 0x04 7. " DACEN ,DAC enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " VRSEL ,Supply voltage reference source select" "V_in1,V_in2"
|
|
bitfld.byte 0x04 0.--5. " VOSEL ,DAC output voltage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.byte 0x05 "MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Plus input mux control" "IN0,IN1,IN2,IN3,IN4,IN5,IN6,IN7"
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input mux control" "IN0,IN1,IN2,IN3,IN4,IN5,IN6,IN7"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CMP 2"
|
|
base ad:0x40094008
|
|
width 7.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "CR0,Control Register 0"
|
|
bitfld.byte 0x00 4.--6. " FILTER_CNT ,Filter sample count" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--1. " HYSTCTR ,Comparator hard block hysteresis control" "0,1,2,3"
|
|
line.byte 0x01 "CR1,Control Register 1"
|
|
bitfld.byte 0x01 7. " SE ,Sample enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " WE ,Windowing enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 4. " PMODE ,Power mode select" "LS,HS"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " INV ,Comparator invert" "Not inverted,Inverted"
|
|
bitfld.byte 0x01 2. " COS ,Comparator output select" "COUT,COUTA"
|
|
bitfld.byte 0x01 1. " OPE ,Comparator output pin enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " EN ,Comparator module enable" "Disabled,Enabled"
|
|
line.byte 0x02 "FPR,Filter Period Register"
|
|
line.byte 0x03 "SCR,Status And Control Register"
|
|
bitfld.byte 0x03 6. " DMAEN ,DMA enable control" "Disabled,Enabled"
|
|
bitfld.byte 0x03 4. " IER ,Comparator interrupt enable rising" "Disabled,Enabled"
|
|
bitfld.byte 0x03 3. " IEF ,Comparator interrupt enable falling" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.byte 0x03 2. " CFR ,Analog comparator flag rising" "Not occurred,Occurred"
|
|
eventfld.byte 0x03 1. " CFF ,Analog comparator flag falling" "Not occurred,Occurred"
|
|
rbitfld.byte 0x03 0. " COUT ,Analog comparator output" "0,1"
|
|
line.byte 0x04 "DACCR,DAC Control Register"
|
|
bitfld.byte 0x04 7. " DACEN ,DAC enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " VRSEL ,Supply voltage reference source select" "V_in1,V_in2"
|
|
bitfld.byte 0x04 0.--5. " VOSEL ,DAC output voltage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.byte 0x05 "MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Plus input mux control" "IN0,IN1,IN2,IN3,IN4,IN5,IN6,IN7"
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input mux control" "IN0,IN1,IN2,IN3,IN4,IN5,IN6,IN7"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CMP 3"
|
|
base ad:0x40094010
|
|
width 7.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "CR0,Control Register 0"
|
|
bitfld.byte 0x00 4.--6. " FILTER_CNT ,Filter sample count" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--1. " HYSTCTR ,Comparator hard block hysteresis control" "0,1,2,3"
|
|
line.byte 0x01 "CR1,Control Register 1"
|
|
bitfld.byte 0x01 7. " SE ,Sample enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " WE ,Windowing enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 4. " PMODE ,Power mode select" "LS,HS"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " INV ,Comparator invert" "Not inverted,Inverted"
|
|
bitfld.byte 0x01 2. " COS ,Comparator output select" "COUT,COUTA"
|
|
bitfld.byte 0x01 1. " OPE ,Comparator output pin enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " EN ,Comparator module enable" "Disabled,Enabled"
|
|
line.byte 0x02 "FPR,Filter Period Register"
|
|
line.byte 0x03 "SCR,Status And Control Register"
|
|
bitfld.byte 0x03 6. " DMAEN ,DMA enable control" "Disabled,Enabled"
|
|
bitfld.byte 0x03 4. " IER ,Comparator interrupt enable rising" "Disabled,Enabled"
|
|
bitfld.byte 0x03 3. " IEF ,Comparator interrupt enable falling" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.byte 0x03 2. " CFR ,Analog comparator flag rising" "Not occurred,Occurred"
|
|
eventfld.byte 0x03 1. " CFF ,Analog comparator flag falling" "Not occurred,Occurred"
|
|
rbitfld.byte 0x03 0. " COUT ,Analog comparator output" "0,1"
|
|
line.byte 0x04 "DACCR,DAC Control Register"
|
|
bitfld.byte 0x04 7. " DACEN ,DAC enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " VRSEL ,Supply voltage reference source select" "V_in1,V_in2"
|
|
bitfld.byte 0x04 0.--5. " VOSEL ,DAC output voltage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.byte 0x05 "MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Plus input mux control" "IN0,IN1,IN2,IN3,IN4,IN5,IN6,IN7"
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input mux control" "IN0,IN1,IN2,IN3,IN4,IN5,IN6,IN7"
|
|
width 0x0B
|
|
tree.end
|
|
tree "CMP 4"
|
|
base ad:0x40094018
|
|
width 7.
|
|
group.byte 0x00++0x05
|
|
line.byte 0x00 "CR0,Control Register 0"
|
|
bitfld.byte 0x00 4.--6. " FILTER_CNT ,Filter sample count" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--1. " HYSTCTR ,Comparator hard block hysteresis control" "0,1,2,3"
|
|
line.byte 0x01 "CR1,Control Register 1"
|
|
bitfld.byte 0x01 7. " SE ,Sample enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " WE ,Windowing enable" "Disabled,Enabled"
|
|
bitfld.byte 0x01 4. " PMODE ,Power mode select" "LS,HS"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " INV ,Comparator invert" "Not inverted,Inverted"
|
|
bitfld.byte 0x01 2. " COS ,Comparator output select" "COUT,COUTA"
|
|
bitfld.byte 0x01 1. " OPE ,Comparator output pin enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " EN ,Comparator module enable" "Disabled,Enabled"
|
|
line.byte 0x02 "FPR,Filter Period Register"
|
|
line.byte 0x03 "SCR,Status And Control Register"
|
|
bitfld.byte 0x03 6. " DMAEN ,DMA enable control" "Disabled,Enabled"
|
|
bitfld.byte 0x03 4. " IER ,Comparator interrupt enable rising" "Disabled,Enabled"
|
|
bitfld.byte 0x03 3. " IEF ,Comparator interrupt enable falling" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.byte 0x03 2. " CFR ,Analog comparator flag rising" "Not occurred,Occurred"
|
|
eventfld.byte 0x03 1. " CFF ,Analog comparator flag falling" "Not occurred,Occurred"
|
|
rbitfld.byte 0x03 0. " COUT ,Analog comparator output" "0,1"
|
|
line.byte 0x04 "DACCR,DAC Control Register"
|
|
bitfld.byte 0x04 7. " DACEN ,DAC enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " VRSEL ,Supply voltage reference source select" "V_in1,V_in2"
|
|
bitfld.byte 0x04 0.--5. " VOSEL ,DAC output voltage select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.byte 0x05 "MUXCR,MUX Control Register"
|
|
bitfld.byte 0x05 3.--5. " PSEL ,Plus input mux control" "IN0,IN1,IN2,IN3,IN4,IN5,IN6,IN7"
|
|
bitfld.byte 0x05 0.--2. " MSEL ,Minus input mux control" "IN0,IN1,IN2,IN3,IN4,IN5,IN6,IN7"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "ADC (Analog-to-Digital Converter)"
|
|
tree "ADC 1"
|
|
base ad:0x400C4000
|
|
width 5.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "HC0,Control Register For Hardware Triggers 0"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
if (((per.l(ad:0x400C4000+0x44)&0x2000)==0x2000))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "HC1,Control Register For Hardware Triggers 1"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "HC2,Control Register For Hardware Triggers 2"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "HC3,Control Register For Hardware Triggers 3"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "HC4,Control Register For Hardware Triggers 4"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "HC5,Control Register For Hardware Triggers 5"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "HC6,Control Register For Hardware Triggers 6"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "HC7,Control Register For Hardware Triggers 7"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
endif
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "HS,Status Register For HW Triggers"
|
|
bitfld.long 0x00 0. " COCO0 ,Conversion complete flag" "Not occurred,Occurred"
|
|
textline " "
|
|
hgroup.long 0x24++0x03
|
|
hide.long 0x00 "R0,Data Result Register For HW Triggers 0"
|
|
in
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x00 "R1,Data Result Register For HW Triggers 1"
|
|
in
|
|
hgroup.long 0x2C++0x03
|
|
hide.long 0x00 "R2,Data Result Register For HW Triggers 2"
|
|
in
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "R3,Data Result Register For HW Triggers 3"
|
|
in
|
|
hgroup.long 0x34++0x03
|
|
hide.long 0x00 "R4,Data Result Register For HW Triggers 4"
|
|
in
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "R5,Data Result Register For HW Triggers 5"
|
|
in
|
|
hgroup.long 0x3C++0x03
|
|
hide.long 0x00 "R6,Data Result Register For HW Triggers 6"
|
|
in
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "R7,Data Result Register For HW Triggers 7"
|
|
in
|
|
if (((per.l(ad:0x400C4000+0x44))&0x10)==0x10)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 16. " OVWREN ,Data overwrite enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " AVGS ,Hardware average select" "4,8,16,32"
|
|
bitfld.long 0x00 13. " ADTRG ,Conversion trigger select" "Software,Hardware"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " REFSEL ,Voltage reference selection" "VREFH/VREFL,?..."
|
|
bitfld.long 0x00 10. " ADHSC ,High speed configuration" "Normal,High"
|
|
bitfld.long 0x00 8.--9. " ADSTS ,Defines the sample time duration" "12,16,20,24"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ADLPC ,Low-power configuration" "Not low-power,low-power"
|
|
bitfld.long 0x00 5.--6. " ADIV ,Clock divide select" "/1,/2,/4,/8"
|
|
bitfld.long 0x00 4. " ADLSMP ,Long sample time configuration" "Short,Long"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE ,Conversion mode selection" "8,10,12,?..."
|
|
bitfld.long 0x00 0.--1. " ADICLK ,Input clock select" "IPG,IPG/2,,ADACK"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 16. " OVWREN ,Data overwrite enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " AVGS ,Hardware average select" "4,8,16,32"
|
|
bitfld.long 0x00 13. " ADTRG ,Conversion trigger select" "Software,Hardware"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " REFSEL ,Voltage reference selection" "VREFH/VREFL,?..."
|
|
bitfld.long 0x00 10. " ADHSC ,High speed configuration" "Normal,High"
|
|
bitfld.long 0x00 8.--9. " ADSTS ,Defines the sample time duration" "2,4,6,8"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ADLPC ,Low-power configuration" "Not low-power,low-power"
|
|
bitfld.long 0x00 5.--6. " ADIV ,Clock divide select" "/1,/2,/4,/8"
|
|
bitfld.long 0x00 4. " ADLSMP ,Long sample time configuration" "Short,Long"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE ,Conversion mode selection" "8,10,12,?..."
|
|
bitfld.long 0x00 0.--1. " ADICLK ,Input clock select" "IPG,IPG/2,,ADACK"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "GC,General Control Register"
|
|
bitfld.long 0x00 7. " CAL ,Calibration" "Idle,In progress"
|
|
bitfld.long 0x00 6. " ADCO ,Continuous conversion enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " AVGE ,Hardware average enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACFE ,Compare function enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACFGT ,Compare function greater than enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ACREN ,Compare function range enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMAEN ,DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADACKEN ,Asynchronous clock output enable" "Disabled,Enabled"
|
|
line.long 0x04 "GS,General Status Register"
|
|
eventfld.long 0x04 2. " AWKST ,Asynchronous wakeup interrupt status" "Not occurred,Occurred"
|
|
eventfld.long 0x04 1. " CALF ,Calibration failed flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 0. " ADACT ,Conversion active" "Idle,In progress"
|
|
if (((per.l(ad:0x400C4000+0x48)&0x14)==0x14))
|
|
if (((per.l(ad:0x400C4000+0x44)&0x0C)==0x00))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CV2 ,Compare value 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CV1 ,Compare value 1"
|
|
elif (((per.l(ad:0x400C4000+0x44)&0x0C)==0x04))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CV2 ,Compare value 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " CV1 ,Compare value 1"
|
|
elif (((per.l(ad:0x400C4000+0x44)&0x0C)==0x08))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " CV2 ,Compare value 2"
|
|
hexmask.long.word 0x00 0.--11. 1. " CV1 ,Compare value 1"
|
|
else
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "CV,Compare Value Register"
|
|
endif
|
|
elif (((per.l(ad:0x400C4000+0x48)&0x14)==0x10))
|
|
if (((per.l(ad:0x400C4000+0x44)&0x0C)==0x00))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CV1 ,Compare value 1"
|
|
elif (((per.l(ad:0x400C4000+0x44)&0x0C)==0x04))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " CV1 ,Compare value 1"
|
|
elif (((per.l(ad:0x400C4000+0x44)&0x0C)==0x08))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " CV1 ,Compare value 1"
|
|
else
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "CV,Compare Value Register"
|
|
endif
|
|
else
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "CV,Compare Value Register"
|
|
endif
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "OFS,Offset Correction Value Register"
|
|
bitfld.long 0x00 12. " SIGN ,Sign bit" "Added,Subtracted"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " OFS ,Offset value"
|
|
line.long 0x04 "CAL,Calibration Value Register"
|
|
bitfld.long 0x04 0.--3. " CAL_CODE ,Calibration result value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
tree "ADC 2"
|
|
base ad:0x400C8000
|
|
width 5.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "HC0,Control Register For Hardware Triggers 0"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
if (((per.l(ad:0x400C8000+0x44)&0x2000)==0x2000))
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "HC1,Control Register For Hardware Triggers 1"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "HC2,Control Register For Hardware Triggers 2"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "HC3,Control Register For Hardware Triggers 3"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "HC4,Control Register For Hardware Triggers 4"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "HC5,Control Register For Hardware Triggers 5"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "HC6,Control Register For Hardware Triggers 6"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "HC7,Control Register For Hardware Triggers 7"
|
|
bitfld.long 0x00 7. " AIEN ,Conversion complete interrupt enable/disable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " ADCH ,Input channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,ADC_ETC,,,,,,,,,VREFSH,,,,,,Disabled"
|
|
endif
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "HS,Status Register For HW Triggers"
|
|
bitfld.long 0x00 0. " COCO0 ,Conversion complete flag" "Not occurred,Occurred"
|
|
textline " "
|
|
hgroup.long 0x24++0x03
|
|
hide.long 0x00 "R0,Data Result Register For HW Triggers 0"
|
|
in
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x00 "R1,Data Result Register For HW Triggers 1"
|
|
in
|
|
hgroup.long 0x2C++0x03
|
|
hide.long 0x00 "R2,Data Result Register For HW Triggers 2"
|
|
in
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "R3,Data Result Register For HW Triggers 3"
|
|
in
|
|
hgroup.long 0x34++0x03
|
|
hide.long 0x00 "R4,Data Result Register For HW Triggers 4"
|
|
in
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "R5,Data Result Register For HW Triggers 5"
|
|
in
|
|
hgroup.long 0x3C++0x03
|
|
hide.long 0x00 "R6,Data Result Register For HW Triggers 6"
|
|
in
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "R7,Data Result Register For HW Triggers 7"
|
|
in
|
|
if (((per.l(ad:0x400C8000+0x44))&0x10)==0x10)
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 16. " OVWREN ,Data overwrite enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " AVGS ,Hardware average select" "4,8,16,32"
|
|
bitfld.long 0x00 13. " ADTRG ,Conversion trigger select" "Software,Hardware"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " REFSEL ,Voltage reference selection" "VREFH/VREFL,?..."
|
|
bitfld.long 0x00 10. " ADHSC ,High speed configuration" "Normal,High"
|
|
bitfld.long 0x00 8.--9. " ADSTS ,Defines the sample time duration" "12,16,20,24"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ADLPC ,Low-power configuration" "Not low-power,low-power"
|
|
bitfld.long 0x00 5.--6. " ADIV ,Clock divide select" "/1,/2,/4,/8"
|
|
bitfld.long 0x00 4. " ADLSMP ,Long sample time configuration" "Short,Long"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE ,Conversion mode selection" "8,10,12,?..."
|
|
bitfld.long 0x00 0.--1. " ADICLK ,Input clock select" "IPG,IPG/2,,ADACK"
|
|
else
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CFG,Configuration Register"
|
|
bitfld.long 0x00 16. " OVWREN ,Data overwrite enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " AVGS ,Hardware average select" "4,8,16,32"
|
|
bitfld.long 0x00 13. " ADTRG ,Conversion trigger select" "Software,Hardware"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " REFSEL ,Voltage reference selection" "VREFH/VREFL,?..."
|
|
bitfld.long 0x00 10. " ADHSC ,High speed configuration" "Normal,High"
|
|
bitfld.long 0x00 8.--9. " ADSTS ,Defines the sample time duration" "2,4,6,8"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ADLPC ,Low-power configuration" "Not low-power,low-power"
|
|
bitfld.long 0x00 5.--6. " ADIV ,Clock divide select" "/1,/2,/4,/8"
|
|
bitfld.long 0x00 4. " ADLSMP ,Long sample time configuration" "Short,Long"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MODE ,Conversion mode selection" "8,10,12,?..."
|
|
bitfld.long 0x00 0.--1. " ADICLK ,Input clock select" "IPG,IPG/2,,ADACK"
|
|
endif
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "GC,General Control Register"
|
|
bitfld.long 0x00 7. " CAL ,Calibration" "Idle,In progress"
|
|
bitfld.long 0x00 6. " ADCO ,Continuous conversion enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " AVGE ,Hardware average enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACFE ,Compare function enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACFGT ,Compare function greater than enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ACREN ,Compare function range enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DMAEN ,DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADACKEN ,Asynchronous clock output enable" "Disabled,Enabled"
|
|
line.long 0x04 "GS,General Status Register"
|
|
eventfld.long 0x04 2. " AWKST ,Asynchronous wakeup interrupt status" "Not occurred,Occurred"
|
|
eventfld.long 0x04 1. " CALF ,Calibration failed flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 0. " ADACT ,Conversion active" "Idle,In progress"
|
|
if (((per.l(ad:0x400C8000+0x48)&0x14)==0x14))
|
|
if (((per.l(ad:0x400C8000+0x44)&0x0C)==0x00))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CV2 ,Compare value 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CV1 ,Compare value 1"
|
|
elif (((per.l(ad:0x400C8000+0x44)&0x0C)==0x04))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " CV2 ,Compare value 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " CV1 ,Compare value 1"
|
|
elif (((per.l(ad:0x400C8000+0x44)&0x0C)==0x08))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " CV2 ,Compare value 2"
|
|
hexmask.long.word 0x00 0.--11. 1. " CV1 ,Compare value 1"
|
|
else
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "CV,Compare Value Register"
|
|
endif
|
|
elif (((per.l(ad:0x400C8000+0x48)&0x14)==0x10))
|
|
if (((per.l(ad:0x400C8000+0x44)&0x0C)==0x00))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CV1 ,Compare value 1"
|
|
elif (((per.l(ad:0x400C8000+0x44)&0x0C)==0x04))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " CV1 ,Compare value 1"
|
|
elif (((per.l(ad:0x400C8000+0x44)&0x0C)==0x08))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CV,Compare Value Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " CV1 ,Compare value 1"
|
|
else
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "CV,Compare Value Register"
|
|
endif
|
|
else
|
|
hgroup.long 0x50++0x03
|
|
hide.long 0x00 "CV,Compare Value Register"
|
|
endif
|
|
group.long 0x54++0x07
|
|
line.long 0x00 "OFS,Offset Correction Value Register"
|
|
bitfld.long 0x00 12. " SIGN ,Sign bit" "Added,Subtracted"
|
|
hexmask.long.word 0x00 0.--11. 0x01 " OFS ,Offset value"
|
|
line.long 0x04 "CAL,Calibration Value Register"
|
|
bitfld.long 0x04 0.--3. " CAL_CODE ,Calibration result value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "ADC_ETC (ADC External Trigger Control)"
|
|
base ad:0x403B0000
|
|
width 18.
|
|
group.long 0x00++0x0F
|
|
line.long 0x00 "CTRL,ADC_ETC Global Control Register"
|
|
bitfld.long 0x00 31. " SOFTRST , Software reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TSC_BYPASS , TSC_BYPASS" "Not bypassed,Bypassed"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PRE_DIVIDER ,Pre-divider for trig delay and interval"
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " EXT1_TRIG_PRIORITY , External TSC1 trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 12. " EXT1_TRIG_ENABLE , TSC1 TRIG enable register" "Disabled,Enabled"
|
|
bitfld.long 0x00 9.--11. " EXT0_TRIG_PRIORITY , External TSC0 trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EXT0_TRIG_ENABLE , TSC0 TRIG enable register" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TRIG_ENABLE ,TRIG enable register"
|
|
line.long 0x04 "DONE0_1_IRQ,ETC DONE0 and DONE1 IRQ State Register"
|
|
bitfld.long 0x04 23. " TRIG7_DONE1 , TRIG7 done1 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " TRIG6_DONE1 , TRIG6 done1 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " TRIG5_DONE1 , TRIG5 done1 interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 20. " TRIG4_DONE1 , TRIG4 done1 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " TRIG3_DONE1 , TRIG3 done1 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " TRIG2_DONE1 , TRIG2 done1 interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " TRIG1_DONE1 , TRIG1 done1 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " TRIG0_DONE1 , TRIG0 done1 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " TRIG7_DONE0 , TRIG7 done0 interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TRIG6_DONE0 , TRIG6 done0 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " TRIG5_DONE0 , TRIG5 done0 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " TRIG4_DONE0 , TRIG4 done0 interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " TRIG3_DONE0 , TRIG3 done0 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " TRIG2_DONE0 , TRIG2 done0 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TRIG1_DONE0 , TRIG1 done0 interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " TRIG0_DONE0 , TRIG0 done0 interrupt detection" "Disabled,Enabled"
|
|
line.long 0x08 "DONE2_ERR_IRQ,ETC DONE_2 and DONE_ERR IRQ State Register"
|
|
bitfld.long 0x08 23. " TRIG7_ERR , TRIG7 error interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " TRIG6_ERR , TRIG6 error interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " TRIG5_ERR , TRIG5 error interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 20. " TRIG4_ERR , TRIG4 error interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " TRIG3_ERR , TRIG3 error interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " TRIG2_ERR , TRIG2 error interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 17. " TRIG1_ERR , TRIG1 error interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " TRIG0_ERR , TRIG0 error interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " TRIG7_DONE2 , TRIG7 done2 interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " TRIG6_DONE2 , TRIG6 done2 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " TRIG5_DONE2 , TRIG5 done2 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " TRIG4_DONE2 , TRIG4 done2 interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " TRIG3_DONE2 , TRIG3 done2 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " TRIG2_DONE2 , TRIG2 done2 interrupt detection" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " TRIG1_DONE2 , TRIG1 done2 interrupt detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " TRIG0_DONE2 , TRIG0 done2 interrupt detection" "Disabled,Enabled"
|
|
line.long 0x0C "DMA_CTRL,ETC DMA control Register"
|
|
bitfld.long 0x0C 23. " TRIG7_REQ , When TRIG7 done DMA request detection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 22. " TRIG6_REQ , When TRIG6 done DMA request detection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 21. " TRIG5_REQ , When TRIG5 done DMA request detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 20. " TRIG4_REQ , When TRIG4 done DMA request detection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 19. " TRIG3_REQ , When TRIG3 done DMA request detection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " TRIG2_REQ , When TRIG2 done DMA request detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " TRIG1_REQ , When TRIG1 done DMA request detection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " TRIG0_REQ , When TRIG0 done DMA request detection" "Disabled,Enabled"
|
|
bitfld.long 0x0C 7. " TRIG7_ENABLE , When TRIG7 done enable DMA request" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 6. " TRIG6_ENABLE , When TRIG6 done enable DMA request" "Disabled,Enabled"
|
|
bitfld.long 0x0C 5. " TRIG5_ENABLE , When TRIG5 done enable DMA request" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " TRIG4_ENABLE , When TRIG4 done enable DMA request" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " TRIG3_ENABLE , When TRIG3 done enable DMA request" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " TRIG2_ENABLE , When TRIG2 done enable DMA request" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " TRIG1_ENABLE , When TRIG1 done enable DMA request" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " TRIG0_ENABLE , When TRIG0 done enable DMA request" "Disabled,Enabled"
|
|
tree "Trigger 0"
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "TRIG0_CTRL,ETC_TRIG0 Control Register"
|
|
bitfld.long 0x00 16. " SYNC_MODE , TRIG mode control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " TRIG_PRIORITY , External trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 8.--10. " TRIG_CHAIN , TRIG chain length to the ADC" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIG_MODE , TRIG mode register" "Hardware trigger,Software trigger"
|
|
bitfld.long 0x00 0. " SW_TRIG , Software write 1 as the TRIGGER" "Disabled,Enabled"
|
|
line.long 0x04 "TRIG0_COUNTER,ETC_TRIG0 Counter Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " SAMPLE_INTERVAL ,TRIGGER sampling interval counter"
|
|
hexmask.long.word 0x04 0.--15. 1. " INIT_DELAY ,TRIGGER initial delay counter"
|
|
line.long 0x08 "TRIG0_CHAIN_1_0,ETC_TRIG Chain 0/1 Register"
|
|
bitfld.long 0x08 29.--30. " IE1 , CHAIN1 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 28. " B2B1 , CHAIN1 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x08 20.--27. 1. " HWTS1 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " CSEL1 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 13.--14. " IE0 , CHAIN0 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 12. " B2B0 , CHAIN0 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " HWTS0 ,ADC hardware trigger selection"
|
|
bitfld.long 0x08 0.--3. " CSEL0 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "TRIG0_CHAIN_3_2,ETC_TRIG Chain 2/3 Register"
|
|
bitfld.long 0x0C 29.--30. " IE3 , CHAIN3 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 28. " B2B3 , CHAIN3 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " HWTS3 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--19. " CSEL3 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 13.--14. " IE2 , CHAIN2 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 12. " B2B2 , CHAIN2 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " HWTS2 ,ADC hardware trigger selection"
|
|
bitfld.long 0x0C 0.--3. " CSEL2 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "TRIG0_CHAIN_5_4,ETC_TRIG Chain 4/5 Register"
|
|
bitfld.long 0x10 29.--30. " IE5 , CHAIN5 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 28. " B2B5 , CHAIN5 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 20.--27. 1. " HWTS5 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " CSEL5 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " IE4 , CHAIN4 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 12. " B2B4 , CHAIN4 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 4.--11. 1. " HWTS4 ,ADC hardware trigger selection"
|
|
bitfld.long 0x10 0.--3. " CSEL4 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "TRIG0_CHAIN_7_6,ETC_TRIG Chain 6/7 Register"
|
|
bitfld.long 0x14 29.--30. " IE7 , CHAIN7 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 28. " B2B7 , CHAIN7 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 20.--27. 1. " HWTS7 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " CSEL7 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " IE6 , CHAIN6 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 12. " B2B6 , CHAIN6 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--11. 1. " HWTS6 ,ADC hardware trigger selection"
|
|
bitfld.long 0x14 0.--3. " CSEL6 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long (0x10+0x18)++0x0F
|
|
line.long 0x00 "TRIG0_RESULT_1_0,ETC_TRIG Result Data 1/0 Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA1 ,Result DATA1"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA0 ,Result DATA0"
|
|
line.long 0x04 "TRIG0_RESULT_3_2,ETC_TRIG Result Data 3/2 Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " DATA3 ,Result DATA3"
|
|
hexmask.long.word 0x04 0.--11. 1. " DATA2 ,Result DATA2"
|
|
line.long 0x08 "TRIG0_RESULT_5_4,ETC_TRIG Result Data 5/4 Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " DATA5 ,Result DATA5"
|
|
hexmask.long.word 0x08 0.--11. 1. " DATA4 ,Result DATA4"
|
|
line.long 0x0C "TRIG0_RESULT_7_6,ETC_TRIG Result Data 7/6 Register"
|
|
hexmask.long.word 0x0C 16.--27. 1. " DATA7 ,Result DATA7"
|
|
hexmask.long.word 0x0C 0.--11. 1. " DATA6 ,Result DATA6"
|
|
tree.end
|
|
tree "Trigger 1"
|
|
group.long 0x38++0x17
|
|
line.long 0x00 "TRIG1_CTRL,ETC_TRIG1 Control Register"
|
|
bitfld.long 0x00 16. " SYNC_MODE , TRIG mode control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " TRIG_PRIORITY , External trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 8.--10. " TRIG_CHAIN , TRIG chain length to the ADC" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIG_MODE , TRIG mode register" "Hardware trigger,Software trigger"
|
|
bitfld.long 0x00 0. " SW_TRIG , Software write 1 as the TRIGGER" "Disabled,Enabled"
|
|
line.long 0x04 "TRIG1_COUNTER,ETC_TRIG1 Counter Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " SAMPLE_INTERVAL ,TRIGGER sampling interval counter"
|
|
hexmask.long.word 0x04 0.--15. 1. " INIT_DELAY ,TRIGGER initial delay counter"
|
|
line.long 0x08 "TRIG1_CHAIN_1_0,ETC_TRIG Chain 0/1 Register"
|
|
bitfld.long 0x08 29.--30. " IE1 , CHAIN1 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 28. " B2B1 , CHAIN1 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x08 20.--27. 1. " HWTS1 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " CSEL1 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 13.--14. " IE0 , CHAIN0 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 12. " B2B0 , CHAIN0 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " HWTS0 ,ADC hardware trigger selection"
|
|
bitfld.long 0x08 0.--3. " CSEL0 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "TRIG1_CHAIN_3_2,ETC_TRIG Chain 2/3 Register"
|
|
bitfld.long 0x0C 29.--30. " IE3 , CHAIN3 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 28. " B2B3 , CHAIN3 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " HWTS3 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--19. " CSEL3 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 13.--14. " IE2 , CHAIN2 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 12. " B2B2 , CHAIN2 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " HWTS2 ,ADC hardware trigger selection"
|
|
bitfld.long 0x0C 0.--3. " CSEL2 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "TRIG1_CHAIN_5_4,ETC_TRIG Chain 4/5 Register"
|
|
bitfld.long 0x10 29.--30. " IE5 , CHAIN5 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 28. " B2B5 , CHAIN5 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 20.--27. 1. " HWTS5 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " CSEL5 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " IE4 , CHAIN4 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 12. " B2B4 , CHAIN4 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 4.--11. 1. " HWTS4 ,ADC hardware trigger selection"
|
|
bitfld.long 0x10 0.--3. " CSEL4 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "TRIG1_CHAIN_7_6,ETC_TRIG Chain 6/7 Register"
|
|
bitfld.long 0x14 29.--30. " IE7 , CHAIN7 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 28. " B2B7 , CHAIN7 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 20.--27. 1. " HWTS7 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " CSEL7 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " IE6 , CHAIN6 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 12. " B2B6 , CHAIN6 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--11. 1. " HWTS6 ,ADC hardware trigger selection"
|
|
bitfld.long 0x14 0.--3. " CSEL6 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long (0x38+0x18)++0x0F
|
|
line.long 0x00 "TRIG1_RESULT_1_0,ETC_TRIG Result Data 1/0 Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA1 ,Result DATA1"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA0 ,Result DATA0"
|
|
line.long 0x04 "TRIG1_RESULT_3_2,ETC_TRIG Result Data 3/2 Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " DATA3 ,Result DATA3"
|
|
hexmask.long.word 0x04 0.--11. 1. " DATA2 ,Result DATA2"
|
|
line.long 0x08 "TRIG1_RESULT_5_4,ETC_TRIG Result Data 5/4 Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " DATA5 ,Result DATA5"
|
|
hexmask.long.word 0x08 0.--11. 1. " DATA4 ,Result DATA4"
|
|
line.long 0x0C "TRIG1_RESULT_7_6,ETC_TRIG Result Data 7/6 Register"
|
|
hexmask.long.word 0x0C 16.--27. 1. " DATA7 ,Result DATA7"
|
|
hexmask.long.word 0x0C 0.--11. 1. " DATA6 ,Result DATA6"
|
|
tree.end
|
|
tree "Trigger 2"
|
|
group.long 0x60++0x17
|
|
line.long 0x00 "TRIG2_CTRL,ETC_TRIG2 Control Register"
|
|
bitfld.long 0x00 16. " SYNC_MODE , TRIG mode control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " TRIG_PRIORITY , External trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 8.--10. " TRIG_CHAIN , TRIG chain length to the ADC" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIG_MODE , TRIG mode register" "Hardware trigger,Software trigger"
|
|
bitfld.long 0x00 0. " SW_TRIG , Software write 1 as the TRIGGER" "Disabled,Enabled"
|
|
line.long 0x04 "TRIG2_COUNTER,ETC_TRIG2 Counter Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " SAMPLE_INTERVAL ,TRIGGER sampling interval counter"
|
|
hexmask.long.word 0x04 0.--15. 1. " INIT_DELAY ,TRIGGER initial delay counter"
|
|
line.long 0x08 "TRIG2_CHAIN_1_0,ETC_TRIG Chain 0/1 Register"
|
|
bitfld.long 0x08 29.--30. " IE1 , CHAIN1 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 28. " B2B1 , CHAIN1 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x08 20.--27. 1. " HWTS1 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " CSEL1 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 13.--14. " IE0 , CHAIN0 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 12. " B2B0 , CHAIN0 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " HWTS0 ,ADC hardware trigger selection"
|
|
bitfld.long 0x08 0.--3. " CSEL0 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "TRIG2_CHAIN_3_2,ETC_TRIG Chain 2/3 Register"
|
|
bitfld.long 0x0C 29.--30. " IE3 , CHAIN3 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 28. " B2B3 , CHAIN3 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " HWTS3 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--19. " CSEL3 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 13.--14. " IE2 , CHAIN2 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 12. " B2B2 , CHAIN2 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " HWTS2 ,ADC hardware trigger selection"
|
|
bitfld.long 0x0C 0.--3. " CSEL2 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "TRIG2_CHAIN_5_4,ETC_TRIG Chain 4/5 Register"
|
|
bitfld.long 0x10 29.--30. " IE5 , CHAIN5 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 28. " B2B5 , CHAIN5 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 20.--27. 1. " HWTS5 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " CSEL5 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " IE4 , CHAIN4 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 12. " B2B4 , CHAIN4 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 4.--11. 1. " HWTS4 ,ADC hardware trigger selection"
|
|
bitfld.long 0x10 0.--3. " CSEL4 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "TRIG2_CHAIN_7_6,ETC_TRIG Chain 6/7 Register"
|
|
bitfld.long 0x14 29.--30. " IE7 , CHAIN7 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 28. " B2B7 , CHAIN7 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 20.--27. 1. " HWTS7 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " CSEL7 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " IE6 , CHAIN6 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 12. " B2B6 , CHAIN6 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--11. 1. " HWTS6 ,ADC hardware trigger selection"
|
|
bitfld.long 0x14 0.--3. " CSEL6 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long (0x60+0x18)++0x0F
|
|
line.long 0x00 "TRIG2_RESULT_1_0,ETC_TRIG Result Data 1/0 Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA1 ,Result DATA1"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA0 ,Result DATA0"
|
|
line.long 0x04 "TRIG2_RESULT_3_2,ETC_TRIG Result Data 3/2 Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " DATA3 ,Result DATA3"
|
|
hexmask.long.word 0x04 0.--11. 1. " DATA2 ,Result DATA2"
|
|
line.long 0x08 "TRIG2_RESULT_5_4,ETC_TRIG Result Data 5/4 Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " DATA5 ,Result DATA5"
|
|
hexmask.long.word 0x08 0.--11. 1. " DATA4 ,Result DATA4"
|
|
line.long 0x0C "TRIG2_RESULT_7_6,ETC_TRIG Result Data 7/6 Register"
|
|
hexmask.long.word 0x0C 16.--27. 1. " DATA7 ,Result DATA7"
|
|
hexmask.long.word 0x0C 0.--11. 1. " DATA6 ,Result DATA6"
|
|
tree.end
|
|
tree "Trigger 3"
|
|
group.long 0x88++0x17
|
|
line.long 0x00 "TRIG3_CTRL,ETC_TRIG3 Control Register"
|
|
bitfld.long 0x00 16. " SYNC_MODE , TRIG mode control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " TRIG_PRIORITY , External trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 8.--10. " TRIG_CHAIN , TRIG chain length to the ADC" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIG_MODE , TRIG mode register" "Hardware trigger,Software trigger"
|
|
bitfld.long 0x00 0. " SW_TRIG , Software write 1 as the TRIGGER" "Disabled,Enabled"
|
|
line.long 0x04 "TRIG3_COUNTER,ETC_TRIG3 Counter Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " SAMPLE_INTERVAL ,TRIGGER sampling interval counter"
|
|
hexmask.long.word 0x04 0.--15. 1. " INIT_DELAY ,TRIGGER initial delay counter"
|
|
line.long 0x08 "TRIG3_CHAIN_1_0,ETC_TRIG Chain 0/1 Register"
|
|
bitfld.long 0x08 29.--30. " IE1 , CHAIN1 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 28. " B2B1 , CHAIN1 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x08 20.--27. 1. " HWTS1 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " CSEL1 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 13.--14. " IE0 , CHAIN0 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 12. " B2B0 , CHAIN0 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " HWTS0 ,ADC hardware trigger selection"
|
|
bitfld.long 0x08 0.--3. " CSEL0 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "TRIG3_CHAIN_3_2,ETC_TRIG Chain 2/3 Register"
|
|
bitfld.long 0x0C 29.--30. " IE3 , CHAIN3 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 28. " B2B3 , CHAIN3 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " HWTS3 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--19. " CSEL3 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 13.--14. " IE2 , CHAIN2 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 12. " B2B2 , CHAIN2 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " HWTS2 ,ADC hardware trigger selection"
|
|
bitfld.long 0x0C 0.--3. " CSEL2 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "TRIG3_CHAIN_5_4,ETC_TRIG Chain 4/5 Register"
|
|
bitfld.long 0x10 29.--30. " IE5 , CHAIN5 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 28. " B2B5 , CHAIN5 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 20.--27. 1. " HWTS5 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " CSEL5 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " IE4 , CHAIN4 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 12. " B2B4 , CHAIN4 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 4.--11. 1. " HWTS4 ,ADC hardware trigger selection"
|
|
bitfld.long 0x10 0.--3. " CSEL4 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "TRIG3_CHAIN_7_6,ETC_TRIG Chain 6/7 Register"
|
|
bitfld.long 0x14 29.--30. " IE7 , CHAIN7 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 28. " B2B7 , CHAIN7 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 20.--27. 1. " HWTS7 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " CSEL7 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " IE6 , CHAIN6 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 12. " B2B6 , CHAIN6 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--11. 1. " HWTS6 ,ADC hardware trigger selection"
|
|
bitfld.long 0x14 0.--3. " CSEL6 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long (0x88+0x18)++0x0F
|
|
line.long 0x00 "TRIG3_RESULT_1_0,ETC_TRIG Result Data 1/0 Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA1 ,Result DATA1"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA0 ,Result DATA0"
|
|
line.long 0x04 "TRIG3_RESULT_3_2,ETC_TRIG Result Data 3/2 Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " DATA3 ,Result DATA3"
|
|
hexmask.long.word 0x04 0.--11. 1. " DATA2 ,Result DATA2"
|
|
line.long 0x08 "TRIG3_RESULT_5_4,ETC_TRIG Result Data 5/4 Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " DATA5 ,Result DATA5"
|
|
hexmask.long.word 0x08 0.--11. 1. " DATA4 ,Result DATA4"
|
|
line.long 0x0C "TRIG3_RESULT_7_6,ETC_TRIG Result Data 7/6 Register"
|
|
hexmask.long.word 0x0C 16.--27. 1. " DATA7 ,Result DATA7"
|
|
hexmask.long.word 0x0C 0.--11. 1. " DATA6 ,Result DATA6"
|
|
tree.end
|
|
tree "Trigger 4"
|
|
group.long 0xB0++0x17
|
|
line.long 0x00 "TRIG4_CTRL,ETC_TRIG4 Control Register"
|
|
bitfld.long 0x00 16. " SYNC_MODE , TRIG mode control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " TRIG_PRIORITY , External trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 8.--10. " TRIG_CHAIN , TRIG chain length to the ADC" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIG_MODE , TRIG mode register" "Hardware trigger,Software trigger"
|
|
bitfld.long 0x00 0. " SW_TRIG , Software write 1 as the TRIGGER" "Disabled,Enabled"
|
|
line.long 0x04 "TRIG4_COUNTER,ETC_TRIG4 Counter Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " SAMPLE_INTERVAL ,TRIGGER sampling interval counter"
|
|
hexmask.long.word 0x04 0.--15. 1. " INIT_DELAY ,TRIGGER initial delay counter"
|
|
line.long 0x08 "TRIG4_CHAIN_1_0,ETC_TRIG Chain 0/1 Register"
|
|
bitfld.long 0x08 29.--30. " IE1 , CHAIN1 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 28. " B2B1 , CHAIN1 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x08 20.--27. 1. " HWTS1 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " CSEL1 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 13.--14. " IE0 , CHAIN0 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 12. " B2B0 , CHAIN0 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " HWTS0 ,ADC hardware trigger selection"
|
|
bitfld.long 0x08 0.--3. " CSEL0 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "TRIG4_CHAIN_3_2,ETC_TRIG Chain 2/3 Register"
|
|
bitfld.long 0x0C 29.--30. " IE3 , CHAIN3 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 28. " B2B3 , CHAIN3 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " HWTS3 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--19. " CSEL3 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 13.--14. " IE2 , CHAIN2 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 12. " B2B2 , CHAIN2 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " HWTS2 ,ADC hardware trigger selection"
|
|
bitfld.long 0x0C 0.--3. " CSEL2 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "TRIG4_CHAIN_5_4,ETC_TRIG Chain 4/5 Register"
|
|
bitfld.long 0x10 29.--30. " IE5 , CHAIN5 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 28. " B2B5 , CHAIN5 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 20.--27. 1. " HWTS5 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " CSEL5 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " IE4 , CHAIN4 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 12. " B2B4 , CHAIN4 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 4.--11. 1. " HWTS4 ,ADC hardware trigger selection"
|
|
bitfld.long 0x10 0.--3. " CSEL4 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "TRIG4_CHAIN_7_6,ETC_TRIG Chain 6/7 Register"
|
|
bitfld.long 0x14 29.--30. " IE7 , CHAIN7 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 28. " B2B7 , CHAIN7 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 20.--27. 1. " HWTS7 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " CSEL7 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " IE6 , CHAIN6 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 12. " B2B6 , CHAIN6 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--11. 1. " HWTS6 ,ADC hardware trigger selection"
|
|
bitfld.long 0x14 0.--3. " CSEL6 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long (0xB0+0x18)++0x0F
|
|
line.long 0x00 "TRIG4_RESULT_1_0,ETC_TRIG Result Data 1/0 Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA1 ,Result DATA1"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA0 ,Result DATA0"
|
|
line.long 0x04 "TRIG4_RESULT_3_2,ETC_TRIG Result Data 3/2 Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " DATA3 ,Result DATA3"
|
|
hexmask.long.word 0x04 0.--11. 1. " DATA2 ,Result DATA2"
|
|
line.long 0x08 "TRIG4_RESULT_5_4,ETC_TRIG Result Data 5/4 Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " DATA5 ,Result DATA5"
|
|
hexmask.long.word 0x08 0.--11. 1. " DATA4 ,Result DATA4"
|
|
line.long 0x0C "TRIG4_RESULT_7_6,ETC_TRIG Result Data 7/6 Register"
|
|
hexmask.long.word 0x0C 16.--27. 1. " DATA7 ,Result DATA7"
|
|
hexmask.long.word 0x0C 0.--11. 1. " DATA6 ,Result DATA6"
|
|
tree.end
|
|
tree "Trigger 5"
|
|
group.long 0xD8++0x17
|
|
line.long 0x00 "TRIG5_CTRL,ETC_TRIG5 Control Register"
|
|
bitfld.long 0x00 16. " SYNC_MODE , TRIG mode control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " TRIG_PRIORITY , External trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 8.--10. " TRIG_CHAIN , TRIG chain length to the ADC" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIG_MODE , TRIG mode register" "Hardware trigger,Software trigger"
|
|
bitfld.long 0x00 0. " SW_TRIG , Software write 1 as the TRIGGER" "Disabled,Enabled"
|
|
line.long 0x04 "TRIG5_COUNTER,ETC_TRIG5 Counter Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " SAMPLE_INTERVAL ,TRIGGER sampling interval counter"
|
|
hexmask.long.word 0x04 0.--15. 1. " INIT_DELAY ,TRIGGER initial delay counter"
|
|
line.long 0x08 "TRIG5_CHAIN_1_0,ETC_TRIG Chain 0/1 Register"
|
|
bitfld.long 0x08 29.--30. " IE1 , CHAIN1 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 28. " B2B1 , CHAIN1 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x08 20.--27. 1. " HWTS1 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " CSEL1 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 13.--14. " IE0 , CHAIN0 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 12. " B2B0 , CHAIN0 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " HWTS0 ,ADC hardware trigger selection"
|
|
bitfld.long 0x08 0.--3. " CSEL0 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "TRIG5_CHAIN_3_2,ETC_TRIG Chain 2/3 Register"
|
|
bitfld.long 0x0C 29.--30. " IE3 , CHAIN3 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 28. " B2B3 , CHAIN3 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " HWTS3 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--19. " CSEL3 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 13.--14. " IE2 , CHAIN2 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 12. " B2B2 , CHAIN2 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " HWTS2 ,ADC hardware trigger selection"
|
|
bitfld.long 0x0C 0.--3. " CSEL2 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "TRIG5_CHAIN_5_4,ETC_TRIG Chain 4/5 Register"
|
|
bitfld.long 0x10 29.--30. " IE5 , CHAIN5 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 28. " B2B5 , CHAIN5 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 20.--27. 1. " HWTS5 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " CSEL5 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " IE4 , CHAIN4 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 12. " B2B4 , CHAIN4 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 4.--11. 1. " HWTS4 ,ADC hardware trigger selection"
|
|
bitfld.long 0x10 0.--3. " CSEL4 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "TRIG5_CHAIN_7_6,ETC_TRIG Chain 6/7 Register"
|
|
bitfld.long 0x14 29.--30. " IE7 , CHAIN7 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 28. " B2B7 , CHAIN7 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 20.--27. 1. " HWTS7 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " CSEL7 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " IE6 , CHAIN6 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 12. " B2B6 , CHAIN6 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--11. 1. " HWTS6 ,ADC hardware trigger selection"
|
|
bitfld.long 0x14 0.--3. " CSEL6 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long (0xD8+0x18)++0x0F
|
|
line.long 0x00 "TRIG5_RESULT_1_0,ETC_TRIG Result Data 1/0 Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA1 ,Result DATA1"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA0 ,Result DATA0"
|
|
line.long 0x04 "TRIG5_RESULT_3_2,ETC_TRIG Result Data 3/2 Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " DATA3 ,Result DATA3"
|
|
hexmask.long.word 0x04 0.--11. 1. " DATA2 ,Result DATA2"
|
|
line.long 0x08 "TRIG5_RESULT_5_4,ETC_TRIG Result Data 5/4 Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " DATA5 ,Result DATA5"
|
|
hexmask.long.word 0x08 0.--11. 1. " DATA4 ,Result DATA4"
|
|
line.long 0x0C "TRIG5_RESULT_7_6,ETC_TRIG Result Data 7/6 Register"
|
|
hexmask.long.word 0x0C 16.--27. 1. " DATA7 ,Result DATA7"
|
|
hexmask.long.word 0x0C 0.--11. 1. " DATA6 ,Result DATA6"
|
|
tree.end
|
|
tree "Trigger 6"
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "TRIG6_CTRL,ETC_TRIG6 Control Register"
|
|
bitfld.long 0x00 16. " SYNC_MODE , TRIG mode control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " TRIG_PRIORITY , External trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 8.--10. " TRIG_CHAIN , TRIG chain length to the ADC" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIG_MODE , TRIG mode register" "Hardware trigger,Software trigger"
|
|
bitfld.long 0x00 0. " SW_TRIG , Software write 1 as the TRIGGER" "Disabled,Enabled"
|
|
line.long 0x04 "TRIG6_COUNTER,ETC_TRIG6 Counter Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " SAMPLE_INTERVAL ,TRIGGER sampling interval counter"
|
|
hexmask.long.word 0x04 0.--15. 1. " INIT_DELAY ,TRIGGER initial delay counter"
|
|
line.long 0x08 "TRIG6_CHAIN_1_0,ETC_TRIG Chain 0/1 Register"
|
|
bitfld.long 0x08 29.--30. " IE1 , CHAIN1 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 28. " B2B1 , CHAIN1 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x08 20.--27. 1. " HWTS1 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " CSEL1 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 13.--14. " IE0 , CHAIN0 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 12. " B2B0 , CHAIN0 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " HWTS0 ,ADC hardware trigger selection"
|
|
bitfld.long 0x08 0.--3. " CSEL0 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "TRIG6_CHAIN_3_2,ETC_TRIG Chain 2/3 Register"
|
|
bitfld.long 0x0C 29.--30. " IE3 , CHAIN3 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 28. " B2B3 , CHAIN3 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " HWTS3 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--19. " CSEL3 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 13.--14. " IE2 , CHAIN2 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 12. " B2B2 , CHAIN2 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " HWTS2 ,ADC hardware trigger selection"
|
|
bitfld.long 0x0C 0.--3. " CSEL2 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "TRIG6_CHAIN_5_4,ETC_TRIG Chain 4/5 Register"
|
|
bitfld.long 0x10 29.--30. " IE5 , CHAIN5 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 28. " B2B5 , CHAIN5 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 20.--27. 1. " HWTS5 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " CSEL5 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " IE4 , CHAIN4 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 12. " B2B4 , CHAIN4 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 4.--11. 1. " HWTS4 ,ADC hardware trigger selection"
|
|
bitfld.long 0x10 0.--3. " CSEL4 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "TRIG6_CHAIN_7_6,ETC_TRIG Chain 6/7 Register"
|
|
bitfld.long 0x14 29.--30. " IE7 , CHAIN7 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 28. " B2B7 , CHAIN7 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 20.--27. 1. " HWTS7 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " CSEL7 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " IE6 , CHAIN6 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 12. " B2B6 , CHAIN6 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--11. 1. " HWTS6 ,ADC hardware trigger selection"
|
|
bitfld.long 0x14 0.--3. " CSEL6 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long (0x100+0x18)++0x0F
|
|
line.long 0x00 "TRIG6_RESULT_1_0,ETC_TRIG Result Data 1/0 Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA1 ,Result DATA1"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA0 ,Result DATA0"
|
|
line.long 0x04 "TRIG6_RESULT_3_2,ETC_TRIG Result Data 3/2 Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " DATA3 ,Result DATA3"
|
|
hexmask.long.word 0x04 0.--11. 1. " DATA2 ,Result DATA2"
|
|
line.long 0x08 "TRIG6_RESULT_5_4,ETC_TRIG Result Data 5/4 Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " DATA5 ,Result DATA5"
|
|
hexmask.long.word 0x08 0.--11. 1. " DATA4 ,Result DATA4"
|
|
line.long 0x0C "TRIG6_RESULT_7_6,ETC_TRIG Result Data 7/6 Register"
|
|
hexmask.long.word 0x0C 16.--27. 1. " DATA7 ,Result DATA7"
|
|
hexmask.long.word 0x0C 0.--11. 1. " DATA6 ,Result DATA6"
|
|
tree.end
|
|
tree "Trigger 7"
|
|
group.long 0x128++0x17
|
|
line.long 0x00 "TRIG7_CTRL,ETC_TRIG7 Control Register"
|
|
bitfld.long 0x00 16. " SYNC_MODE , TRIG mode control" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " TRIG_PRIORITY , External trigger priority" "Lowest,1,2,3,4,5,6,Highest"
|
|
bitfld.long 0x00 8.--10. " TRIG_CHAIN , TRIG chain length to the ADC" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TRIG_MODE , TRIG mode register" "Hardware trigger,Software trigger"
|
|
bitfld.long 0x00 0. " SW_TRIG , Software write 1 as the TRIGGER" "Disabled,Enabled"
|
|
line.long 0x04 "TRIG7_COUNTER,ETC_TRIG7 Counter Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " SAMPLE_INTERVAL ,TRIGGER sampling interval counter"
|
|
hexmask.long.word 0x04 0.--15. 1. " INIT_DELAY ,TRIGGER initial delay counter"
|
|
line.long 0x08 "TRIG7_CHAIN_1_0,ETC_TRIG Chain 0/1 Register"
|
|
bitfld.long 0x08 29.--30. " IE1 , CHAIN1 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 28. " B2B1 , CHAIN1 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x08 20.--27. 1. " HWTS1 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x08 16.--19. " CSEL1 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 13.--14. " IE0 , CHAIN0 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x08 12. " B2B0 , CHAIN0 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " HWTS0 ,ADC hardware trigger selection"
|
|
bitfld.long 0x08 0.--3. " CSEL0 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "TRIG7_CHAIN_3_2,ETC_TRIG Chain 2/3 Register"
|
|
bitfld.long 0x0C 29.--30. " IE3 , CHAIN3 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 28. " B2B3 , CHAIN3 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " HWTS3 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x0C 16.--19. " CSEL3 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 13.--14. " IE2 , CHAIN2 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x0C 12. " B2B2 , CHAIN2 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " HWTS2 ,ADC hardware trigger selection"
|
|
bitfld.long 0x0C 0.--3. " CSEL2 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x10 "TRIG7_CHAIN_5_4,ETC_TRIG Chain 4/5 Register"
|
|
bitfld.long 0x10 29.--30. " IE5 , CHAIN5 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 28. " B2B5 , CHAIN5 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x10 20.--27. 1. " HWTS5 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x10 16.--19. " CSEL5 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 13.--14. " IE4 , CHAIN4 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x10 12. " B2B4 , CHAIN4 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x10 4.--11. 1. " HWTS4 ,ADC hardware trigger selection"
|
|
bitfld.long 0x10 0.--3. " CSEL4 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x14 "TRIG7_CHAIN_7_6,ETC_TRIG Chain 6/7 Register"
|
|
bitfld.long 0x14 29.--30. " IE7 , CHAIN7 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 28. " B2B7 , CHAIN7 B2B" "Disabled,Enabled"
|
|
hexmask.long.byte 0x14 20.--27. 1. " HWTS7 ,ADC hardware trigger selection"
|
|
textline " "
|
|
bitfld.long 0x14 16.--19. " CSEL7 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 13.--14. " IE6 , CHAIN6 IE" "No interrupt,Done0,Done1,Done2"
|
|
bitfld.long 0x14 12. " B2B6 , CHAIN6 B2B" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x14 4.--11. 1. " HWTS6 ,ADC hardware trigger selection"
|
|
bitfld.long 0x14 0.--3. " CSEL6 , ADC channel selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long (0x128+0x18)++0x0F
|
|
line.long 0x00 "TRIG7_RESULT_1_0,ETC_TRIG Result Data 1/0 Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " DATA1 ,Result DATA1"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA0 ,Result DATA0"
|
|
line.long 0x04 "TRIG7_RESULT_3_2,ETC_TRIG Result Data 3/2 Register"
|
|
hexmask.long.word 0x04 16.--27. 1. " DATA3 ,Result DATA3"
|
|
hexmask.long.word 0x04 0.--11. 1. " DATA2 ,Result DATA2"
|
|
line.long 0x08 "TRIG7_RESULT_5_4,ETC_TRIG Result Data 5/4 Register"
|
|
hexmask.long.word 0x08 16.--27. 1. " DATA5 ,Result DATA5"
|
|
hexmask.long.word 0x08 0.--11. 1. " DATA4 ,Result DATA4"
|
|
line.long 0x0C "TRIG7_RESULT_7_6,ETC_TRIG Result Data 7/6 Register"
|
|
hexmask.long.word 0x0C 16.--27. 1. " DATA7 ,Result DATA7"
|
|
hexmask.long.word 0x0C 0.--11. 1. " DATA6 ,Result DATA6"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "AIPSTZ (AHB to IP Bridge)"
|
|
tree "AIPSTZ 1"
|
|
base ad:0x4007C000
|
|
width 8.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "MPR,Master Privilege Registers"
|
|
bitfld.long 0x00 31. " MPROT0[31] ,Master 0 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 30. " [30] ,Master 0 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 29. " [29] ,Master 0 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 28. " [28] ,Master 0 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MPROT1[27] ,Master 1 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 26. " [26] ,Master 1 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 25. " [25] ,Master 1 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 24. " [24] ,Master 1 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
sif (cpu()=="IMXRT1021")
|
|
bitfld.long 0x00 23. " MPROT2[23] ,Master 2 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 22. " [22] ,Master 2 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 21. " [21] ,Master 2 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 20. " [20] ,Master 2 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " MPROT3[19] ,Master 3 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 18. " [18] ,Master 3 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 17. " [17] ,Master 3 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 16. " [16] ,Master 3 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
sif (cpu()=="IMXRT1021")
|
|
textline " "
|
|
bitfld.long 0x00 11. " MPROT5[11] ,Master 5 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 10. " [10] ,Master 5 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 9. " [9] ,Master 5 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 8. " [8] ,Master 5 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
endif
|
|
group.long 0x40++0x13
|
|
line.long 0x00 "OPACR,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x00 31. " OPAC0[31] ,Off-platform peripheral access control 0" "BW0,BW1"
|
|
bitfld.long 0x00 30. " [30] ,Off-platform peripheral access control 0" "SP0,SP1"
|
|
bitfld.long 0x00 29. " [29] ,Off-platform peripheral access control 0" "WP0,WP1"
|
|
bitfld.long 0x00 28. " [28] ,Off-platform peripheral access control 0" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OPAC1[27] ,Off-platform peripheral access control 1" "BW0,BW1"
|
|
bitfld.long 0x00 26. " [26] ,Off-platform peripheral access control 1" "SP0,SP1"
|
|
bitfld.long 0x00 25. " [25] ,Off-platform peripheral access control 1" "WP0,WP1"
|
|
bitfld.long 0x00 24. " [24] ,Off-platform peripheral access control 1" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " OPAC2[23] ,Off-platform peripheral access control 2" "BW0,BW1"
|
|
bitfld.long 0x00 22. " [22] ,Off-platform peripheral access control 2" "SP0,SP1"
|
|
bitfld.long 0x00 21. " [21] ,Off-platform peripheral access control 2" "WP0,WP1"
|
|
bitfld.long 0x00 20. " [20] ,Off-platform peripheral access control 2" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " OPAC3[19] ,Off-platform peripheral access control 3" "BW0,BW1"
|
|
bitfld.long 0x00 18. " [18] ,Off-platform peripheral access control 3" "SP0,SP1"
|
|
bitfld.long 0x00 17. " [17] ,Off-platform peripheral access control 3" "WP0,WP1"
|
|
bitfld.long 0x00 16. " [26] ,Off-platform peripheral access control 3" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " OPAC4[15] ,Off-platform peripheral access control 4" "BW0,BW1"
|
|
bitfld.long 0x00 14. " [14] ,Off-platform peripheral access control 4" "SP0,SP1"
|
|
bitfld.long 0x00 13. " [13] ,Off-platform peripheral access control 4" "WP0,WP1"
|
|
bitfld.long 0x00 12. " [12] ,Off-platform peripheral access control 4" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OPAC5[11] ,Off-platform peripheral access control 5" "BW0,BW1"
|
|
bitfld.long 0x00 10. " [10] ,Off-platform peripheral access control 5" "SP0,SP1"
|
|
bitfld.long 0x00 9. " [9] ,Off-platform peripheral access control 5" "WP0,WP1"
|
|
bitfld.long 0x00 8. " [8] ,Off-platform peripheral access control 5" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OPAC6[7] ,Off-platform peripheral access control 6" "BW0,BW1"
|
|
bitfld.long 0x00 6. " [6] ,Off-platform peripheral access control 6" "SP0,SP1"
|
|
bitfld.long 0x00 5. " [5] ,Off-platform peripheral access control 6" "WP0,WP1"
|
|
bitfld.long 0x00 4. " [4] ,Off-platform peripheral access control 6" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OPAC7[3] ,Off-platform peripheral access control 7" "BW0,BW1"
|
|
bitfld.long 0x00 2. " [2] ,Off-platform peripheral access control 7" "SP0,SP1"
|
|
bitfld.long 0x00 1. " [1] ,Off-platform peripheral access control 7" "WP0,WP1"
|
|
bitfld.long 0x00 0. " [0] ,Off-platform peripheral access control 7" "TP0,TP1"
|
|
line.long 0x04 "OPACR1,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x04 31. " OPAC8[31] ,Off-platform peripheral access control 8" "BW0,BW1"
|
|
bitfld.long 0x04 30. " [30] ,Off-platform peripheral access control 8" "SP0,SP1"
|
|
bitfld.long 0x04 29. " [29] ,Off-platform peripheral access control 8" "WP0,WP1"
|
|
bitfld.long 0x04 28. " [28] ,Off-platform peripheral access control 8" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " OPAC9[27] ,Off-platform peripheral access control 9" "BW0,BW1"
|
|
bitfld.long 0x04 26. " [26] ,Off-platform peripheral access control 9" "SP0,SP1"
|
|
bitfld.long 0x04 25. " [25] ,Off-platform peripheral access control 9" "WP0,WP1"
|
|
bitfld.long 0x04 24. " [24] ,Off-platform peripheral access control 9" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 23. " OPAC10[23] ,Off-platform peripheral access control 10" "BW0,BW1"
|
|
bitfld.long 0x04 22. " [22] ,Off-platform peripheral access control 10" "SP0,SP1"
|
|
bitfld.long 0x04 21. " [21] ,Off-platform peripheral access control 10" "WP0,WP1"
|
|
bitfld.long 0x04 20. " [20] ,Off-platform peripheral access control 10" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 19. " OPAC11[19] ,Off-platform peripheral access control 11" "BW0,BW1"
|
|
bitfld.long 0x04 18. " [18] ,Off-platform peripheral access control 11" "SP0,SP1"
|
|
bitfld.long 0x04 17. " [17] ,Off-platform peripheral access control 11" "WP0,WP1"
|
|
bitfld.long 0x04 16. " [26] ,Off-platform peripheral access control 11" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 15. " OPAC12[15] ,Off-platform peripheral access control 12" "BW0,BW1"
|
|
bitfld.long 0x04 14. " [14] ,Off-platform peripheral access control 12" "SP0,SP1"
|
|
bitfld.long 0x04 13. " [13] ,Off-platform peripheral access control 12" "WP0,WP1"
|
|
bitfld.long 0x04 12. " [12] ,Off-platform peripheral access control 12" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OPAC13[11] ,Off-platform peripheral access control 13" "BW0,BW1"
|
|
bitfld.long 0x04 10. " [10] ,Off-platform peripheral access control 13" "SP0,SP1"
|
|
bitfld.long 0x04 9. " [9] ,Off-platform peripheral access control 13" "WP0,WP1"
|
|
bitfld.long 0x04 8. " [8] ,Off-platform peripheral access control 13" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OPAC14[7] ,Off-platform peripheral access control 14" "BW0,BW1"
|
|
bitfld.long 0x04 6. " [6] ,Off-platform peripheral access control 14" "SP0,SP1"
|
|
bitfld.long 0x04 5. " [5] ,Off-platform peripheral access control 14" "WP0,WP1"
|
|
bitfld.long 0x04 4. " [4] ,Off-platform peripheral access control 14" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OPAC15[3] ,Off-platform peripheral access control 15" "BW0,BW1"
|
|
bitfld.long 0x04 2. " [2] ,Off-platform peripheral access control 15" "SP0,SP1"
|
|
bitfld.long 0x04 1. " [1] ,Off-platform peripheral access control 15" "WP0,WP1"
|
|
bitfld.long 0x04 0. " [0] ,Off-platform peripheral access control 15" "TP0,TP1"
|
|
line.long 0x08 "OPACR2,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x08 31. " OPAC16[31] ,Off-platform peripheral access control 16" "BW0,BW1"
|
|
bitfld.long 0x08 30. " [30] ,Off-platform peripheral access control 16" "SP0,SP1"
|
|
bitfld.long 0x08 29. " [29] ,Off-platform peripheral access control 16" "WP0,WP1"
|
|
bitfld.long 0x08 28. " [28] ,Off-platform peripheral access control 16" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 27. " OPAC17[27] ,Off-platform peripheral access control 17" "BW0,BW1"
|
|
bitfld.long 0x08 26. " [26] ,Off-platform peripheral access control 17" "SP0,SP1"
|
|
bitfld.long 0x08 25. " [25] ,Off-platform peripheral access control 17" "WP0,WP1"
|
|
bitfld.long 0x08 24. " [24] ,Off-platform peripheral access control 17" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 23. " OPAC18[23] ,Off-platform peripheral access control 18" "BW0,BW1"
|
|
bitfld.long 0x08 22. " [22] ,Off-platform peripheral access control 18" "SP0,SP1"
|
|
bitfld.long 0x08 21. " [21] ,Off-platform peripheral access control 18" "WP0,WP1"
|
|
bitfld.long 0x08 20. " [20] ,Off-platform peripheral access control 18" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 19. " OPAC19[19] ,Off-platform peripheral access control 19" "BW0,BW1"
|
|
bitfld.long 0x08 18. " [18] ,Off-platform peripheral access control 19" "SP0,SP1"
|
|
bitfld.long 0x08 17. " [17] ,Off-platform peripheral access control 19" "WP0,WP1"
|
|
bitfld.long 0x08 16. " [26] ,Off-platform peripheral access control 19" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 15. " OPAC20[15] ,Off-platform peripheral access control 20" "BW0,BW1"
|
|
bitfld.long 0x08 14. " [14] ,Off-platform peripheral access control 20" "SP0,SP1"
|
|
bitfld.long 0x08 13. " [13] ,Off-platform peripheral access control 20" "WP0,WP1"
|
|
bitfld.long 0x08 12. " [12] ,Off-platform peripheral access control 20" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 11. " OPAC21[11] ,Off-platform peripheral access control 21" "BW0,BW1"
|
|
bitfld.long 0x08 10. " [10] ,Off-platform peripheral access control 21" "SP0,SP1"
|
|
bitfld.long 0x08 9. " [9] ,Off-platform peripheral access control 21" "WP0,WP1"
|
|
bitfld.long 0x08 8. " [8] ,Off-platform peripheral access control 21" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OPAC22[7] ,Off-platform peripheral access control 22" "BW0,BW1"
|
|
bitfld.long 0x08 6. " [6] ,Off-platform peripheral access control 22" "SP0,SP1"
|
|
bitfld.long 0x08 5. " [5] ,Off-platform peripheral access control 22" "WP0,WP1"
|
|
bitfld.long 0x08 4. " [4] ,Off-platform peripheral access control 22" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 3. " OPAC23[3] ,Off-platform peripheral access control 23" "BW0,BW1"
|
|
bitfld.long 0x08 2. " [2] ,Off-platform peripheral access control 23" "SP0,SP1"
|
|
bitfld.long 0x08 1. " [1] ,Off-platform peripheral access control 23" "WP0,WP1"
|
|
bitfld.long 0x08 0. " [0] ,Off-platform peripheral access control 23" "TP0,TP1"
|
|
line.long 0x0C "OPACR3,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x0C 31. " OPAC24[31] ,Off-platform peripheral access control 24" "BW0,BW1"
|
|
bitfld.long 0x0C 30. " [30] ,Off-platform peripheral access control 24" "SP0,SP1"
|
|
bitfld.long 0x0C 29. " [29] ,Off-platform peripheral access control 24" "WP0,WP1"
|
|
bitfld.long 0x0C 28. " [28] ,Off-platform peripheral access control 24" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " OPAC25[27] ,Off-platform peripheral access control 25" "BW0,BW1"
|
|
bitfld.long 0x0C 26. " [26] ,Off-platform peripheral access control 25" "SP0,SP1"
|
|
bitfld.long 0x0C 25. " [25] ,Off-platform peripheral access control 25" "WP0,WP1"
|
|
bitfld.long 0x0C 24. " [24] ,Off-platform peripheral access control 25" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " OPAC26[23] ,Off-platform peripheral access control 26" "BW0,BW1"
|
|
bitfld.long 0x0C 22. " [22] ,Off-platform peripheral access control 26" "SP0,SP1"
|
|
bitfld.long 0x0C 21. " [21] ,Off-platform peripheral access control 26" "WP0,WP1"
|
|
bitfld.long 0x0C 20. " [20] ,Off-platform peripheral access control 26" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " OPAC27[19] ,Off-platform peripheral access control 27" "BW0,BW1"
|
|
bitfld.long 0x0C 18. " [18] ,Off-platform peripheral access control 27" "SP0,SP1"
|
|
bitfld.long 0x0C 17. " [17] ,Off-platform peripheral access control 27" "WP0,WP1"
|
|
bitfld.long 0x0C 16. " [26] ,Off-platform peripheral access control 27" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " OPAC28[15] ,Off-platform peripheral access control 28" "BW0,BW1"
|
|
bitfld.long 0x0C 14. " [14] ,Off-platform peripheral access control 28" "SP0,SP1"
|
|
bitfld.long 0x0C 13. " [13] ,Off-platform peripheral access control 28" "WP0,WP1"
|
|
bitfld.long 0x0C 12. " [12] ,Off-platform peripheral access control 28" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " OPAC2[11] ,Off-platform peripheral access control 29" "BW0,BW1"
|
|
bitfld.long 0x0C 10. " [10] ,Off-platform peripheral access control 29" "SP0,SP1"
|
|
bitfld.long 0x0C 9. " [9] ,Off-platform peripheral access control 29" "WP0,WP1"
|
|
bitfld.long 0x0C 8. " [8] ,Off-platform peripheral access control 29" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " OPAC30[7] ,Off-platform peripheral access control 30" "BW0,BW1"
|
|
bitfld.long 0x0C 6. " [6] ,Off-platform peripheral access control 30" "SP0,SP1"
|
|
bitfld.long 0x0C 5. " [5] ,Off-platform peripheral access control 30" "WP0,WP1"
|
|
bitfld.long 0x0C 4. " [4] ,Off-platform peripheral access control 30" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " OPAC31[3] ,Off-platform peripheral access control 31" "BW0,BW1"
|
|
bitfld.long 0x0C 2. " [2] ,Off-platform peripheral access control 31" "SP0,SP1"
|
|
bitfld.long 0x0C 1. " [1] ,Off-platform peripheral access control 31" "WP0,WP1"
|
|
bitfld.long 0x0C 0. " [0] ,Off-platform peripheral access control 31" "TP0,TP1"
|
|
line.long 0x10 "OPACR4,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x10 31. " OPAC32[31] ,Off-platform peripheral access control 32" "BW0,BW1"
|
|
bitfld.long 0x10 30. " [30] ,Off-platform peripheral access control 32" "SP0,SP1"
|
|
bitfld.long 0x10 29. " [29] ,Off-platform peripheral access control 32" "WP0,WP1"
|
|
bitfld.long 0x10 28. " [28] ,Off-platform peripheral access control 32" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x10 27. " OPAC33[27] ,Off-platform peripheral access control 33" "BW0,BW1"
|
|
bitfld.long 0x10 26. " [26] ,Off-platform peripheral access control 33" "SP0,SP1"
|
|
bitfld.long 0x10 25. " [25] ,Off-platform peripheral access control 33" "WP0,WP1"
|
|
bitfld.long 0x10 24. " [24] ,Off-platform peripheral access control 33" "TP0,TP1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "AIPSTZ 2"
|
|
base ad:0x4017C000
|
|
width 8.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "MPR,Master Privilege Registers"
|
|
bitfld.long 0x00 31. " MPROT0[31] ,Master 0 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 30. " [30] ,Master 0 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 29. " [29] ,Master 0 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 28. " [28] ,Master 0 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MPROT1[27] ,Master 1 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 26. " [26] ,Master 1 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 25. " [25] ,Master 1 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 24. " [24] ,Master 1 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
sif (cpu()=="IMXRT1021")
|
|
bitfld.long 0x00 23. " MPROT2[23] ,Master 2 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 22. " [22] ,Master 2 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 21. " [21] ,Master 2 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 20. " [20] ,Master 2 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " MPROT3[19] ,Master 3 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 18. " [18] ,Master 3 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 17. " [17] ,Master 3 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 16. " [16] ,Master 3 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
sif (cpu()=="IMXRT1021")
|
|
textline " "
|
|
bitfld.long 0x00 11. " MPROT5[11] ,Master 5 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 10. " [10] ,Master 5 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 9. " [9] ,Master 5 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 8. " [8] ,Master 5 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
endif
|
|
group.long 0x40++0x13
|
|
line.long 0x00 "OPACR,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x00 31. " OPAC0[31] ,Off-platform peripheral access control 0" "BW0,BW1"
|
|
bitfld.long 0x00 30. " [30] ,Off-platform peripheral access control 0" "SP0,SP1"
|
|
bitfld.long 0x00 29. " [29] ,Off-platform peripheral access control 0" "WP0,WP1"
|
|
bitfld.long 0x00 28. " [28] ,Off-platform peripheral access control 0" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OPAC1[27] ,Off-platform peripheral access control 1" "BW0,BW1"
|
|
bitfld.long 0x00 26. " [26] ,Off-platform peripheral access control 1" "SP0,SP1"
|
|
bitfld.long 0x00 25. " [25] ,Off-platform peripheral access control 1" "WP0,WP1"
|
|
bitfld.long 0x00 24. " [24] ,Off-platform peripheral access control 1" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " OPAC2[23] ,Off-platform peripheral access control 2" "BW0,BW1"
|
|
bitfld.long 0x00 22. " [22] ,Off-platform peripheral access control 2" "SP0,SP1"
|
|
bitfld.long 0x00 21. " [21] ,Off-platform peripheral access control 2" "WP0,WP1"
|
|
bitfld.long 0x00 20. " [20] ,Off-platform peripheral access control 2" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " OPAC3[19] ,Off-platform peripheral access control 3" "BW0,BW1"
|
|
bitfld.long 0x00 18. " [18] ,Off-platform peripheral access control 3" "SP0,SP1"
|
|
bitfld.long 0x00 17. " [17] ,Off-platform peripheral access control 3" "WP0,WP1"
|
|
bitfld.long 0x00 16. " [26] ,Off-platform peripheral access control 3" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " OPAC4[15] ,Off-platform peripheral access control 4" "BW0,BW1"
|
|
bitfld.long 0x00 14. " [14] ,Off-platform peripheral access control 4" "SP0,SP1"
|
|
bitfld.long 0x00 13. " [13] ,Off-platform peripheral access control 4" "WP0,WP1"
|
|
bitfld.long 0x00 12. " [12] ,Off-platform peripheral access control 4" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OPAC5[11] ,Off-platform peripheral access control 5" "BW0,BW1"
|
|
bitfld.long 0x00 10. " [10] ,Off-platform peripheral access control 5" "SP0,SP1"
|
|
bitfld.long 0x00 9. " [9] ,Off-platform peripheral access control 5" "WP0,WP1"
|
|
bitfld.long 0x00 8. " [8] ,Off-platform peripheral access control 5" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OPAC6[7] ,Off-platform peripheral access control 6" "BW0,BW1"
|
|
bitfld.long 0x00 6. " [6] ,Off-platform peripheral access control 6" "SP0,SP1"
|
|
bitfld.long 0x00 5. " [5] ,Off-platform peripheral access control 6" "WP0,WP1"
|
|
bitfld.long 0x00 4. " [4] ,Off-platform peripheral access control 6" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OPAC7[3] ,Off-platform peripheral access control 7" "BW0,BW1"
|
|
bitfld.long 0x00 2. " [2] ,Off-platform peripheral access control 7" "SP0,SP1"
|
|
bitfld.long 0x00 1. " [1] ,Off-platform peripheral access control 7" "WP0,WP1"
|
|
bitfld.long 0x00 0. " [0] ,Off-platform peripheral access control 7" "TP0,TP1"
|
|
line.long 0x04 "OPACR1,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x04 31. " OPAC8[31] ,Off-platform peripheral access control 8" "BW0,BW1"
|
|
bitfld.long 0x04 30. " [30] ,Off-platform peripheral access control 8" "SP0,SP1"
|
|
bitfld.long 0x04 29. " [29] ,Off-platform peripheral access control 8" "WP0,WP1"
|
|
bitfld.long 0x04 28. " [28] ,Off-platform peripheral access control 8" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " OPAC9[27] ,Off-platform peripheral access control 9" "BW0,BW1"
|
|
bitfld.long 0x04 26. " [26] ,Off-platform peripheral access control 9" "SP0,SP1"
|
|
bitfld.long 0x04 25. " [25] ,Off-platform peripheral access control 9" "WP0,WP1"
|
|
bitfld.long 0x04 24. " [24] ,Off-platform peripheral access control 9" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 23. " OPAC10[23] ,Off-platform peripheral access control 10" "BW0,BW1"
|
|
bitfld.long 0x04 22. " [22] ,Off-platform peripheral access control 10" "SP0,SP1"
|
|
bitfld.long 0x04 21. " [21] ,Off-platform peripheral access control 10" "WP0,WP1"
|
|
bitfld.long 0x04 20. " [20] ,Off-platform peripheral access control 10" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 19. " OPAC11[19] ,Off-platform peripheral access control 11" "BW0,BW1"
|
|
bitfld.long 0x04 18. " [18] ,Off-platform peripheral access control 11" "SP0,SP1"
|
|
bitfld.long 0x04 17. " [17] ,Off-platform peripheral access control 11" "WP0,WP1"
|
|
bitfld.long 0x04 16. " [26] ,Off-platform peripheral access control 11" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 15. " OPAC12[15] ,Off-platform peripheral access control 12" "BW0,BW1"
|
|
bitfld.long 0x04 14. " [14] ,Off-platform peripheral access control 12" "SP0,SP1"
|
|
bitfld.long 0x04 13. " [13] ,Off-platform peripheral access control 12" "WP0,WP1"
|
|
bitfld.long 0x04 12. " [12] ,Off-platform peripheral access control 12" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OPAC13[11] ,Off-platform peripheral access control 13" "BW0,BW1"
|
|
bitfld.long 0x04 10. " [10] ,Off-platform peripheral access control 13" "SP0,SP1"
|
|
bitfld.long 0x04 9. " [9] ,Off-platform peripheral access control 13" "WP0,WP1"
|
|
bitfld.long 0x04 8. " [8] ,Off-platform peripheral access control 13" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OPAC14[7] ,Off-platform peripheral access control 14" "BW0,BW1"
|
|
bitfld.long 0x04 6. " [6] ,Off-platform peripheral access control 14" "SP0,SP1"
|
|
bitfld.long 0x04 5. " [5] ,Off-platform peripheral access control 14" "WP0,WP1"
|
|
bitfld.long 0x04 4. " [4] ,Off-platform peripheral access control 14" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OPAC15[3] ,Off-platform peripheral access control 15" "BW0,BW1"
|
|
bitfld.long 0x04 2. " [2] ,Off-platform peripheral access control 15" "SP0,SP1"
|
|
bitfld.long 0x04 1. " [1] ,Off-platform peripheral access control 15" "WP0,WP1"
|
|
bitfld.long 0x04 0. " [0] ,Off-platform peripheral access control 15" "TP0,TP1"
|
|
line.long 0x08 "OPACR2,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x08 31. " OPAC16[31] ,Off-platform peripheral access control 16" "BW0,BW1"
|
|
bitfld.long 0x08 30. " [30] ,Off-platform peripheral access control 16" "SP0,SP1"
|
|
bitfld.long 0x08 29. " [29] ,Off-platform peripheral access control 16" "WP0,WP1"
|
|
bitfld.long 0x08 28. " [28] ,Off-platform peripheral access control 16" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 27. " OPAC17[27] ,Off-platform peripheral access control 17" "BW0,BW1"
|
|
bitfld.long 0x08 26. " [26] ,Off-platform peripheral access control 17" "SP0,SP1"
|
|
bitfld.long 0x08 25. " [25] ,Off-platform peripheral access control 17" "WP0,WP1"
|
|
bitfld.long 0x08 24. " [24] ,Off-platform peripheral access control 17" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 23. " OPAC18[23] ,Off-platform peripheral access control 18" "BW0,BW1"
|
|
bitfld.long 0x08 22. " [22] ,Off-platform peripheral access control 18" "SP0,SP1"
|
|
bitfld.long 0x08 21. " [21] ,Off-platform peripheral access control 18" "WP0,WP1"
|
|
bitfld.long 0x08 20. " [20] ,Off-platform peripheral access control 18" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 19. " OPAC19[19] ,Off-platform peripheral access control 19" "BW0,BW1"
|
|
bitfld.long 0x08 18. " [18] ,Off-platform peripheral access control 19" "SP0,SP1"
|
|
bitfld.long 0x08 17. " [17] ,Off-platform peripheral access control 19" "WP0,WP1"
|
|
bitfld.long 0x08 16. " [26] ,Off-platform peripheral access control 19" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 15. " OPAC20[15] ,Off-platform peripheral access control 20" "BW0,BW1"
|
|
bitfld.long 0x08 14. " [14] ,Off-platform peripheral access control 20" "SP0,SP1"
|
|
bitfld.long 0x08 13. " [13] ,Off-platform peripheral access control 20" "WP0,WP1"
|
|
bitfld.long 0x08 12. " [12] ,Off-platform peripheral access control 20" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 11. " OPAC21[11] ,Off-platform peripheral access control 21" "BW0,BW1"
|
|
bitfld.long 0x08 10. " [10] ,Off-platform peripheral access control 21" "SP0,SP1"
|
|
bitfld.long 0x08 9. " [9] ,Off-platform peripheral access control 21" "WP0,WP1"
|
|
bitfld.long 0x08 8. " [8] ,Off-platform peripheral access control 21" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OPAC22[7] ,Off-platform peripheral access control 22" "BW0,BW1"
|
|
bitfld.long 0x08 6. " [6] ,Off-platform peripheral access control 22" "SP0,SP1"
|
|
bitfld.long 0x08 5. " [5] ,Off-platform peripheral access control 22" "WP0,WP1"
|
|
bitfld.long 0x08 4. " [4] ,Off-platform peripheral access control 22" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 3. " OPAC23[3] ,Off-platform peripheral access control 23" "BW0,BW1"
|
|
bitfld.long 0x08 2. " [2] ,Off-platform peripheral access control 23" "SP0,SP1"
|
|
bitfld.long 0x08 1. " [1] ,Off-platform peripheral access control 23" "WP0,WP1"
|
|
bitfld.long 0x08 0. " [0] ,Off-platform peripheral access control 23" "TP0,TP1"
|
|
line.long 0x0C "OPACR3,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x0C 31. " OPAC24[31] ,Off-platform peripheral access control 24" "BW0,BW1"
|
|
bitfld.long 0x0C 30. " [30] ,Off-platform peripheral access control 24" "SP0,SP1"
|
|
bitfld.long 0x0C 29. " [29] ,Off-platform peripheral access control 24" "WP0,WP1"
|
|
bitfld.long 0x0C 28. " [28] ,Off-platform peripheral access control 24" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " OPAC25[27] ,Off-platform peripheral access control 25" "BW0,BW1"
|
|
bitfld.long 0x0C 26. " [26] ,Off-platform peripheral access control 25" "SP0,SP1"
|
|
bitfld.long 0x0C 25. " [25] ,Off-platform peripheral access control 25" "WP0,WP1"
|
|
bitfld.long 0x0C 24. " [24] ,Off-platform peripheral access control 25" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " OPAC26[23] ,Off-platform peripheral access control 26" "BW0,BW1"
|
|
bitfld.long 0x0C 22. " [22] ,Off-platform peripheral access control 26" "SP0,SP1"
|
|
bitfld.long 0x0C 21. " [21] ,Off-platform peripheral access control 26" "WP0,WP1"
|
|
bitfld.long 0x0C 20. " [20] ,Off-platform peripheral access control 26" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " OPAC27[19] ,Off-platform peripheral access control 27" "BW0,BW1"
|
|
bitfld.long 0x0C 18. " [18] ,Off-platform peripheral access control 27" "SP0,SP1"
|
|
bitfld.long 0x0C 17. " [17] ,Off-platform peripheral access control 27" "WP0,WP1"
|
|
bitfld.long 0x0C 16. " [26] ,Off-platform peripheral access control 27" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " OPAC28[15] ,Off-platform peripheral access control 28" "BW0,BW1"
|
|
bitfld.long 0x0C 14. " [14] ,Off-platform peripheral access control 28" "SP0,SP1"
|
|
bitfld.long 0x0C 13. " [13] ,Off-platform peripheral access control 28" "WP0,WP1"
|
|
bitfld.long 0x0C 12. " [12] ,Off-platform peripheral access control 28" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " OPAC2[11] ,Off-platform peripheral access control 29" "BW0,BW1"
|
|
bitfld.long 0x0C 10. " [10] ,Off-platform peripheral access control 29" "SP0,SP1"
|
|
bitfld.long 0x0C 9. " [9] ,Off-platform peripheral access control 29" "WP0,WP1"
|
|
bitfld.long 0x0C 8. " [8] ,Off-platform peripheral access control 29" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " OPAC30[7] ,Off-platform peripheral access control 30" "BW0,BW1"
|
|
bitfld.long 0x0C 6. " [6] ,Off-platform peripheral access control 30" "SP0,SP1"
|
|
bitfld.long 0x0C 5. " [5] ,Off-platform peripheral access control 30" "WP0,WP1"
|
|
bitfld.long 0x0C 4. " [4] ,Off-platform peripheral access control 30" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " OPAC31[3] ,Off-platform peripheral access control 31" "BW0,BW1"
|
|
bitfld.long 0x0C 2. " [2] ,Off-platform peripheral access control 31" "SP0,SP1"
|
|
bitfld.long 0x0C 1. " [1] ,Off-platform peripheral access control 31" "WP0,WP1"
|
|
bitfld.long 0x0C 0. " [0] ,Off-platform peripheral access control 31" "TP0,TP1"
|
|
line.long 0x10 "OPACR4,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x10 31. " OPAC32[31] ,Off-platform peripheral access control 32" "BW0,BW1"
|
|
bitfld.long 0x10 30. " [30] ,Off-platform peripheral access control 32" "SP0,SP1"
|
|
bitfld.long 0x10 29. " [29] ,Off-platform peripheral access control 32" "WP0,WP1"
|
|
bitfld.long 0x10 28. " [28] ,Off-platform peripheral access control 32" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x10 27. " OPAC33[27] ,Off-platform peripheral access control 33" "BW0,BW1"
|
|
bitfld.long 0x10 26. " [26] ,Off-platform peripheral access control 33" "SP0,SP1"
|
|
bitfld.long 0x10 25. " [25] ,Off-platform peripheral access control 33" "WP0,WP1"
|
|
bitfld.long 0x10 24. " [24] ,Off-platform peripheral access control 33" "TP0,TP1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "AIPSTZ 3"
|
|
base ad:0x4027C000
|
|
width 8.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "MPR,Master Privilege Registers"
|
|
bitfld.long 0x00 31. " MPROT0[31] ,Master 0 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 30. " [30] ,Master 0 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 29. " [29] ,Master 0 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 28. " [28] ,Master 0 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MPROT1[27] ,Master 1 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 26. " [26] ,Master 1 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 25. " [25] ,Master 1 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 24. " [24] ,Master 1 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
sif (cpu()=="IMXRT1021")
|
|
bitfld.long 0x00 23. " MPROT2[23] ,Master 2 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 22. " [22] ,Master 2 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 21. " [21] ,Master 2 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 20. " [20] ,Master 2 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " MPROT3[19] ,Master 3 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 18. " [18] ,Master 3 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 17. " [17] ,Master 3 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 16. " [16] ,Master 3 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
sif (cpu()=="IMXRT1021")
|
|
textline " "
|
|
bitfld.long 0x00 11. " MPROT5[11] ,Master 5 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 10. " [10] ,Master 5 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 9. " [9] ,Master 5 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 8. " [8] ,Master 5 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
endif
|
|
group.long 0x40++0x13
|
|
line.long 0x00 "OPACR,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x00 31. " OPAC0[31] ,Off-platform peripheral access control 0" "BW0,BW1"
|
|
bitfld.long 0x00 30. " [30] ,Off-platform peripheral access control 0" "SP0,SP1"
|
|
bitfld.long 0x00 29. " [29] ,Off-platform peripheral access control 0" "WP0,WP1"
|
|
bitfld.long 0x00 28. " [28] ,Off-platform peripheral access control 0" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OPAC1[27] ,Off-platform peripheral access control 1" "BW0,BW1"
|
|
bitfld.long 0x00 26. " [26] ,Off-platform peripheral access control 1" "SP0,SP1"
|
|
bitfld.long 0x00 25. " [25] ,Off-platform peripheral access control 1" "WP0,WP1"
|
|
bitfld.long 0x00 24. " [24] ,Off-platform peripheral access control 1" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " OPAC2[23] ,Off-platform peripheral access control 2" "BW0,BW1"
|
|
bitfld.long 0x00 22. " [22] ,Off-platform peripheral access control 2" "SP0,SP1"
|
|
bitfld.long 0x00 21. " [21] ,Off-platform peripheral access control 2" "WP0,WP1"
|
|
bitfld.long 0x00 20. " [20] ,Off-platform peripheral access control 2" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " OPAC3[19] ,Off-platform peripheral access control 3" "BW0,BW1"
|
|
bitfld.long 0x00 18. " [18] ,Off-platform peripheral access control 3" "SP0,SP1"
|
|
bitfld.long 0x00 17. " [17] ,Off-platform peripheral access control 3" "WP0,WP1"
|
|
bitfld.long 0x00 16. " [26] ,Off-platform peripheral access control 3" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " OPAC4[15] ,Off-platform peripheral access control 4" "BW0,BW1"
|
|
bitfld.long 0x00 14. " [14] ,Off-platform peripheral access control 4" "SP0,SP1"
|
|
bitfld.long 0x00 13. " [13] ,Off-platform peripheral access control 4" "WP0,WP1"
|
|
bitfld.long 0x00 12. " [12] ,Off-platform peripheral access control 4" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OPAC5[11] ,Off-platform peripheral access control 5" "BW0,BW1"
|
|
bitfld.long 0x00 10. " [10] ,Off-platform peripheral access control 5" "SP0,SP1"
|
|
bitfld.long 0x00 9. " [9] ,Off-platform peripheral access control 5" "WP0,WP1"
|
|
bitfld.long 0x00 8. " [8] ,Off-platform peripheral access control 5" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OPAC6[7] ,Off-platform peripheral access control 6" "BW0,BW1"
|
|
bitfld.long 0x00 6. " [6] ,Off-platform peripheral access control 6" "SP0,SP1"
|
|
bitfld.long 0x00 5. " [5] ,Off-platform peripheral access control 6" "WP0,WP1"
|
|
bitfld.long 0x00 4. " [4] ,Off-platform peripheral access control 6" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OPAC7[3] ,Off-platform peripheral access control 7" "BW0,BW1"
|
|
bitfld.long 0x00 2. " [2] ,Off-platform peripheral access control 7" "SP0,SP1"
|
|
bitfld.long 0x00 1. " [1] ,Off-platform peripheral access control 7" "WP0,WP1"
|
|
bitfld.long 0x00 0. " [0] ,Off-platform peripheral access control 7" "TP0,TP1"
|
|
line.long 0x04 "OPACR1,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x04 31. " OPAC8[31] ,Off-platform peripheral access control 8" "BW0,BW1"
|
|
bitfld.long 0x04 30. " [30] ,Off-platform peripheral access control 8" "SP0,SP1"
|
|
bitfld.long 0x04 29. " [29] ,Off-platform peripheral access control 8" "WP0,WP1"
|
|
bitfld.long 0x04 28. " [28] ,Off-platform peripheral access control 8" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " OPAC9[27] ,Off-platform peripheral access control 9" "BW0,BW1"
|
|
bitfld.long 0x04 26. " [26] ,Off-platform peripheral access control 9" "SP0,SP1"
|
|
bitfld.long 0x04 25. " [25] ,Off-platform peripheral access control 9" "WP0,WP1"
|
|
bitfld.long 0x04 24. " [24] ,Off-platform peripheral access control 9" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 23. " OPAC10[23] ,Off-platform peripheral access control 10" "BW0,BW1"
|
|
bitfld.long 0x04 22. " [22] ,Off-platform peripheral access control 10" "SP0,SP1"
|
|
bitfld.long 0x04 21. " [21] ,Off-platform peripheral access control 10" "WP0,WP1"
|
|
bitfld.long 0x04 20. " [20] ,Off-platform peripheral access control 10" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 19. " OPAC11[19] ,Off-platform peripheral access control 11" "BW0,BW1"
|
|
bitfld.long 0x04 18. " [18] ,Off-platform peripheral access control 11" "SP0,SP1"
|
|
bitfld.long 0x04 17. " [17] ,Off-platform peripheral access control 11" "WP0,WP1"
|
|
bitfld.long 0x04 16. " [26] ,Off-platform peripheral access control 11" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 15. " OPAC12[15] ,Off-platform peripheral access control 12" "BW0,BW1"
|
|
bitfld.long 0x04 14. " [14] ,Off-platform peripheral access control 12" "SP0,SP1"
|
|
bitfld.long 0x04 13. " [13] ,Off-platform peripheral access control 12" "WP0,WP1"
|
|
bitfld.long 0x04 12. " [12] ,Off-platform peripheral access control 12" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OPAC13[11] ,Off-platform peripheral access control 13" "BW0,BW1"
|
|
bitfld.long 0x04 10. " [10] ,Off-platform peripheral access control 13" "SP0,SP1"
|
|
bitfld.long 0x04 9. " [9] ,Off-platform peripheral access control 13" "WP0,WP1"
|
|
bitfld.long 0x04 8. " [8] ,Off-platform peripheral access control 13" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OPAC14[7] ,Off-platform peripheral access control 14" "BW0,BW1"
|
|
bitfld.long 0x04 6. " [6] ,Off-platform peripheral access control 14" "SP0,SP1"
|
|
bitfld.long 0x04 5. " [5] ,Off-platform peripheral access control 14" "WP0,WP1"
|
|
bitfld.long 0x04 4. " [4] ,Off-platform peripheral access control 14" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OPAC15[3] ,Off-platform peripheral access control 15" "BW0,BW1"
|
|
bitfld.long 0x04 2. " [2] ,Off-platform peripheral access control 15" "SP0,SP1"
|
|
bitfld.long 0x04 1. " [1] ,Off-platform peripheral access control 15" "WP0,WP1"
|
|
bitfld.long 0x04 0. " [0] ,Off-platform peripheral access control 15" "TP0,TP1"
|
|
line.long 0x08 "OPACR2,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x08 31. " OPAC16[31] ,Off-platform peripheral access control 16" "BW0,BW1"
|
|
bitfld.long 0x08 30. " [30] ,Off-platform peripheral access control 16" "SP0,SP1"
|
|
bitfld.long 0x08 29. " [29] ,Off-platform peripheral access control 16" "WP0,WP1"
|
|
bitfld.long 0x08 28. " [28] ,Off-platform peripheral access control 16" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 27. " OPAC17[27] ,Off-platform peripheral access control 17" "BW0,BW1"
|
|
bitfld.long 0x08 26. " [26] ,Off-platform peripheral access control 17" "SP0,SP1"
|
|
bitfld.long 0x08 25. " [25] ,Off-platform peripheral access control 17" "WP0,WP1"
|
|
bitfld.long 0x08 24. " [24] ,Off-platform peripheral access control 17" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 23. " OPAC18[23] ,Off-platform peripheral access control 18" "BW0,BW1"
|
|
bitfld.long 0x08 22. " [22] ,Off-platform peripheral access control 18" "SP0,SP1"
|
|
bitfld.long 0x08 21. " [21] ,Off-platform peripheral access control 18" "WP0,WP1"
|
|
bitfld.long 0x08 20. " [20] ,Off-platform peripheral access control 18" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 19. " OPAC19[19] ,Off-platform peripheral access control 19" "BW0,BW1"
|
|
bitfld.long 0x08 18. " [18] ,Off-platform peripheral access control 19" "SP0,SP1"
|
|
bitfld.long 0x08 17. " [17] ,Off-platform peripheral access control 19" "WP0,WP1"
|
|
bitfld.long 0x08 16. " [26] ,Off-platform peripheral access control 19" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 15. " OPAC20[15] ,Off-platform peripheral access control 20" "BW0,BW1"
|
|
bitfld.long 0x08 14. " [14] ,Off-platform peripheral access control 20" "SP0,SP1"
|
|
bitfld.long 0x08 13. " [13] ,Off-platform peripheral access control 20" "WP0,WP1"
|
|
bitfld.long 0x08 12. " [12] ,Off-platform peripheral access control 20" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 11. " OPAC21[11] ,Off-platform peripheral access control 21" "BW0,BW1"
|
|
bitfld.long 0x08 10. " [10] ,Off-platform peripheral access control 21" "SP0,SP1"
|
|
bitfld.long 0x08 9. " [9] ,Off-platform peripheral access control 21" "WP0,WP1"
|
|
bitfld.long 0x08 8. " [8] ,Off-platform peripheral access control 21" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OPAC22[7] ,Off-platform peripheral access control 22" "BW0,BW1"
|
|
bitfld.long 0x08 6. " [6] ,Off-platform peripheral access control 22" "SP0,SP1"
|
|
bitfld.long 0x08 5. " [5] ,Off-platform peripheral access control 22" "WP0,WP1"
|
|
bitfld.long 0x08 4. " [4] ,Off-platform peripheral access control 22" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 3. " OPAC23[3] ,Off-platform peripheral access control 23" "BW0,BW1"
|
|
bitfld.long 0x08 2. " [2] ,Off-platform peripheral access control 23" "SP0,SP1"
|
|
bitfld.long 0x08 1. " [1] ,Off-platform peripheral access control 23" "WP0,WP1"
|
|
bitfld.long 0x08 0. " [0] ,Off-platform peripheral access control 23" "TP0,TP1"
|
|
line.long 0x0C "OPACR3,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x0C 31. " OPAC24[31] ,Off-platform peripheral access control 24" "BW0,BW1"
|
|
bitfld.long 0x0C 30. " [30] ,Off-platform peripheral access control 24" "SP0,SP1"
|
|
bitfld.long 0x0C 29. " [29] ,Off-platform peripheral access control 24" "WP0,WP1"
|
|
bitfld.long 0x0C 28. " [28] ,Off-platform peripheral access control 24" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " OPAC25[27] ,Off-platform peripheral access control 25" "BW0,BW1"
|
|
bitfld.long 0x0C 26. " [26] ,Off-platform peripheral access control 25" "SP0,SP1"
|
|
bitfld.long 0x0C 25. " [25] ,Off-platform peripheral access control 25" "WP0,WP1"
|
|
bitfld.long 0x0C 24. " [24] ,Off-platform peripheral access control 25" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " OPAC26[23] ,Off-platform peripheral access control 26" "BW0,BW1"
|
|
bitfld.long 0x0C 22. " [22] ,Off-platform peripheral access control 26" "SP0,SP1"
|
|
bitfld.long 0x0C 21. " [21] ,Off-platform peripheral access control 26" "WP0,WP1"
|
|
bitfld.long 0x0C 20. " [20] ,Off-platform peripheral access control 26" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " OPAC27[19] ,Off-platform peripheral access control 27" "BW0,BW1"
|
|
bitfld.long 0x0C 18. " [18] ,Off-platform peripheral access control 27" "SP0,SP1"
|
|
bitfld.long 0x0C 17. " [17] ,Off-platform peripheral access control 27" "WP0,WP1"
|
|
bitfld.long 0x0C 16. " [26] ,Off-platform peripheral access control 27" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " OPAC28[15] ,Off-platform peripheral access control 28" "BW0,BW1"
|
|
bitfld.long 0x0C 14. " [14] ,Off-platform peripheral access control 28" "SP0,SP1"
|
|
bitfld.long 0x0C 13. " [13] ,Off-platform peripheral access control 28" "WP0,WP1"
|
|
bitfld.long 0x0C 12. " [12] ,Off-platform peripheral access control 28" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " OPAC2[11] ,Off-platform peripheral access control 29" "BW0,BW1"
|
|
bitfld.long 0x0C 10. " [10] ,Off-platform peripheral access control 29" "SP0,SP1"
|
|
bitfld.long 0x0C 9. " [9] ,Off-platform peripheral access control 29" "WP0,WP1"
|
|
bitfld.long 0x0C 8. " [8] ,Off-platform peripheral access control 29" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " OPAC30[7] ,Off-platform peripheral access control 30" "BW0,BW1"
|
|
bitfld.long 0x0C 6. " [6] ,Off-platform peripheral access control 30" "SP0,SP1"
|
|
bitfld.long 0x0C 5. " [5] ,Off-platform peripheral access control 30" "WP0,WP1"
|
|
bitfld.long 0x0C 4. " [4] ,Off-platform peripheral access control 30" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " OPAC31[3] ,Off-platform peripheral access control 31" "BW0,BW1"
|
|
bitfld.long 0x0C 2. " [2] ,Off-platform peripheral access control 31" "SP0,SP1"
|
|
bitfld.long 0x0C 1. " [1] ,Off-platform peripheral access control 31" "WP0,WP1"
|
|
bitfld.long 0x0C 0. " [0] ,Off-platform peripheral access control 31" "TP0,TP1"
|
|
line.long 0x10 "OPACR4,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x10 31. " OPAC32[31] ,Off-platform peripheral access control 32" "BW0,BW1"
|
|
bitfld.long 0x10 30. " [30] ,Off-platform peripheral access control 32" "SP0,SP1"
|
|
bitfld.long 0x10 29. " [29] ,Off-platform peripheral access control 32" "WP0,WP1"
|
|
bitfld.long 0x10 28. " [28] ,Off-platform peripheral access control 32" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x10 27. " OPAC33[27] ,Off-platform peripheral access control 33" "BW0,BW1"
|
|
bitfld.long 0x10 26. " [26] ,Off-platform peripheral access control 33" "SP0,SP1"
|
|
bitfld.long 0x10 25. " [25] ,Off-platform peripheral access control 33" "WP0,WP1"
|
|
bitfld.long 0x10 24. " [24] ,Off-platform peripheral access control 33" "TP0,TP1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "AIPSTZ 4"
|
|
base ad:0x4037C000
|
|
width 8.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "MPR,Master Privilege Registers"
|
|
bitfld.long 0x00 31. " MPROT0[31] ,Master 0 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 30. " [30] ,Master 0 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 29. " [29] ,Master 0 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 28. " [28] ,Master 0 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " MPROT1[27] ,Master 1 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 26. " [26] ,Master 1 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 25. " [25] ,Master 1 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 24. " [24] ,Master 1 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
sif (cpu()=="IMXRT1021")
|
|
bitfld.long 0x00 23. " MPROT2[23] ,Master 2 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 22. " [22] ,Master 2 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 21. " [21] ,Master 2 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 20. " [20] ,Master 2 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 19. " MPROT3[19] ,Master 3 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 18. " [18] ,Master 3 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 17. " [17] ,Master 3 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 16. " [16] ,Master 3 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
sif (cpu()=="IMXRT1021")
|
|
textline " "
|
|
bitfld.long 0x00 11. " MPROT5[11] ,Master 5 privilege, buffer, read, write control" "MBW0,MBW1"
|
|
bitfld.long 0x00 10. " [10] ,Master 5 privilege, buffer, read, write control" "MTR0,MTR1"
|
|
bitfld.long 0x00 9. " [9] ,Master 5 privilege, buffer, read, write control" "MTW0,MTW1"
|
|
bitfld.long 0x00 8. " [8] ,Master 5 privilege, buffer, read, write control" "MPL0,MPL1"
|
|
endif
|
|
group.long 0x40++0x13
|
|
line.long 0x00 "OPACR,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x00 31. " OPAC0[31] ,Off-platform peripheral access control 0" "BW0,BW1"
|
|
bitfld.long 0x00 30. " [30] ,Off-platform peripheral access control 0" "SP0,SP1"
|
|
bitfld.long 0x00 29. " [29] ,Off-platform peripheral access control 0" "WP0,WP1"
|
|
bitfld.long 0x00 28. " [28] ,Off-platform peripheral access control 0" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OPAC1[27] ,Off-platform peripheral access control 1" "BW0,BW1"
|
|
bitfld.long 0x00 26. " [26] ,Off-platform peripheral access control 1" "SP0,SP1"
|
|
bitfld.long 0x00 25. " [25] ,Off-platform peripheral access control 1" "WP0,WP1"
|
|
bitfld.long 0x00 24. " [24] ,Off-platform peripheral access control 1" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 23. " OPAC2[23] ,Off-platform peripheral access control 2" "BW0,BW1"
|
|
bitfld.long 0x00 22. " [22] ,Off-platform peripheral access control 2" "SP0,SP1"
|
|
bitfld.long 0x00 21. " [21] ,Off-platform peripheral access control 2" "WP0,WP1"
|
|
bitfld.long 0x00 20. " [20] ,Off-platform peripheral access control 2" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " OPAC3[19] ,Off-platform peripheral access control 3" "BW0,BW1"
|
|
bitfld.long 0x00 18. " [18] ,Off-platform peripheral access control 3" "SP0,SP1"
|
|
bitfld.long 0x00 17. " [17] ,Off-platform peripheral access control 3" "WP0,WP1"
|
|
bitfld.long 0x00 16. " [26] ,Off-platform peripheral access control 3" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " OPAC4[15] ,Off-platform peripheral access control 4" "BW0,BW1"
|
|
bitfld.long 0x00 14. " [14] ,Off-platform peripheral access control 4" "SP0,SP1"
|
|
bitfld.long 0x00 13. " [13] ,Off-platform peripheral access control 4" "WP0,WP1"
|
|
bitfld.long 0x00 12. " [12] ,Off-platform peripheral access control 4" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OPAC5[11] ,Off-platform peripheral access control 5" "BW0,BW1"
|
|
bitfld.long 0x00 10. " [10] ,Off-platform peripheral access control 5" "SP0,SP1"
|
|
bitfld.long 0x00 9. " [9] ,Off-platform peripheral access control 5" "WP0,WP1"
|
|
bitfld.long 0x00 8. " [8] ,Off-platform peripheral access control 5" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OPAC6[7] ,Off-platform peripheral access control 6" "BW0,BW1"
|
|
bitfld.long 0x00 6. " [6] ,Off-platform peripheral access control 6" "SP0,SP1"
|
|
bitfld.long 0x00 5. " [5] ,Off-platform peripheral access control 6" "WP0,WP1"
|
|
bitfld.long 0x00 4. " [4] ,Off-platform peripheral access control 6" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OPAC7[3] ,Off-platform peripheral access control 7" "BW0,BW1"
|
|
bitfld.long 0x00 2. " [2] ,Off-platform peripheral access control 7" "SP0,SP1"
|
|
bitfld.long 0x00 1. " [1] ,Off-platform peripheral access control 7" "WP0,WP1"
|
|
bitfld.long 0x00 0. " [0] ,Off-platform peripheral access control 7" "TP0,TP1"
|
|
line.long 0x04 "OPACR1,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x04 31. " OPAC8[31] ,Off-platform peripheral access control 8" "BW0,BW1"
|
|
bitfld.long 0x04 30. " [30] ,Off-platform peripheral access control 8" "SP0,SP1"
|
|
bitfld.long 0x04 29. " [29] ,Off-platform peripheral access control 8" "WP0,WP1"
|
|
bitfld.long 0x04 28. " [28] ,Off-platform peripheral access control 8" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 27. " OPAC9[27] ,Off-platform peripheral access control 9" "BW0,BW1"
|
|
bitfld.long 0x04 26. " [26] ,Off-platform peripheral access control 9" "SP0,SP1"
|
|
bitfld.long 0x04 25. " [25] ,Off-platform peripheral access control 9" "WP0,WP1"
|
|
bitfld.long 0x04 24. " [24] ,Off-platform peripheral access control 9" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 23. " OPAC10[23] ,Off-platform peripheral access control 10" "BW0,BW1"
|
|
bitfld.long 0x04 22. " [22] ,Off-platform peripheral access control 10" "SP0,SP1"
|
|
bitfld.long 0x04 21. " [21] ,Off-platform peripheral access control 10" "WP0,WP1"
|
|
bitfld.long 0x04 20. " [20] ,Off-platform peripheral access control 10" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 19. " OPAC11[19] ,Off-platform peripheral access control 11" "BW0,BW1"
|
|
bitfld.long 0x04 18. " [18] ,Off-platform peripheral access control 11" "SP0,SP1"
|
|
bitfld.long 0x04 17. " [17] ,Off-platform peripheral access control 11" "WP0,WP1"
|
|
bitfld.long 0x04 16. " [26] ,Off-platform peripheral access control 11" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 15. " OPAC12[15] ,Off-platform peripheral access control 12" "BW0,BW1"
|
|
bitfld.long 0x04 14. " [14] ,Off-platform peripheral access control 12" "SP0,SP1"
|
|
bitfld.long 0x04 13. " [13] ,Off-platform peripheral access control 12" "WP0,WP1"
|
|
bitfld.long 0x04 12. " [12] ,Off-platform peripheral access control 12" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 11. " OPAC13[11] ,Off-platform peripheral access control 13" "BW0,BW1"
|
|
bitfld.long 0x04 10. " [10] ,Off-platform peripheral access control 13" "SP0,SP1"
|
|
bitfld.long 0x04 9. " [9] ,Off-platform peripheral access control 13" "WP0,WP1"
|
|
bitfld.long 0x04 8. " [8] ,Off-platform peripheral access control 13" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 7. " OPAC14[7] ,Off-platform peripheral access control 14" "BW0,BW1"
|
|
bitfld.long 0x04 6. " [6] ,Off-platform peripheral access control 14" "SP0,SP1"
|
|
bitfld.long 0x04 5. " [5] ,Off-platform peripheral access control 14" "WP0,WP1"
|
|
bitfld.long 0x04 4. " [4] ,Off-platform peripheral access control 14" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x04 3. " OPAC15[3] ,Off-platform peripheral access control 15" "BW0,BW1"
|
|
bitfld.long 0x04 2. " [2] ,Off-platform peripheral access control 15" "SP0,SP1"
|
|
bitfld.long 0x04 1. " [1] ,Off-platform peripheral access control 15" "WP0,WP1"
|
|
bitfld.long 0x04 0. " [0] ,Off-platform peripheral access control 15" "TP0,TP1"
|
|
line.long 0x08 "OPACR2,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x08 31. " OPAC16[31] ,Off-platform peripheral access control 16" "BW0,BW1"
|
|
bitfld.long 0x08 30. " [30] ,Off-platform peripheral access control 16" "SP0,SP1"
|
|
bitfld.long 0x08 29. " [29] ,Off-platform peripheral access control 16" "WP0,WP1"
|
|
bitfld.long 0x08 28. " [28] ,Off-platform peripheral access control 16" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 27. " OPAC17[27] ,Off-platform peripheral access control 17" "BW0,BW1"
|
|
bitfld.long 0x08 26. " [26] ,Off-platform peripheral access control 17" "SP0,SP1"
|
|
bitfld.long 0x08 25. " [25] ,Off-platform peripheral access control 17" "WP0,WP1"
|
|
bitfld.long 0x08 24. " [24] ,Off-platform peripheral access control 17" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 23. " OPAC18[23] ,Off-platform peripheral access control 18" "BW0,BW1"
|
|
bitfld.long 0x08 22. " [22] ,Off-platform peripheral access control 18" "SP0,SP1"
|
|
bitfld.long 0x08 21. " [21] ,Off-platform peripheral access control 18" "WP0,WP1"
|
|
bitfld.long 0x08 20. " [20] ,Off-platform peripheral access control 18" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 19. " OPAC19[19] ,Off-platform peripheral access control 19" "BW0,BW1"
|
|
bitfld.long 0x08 18. " [18] ,Off-platform peripheral access control 19" "SP0,SP1"
|
|
bitfld.long 0x08 17. " [17] ,Off-platform peripheral access control 19" "WP0,WP1"
|
|
bitfld.long 0x08 16. " [26] ,Off-platform peripheral access control 19" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 15. " OPAC20[15] ,Off-platform peripheral access control 20" "BW0,BW1"
|
|
bitfld.long 0x08 14. " [14] ,Off-platform peripheral access control 20" "SP0,SP1"
|
|
bitfld.long 0x08 13. " [13] ,Off-platform peripheral access control 20" "WP0,WP1"
|
|
bitfld.long 0x08 12. " [12] ,Off-platform peripheral access control 20" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 11. " OPAC21[11] ,Off-platform peripheral access control 21" "BW0,BW1"
|
|
bitfld.long 0x08 10. " [10] ,Off-platform peripheral access control 21" "SP0,SP1"
|
|
bitfld.long 0x08 9. " [9] ,Off-platform peripheral access control 21" "WP0,WP1"
|
|
bitfld.long 0x08 8. " [8] ,Off-platform peripheral access control 21" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 7. " OPAC22[7] ,Off-platform peripheral access control 22" "BW0,BW1"
|
|
bitfld.long 0x08 6. " [6] ,Off-platform peripheral access control 22" "SP0,SP1"
|
|
bitfld.long 0x08 5. " [5] ,Off-platform peripheral access control 22" "WP0,WP1"
|
|
bitfld.long 0x08 4. " [4] ,Off-platform peripheral access control 22" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x08 3. " OPAC23[3] ,Off-platform peripheral access control 23" "BW0,BW1"
|
|
bitfld.long 0x08 2. " [2] ,Off-platform peripheral access control 23" "SP0,SP1"
|
|
bitfld.long 0x08 1. " [1] ,Off-platform peripheral access control 23" "WP0,WP1"
|
|
bitfld.long 0x08 0. " [0] ,Off-platform peripheral access control 23" "TP0,TP1"
|
|
line.long 0x0C "OPACR3,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x0C 31. " OPAC24[31] ,Off-platform peripheral access control 24" "BW0,BW1"
|
|
bitfld.long 0x0C 30. " [30] ,Off-platform peripheral access control 24" "SP0,SP1"
|
|
bitfld.long 0x0C 29. " [29] ,Off-platform peripheral access control 24" "WP0,WP1"
|
|
bitfld.long 0x0C 28. " [28] ,Off-platform peripheral access control 24" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " OPAC25[27] ,Off-platform peripheral access control 25" "BW0,BW1"
|
|
bitfld.long 0x0C 26. " [26] ,Off-platform peripheral access control 25" "SP0,SP1"
|
|
bitfld.long 0x0C 25. " [25] ,Off-platform peripheral access control 25" "WP0,WP1"
|
|
bitfld.long 0x0C 24. " [24] ,Off-platform peripheral access control 25" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " OPAC26[23] ,Off-platform peripheral access control 26" "BW0,BW1"
|
|
bitfld.long 0x0C 22. " [22] ,Off-platform peripheral access control 26" "SP0,SP1"
|
|
bitfld.long 0x0C 21. " [21] ,Off-platform peripheral access control 26" "WP0,WP1"
|
|
bitfld.long 0x0C 20. " [20] ,Off-platform peripheral access control 26" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " OPAC27[19] ,Off-platform peripheral access control 27" "BW0,BW1"
|
|
bitfld.long 0x0C 18. " [18] ,Off-platform peripheral access control 27" "SP0,SP1"
|
|
bitfld.long 0x0C 17. " [17] ,Off-platform peripheral access control 27" "WP0,WP1"
|
|
bitfld.long 0x0C 16. " [26] ,Off-platform peripheral access control 27" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " OPAC28[15] ,Off-platform peripheral access control 28" "BW0,BW1"
|
|
bitfld.long 0x0C 14. " [14] ,Off-platform peripheral access control 28" "SP0,SP1"
|
|
bitfld.long 0x0C 13. " [13] ,Off-platform peripheral access control 28" "WP0,WP1"
|
|
bitfld.long 0x0C 12. " [12] ,Off-platform peripheral access control 28" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " OPAC2[11] ,Off-platform peripheral access control 29" "BW0,BW1"
|
|
bitfld.long 0x0C 10. " [10] ,Off-platform peripheral access control 29" "SP0,SP1"
|
|
bitfld.long 0x0C 9. " [9] ,Off-platform peripheral access control 29" "WP0,WP1"
|
|
bitfld.long 0x0C 8. " [8] ,Off-platform peripheral access control 29" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " OPAC30[7] ,Off-platform peripheral access control 30" "BW0,BW1"
|
|
bitfld.long 0x0C 6. " [6] ,Off-platform peripheral access control 30" "SP0,SP1"
|
|
bitfld.long 0x0C 5. " [5] ,Off-platform peripheral access control 30" "WP0,WP1"
|
|
bitfld.long 0x0C 4. " [4] ,Off-platform peripheral access control 30" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " OPAC31[3] ,Off-platform peripheral access control 31" "BW0,BW1"
|
|
bitfld.long 0x0C 2. " [2] ,Off-platform peripheral access control 31" "SP0,SP1"
|
|
bitfld.long 0x0C 1. " [1] ,Off-platform peripheral access control 31" "WP0,WP1"
|
|
bitfld.long 0x0C 0. " [0] ,Off-platform peripheral access control 31" "TP0,TP1"
|
|
line.long 0x10 "OPACR4,Off-Platform Peripheral Access Control Registers"
|
|
bitfld.long 0x10 31. " OPAC32[31] ,Off-platform peripheral access control 32" "BW0,BW1"
|
|
bitfld.long 0x10 30. " [30] ,Off-platform peripheral access control 32" "SP0,SP1"
|
|
bitfld.long 0x10 29. " [29] ,Off-platform peripheral access control 32" "WP0,WP1"
|
|
bitfld.long 0x10 28. " [28] ,Off-platform peripheral access control 32" "TP0,TP1"
|
|
textline " "
|
|
bitfld.long 0x10 27. " OPAC33[27] ,Off-platform peripheral access control 33" "BW0,BW1"
|
|
bitfld.long 0x10 26. " [26] ,Off-platform peripheral access control 33" "SP0,SP1"
|
|
bitfld.long 0x10 25. " [25] ,Off-platform peripheral access control 33" "WP0,WP1"
|
|
bitfld.long 0x10 24. " [24] ,Off-platform peripheral access control 33" "TP0,TP1"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "AOI (And-Or-Inverter)"
|
|
base ad:0x403B4000
|
|
width 10.
|
|
group.word 0x00++0x0F
|
|
line.word 0x00 "BFCRT010,Boolean Function Term 0 And 1 Configuration Register For EVENT0"
|
|
bitfld.word 0x00 14.--15. " PT0_AC ,Product term 0 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x00 12.--13. " PT0_BC ,Product term 0 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x00 10.--11. " PT0_CC ,Product term 0 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x00 8.--9. " PT0_DC ,Product term 0 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
newline
|
|
bitfld.word 0x00 6.--7. " PT1_AC ,Product term 1 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x00 4.--5. " PT1_BC ,Product term 1 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x00 2.--3. " PT1_CC ,Product term 1 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x00 0.--1. " PT1_DC ,Product term 1 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
line.word 0x02 "BFCRT230,Boolean Function Term 2 And 3 Configuration Register For EVENT0"
|
|
bitfld.word 0x02 14.--15. " PT2_AC ,Product term 2 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x02 12.--13. " PT2_BC ,Product term 2 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x02 10.--11. " PT2_CC ,Product term 2 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x02 8.--9. " PT2_DC ,Product term 2 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
newline
|
|
bitfld.word 0x02 6.--7. " PT3_AC ,Product term 3 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x02 4.--5. " PT3_BC ,Product term 3 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x02 2.--3. " PT3_CC ,Product term 3 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x02 0.--1. " PT3_DC ,Product term 3 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
line.word 0x04 "BFCRT011,Boolean Function Term 0 And 1 Configuration Register For EVENT1"
|
|
bitfld.word 0x04 14.--15. " PT0_AC ,Product term 0 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x04 12.--13. " PT0_BC ,Product term 0 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x04 10.--11. " PT0_CC ,Product term 0 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x04 8.--9. " PT0_DC ,Product term 0 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
newline
|
|
bitfld.word 0x04 6.--7. " PT1_AC ,Product term 1 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x04 4.--5. " PT1_BC ,Product term 1 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x04 2.--3. " PT1_CC ,Product term 1 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x04 0.--1. " PT1_DC ,Product term 1 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
line.word 0x06 "BFCRT231,Boolean Function Term 2 And 3 Configuration Register For EVENT1"
|
|
bitfld.word 0x06 14.--15. " PT2_AC ,Product term 2 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x06 12.--13. " PT2_BC ,Product term 2 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x06 10.--11. " PT2_CC ,Product term 2 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x06 8.--9. " PT2_DC ,Product term 2 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
newline
|
|
bitfld.word 0x06 6.--7. " PT3_AC ,Product term 3 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x06 4.--5. " PT3_BC ,Product term 3 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x06 2.--3. " PT3_CC ,Product term 3 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x06 0.--1. " PT3_DC ,Product term 3 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
line.word 0x08 "BFCRT012,Boolean Function Term 0 And 1 Configuration Register For EVENT2"
|
|
bitfld.word 0x08 14.--15. " PT0_AC ,Product term 0 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x08 12.--13. " PT0_BC ,Product term 0 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x08 10.--11. " PT0_CC ,Product term 0 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x08 8.--9. " PT0_DC ,Product term 0 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
newline
|
|
bitfld.word 0x08 6.--7. " PT1_AC ,Product term 1 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x08 4.--5. " PT1_BC ,Product term 1 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x08 2.--3. " PT1_CC ,Product term 1 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x08 0.--1. " PT1_DC ,Product term 1 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
line.word 0x0A "BFCRT232,Boolean Function Term 2 And 3 Configuration Register For EVENT2"
|
|
bitfld.word 0x0A 14.--15. " PT2_AC ,Product term 2 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0A 12.--13. " PT2_BC ,Product term 2 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0A 10.--11. " PT2_CC ,Product term 2 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0A 8.--9. " PT2_DC ,Product term 2 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
newline
|
|
bitfld.word 0x0A 6.--7. " PT3_AC ,Product term 3 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0A 4.--5. " PT3_BC ,Product term 3 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0A 2.--3. " PT3_CC ,Product term 3 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0A 0.--1. " PT3_DC ,Product term 3 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
line.word 0x0C "BFCRT013,Boolean Function Term 0 And 1 Configuration Register For EVENT3"
|
|
bitfld.word 0x0C 14.--15. " PT0_AC ,Product term 0 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0C 12.--13. " PT0_BC ,Product term 0 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0C 10.--11. " PT0_CC ,Product term 0 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0C 8.--9. " PT0_DC ,Product term 0 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
newline
|
|
bitfld.word 0x0C 6.--7. " PT1_AC ,Product term 1 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0C 4.--5. " PT1_BC ,Product term 1 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0C 2.--3. " PT1_CC ,Product term 1 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0C 0.--1. " PT1_DC ,Product term 1 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
line.word 0x0E "BFCRT233,Boolean Function Term 2 And 3 Configuration Register For EVENT3"
|
|
bitfld.word 0x0E 14.--15. " PT2_AC ,Product term 2 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0E 12.--13. " PT2_BC ,Product term 2 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0E 10.--11. " PT2_CC ,Product term 2 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0E 8.--9. " PT2_DC ,Product term 2 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " PT3_AC ,Product term 3 - A input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0E 4.--5. " PT3_BC ,Product term 3 - B input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0E 2.--3. " PT3_CC ,Product term 3 - C input configuration" "Force 0,Pass,Complement,Force 1"
|
|
bitfld.word 0x0E 0.--1. " PT3_DC ,Product term 3 - D input configuration" "Force 0,Pass,Complement,Force 1"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "CCM (Clock Controller Module)"
|
|
tree "CCM"
|
|
base ad:0x400FC000
|
|
width 12.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CCM_CCR,CCM Control Register"
|
|
bitfld.long 0x00 27. " RBC_EN ,Enable for REG_BYPASS_COUNTER" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--26. " REG_BYPASS_COUNT ,Counter for analog_reg_bypass signal assertion after standby voltage request by PMIC_STBY_REQ" "No delay,1 CKIL,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,63 CKIL"
|
|
bitfld.long 0x00 12. " COSC_EN ,On chip oscillator enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " OSCNT ,Oscillator ready counter value"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "CCM_CSR,CCM Status Register"
|
|
bitfld.long 0x00 5. " COSC_READY ,Status indication of on board oscillator" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " CAMP2_READY ,Status indication of CAMP2" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " REF_EN_B ,Status of the value of CCM_REF_EN_B output of ccm" "0,1"
|
|
group.long 0x0C++0x2B
|
|
line.long 0x00 "CCM_CCSR,CCM Clock Switcher Register"
|
|
bitfld.long 0x00 0. " PLL3_SW_CLK_SEL ,Source to generate pll3_sw_clk" "pll3_main_clk,pll3 bypass clock"
|
|
line.long 0x04 "CCM_CACRR,CCM Arm Clock Root Register"
|
|
bitfld.long 0x04 0.--2. " ARM_PODF ,Divider for ARM clock root" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
line.long 0x08 "CCM_CBCDR,CCM Bus Clock Divider Register"
|
|
bitfld.long 0x08 27.--29. " PERIPH_CLK2_PODF ,Divider for periph_clk2_podf" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x08 25. " PERIPH_CLK_SEL ,Selector for peripheral main clock" "pre_periph_clk_sel, periph_clk2_clk_divided"
|
|
bitfld.long 0x08 16.--18. " SEMC_PODF ,Post divider for SEMC clock" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
textline " "
|
|
bitfld.long 0x08 10.--12. " AHB_PODF ,Divider for AHB PODF" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x08 8.--9. " IPG_PODF ,Divider for ipg podf" "/1,/2,/3,/4"
|
|
bitfld.long 0x08 7. " SEMC_ALT_CLK_SEL ,SEMC alternative clock select" "PLL2 PFD2,PLL3 PFD1"
|
|
textline " "
|
|
bitfld.long 0x08 6. " SEMC_CLK_SEL ,SEMC clock source select" "Periph_clk,SEMC alternative"
|
|
line.long 0x0C "CCM_CBCMR,CCM Bus Clock Multiplexer Register"
|
|
bitfld.long 0x0C 26.--28. " LPSPI_PODF ,Divider for LPSPI" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x0C 18.--19. " PRE_PERIPH_CLK_SEL ,Selector for pre_periph clock multiplexer" "PLL2,PLL3 PFD3,PLL2 PFD3,divided PLL6"
|
|
bitfld.long 0x0C 14.--15. " TRACE_CLK_SEL ,Selector for Trace clock multiplexer" "PLL2,PLL2 PFD2,PLL2 PFD0,PLL2 PFD1"
|
|
textline " "
|
|
bitfld.long 0x0C 12.--13. " PERIPH_CLK2_SEL ,Selector for peripheral clk2 clock multiplexer" "pll3_sw_clk,osc_clk,pll2_bypass_clk,?..."
|
|
bitfld.long 0x0C 4.--5. " LPSPI_CLK_SEL ,Selector for lpspi clock multiplexer" "PLL3 PFD1,PLL3 PFD0,PLL2,PLL2 PFD2"
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|
line.long 0x10 "CCM_CSCMR1,CCM Serial Clock Multiplexer Register 1"
|
|
bitfld.long 0x10 29.--30. " FLEXSPI_CLK_SEL ,Selector for flexspi clock multiplexer" "semc_clk_root_pre,pll3_sw_clk,PLL2 PFD2,PLL3 PFD0"
|
|
bitfld.long 0x10 23.--25. " FLEXSPI_PODF ,Divider for flexspi clock root" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x10 17. " USDHC2_CLK_SEL ,Selector for usdhc2 clock multiplexer" "PLL2 PFD2,PLL2 PFD0"
|
|
textline " "
|
|
bitfld.long 0x10 16. " USDHC1_CLK_SEL ,Selector for usdhc1 clock multiplexer" "PLL2 PFD2,PLL2 PFD0"
|
|
bitfld.long 0x10 14.--15. " SAI3_CLK_SEL ,Selector for sai3 clock multiplexer" "PLL3 PFD2,,PLL4,?..."
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|
bitfld.long 0x10 12.--13. " SAI2_CLK_SEL ,Selector for sai2 clock multiplexer" "PLL3 PFD2,,PLL4,?..."
|
|
textline " "
|
|
bitfld.long 0x10 10.--11. " SAI1_CLK_SEL ,Selector for sai1 clock multiplexer" "PLL3 PFD2,,PLL4,?..."
|
|
bitfld.long 0x10 6. " PERCLK_CLK_SEL ,Selector for the perclk clock multiplexer" "ipg clk root,osc_clk"
|
|
bitfld.long 0x10 0.--5. " PERCLK_PODF ,Divider for perclk podf" "/1,/2,/3,/4,/5,/6,/7,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,/64"
|
|
line.long 0x14 "CCM_CSCMR2,CCM Serial Clock Multiplexer Register 2"
|
|
bitfld.long 0x14 19.--20. " FLEXIO1_CLK_SEL ,Selector for flexio1 clock multiplexer" "PLL4 divided,PLL3 PFD2,,pll3_sw_clk"
|
|
bitfld.long 0x14 8.--9. " CAN_CLK_SEL ,Selector for FlexCAN clock multiplexer" "pll3_sw_clk divided (60M),osc_clk (24M), pll3_sw_clk divided (80M),?..."
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bitfld.long 0x14 2.--7. " CAN_CLK_PODF ,Divider for CAN clock podf" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64"
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line.long 0x18 "CCM_CSCDR1,CCM Serial Clock Divider Register 1"
|
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bitfld.long 0x18 25.--26. " TRACE_PODF ,Divider for trace clock" "/1,/2,/3,/4"
|
|
bitfld.long 0x18 16.--18. " USDHC2_PODF ,Divider for usdhc2 clock" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x18 11.--13. " USDHC1_PODF ,Divider for usdhc1 clock podf" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
textline " "
|
|
bitfld.long 0x18 6. " UART_CLK_SEL ,Selector for the UART clock multiplexer" "pll3_80m,osc_clk"
|
|
bitfld.long 0x18 0.--5. " UART_CLK_PODF ,Divider for uart clock podf" "/1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,/64"
|
|
line.long 0x1C "CCM_CS1CDR,CCM Clock Divider Register"
|
|
bitfld.long 0x1C 25.--27. " FLEXIO1_CLK_PODF ,Divider for flexio1 clock" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x1C 22.--24. " SAI3_CLK_PRED ,Divider for sai3 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x1C 16.--21. " SAI3_CLK_PODF ,Divider for sai3 clock podf" "/1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,/64"
|
|
textline " "
|
|
bitfld.long 0x1C 9.--11. " FLEXIO1_CLK_PRED ,Divider for flexio1 clock" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x1C 6.--8. " SAI1_CLK_PRED ,Divider for sai1 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x1C 0.--5. " SAI1_CLK_PODF ,Divider for sai1 clock podf" "/1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,/64"
|
|
line.long 0x20 "CCM_CS2CDR,CCM Clock Divider Register"
|
|
bitfld.long 0x20 6.--8. " SAI2_CLK_PRED ,Divider for sai2 clock pred" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x20 0.--5. " SAI2_CLK_PODF ,Divider for sai2 clock podf" "/1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,/64"
|
|
line.long 0x24 "CCM_CDCDR,CCM D1 Clock Divider Register"
|
|
bitfld.long 0x24 25.--27. " SPDIF0_CLK_PRED ,Divider for spdif0 clock pred" "/1,/2,/3,,,,,/8"
|
|
bitfld.long 0x24 22.--24. " SPDIF0_CLK_PODF ,Divider for spdif0 clock podf" "/1,,,,,,,/8"
|
|
bitfld.long 0x24 20.--21. " SPDIF0_CLK_SEL ,Selector for spdif0 clock multiplexer" "PLL4,PLL3 PFD2,,pll3_sw_clk"
|
|
line.long 0x28 "CCM_CSCDR2,CCM Serial Clock Divider Register 2"
|
|
bitfld.long 0x28 19.--24. " LPI2C_CLK_PODF ,Divider for lpi2c clock podf" "/1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,/64"
|
|
bitfld.long 0x28 18. " LPI2C_CLK_SEL ,Selector for the LPI2C clock multiplexer" "pll3_60m,osc_clk"
|
|
rgroup.long 0x3C++0x03
|
|
line.long 0x00 "CCM_CSCDR3,CCM Serial Clock Divider Register 3"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "CCM_CDHIPR,CCM Divider Handshake In-Process Register"
|
|
bitfld.long 0x00 16. " ARM_PODF_BUSY ,Busy indicator for arm_podf" "Not busy,Busy"
|
|
bitfld.long 0x00 5. " PERIPH_CLK_SEL_BUSY ,Busy indicator for periph_clk_sel mux control" "Not busy,Busy"
|
|
bitfld.long 0x00 3. " PERIPH2_CLK_SEL_BUSY ,Busy indicator for periph2_clk_sel mux control" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AHB_PODF_BUSY ,Busy indicator for ahb_podf" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " SEMC_PODF_BUSY ,Busy indicator for semc_podf" "Not busy,Busy"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CCM_CLPCR,CCM Low Power Control Register"
|
|
bitfld.long 0x00 27. " MASK_L2CC_IDLE ,Mask L2CC IDLE for entering low power mode" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " MASK_SCU_IDLE ,Mask SCU IDLE for entering low power mode" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " MASK_CORE0_WFI ,Mask WFI of core0 for entering low power mode" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BYPASS_LPM_HS0 ,Bypass low power mode handshake" "?,1"
|
|
bitfld.long 0x00 19. " BYPASS_LPM_HS1 ,Bypass low power mode handshake" "?,1"
|
|
bitfld.long 0x00 11. " COSC_PWRDOWN ,Power down of on chip oscillator control" "Not powered down,Powered down"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " STBY_COUNT ,Standby counter definition" "0,1,2,3"
|
|
bitfld.long 0x00 8. " VSTBY ,Voltage standby request" "No request,Request"
|
|
bitfld.long 0x00 7. " DIS_REF_OSC ,Closing of external reference oscillator clock control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SBYOS ,Standby clock oscillator control" "No power down,Power down"
|
|
bitfld.long 0x00 5. " ARM_CLK_DIS_ON_LPM ,ARM clocks on wait mode disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--1. " LPM ,Low power mode on next assertion of dsm_request signal" "Remain in run mode,Transfer to wait mode,Transfer to stop mode,?..."
|
|
group.long 0x58++0x0F
|
|
line.long 0x00 "CCM_CISR,CCM Interrupt Status Register"
|
|
eventfld.long 0x00 26. " ARM_PODF_LOADED ,arm_podf dependent CCM interrupt request 1" "Not occurred,Occurred"
|
|
eventfld.long 0x00 22. " PERIPH_CLK_SEL_LOADED ,periph_clk_sel dependent CCM interrupt request 1" "Not occurred,Occurred"
|
|
eventfld.long 0x00 20. " AHB_PODF_LOADED ,ahb_podf dependent CCM interrupt request 1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 19. " PERIPH2_CLK_SEL_LOADED ,periph2_clk_sel CCM interrupt request 1" "Not occurred,Occurred"
|
|
eventfld.long 0x00 17. " SEMC_PODF_LOADED ,semc_podf dependent CCM interrupt request 1" "Not occurred,Occurred"
|
|
eventfld.long 0x00 6. " COSC_READY ,On-board oscillator ready dependent CCM interrupt request 2" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 0. " LRF_PLL ,Lock of all enabled and not bypassed PLLs dependent CCM interrupt request 2" "Not occurred,Occurred"
|
|
line.long 0x04 "CCM_CIMR,CCM Interrupt Mask Register"
|
|
bitfld.long 0x04 26. " ARM_PODF_LOADED ,arm_podf dependent CCM interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " MASK_PERIPH_CLK_SEL_LOADED ,periph_clk_sel dependent CCM interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x04 20. " MASK_AHB_PODF_LOADED ,ahb_podf dependent CCM interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MASK_PERIPH2_CLK_SEL_LOADED ,periph2_clk_sel CCM interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " MASK_SEMC_PODF_LOADED ,semc_podf dependent CCM interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " MASK_COSC_READY ,On-board oscillator ready dependent CCM interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " MASK_LRF_PLL ,Lock of all enabled and not bypassed PLLs dependent CCM interrupt mask" "Not masked,Masked"
|
|
line.long 0x08 "CCM_CCOSR,CCM Clock Output Source Register"
|
|
bitfld.long 0x08 24. " CLKO2_EN ,CCM_CLKO2 clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21.--23. " CLKO2_DIV ,Divider of CCM_CLKO2" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
bitfld.long 0x08 16.--20. " CLKO2_SEL ,Selection of the clock to be generated on CCM_CLKO2" ",,,usdhc1_clk_root,,,lpi2c_clk_root,,,,,lpi2c_clk_root,,,osc_clk,,lpspi_clk_root,usdhc2_clk_root,sai1_clk_root,sai2_clk_root,sai3_clk_root,,trace_clk_root,can_clk_root,,,,flexspi_clk_root,uart_clk_root,spdif0_clk_root,?..."
|
|
textline " "
|
|
bitfld.long 0x08 8. " CLK_OUT_SEL ,CCM_CLKO1 output to reflect CCM_CLKO1 or CCM_CLKO2 clocks" "Drive CCM_CLKO1,Drive CCM_CLKO2"
|
|
bitfld.long 0x08 7. " CLKO1_EN ,CCM_CLKO1 clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4.--6. " CLKO1_DIV ,CCM_CLKO1 divider" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " CLKO1_SEL ,Selection of the clock to be generated on CCM_CLKO1" "pll3_sw_clk/2,PLL2/2,ENET PLL/2,,,semc_clk_root,,,,,,ahb_clk_root,ipg_clk_root,perclk_root,,pll4_main_clk"
|
|
line.long 0x0C "CCM_CGPR,CCM General Purpose Register"
|
|
bitfld.long 0x0C 17. " INT_MEM_CLK_LPM ,Clock to ARM platform memories when entering Low Power Mode with interrupt pending enable" "Disabled,Enabled"
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|
bitfld.long 0x0C 16. " FPL ,Fast PLL enable" "Default,3 CKIL clocks earlier"
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|
bitfld.long 0x0C 14.--15. " SYS_MEM_DS_CTRL ,System memory DS control" "Disabled,Enabled on STOP/PLL disabled,Enabled in STOP mode,Enabled in STOP mode"
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|
textline " "
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|
bitfld.long 0x0C 4. " EFUSE_PROG_SUPPLY_GATE ,Gate of program supply for efuse programing" "Gated off,Allowed"
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|
bitfld.long 0x0C 0. " PMIC_DELAY_SCALER ,Clock division for stby_count (pmic delay counter)" "/1,/8"
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|
tree "CCM_CCGR (CCM Clock Gating Registers 0 - 6)"
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width 11.
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|
group.long 0x68++0x1B
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line.long 0x00 "CCM_CCGR0,CCM Clock Gating Register 0"
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|
bitfld.long 0x00 30.--31. " CG15 ,gpio2_clocks (gpio2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x00 28.--29. " CG14 ,lpuart2 clock (lpuart2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x00 26.--27. " CG13 ,gpt2 serial clocks (gpt2_serial_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x00 24.--25. " CG12 ,gpt2 bus clocks (gpt2_bus_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
bitfld.long 0x00 22.--23. " CG11 ,trace clock (trace_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
bitfld.long 0x00 20.--21. " CG10 ,can2_serial clock (can2_serial_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x00 18.--19. " CG9 ,can2 clock (can2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x00 16.--17. " CG8 ,can1_serial clock (can1_serial_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
bitfld.long 0x00 14.--15. " CG7 ,can1 clock (can1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x00 12.--13. " CG6 ,lpuart3 clock (lpuart3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x00 10.--11. " CG5 ,dcp clock (dcp_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x00 8.--9. " CG4 ,sim_m_clk_r_clk_enable" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x00 4.--5. " CG2 ,mqs clock ( mqs_hmclk_clock_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x00 2.--3. " CG1 ,aips_tz2 clocks (aips_tz2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x00 0.--1. " CG0 ,aips_tz1 clocks (aips_tz1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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line.long 0x04 "CCM_CCGR1,CCM Clock Gating Register 1"
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bitfld.long 0x04 28.--29. " CG14 ,csu clock (csu_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x04 26.--27. " CG13 ,gpio1 clock (gpio1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x04 24.--25. " CG12 ,lpuart4 clock (lpuart4_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x04 22.--23. " CG11 ,gpt1 serial clock (gpt_serial_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x04 20.--21. " CG10 ,gpt1 bus clock (gpt_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x04 16.--17. " CG8 ,adc1 clock (adc1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x04 12.--13. " CG6 ,pit clocks (pit_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x04 10.--11. " CG5 ,enet clock (enet_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x04 8.--9. " CG4 ,adc2 clock (adc2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x04 6.--7. " CG3 ,lpspi4 clocks (lpspi4_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x04 4.--5. " CG2 ,lpspi3 clocks (lpspi3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x04 2.--3. " CG1 ,lpspi2 clocks (lpspi2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x04 0.--1. " CG0 ,lpspi1 clocks (lpspi1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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line.long 0x08 "CCM_CCGR2,CCM Clock Gating Register 2"
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bitfld.long 0x08 30.--31. " CG15 ,pxp clocks (pxp_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x08 26.--27. " CG13 ,gpio3 clock (gpio3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x08 24.--25. " CG12 ,xbar2 clock (xbar2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x08 22.--23. " CG11 ,xbar1 clock (xbar1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x08 12.--13. " CG6 ,OCOTP_CTRL clock (iim_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x08 10.--11. " CG5 ,lpi2c3 clock (lpi2c3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x08 8.--9. " CG4 ,lpi2c2 clock (lpi2c2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x08 6.--7. " CG3 ,lpi2c1 clock (lpi2c1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x08 4.--5. " CG2 ,iomuxc_snvs clock (iomuxc_snvs_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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line.long 0x0C "CCM_CCGR3,CCM Clock Gating Register 3"
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bitfld.long 0x0C 30.--31. " CG15 ,iomuxc_snvs_gpr clock (iomuxc_snvs_gpr_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x0C 26.--27. " CG13 ,acmp4 clocks (acmp4_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x0C 24.--25. " CG12 ,acmp3 clocks (acmp3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x0C 22.--23. " CG11 ,acmp2 clocks (acmp2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x0C 20.--21. " CG10 ,acmp1 clocks (acmp1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x0C 18.--19. " CG9 ,flexram clock (flexram_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x0C 16.--17. " CG8 ,wdog1 clock (wdog1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x0C 14.--15. " CG7 ,ewm clocks (ewm_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x0C 8.--9. " CG4 ,aoi1 clock (aoi1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x0C 6.--7. " CG3 ,lpuart6 clock (lpuart6_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x0C 4.--5. " CG2 ,semc clocks (semc_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x0C 2.--3. " CG1 ,lpuart5 clock (lpuart5_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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line.long 0x10 "CCM_CCGR4,CCM Clock Gating Register 4"
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bitfld.long 0x10 26.--27. " CG13 ,enc2 clocks (enc2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x10 24.--25. " CG12 ,enc1 clocks (enc1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x10 18.--19. " CG9 ,pwm2 clocks (pwm2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x10 16.--17. " CG8 ,pwm1 clocks (pwm1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x10 14.--15. " CG7 ,sim_ems clocks (sim_ems_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x10 12.--13. " CG6 ,sim_m clocks (sim_m_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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|
textline " "
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bitfld.long 0x10 8.--9. " CG4 ,sim_m7 clock (sim_m7_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x10 6.--7. " CG3 ,bee clock (bee_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x10 4.--5. " CG2 ,iomuxc gpr clock (iomuxc_gpr_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x10 2.--3. " CG1 ,iomuxc clock (iomuxc_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x10 0.--1. " CG0 ,sim_m7_clk_r_enable" "Off in all modes,On in RUN mode,,Off in STOP mode"
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line.long 0x14 "CCM_CCGR5,CCM Clock Gating Register 5"
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bitfld.long 0x14 30.--31. " CG15 ,snvs_lp clock (snvs_lp_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 28.--29. " CG14 ,snvs_hp clock (snvs_hp_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 26.--27. " CG13 ,lpuart7 clock (lpuart7_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x14 24.--25. " CG12 ,lpuart1 clock (lpuart1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 22.--23. " CG11 ,sai3 clock (sai3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 20.--21. " CG10 ,sai2 clock (sai2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x14 18.--19. " CG9 ,sai1 clock (sai1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 14.--15. " CG7 ,spdif clock (spdif_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 12.--13. " CG6 ,aipstz4 clocks (aips_tz4_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x14 10.--11. " CG5 ,wdog2 clock (wdog2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 8.--9. " CG4 ,kpp clock (kpp_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 6.--7. " CG3 ,dma clock (dma_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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textline " "
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bitfld.long 0x14 4.--5. " CG2 ,wdog3 clock (wdog3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x14 2.--3. " CG1 ,flexio1 clock (flexio1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
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bitfld.long 0x14 0.--1. " CG0 ,rom clock (rom_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
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line.long 0x18 "CCM_CCGR6,CCM Clock Gating Register 6"
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bitfld.long 0x18 28.--29. " CG14 ,timer2 clocks (timer2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x18 26.--27. " CG13 ,timer1 clocks (timer1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x18 24.--25. " CG12 ,lpi2c4 serial clock (lpi2c4_serial_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
|
textline " "
|
|
bitfld.long 0x18 22.--23. " CG11 ,anadig clocks (anadig_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
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bitfld.long 0x18 20.--21. " CG10 ,sim_per clock (sim_per_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
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bitfld.long 0x18 18.--19. " CG9 ,aips_tz3 clock (aips_tz3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
|
textline " "
|
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bitfld.long 0x18 14.--15. " CG7 ,lpuart8 clocks (lpuart8_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
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bitfld.long 0x18 12.--13. " CG6 ,trng clock (trng_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
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bitfld.long 0x18 10.--11. " CG5 ,flexspi clocks (flexspi_clk_enable) sim_ems_clk_enable must also be cleared, when flexspi_clk_enable is cleared" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
|
textline " "
|
|
bitfld.long 0x18 6.--7. " CG3 ,dcdc clocks (dcdc_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
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bitfld.long 0x18 4.--5. " CG2 ,usdhc2 clocks (usdhc2_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
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bitfld.long 0x18 2.--3. " CG1 ,usdhc1 clocks (usdhc1_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
|
textline " "
|
|
bitfld.long 0x18 0.--1. " CG0 ,usboh3 clock (usboh3_clk_enable)" "Off in all modes,On in RUN mode,,Off in STOP mode"
|
|
tree.end
|
|
textline " "
|
|
width 12.
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "CCM_CMEOR,CCM Module Enable Override Register"
|
|
bitfld.long 0x00 30. " MOD_EN_OV_CAN1_CPI ,Clock enable signal from CAN1 override" "Not overrode,Overrode"
|
|
bitfld.long 0x00 28. " MOD_EN_OV_CAN2_CPI ,Clock enable signal from CAN2 override" "Not overrode,Overrode"
|
|
bitfld.long 0x00 9. " MOD_EN_OV_TRNG ,Clock enable signal from TRNG override" "Not overrode,Overrode"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MOD_EN_USDHC ,Clock enable signal from USDHC override" "Not overrode,Overrode"
|
|
bitfld.long 0x00 6. " MOD_EN_OV_PIT ,Clock enable signal from PIT override" "Not overrode,Overrode"
|
|
bitfld.long 0x00 5. " MOD_EN_OV_GPT ,Clock enable signal from GPT override" "Not overrode,Overrode"
|
|
width 0x0B
|
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tree.end
|
|
tree "CCM ANALOG"
|
|
base ad:0x400D8000
|
|
width 17.
|
|
group.long 0x10++0x0F
|
|
line.long 0x00 "PLL_USB1,Analog USB1 480MHz PLL Control Register"
|
|
rbitfld.long 0x00 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " BYPASS_SET/CLR ,Bypass the PLL" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14.--15. 0x04 14.--15. 0x08 14.--15. " BYPASS_CLK_SRC_SET/CLR ,Determines the bypass source" "REF_CLK_24M,CLK1,?..."
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ENABLE_SET/CLR ,Enable the PLL clock output" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " POWER_SET/CLR ,Powers up the PLL" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " EN_USB_CLKS_SET/CLR ,USB clock for USBPHY enabled" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0.--1. 0x04 0.--1. 0x08 0.--1. " DIV_SELECT ,PLL loop divider" "20,22,?..."
|
|
line.long 0x04 "PLL_USB1_SET,Analog USB1 480MHz PLL Control Register"
|
|
rbitfld.long 0x04 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
line.long 0x08 "PLL_USB1_CLR,Analog USB1 480MHz PLL Control Register"
|
|
rbitfld.long 0x08 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
line.long 0x0C "PLL_USB1_TOG,Analog USB1 480MHz PLL Control Register"
|
|
rbitfld.long 0x0C 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
bitfld.long 0x0C 16. " BYPASS ,Bypass the PLL" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 13. " ENABLE ,Enable the PLL clock output" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " POWER ,Powers up the PLL" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " EN_USB_CLKS ,USB clock for USBPHY enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--1. " DIV_SELECT ,PLL loop divider" "20,22,?..."
|
|
group.long 0x30++0x13
|
|
line.long 0x00 "PLL_SYS,Analog System PLL Control Register"
|
|
rbitfld.long 0x00 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PFD_OFFSET_EN_SET/CLR ,Enables an offset in the phase frequency detector" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " BYPASS_SET/CLR ,Bypass the PLL" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 14.--15. 0x04 14.--15. 0x08 14.--15. " BYPASS_CLK_SRC_SET/CLR ,Determines the bypass source" "REF_CLK_24M,CLK1,?..."
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ENABLE_SET/CLR ,Enable the PLL clock output" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " POWERDOWN_SET/CLR ,Powers down the PLL" "No,Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DIV_SELECT_SET/CLR ,PLL loop divider" "20,22"
|
|
line.long 0x04 "PLL_SYS_SET,Analog System PLL Control Register"
|
|
rbitfld.long 0x04 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
line.long 0x08 "PLL_SYS_CLR,Analog System PLL Control Register"
|
|
rbitfld.long 0x08 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
line.long 0x0C "PLL_SYS_TOG,Analog System PLL Control Register"
|
|
rbitfld.long 0x0C 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " BYPASS ,Bypass the PLL" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,?..."
|
|
bitfld.long 0x0C 13. " ENABLE ,Enable PLL output" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " DIV_SELECT ,PLL loop divider" "20,22"
|
|
line.long 0x10 "PLL_SYS_SS,528MHz System PLL Spread Spectrum Register"
|
|
hexmask.long.word 0x10 16.--31. 1. " STOP ,Frequency change"
|
|
bitfld.long 0x10 15. " ENABLE ,Spread spectrum modulation enabled" "Disabled,Enabled"
|
|
hexmask.long.word 0x10 0.--14. 1. " STEP ,Frequency change step"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "PLL_SYS_NUM,Numerator Of 528MHz System PLL Fractional Loop Divider Register"
|
|
hexmask.long 0x00 0.--29. 1. " A ,Numerator fractional loop divider"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "PLL_SYS_DENOM,Denominator Of 528MHz System PLL Fractional Loop Divider Register"
|
|
hexmask.long 0x00 0.--29. 1. " B ,Denominator of fractional loop divider"
|
|
group.long 0x70++0x13
|
|
line.long 0x00 "PLL_AUDIO,Analog Audio PLL Control Register"
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rbitfld.long 0x00 31. " LOCK ,PLL lock" "Not locked,Locked"
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setclrfld.long 0x00 19.--20. 0x04 19.--20. 0x08 19.--20. " POST_DIV_SELECT ,Post divider select" "4,2,1,?..."
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setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PFD_OFFSET_EN_SET/CLR ,Enables an offset in the phase frequency detector" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 16. 0x04 16. 0x08 16. " BYPASS_SET/CLR ,Bypass the PLL" "Disabled,Enabled"
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setclrfld.long 0x00 14.--15. 0x04 14.--15. 0x08 14.--15. " BYPASS_CLK_SRC_SET/CLR ,Determines the bypass source" "REF_CLK_24M,CLK1,?..."
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setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ENABLE_SET/CLR ,Enable the PLL clock output" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 12. 0x04 12. 0x08 12. " POWERDOWN_SET/CLR ,Powers up the PLL" "No,Yes"
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hexmask.long.byte 0x00 0.--6. 1. " DIV_SELECT ,PLL loop divider"
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line.long 0x04 "PLL_AUDIO_SET,Analog Audio PLL control Register"
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rbitfld.long 0x04 31. " LOCK ,PLL lock" "Not locked,Locked"
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hexmask.long.byte 0x04 0.--6. 1. " DIV_SELECT ,PLL loop divider"
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line.long 0x08 "PLL_AUDIO_CLR,Analog Audio PLL control Register"
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rbitfld.long 0x08 31. " LOCK ,PLL lock" "Not locked,Locked"
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hexmask.long.byte 0x08 0.--6. 1. " DIV_SELECT ,PLL loop divider"
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line.long 0x0C "PLL_AUDIO_TOG,Analog Audio PLL control Register"
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rbitfld.long 0x0C 31. " LOCK ,PLL lock" "Not locked,Locked"
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bitfld.long 0x0C 19.--20. " POST_DIV_SELECT ,Post divider select" "4,2,1,?..."
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bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Enables an offset in the phase frequency detector" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0C 16. " BYPASS ,Bypass the PLL" "Disabled,Enabled"
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bitfld.long 0x0C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,?..."
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bitfld.long 0x0C 13. " ENABLE ,Enable PLL output" "Disabled,Enabled"
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textline " "
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bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "No,Yes"
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hexmask.long.byte 0x0C 0.--6. 1. " DIV_SELECT ,PLL loop divider"
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line.long 0x10 "PLL_AUDIO_NUM,Numerator of Audio PLL Fractional Loop Divider Register"
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hexmask.long 0x10 0.--29. 1. " A ,Numerator of fractional loop divider"
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group.long 0x90++0x03
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line.long 0x00 "PLL_AUDIO_DENOM,Denominator Of Audio PLL Fractional Loop Divider Register"
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hexmask.long 0x00 0.--29. 1. " B ,Denominator of fractional loop divider"
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group.long 0xE0++0x2F
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line.long 0x00 "PLL_ENET,Analog ENET PLL Control Register"
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rbitfld.long 0x00 31. " LOCK ,PLL lock" "Not locked,Locked"
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setclrfld.long 0x00 22. 0x04 22. 0x08 22. " ENET_500M_REF_EN_SET/CLR ,ENET 500 MHz reference clock enable" "Disabled,Enabled"
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setclrfld.long 0x00 21. 0x04 21. 0x08 21. " ENET_25M_REF_EN_SET/CLR ,ENET 25 MHz reference clock enable" "Disabled,Enabled"
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textline " "
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setclrfld.long 0x00 20. 0x04 20. 0x08 20. " ENET2_125M_EN_SET/CLR ,ENET 125 MHz reference clock enable" "Disabled,Enabled"
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setclrfld.long 0x00 19. 0x04 19. 0x08 19. " ENABLE_125M_SET/CLR ,Enable PLL output" "Disabled,Enabled"
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setclrfld.long 0x00 18. 0x04 18. 0x08 18. " PFD_OFFSET_EN_SET/CLR ,Offset in the phase frequency detector enable" "Disabled,Enabled"
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|
textline " "
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setclrfld.long 0x00 16. 0x04 16. 0x08 16. " BYPASS_SET/CLR ,Bypass the PLL" "Disabled,Enabled"
|
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setclrfld.long 0x00 14.--15. 0x04 14.--15. 0x08 14.--15. " BYPASS_CLK_SRC_SET/CLR ,Determines the bypass source" "REF_CLK_24M,CLK1,?..."
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setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ENET1_125M_EN_SET/CLR ,ENET1 125 MHz reference clock enable" "Disabled,Enabled"
|
|
textline " "
|
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setclrfld.long 0x00 12. 0x04 12. 0x08 12. " POWERDOWN_SET/CLR ,Powers down the PLL" "No,Yes"
|
|
setclrfld.long 0x00 2.--3. 0x04 2.--3. 0x08 2.--3. " ENET1_DIV_SELECT_SET/CLR ,PLL loop divider" "25,50,100,125"
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setclrfld.long 0x00 0.--1. 0x04 0.--1. 0x08 0.--1. " ENET0_DIV_SELECT_SET/CLR ,PLL loop divider" "25,50,100,125"
|
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line.long 0x04 "PLL_ENET_SET,Analog ENET PLL Control Register"
|
|
rbitfld.long 0x04 31. " LOCK ,PLL lock" "Not locked,Locked"
|
|
line.long 0x08 "PLL_ENET_CLR,Analog ENET PLL Control Register"
|
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rbitfld.long 0x08 31. " LOCK ,PLL lock" "Not locked,Locked"
|
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line.long 0x0C "PLL_ENET_TOG,Analog ENET PLL Control Register"
|
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rbitfld.long 0x0C 31. " LOCK ,PLL lock" "Not locked,Locked"
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|
bitfld.long 0x0C 22. " ENET_500M_REF_EN ,ENET 500 MHz reference clock enable" "Disabled,Enabled"
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|
bitfld.long 0x0C 21. " ENET_25M_REF_EN ,ENET 25 MHz reference clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 20. " ENET2_125M_EN ,ENET 125 MHz reference clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 19. " ENABLE_125M ,Enable PLL output" "Disabled,Enabled"
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|
bitfld.long 0x0C 18. " PFD_OFFSET_EN ,Offset in the phase frequency detector enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " BYPASS ,Bypass the PLL" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14.--15. " BYPASS_CLK_SRC ,Determines the bypass source" "REF_CLK_24M,CLK1,?..."
|
|
bitfld.long 0x0C 13. " ENET1_125M_EN ,ENET1 125 MHz reference clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 12. " POWERDOWN ,Powers down the PLL" "No,Yes"
|
|
bitfld.long 0x0C 2.--3. " ENET1_DIV_SELECT ,PLL loop divider" "25,50,100,125"
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|
bitfld.long 0x0C 0.--1. " ENET0_DIV_SELECT ,PLL loop divider" "25,50,100,125"
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|
line.long 0x10 "PFD_480,480MHz Clock Phase Fractional Divider Control Register"
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setclrfld.long 0x10 31. 0x14 31. 0x18 31. " PFD3_CLKGATE_SET/CLR ,Ref_PFD3 fractional divider clock disable" "No,Yes"
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|
rbitfld.long 0x10 30. " PFD3_STABLE ,Diagnostic PFD3 stable" "No stable,Stable"
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|
setclrfld.long 0x10 24.--29. 0x14 24.--29. 0x18 24.--29. " PFD3_FRAC_SET/CLR ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
textline " "
|
|
setclrfld.long 0x10 23. 0x14 23. 0x18 23. " PFD2_CLKGATE_SET/CLR ,Ref_PFD2 fractional divider clock disable" "No,Yes"
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|
rbitfld.long 0x10 22. " PFD2_STABLE ,Diagnostic PFD2 stable" "No stable,Stable"
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|
setclrfld.long 0x10 16.--21. 0x14 16.--21. 0x18 16.--21. " PFD2_FRAC_SET/CLR ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
textline " "
|
|
setclrfld.long 0x10 15. 0x14 15. 0x18 15. " PFD1_CLKGATE_SET/CLR ,Ref_PFD1 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x10 14. " PFD1_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
setclrfld.long 0x10 8.--13. 0x14 8.--13. 0x18 8.--13. " PFD1_FRAC_SET/CLR ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
textline " "
|
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setclrfld.long 0x10 7. 0x14 7. 0x18 7. " PFD0_CLKGATE_SET/CLR ,Ref_PFD0 fractional divider clock disable" "No,Yes"
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|
rbitfld.long 0x10 6. " PFD0_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
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setclrfld.long 0x10 0.--5. 0x14 0.--5. 0x18 0.--5. " PFD0_FRAC_SET/CLR ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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line.long 0x14 "PFD_480_SET,480MHz Clock Phase Fractional Divider Control Register"
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rbitfld.long 0x14 30. " PFD3_STABLE ,Diagnostic PFD3 stable" "No stable,Stable"
|
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textline " "
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rbitfld.long 0x14 22. " PFD2_STABLE ,Diagnostic PFD2 stable" "No stable,Stable"
|
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textline " "
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rbitfld.long 0x14 14. " PFD1_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
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textline " "
|
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rbitfld.long 0x14 6. " PFD0_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
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line.long 0x18 "PFD_480_CLR,480MHz Clock Phase Fractional Divider Control Register"
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rbitfld.long 0x18 30. " PFD3_STABLE ,Diagnostic PFD3 stable" "No stable,Stable"
|
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textline " "
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rbitfld.long 0x18 22. " PFD2_STABLE ,Diagnostic PFD2 stable" "No stable,Stable"
|
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textline " "
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rbitfld.long 0x18 14. " PFD1_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
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textline " "
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rbitfld.long 0x18 6. " PFD0_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
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line.long 0x1C "PFD_480_TOG,480MHz Clock Phase Fractional Divider Control Register"
|
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bitfld.long 0x1C 31. " PFD3_CLKGATE ,Ref_PFD3 fractional divider clock disable" "No,Yes"
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rbitfld.long 0x1C 30. " PFD3_STABLE ,Diagnostic PFD3 stable" "No stable,Stable"
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bitfld.long 0x1C 24.--29. " PFD3_FRAC ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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textline " "
|
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bitfld.long 0x1C 23. " PFD2_CLKGATE ,Ref_PFD2 fractional divider clock disable" "No,Yes"
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rbitfld.long 0x1C 22. " PFD2_STABLE ,Diagnostic PFD2 stable" "No stable,Stable"
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bitfld.long 0x1C 16.--21. " PFD2_FRAC ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
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bitfld.long 0x1C 15. " PFD1_CLKGATE ,Ref_PFD1 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x1C 14. " PFD1_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
bitfld.long 0x1C 8.--13. " PFD1_FRAC ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " PFD0_CLKGATE ,Ref_PFD0 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x1C 6. " PFD0_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
bitfld.long 0x1C 0.--5. " PFD0_FRAC ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
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line.long 0x20 "PFD_528,528MHz Clock (PLL2) Phase Fractional Divider Control Register"
|
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setclrfld.long 0x20 31. 0x24 31. 0x28 31. " PFD3_CLKGATE_SET/CLR ,Ref_PFD3 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x20 30. " PFD3_STABLE ,Diagnostic PFD3 stable" "No stable,Stable"
|
|
setclrfld.long 0x20 24.--29. 0x24 24.--29. 0x28 24.--29. " PFD3_FRAC_SET/CLR ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
setclrfld.long 0x20 23. 0x24 23. 0x28 23. " PFD2_CLKGATE_SET/CLR ,Ref_PFD2 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x20 22. " PFD2_STABLE ,Diagnostic PFD2 stable" "No stable,Stable"
|
|
setclrfld.long 0x20 16.--21. 0x24 16.--21. 0x28 16.--21. " PFD2_FRAC_SET/CLR ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
setclrfld.long 0x20 15. 0x24 15. 0x28 15. " PFD1_CLKGATE_SET/CLR ,Ref_PFD1 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x20 14. " PFD1_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
setclrfld.long 0x20 8.--13. 0x24 8.--13. 0x28 8.--13. " PFD1_FRAC_SET/CLR ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
setclrfld.long 0x20 7. 0x24 7. 0x28 7. " PFD0_CLKGATE_SET/CLR ,Ref_PFD0 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x20 6. " PFD0_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
setclrfld.long 0x20 0.--5. 0x24 0.--5. 0x28 0.--5. " PFD0_FRAC_SET/CLR ,Fractional divide value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x24 "PFD_528_SET,528MHz Clock (PLL2) Phase Fractional Divider Control Register"
|
|
rbitfld.long 0x24 30. " PFD3_STABLE ,Diagnostic PFD3 stable" "No stable,Stable"
|
|
textline " "
|
|
rbitfld.long 0x24 22. " PFD2_STABLE ,Diagnostic PFD2 stable" "No stable,Stable"
|
|
textline " "
|
|
rbitfld.long 0x24 14. " PFD1_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
textline " "
|
|
rbitfld.long 0x24 6. " PFD0_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
line.long 0x28 "PFD_528_CLR,528MHz Clock (PLL2) Phase Fractional Divider Control Register"
|
|
rbitfld.long 0x28 30. " PFD3_STABLE ,Diagnostic PFD3 stable" "No stable,Stable"
|
|
textline " "
|
|
rbitfld.long 0x28 22. " PFD2_STABLE ,Diagnostic PFD2 stable" "No stable,Stable"
|
|
textline " "
|
|
rbitfld.long 0x28 14. " PFD1_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
textline " "
|
|
rbitfld.long 0x28 6. " PFD0_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
line.long 0x2C "PFD_528_TOG,528MHz Clock (PLL2) Phase Fractional Divider Control Register"
|
|
bitfld.long 0x2C 31. " PFD3_CLKGATE ,Ref_PFD3 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x2C 30. " PFD3_STABLE ,Diagnostic PFD3 stable" "No stable,Stable"
|
|
bitfld.long 0x2C 24.--29. " PFD3_FRAC ,Fractional divide value"
|
|
textline " "
|
|
bitfld.long 0x2C 23. " PFD2_CLKGATE ,Ref_PFD2 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x2C 22. " PFD2_STABLE ,Diagnostic PFD2 stable" "No stable,Stable"
|
|
bitfld.long 0x2C 16.--21. " PFD2_FRAC ,Fractional divide value"
|
|
textline " "
|
|
bitfld.long 0x2C 15. " PFD1_CLKGATE ,Ref_PFD1 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x2C 14. " PFD1_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
bitfld.long 0x2C 8.--13. " PFD1_FRAC ,Fractional divide value"
|
|
textline " "
|
|
bitfld.long 0x2C 7. " PFD0_CLKGATE ,Ref_PFD0 fractional divider clock disable" "No,Yes"
|
|
rbitfld.long 0x2C 6. " PFD0_STABLE ,Diagnostic PFD1 stable" "No stable,Stable"
|
|
bitfld.long 0x2C 0.--5. " PFD0_FRAC ,Fractional divide value"
|
|
group.long 0x150++0x2F
|
|
line.long 0x00 "MISC0,Miscellaneous Register 0"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " XTAL_24M_PWD_SET/CLR ,Powers down the 24M crystal oscillator" "No,Yes"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " RTC_XTAL_SOURCE_SET/CLR ,Chip source for the rtc clock select" "Internal,RTC_XTAL"
|
|
setclrfld.long 0x00 26.--28. 0x04 26.--28. 0x08 26.--28. " CLKGATE_DELAY_SET/CLR ,Clock gate delay" "0.5,1.0,2.0,3.0,4.0,5.0,6.0,7.0"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CLKGATE_CTRL_SET/CLR ,Clock gate control" "ALLOW_AUTO_GATE,NO_AUTO_GATE"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " OSC_XTALOK_EN_SET/CLR ,24MHz crystal oscillator detector enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 15. " OSC_XTALOK ,24MHz crystal oscillator stable" "No stable,Stable"
|
|
textline " "
|
|
setclrfld.long 0x00 13.--14. 0x04 13.--14. 0x08 13.--14. " OSC_I_SET/CLR ,Bias current in the 24MHz oscillator" "Nominal,12.5,25.0,37.5"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " DISCON_HIGH_SNVS_SET/CLR ,Switch control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10.--11. 0x04 10.--11. 0x08 10.--11. " STOP_MODE_CONFIG_SET/CLR ,Analog behaviour in stop mode" "0,1,2,3"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " REFTOP_VBGUP_SET/CLR ,Analog bandgap voltage status" "No stable,Stable"
|
|
setclrfld.long 0x00 4.--6. 0x04 4.--6. 0x08 4.--6. " REFTOP_VBGADJ_SET/CLR ,VBG adjust" "Nominal,+0.78%,+1.56%,+2.34%,-0.78%,-1.56%,-2.34%,-3.12%"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " REFTOP_SELFBIASOFF_SET/CLR ,Self-bias circuit disable" "No,Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " REFTOP_PWD_SET/CLR ,Analog bandgap disable" "No,Yes"
|
|
line.long 0x04 "MISC0_SET,Miscellaneous Register 0"
|
|
rbitfld.long 0x04 16. " OSC_XTALOK_EN ,24MHz crystal oscillator detector enable" "Disabled,Enabled"
|
|
line.long 0x08 "MISC0_CLR,Miscellaneous Register 0"
|
|
rbitfld.long 0x08 15. " OSC_XTALOK ,24MHz crystal oscillator stable" "No stable,Stable"
|
|
line.long 0x0C "MISC0_TOG,Miscellaneous Register 0"
|
|
bitfld.long 0x0C 30. " XTAL_24M_PWD ,Powers down the 24M crystal oscillator" "No,Yes"
|
|
bitfld.long 0x0C 29. " RTC_XTAL_SOURCE ,Chip source for the rtc clock select" "Internal,RTC_XTAL"
|
|
bitfld.long 0x0C 26.--28. " CLKGATE_DELAY ,Clock gate delay" "0.5,1.0,2.0,3.0,4.0,5.0,6.0,7.0"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " CLKGATE_CTRL ,Clock gate control" "ALLOW_AUTO_GATE,NO_AUTO_GATE"
|
|
bitfld.long 0x0C 16. " OSC_XTALOK_EN ,24MHz crystal oscillator detector enable" "Disabled,Enabled"
|
|
rbitfld.long 0x0C 15. " OSC_XTALOK ,24MHz crystal oscillator stable" "No stable,Stable"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,12.5,25.0,37.5"
|
|
bitfld.long 0x0C 12. " DISCON_HIGH_SNVS ,Switch control" "Disabled,Enabled"
|
|
bitfld.long 0x0C 10.--11. " STOP_MODE_CONFIG ,Analog behaviour in stop mode" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " REFTOP_VBGUP ,Analog bandgap voltage status" "No stable,Stable"
|
|
bitfld.long 0x0C 4.--6. " REFTOP_VBGADJ ,VBG adjust" "Nominal,+0.78%,+1.56%,+2.34%,-0.78%,-1.56%,-2.34%,-3.12%"
|
|
bitfld.long 0x0C 3. " REFTOP_SELFBIASOFF ,Self-bias circuit disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " REFTOP_PWD ,Analog bandgap disable" "No,Yes"
|
|
line.long 0x10 "MISC1,Miscellaneous Register 1"
|
|
eventfld.long 0x10 31. " IRQ_DIG_BO ,Digital regulator brownout interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x10 30. " IRQ_ANA_BO ,Analog regulator brownout interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x10 29. " IRQ_TEMPHIGH ,Temperature sensor high interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x10 28. " IRQ_TEMPLOW ,Temperature sensor low interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x10 27. " IRQ_TEMPPANIC ,Temperature sensor panic interrupt" "No interrupt,Interrupt"
|
|
setclrfld.long 0x10 17. 0x14 17. 0x18 17. " PFD_528_AUTOGATE_EN_SET/CLR ,PFD_528 auto gate enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 16. 0x14 16. 0x18 16. " PFD_480_AUTOGATE_EN_SET/CLR ,PFD_480 auto gate enable" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x14 12. 0x18 12. " LVDSCLK1_IBEN_SET/CLR ,LVDS input buffer for anaclk enable" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x14 10. 0x18 10. " LVDSCLK1_OBEN_SET/CLR ,LVDS output buffer for anaclk enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 0.--4. 0x14 0.--4. 0x18 0.--4. " LVDS1_CLK_SEL_SET/CLR ,LVDS1 clock select" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7"
|
|
line.long 0x14 "MISC1_SET,Miscellaneous Register 1"
|
|
eventfld.long 0x14 31. " IRQ_DIG_BO ,Digital regulator brownout interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x14 30. " IRQ_ANA_BO ,Analog regulator brownout interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x14 29. " IRQ_TEMPHIGH ,Temperature sensor high interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x14 28. " IRQ_TEMPLOW ,Temperature sensor low interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x14 27. " IRQ_TEMPPANIC ,Temperature sensor panic interrupt" "No interrupt,Interrupt"
|
|
line.long 0x18 "MISC1_CLR,Miscellaneous Register 1"
|
|
eventfld.long 0x18 31. " IRQ_DIG_BO ,Digital regulator brownout interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x18 30. " IRQ_ANA_BO ,Analog regulator brownout interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x18 29. " IRQ_TEMPHIGH ,Temperature sensor high interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x18 28. " IRQ_TEMPLOW ,Temperature sensor low interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x18 27. " IRQ_TEMPPANIC ,Temperature sensor panic interrupt" "No interrupt,Interrupt"
|
|
line.long 0x1C "MISC1_TOG,Miscellaneous Register 1"
|
|
eventfld.long 0x1C 31. " IRQ_DIG_BO ,Digital regulator brownout interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x1C 30. " IRQ_ANA_BO ,Analog regulator brownout interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x1C 29. " IRQ_TEMPHIGH ,Temperature sensor high interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x1C 28. " IRQ_TEMPLOW ,Temperature sensor low interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x1C 27. " IRQ_TEMPPANIC ,Temperature sensor panic interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x1C 17. " PFD_528_AUTOGATE_EN ,PFD_528 auto gate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 16. " PFD_480_AUTOGATE_EN ,PFD_480 auto gate enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 12. " LVDSCLK1_IBEN ,LVDS input buffer for anaclk enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 10. " LVDSCLK1_OBEN ,LVDS output buffer for anaclk enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 0.--4. " LVDS1_CLK_SEL ,LVDS1 clock select" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,,,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7,PFD7"
|
|
line.long 0x20 "MISC2,Miscellaneous Register 2"
|
|
setclrfld.long 0x20 30.--31. 0x24 30.--31. 0x28 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4"
|
|
setclrfld.long 0x20 28.--29. 0x24 28.--29. 0x28 28.--29. " REG2_STEP_TIME ,Number of clock periods" "64,128,256,512"
|
|
setclrfld.long 0x20 26.--27. 0x24 26.--27. 0x28 26.--27. " REG1_STEP_TIME ,Number of clock periods" "64,128,256,512"
|
|
textline " "
|
|
setclrfld.long 0x20 24.--25. 0x24 24.--25. 0x28 24.--25. " REG0_STEP_TIME ,Number of clock periods" "64,128,256,512"
|
|
bitfld.long 0x20 23. 15. " AUDIO_DIV ,MSB/LSB of post-divider" "/1,/2,/1,/4"
|
|
rbitfld.long 0x20 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above"
|
|
textline " "
|
|
setclrfld.long 0x20 21. 0x24 21. 0x28 21. " REG2_ENABLE_BO ,Brownout detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x20 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout"
|
|
rbitfld.long 0x20 16.--18. " REG2_BO_OFFSET ,Brown out voltage offset select" ",,,,0.100V,,,0.175V"
|
|
textline " "
|
|
rbitfld.long 0x20 14. " REG1_OK ,GPU/VPU supply" "0,1"
|
|
setclrfld.long 0x20 13. 0x24 13. 0x28 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x20 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "Above,Below"
|
|
rbitfld.long 0x20 8.--10. " REG1_BO_OFFSET ,Brown out voltage offset" ",,,,0.100V,,,0.175V"
|
|
setclrfld.long 0x20 7. 0x24 7. 0x28 7. " PLL3_DISABLE ,PLL3 disable" "No,Yes"
|
|
textline " "
|
|
rbitfld.long 0x20 6. " REG0_OK ,ARM supply" "0,1"
|
|
setclrfld.long 0x20 5. 0x24 5. 0x28 5. " REG0_ENABLE_BO ,Brownout detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x20 3. " REG0_BO_STATUS ,Reg0 brownout status" "Above,Below"
|
|
textline " "
|
|
rbitfld.long 0x20 0.--2. " REG0_BO_OFFSET ,Brown out voltage offset" ",,,,0.100V,,,0.175V"
|
|
line.long 0x24 "MISC2_SET,Miscellaneous Register 2"
|
|
bitfld.long 0x20 23. 15. " AUDIO_DIV ,MSB/LSB of post-divider" "/1,/2,/1,/4"
|
|
rbitfld.long 0x24 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above"
|
|
rbitfld.long 0x24 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout"
|
|
textline " "
|
|
rbitfld.long 0x24 16.--18. " REG2_BO_OFFSET ,Brown out voltage offset select" ",,,,0.100V,,,0.175V"
|
|
rbitfld.long 0x24 14. " REG1_OK ,GPU/VPU supply" "0,1"
|
|
rbitfld.long 0x24 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "Above,Below"
|
|
textline " "
|
|
rbitfld.long 0x24 8.--10. " REG1_BO_OFFSET ,Brown out voltage offset" ",,,,0.100V,,,0.175V"
|
|
rbitfld.long 0x24 6. " REG0_OK ,ARM supply" "0,1"
|
|
rbitfld.long 0x24 3. " REG0_BO_STATUS ,Reg0 brownout status" "Above,Below"
|
|
textline " "
|
|
rbitfld.long 0x24 0.--2. " REG0_BO_OFFSET ,Brown out voltage offset" ",,,,0.100V,,,0.175V"
|
|
line.long 0x28 "MISC2_CLR,Miscellaneous Register 2"
|
|
bitfld.long 0x20 23. 15. " AUDIO_DIV ,MSB/LSB of post-divider" "/1,/2,/1,/4"
|
|
rbitfld.long 0x24 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above"
|
|
rbitfld.long 0x24 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout"
|
|
textline " "
|
|
rbitfld.long 0x24 16.--18. " REG2_BO_OFFSET ,Brown out voltage offset select" ",,,,0.100V,,,0.175V"
|
|
rbitfld.long 0x24 14. " REG1_OK ,GPU/VPU supply" "0,1"
|
|
rbitfld.long 0x24 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "Above,Below"
|
|
textline " "
|
|
rbitfld.long 0x24 8.--10. " REG1_BO_OFFSET ,Brown out voltage offset" ",,,,0.100V,,,0.175V"
|
|
rbitfld.long 0x24 6. " REG0_OK ,ARM supply" "0,1"
|
|
rbitfld.long 0x24 3. " REG0_BO_STATUS ,Reg0 brownout status" "Above,Below"
|
|
textline " "
|
|
rbitfld.long 0x24 0.--2. " REG0_BO_OFFSET ,Brown out voltage offset" ",,,,0.100V,,,0.175V"
|
|
line.long 0x2C "MISC2_TOG,Miscellaneous Register 2"
|
|
bitfld.long 0x2C 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4"
|
|
bitfld.long 0x2C 28.--29. " REG2_STEP_TIME ,Number of clock periods" "64,128,256,512"
|
|
bitfld.long 0x2C 26.--27. " REG1_STEP_TIME ,Number of clock periods" "64,128,256,512"
|
|
textline " "
|
|
bitfld.long 0x2C 24.--25. " REG0_STEP_TIME ,Number of clock periods" "64,128,256,512"
|
|
bitfld.long 0x2C 23. 15. " AUDIO_DIV ,MSB/LSB of post-divider" "/1,/2,/1,/4"
|
|
rbitfld.long 0x2C 22. " REG2_OK ,Signals that the voltage is above the brownout level for the SOC supply" "Below,Above"
|
|
textline " "
|
|
bitfld.long 0x2C 21. " REG2_ENABLE_BO ,Brownout detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x2C 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "No brownout,Brownout"
|
|
rbitfld.long 0x2C 16.--18. " REG2_BO_OFFSET ,Brown out voltage offset select" ",,,,0.100V,,,0.175V"
|
|
textline " "
|
|
rbitfld.long 0x2C 14. " REG1_OK ,GPU/VPU supply" "0,1"
|
|
bitfld.long 0x2C 13. " REG1_ENABLE_BO ,Enables the brownout detection" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x2C 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "Above,Below"
|
|
rbitfld.long 0x2C 8.--10. " REG1_BO_OFFSET ,Brown out voltage offset" ",,,,0.100V,,,0.175V"
|
|
bitfld.long 0x2C 7. " PLL3_DISABLE ,PLL3 disable" "No,Yes"
|
|
textline " "
|
|
rbitfld.long 0x2C 6. " REG0_OK ,ARM supply" "0,1"
|
|
bitfld.long 0x2C 5. " REG0_ENABLE_BO ,Brownout detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x2C 3. " REG0_BO_STATUS ,Reg0 brownout status" "Above,Below"
|
|
textline " "
|
|
rbitfld.long 0x2C 0.--2. " REG0_BO_OFFSET ,Brown out voltage offset" ",,,,0.100V,,,0.175V"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "DCDC (DCDC Converter)"
|
|
base ad:0x40080000
|
|
width 6.
|
|
if (((per.l(ad:0x40080000+0x08))&0x8000)==0x8000)
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "REG0,Register 0"
|
|
rbitfld.long 0x00 31. " STS_DC_OK ,Status register to indicate DCDC status" "Not settled,Settled"
|
|
bitfld.long 0x00 29. " XTAL_24M_OK ,Switch internal ring osc to xtal 24M" "internal ring osc,Xtal 24M"
|
|
bitfld.long 0x00 28. " CURRENT_ALERT_RESET ,Reset current alert signal" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 27. " XTALOK_DISABLE ,XTALOK detection circuit disable" "No,Yes"
|
|
bitfld.long 0x00 26. " PWD_CMP_OFFSET ,Power down output range comparator" "No,Yes"
|
|
bitfld.long 0x00 21. " LP_HIGH_HYS ,Adjust hysteresis value in low power from 12.5mV to 25mV" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LP_OVERLOAD_FREQ_SEL ,The period of counting the charging times in power save mode" "Eight 32k cycle,Sixteen 32k cycle"
|
|
bitfld.long 0x00 18.--19. " LP_OVERLOAD_THRSH ,The threshold of the counting number of charging times" "32,64,16,8"
|
|
bitfld.long 0x00 17. " PWD_HIGH_VOLT_DET ,Power down over-voltage detection comparator" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EN_LP_OVERLOAD_SNS ,Enable the overload detection in power save mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--15. " ADJ_POSLIMIT_BUCK ,Adjust value to poslimit_buck register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " PWD_CMP_BATT_DET ,Power down the low voltage detection comparator" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " OVERCUR_TRIG_ADJ ,The threshold of over current detection in power save mode" "0.25A,0.25A,0.2A,0.2A"
|
|
bitfld.long 0x00 8. " PWD_OVERCUR_DET ,Power down over-current detection comparator" "No,Yes"
|
|
bitfld.long 0x00 5.--7. " CUR_SNS_THRSH ,Set the threshold of current detector" "150mA,250mA,350mA,450mA,550mA,650mA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4. " PWD_CUR_SNS_CMP ,The power down signal of the current detector" "No,Yes"
|
|
bitfld.long 0x00 3. " PWD_OSC_INT ,Power down internal osc" "No,Yes"
|
|
bitfld.long 0x00 2. " SEL_CLK ,Select 24 MHz crystal clock for DCDC" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DISABLE_AUTO_CLK_SWITCH ,Disable automatic clock switch from internal osc to xtal clock" "No,Yes"
|
|
bitfld.long 0x00 0. " PWD_ZCD ,Power down the zero cross detection function for discontinuous conductor mode" "0,1"
|
|
else
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "REG0,Register 0"
|
|
rbitfld.long 0x00 31. " STS_DC_OK ,Status register to indicate DCDC status" "Not settled,Settled"
|
|
bitfld.long 0x00 29. " XTAL_24M_OK ,Switch internal ring osc to xtal 24M" "internal ring osc,Xtal 24M"
|
|
bitfld.long 0x00 28. " CURRENT_ALERT_RESET ,Reset current alert signal" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 27. " XTALOK_DISABLE ,XTALOK detection circuit disable" "No,Yes"
|
|
bitfld.long 0x00 26. " PWD_CMP_OFFSET ,Power down output range comparator" "No,Yes"
|
|
bitfld.long 0x00 21. " LP_HIGH_HYS ,Adjust hysteresis value in low power from 12.5mV to 25mV" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LP_OVERLOAD_FREQ_SEL ,The period of counting the charging times in power save mode" "Eight 32k cycle,Sixteen 32k cycle"
|
|
bitfld.long 0x00 18.--19. " LP_OVERLOAD_THRSH ,The threshold of the counting number of charging times" "32,64,16,8"
|
|
bitfld.long 0x00 17. " PWD_HIGH_VOLT_DET ,Power down over-voltage detection comparator" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EN_LP_OVERLOAD_SNS ,Enable the overload detection in power save mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--15. " ADJ_POSLIMIT_BUCK ,Adjust value to poslimit_buck register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 11. " PWD_CMP_BATT_DET ,Power down the low voltage detection comparator" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " OVERCUR_TRIG_ADJ ,The threshold of over current detection in run mode" "1A,2A,1A,2A"
|
|
bitfld.long 0x00 8. " PWD_OVERCUR_DET ,Power down over-current detection comparator" "No,Yes"
|
|
bitfld.long 0x00 5.--7. " CUR_SNS_THRSH ,Set the threshold of current detector" "150mA,250mA,350mA,450mA,550mA,650mA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4. " PWD_CUR_SNS_CMP ,The power down signal of the current detector" "No,Yes"
|
|
bitfld.long 0x00 3. " PWD_OSC_INT ,Power down internal osc" "No,Yes"
|
|
bitfld.long 0x00 2. " SEL_CLK ,Select 24 MHz crystal clock for DCDC" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DISABLE_AUTO_CLK_SWITCH ,Disable automatic clock switch from internal osc to xtal clock" "No,Yes"
|
|
bitfld.long 0x00 0. " PWD_ZCD ,Power down the zero cross detection function for discontinuous conductor mode" "No,Yes"
|
|
endif
|
|
group.long 0x4++0xB
|
|
line.long 0x00 "REG1,Register 1"
|
|
bitfld.long 0x00 24.--28. " VBG_TRIM ,Trim band gap voltage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 23. " LOOPCTRL_EN_HYST ,Enable hysteresis in switching converter common mode analog comparators" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " LOOPCTRL_HST_THRESH ,Increase the threshold detection for common mode analog comparator" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long 0x00 14.--20. 1. " NEGLIMIT_IN ,Negative duty cycle limit of DC-DC converter"
|
|
bitfld.long 0x00 12.--13. " LP_CMP_ISRC_SEL ,Set the current bias of low power comparator" "50nA,100nA,200nA,400nA"
|
|
bitfld.long 0x00 9. " REG_RLOAD_SW ,Control the load resistor of the internal regulator of DCDC" "Disconnect,Connected"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " REG_FBK_SEL ,Select the feedback point of the internal regulator" "0,1,2,3"
|
|
hexmask.long 0x00 0.--6. 1. " POSLIMIT_BUCK_IN ,Upper limit duty cycle limit in DC-DC converter"
|
|
line.long 0x04 "REG2,Register 2"
|
|
bitfld.long 0x04 28. " DCM_SET_CTRL ,Improve the transition from heavy load to light load" "Low,High"
|
|
bitfld.long 0x04 27. " DISABLE_PULSE_SKIP ,Pulse skip disable" "No,Yes"
|
|
bitfld.long 0x04 15. " BATTMONITOR_EN_BATADJ ,Power saving mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " LOOPCTRL_HYST_SIGN ,Invert the sign of the hysteresis in DC-DC analog comparators" "Not inverted,Inverted"
|
|
bitfld.long 0x04 12. " LOOPCTRL_RCSCALE_THRSH ,Increase the threshold detection for RC scale circuit" "Not increased,Increased"
|
|
bitfld.long 0x04 9.--11. " LOOPCTRL_EN_RCSCALE ,Enable analog circuit of DC-DC converter to respond faster under transient load conditions" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x04 6.--8. " LOOPCTRL_DC_FF ,Switching DC-DC converter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 2.--5. " LOOPCTRL_DC_R ,Magnitude of proportional control parameter in the switching DC-DC converter control loop" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--1. " LOOPCTRL_DC_C ,Ratio of integral control parameter to proportional control parameter in the switching DC-DC converter" "0,1,2,3"
|
|
line.long 0x08 "REG3,Register 3"
|
|
bitfld.long 0x08 30. " DISABLE_STEP ,Disable stepping for the output VDD_SOC of DCDC" "No,Yes"
|
|
bitfld.long 0x08 27. " MISC_DELAY_TIMING ,Adjust delay to reduce ground noise" "Not adjusted,Adjusted"
|
|
textline " "
|
|
bitfld.long 0x08 24. " MINPWR_DC_HALFCLK ,Set DCDC clock to half frequency for continuous mode" "Disabled,Enabled"
|
|
bitfld.long 0x08 8.--10. " TARGET_LP ,Target value of standby (low power) mode" "0.9V,0.925V,0.950V,0.975V,1.0V,?..."
|
|
bitfld.long 0x08 0.--4. " TRG ,Target value of VDD_SOC" "0.8V,0.825V,0.85V,0.875V,0.9V,0.925V,0.95V,0.975V,1.0V,1.025V,1.05V,1.075V,1.1V,1.125V,1.15V,1.175V,1.2V,1.225V,1.25V,1.275V,1.3V,1.325V,1.35V,1.375V,1.4V,1.425V,1.45V,1.475V,1.5V,1.525V,1.55V,1.575V"
|
|
width 0x0B
|
|
tree.end
|
|
tree "DMAMUX (Direct Memory Access Multiplexer)"
|
|
base ad:0x400EC000
|
|
width 9.
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "CHCFG0,Channel 0 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "CHCFG1,Channel 1 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "CHCFG2,Channel 2 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "CHCFG3,Channel 3 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CHCFG4,Channel 4 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "CHCFG5,Channel 5 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHCFG6,Channel 6 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "CHCFG7,Channel 7 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHCFG8,Channel 8 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CHCFG9,Channel 9 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CHCFG10,Channel 10 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "CHCFG11,Channel 11 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CHCFG12,Channel 12 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CHCFG13,Channel 13 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CHCFG14,Channel 14 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "CHCFG15,Channel 15 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CHCFG16,Channel 16 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "CHCFG17,Channel 17 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "CHCFG18,Channel 18 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "CHCFG19,Channel 19 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "CHCFG20,Channel 20 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "CHCFG21,Channel 21 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CHCFG22,Channel 22 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "CHCFG23,Channel 23 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "CHCFG24,Channel 24 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CHCFG25,Channel 25 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CHCFG26,Channel 26 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "CHCFG27,Channel 27 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "CHCFG28,Channel 28 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "CHCFG29,Channel 29 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "CHCFG30,Channel 30 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "CHCFG31,Channel 31 Configuration"
|
|
bitfld.long 0x00 31. " ENBL ,DMA mux channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TRIG ,DMA channel trigger enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " A_ON ,DMA channel always enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SOURCE ,DMA channel source"
|
|
width 0x0B
|
|
tree.end
|
|
tree "eDMA (Enhanced Direct Memory Access)"
|
|
base ad:0x400E8000
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.long 0x00 31. " ACTIVE ,DMA active status" "Idle,Active"
|
|
bitfld.long 0x00 17. " CX ,Cancel transfer" "Normal,Canceled"
|
|
bitfld.long 0x00 16. " ECX ,Error cancel transfer" "Normal,Canceled"
|
|
bitfld.long 0x00 10. " GRP1PRI ,Channel group 1 priority" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 8. " GRP0PRI ,Channel group 0 priority" "Low,High"
|
|
textfld " "
|
|
else
|
|
bitfld.long 0x00 17. " CX ,Cancel transfer" "Normal,Canceled"
|
|
newline
|
|
bitfld.long 0x00 16. " ECX ,Error cancel transfer" "Normal,Canceled"
|
|
endif
|
|
bitfld.long 0x00 7. " EMLM ,Enable minor loop mapping" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " CLM ,Continuous link mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " HALT ,Halt DMA operations" "Normal,Held"
|
|
newline
|
|
bitfld.long 0x00 4. " HOE ,Halt on error" "Normal,Halted"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.long 0x00 3. " ERGA ,Enable round robin group arbitration" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ERCA ,Enable round robin channel arbitration" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EDBG ,Enable debug" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 2. " ERCA ,Enable round robin channel arbitration" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EDBG ,Enable debug" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ES,Error Status Register"
|
|
bitfld.long 0x00 31. " VLD ,Logical OR of all ERR status bits" "No error,Error"
|
|
bitfld.long 0x00 16. " ECX ,Transfer canceled" "Not canceled,Canceled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.long 0x00 15. " GPE ,Group priority error" "No error,Error"
|
|
bitfld.long 0x00 14. " CPE ,Channel priority error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " ERRCHN ,Error channel number or canceled channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 14. " CPE ,Channel priority error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " ERRCHN ,Error channel number or canceled channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
bitfld.long 0x00 7. " SAE ,Source address error" "No error,Error"
|
|
bitfld.long 0x00 6. " SOE ,Source offset error" "No error,Error"
|
|
bitfld.long 0x00 5. " DAE ,Destination address error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 4. " DOE ,Destination offset error" "No error,Error"
|
|
bitfld.long 0x00 3. " NCE ,NBYTES/CITER configuration error" "No error,Error"
|
|
bitfld.long 0x00 2. " SGE ,Scatter/gather configuration error" "No error,Error"
|
|
bitfld.long 0x00 1. " SBE ,Source bus error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 0. " DBE ,Destination bus error" "No error,Error"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ERQ,Enable Request Register"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.long 0x00 31. " ERQ[31] ,Enable DMA request 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " [30] ,Enable DMA request 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " [29] ,Enable DMA request 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " [28] ,Enable DMA request 28" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " [27] ,Enable DMA request 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " [26] ,Enable DMA request 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " [25] ,Enable DMA request 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " [24] ,Enable DMA request 24" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. " [23] ,Enable DMA request 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " [22] ,Enable DMA request 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " [21] ,Enable DMA request 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " [20] ,Enable DMA request 20" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " [19] ,Enable DMA request 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [18] ,Enable DMA request 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [17] ,Enable DMA request 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " [16] ,Enable DMA request 16" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 15. " ERQ[15] ,Enable DMA request 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " [14] ,Enable DMA request 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " [13] ,Enable DMA request 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " [12] ,Enable DMA request 12" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. " [11] ,Enable DMA request 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " [10] ,Enable DMA request 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " [9] ,Enable DMA request 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " [8] ,Enable DMA request 8" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " [7] ,Enable DMA request 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [6] ,Enable DMA request 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " [5] ,Enable DMA request 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [4] ,Enable DMA request 4" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " [3] ,Enable DMA request 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,Enable DMA request 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " [1] ,Enable DMA request 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,Enable DMA request 0" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "EEI,Enable Error Interrupt Register"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.long 0x00 31. " EEI[31] ,Enable error interrupt 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " [30] ,Enable error interrupt 30" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " [29] ,Enable error interrupt 29" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " [28] ,Enable error interrupt 28" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 27. " [27] ,Enable error interrupt 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " [26] ,Enable error interrupt 26" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " [25] ,Enable error interrupt 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " [24] ,Enable error interrupt 24" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 23. " [23] ,Enable error interrupt 23" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " [22] ,Enable error interrupt 22" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " [21] ,Enable error interrupt 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " [20] ,Enable error interrupt 20" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 19. " [19] ,Enable error interrupt 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " [18] ,Enable error interrupt 18" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " [17] ,Enable error interrupt 17" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " [16] ,Enable error interrupt 16" "No interrupt,Interrupt"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 15. " EEI[15] ,Enable error interrupt 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " [14] ,Enable error interrupt 14" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " [13] ,Enable error interrupt 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " [12] ,Enable error interrupt 12" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 11. " [11] ,Enable error interrupt 11" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " [10] ,Enable error interrupt 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " [9] ,Enable error interrupt 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " [8] ,Enable error interrupt 8" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 7. " [7] ,Enable error interrupt 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " [6] ,Enable error interrupt 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " [5] ,Enable error interrupt 5" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " [4] ,Enable error interrupt 4" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 3. " [3] ,Enable error interrupt 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " [2] ,Enable error interrupt 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " [1] ,Enable error interrupt 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " [0] ,Enable error interrupt 0" "No interrupt,Interrupt"
|
|
newline
|
|
wgroup.byte 0x18++0x07
|
|
line.byte 0x00 "CEEI,Clear Enable Error Interrupt Register"
|
|
bitfld.byte 0x00 7. " NOP ,No Op enable" "Disable,Enable"
|
|
bitfld.byte 0x00 6. " CAEE ,Clear all enable error interrupts" "Clear one,Clear all"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.byte 0x00 0.--4. " CEEI ,Clear enable error interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.byte 0x00 0.--3. " CEEI ,Clear enable error interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
line.byte 0x01 "SEEI,Set Enable Error Interrupt Register"
|
|
bitfld.byte 0x01 7. " NOP ,No Op enable" "Disable,Enable"
|
|
bitfld.byte 0x01 6. " SAEE ,Sets all enable error interrupts" "Set one,Set all"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.byte 0x01 0.--4. " SEEI ,Set enable error interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.byte 0x01 0.--3. " SEEI ,Set enable error interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
line.byte 0x02 "CERQ,Clear Enable Request Register"
|
|
bitfld.byte 0x02 7. " NOP ,No Op enable" "Disable,Enable"
|
|
bitfld.byte 0x02 6. " CAER ,Clear all enable requests" "Clear one,Clear all"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.byte 0x02 0.--4. " CERQ ,Clear enable request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.byte 0x02 0.--3. " CERQ ,Clear enable request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
line.byte 0x03 "SERQ,Set Enable Request Register"
|
|
bitfld.byte 0x03 7. " NOP ,No Op enable" "Disable,Enable"
|
|
bitfld.byte 0x03 6. " SAER ,Set all enable requests" "Set one,Set all"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.byte 0x03 0.--4. " SERQ ,Set enable request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.byte 0x03 0.--3. " SERQ ,Set enable request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
line.byte 0x04 "CDNE,Clear DONE Status Bit Register"
|
|
bitfld.byte 0x04 7. " NOP ,No Op enable" "Disable,Enable"
|
|
bitfld.byte 0x04 6. " CADN ,Clears All DONE bits" "Clear one,Clear all"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.byte 0x04 0.--4. " CDNE ,Clear DONE bit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.byte 0x04 0.--3. " CDNE ,Clear DONE bit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
line.byte 0x05 "SSRT,Set START Bit Register"
|
|
bitfld.byte 0x05 7. " NOP ,No Op enable" "Disable,Enable"
|
|
bitfld.byte 0x05 6. " SAST ,Set All START Bits (activates all channels)" "Set one,Set all"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.byte 0x05 0.--4. " SSRT ,Set START Bit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.byte 0x05 0.--3. " SSRT ,Set START Bit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
line.byte 0x06 "CERR,Clear Error Register"
|
|
bitfld.byte 0x06 7. " NOP ,No Op enable" "Disable,Enable"
|
|
bitfld.byte 0x06 6. " CAEI ,Clear All Error indicators" "Clear one,Clear all"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.byte 0x06 0.--4. " CERR ,Clear error indicator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.byte 0x06 0.--3. " CERR ,Clear error indicator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
line.byte 0x07 "CINT,Clear Interrupt Request Register"
|
|
bitfld.byte 0x07 7. " NOP ,No Op enable" "Disable,Enable"
|
|
bitfld.byte 0x07 6. " CAIR ,Clear all interrupt requests" "Clear one,Clear all"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.byte 0x07 0.--4. " CINT ,Clear interrupt request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.byte 0x07 0.--3. " CINT ,Clear interrupt request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "INT,Interrupt Request Register"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
eventfld.long 0x00 31. " INT[31] ,Interrupt request 31" "Not requested,Requested"
|
|
eventfld.long 0x00 30. " [30] ,Interrupt request 30" "Not requested,Requested"
|
|
eventfld.long 0x00 29. " [29] ,Interrupt request 29" "Not requested,Requested"
|
|
eventfld.long 0x00 28. " [28] ,Interrupt request 28" "Not requested,Requested"
|
|
newline
|
|
eventfld.long 0x00 27. " [27] ,Interrupt request 27" "Not requested,Requested"
|
|
eventfld.long 0x00 26. " [26] ,Interrupt request 26" "Not requested,Requested"
|
|
eventfld.long 0x00 25. " [25] ,Interrupt request 25" "Not requested,Requested"
|
|
eventfld.long 0x00 24. " [24] ,Interrupt request 24" "Not requested,Requested"
|
|
newline
|
|
eventfld.long 0x00 23. " [23] ,Interrupt request 23" "Not requested,Requested"
|
|
eventfld.long 0x00 22. " [22] ,Interrupt request 22" "Not requested,Requested"
|
|
eventfld.long 0x00 21. " [21] ,Interrupt request 21" "Not requested,Requested"
|
|
eventfld.long 0x00 20. " [20] ,Interrupt request 20" "Not requested,Requested"
|
|
newline
|
|
eventfld.long 0x00 19. " [19] ,Interrupt request 19" "Not requested,Requested"
|
|
eventfld.long 0x00 18. " [18] ,Interrupt request 18" "Not requested,Requested"
|
|
eventfld.long 0x00 17. " [17] ,Interrupt request 17" "Not requested,Requested"
|
|
eventfld.long 0x00 16. " [16] ,Interrupt request 16" "Not requested,Requested"
|
|
newline
|
|
endif
|
|
eventfld.long 0x00 15. " INT[15] ,Interrupt request 15" "Not requested,Requested"
|
|
eventfld.long 0x00 14. " [14] ,Interrupt request 14" "Not requested,Requested"
|
|
eventfld.long 0x00 13. " [13] ,Interrupt request 13" "Not requested,Requested"
|
|
eventfld.long 0x00 12. " [12] ,Interrupt request 12" "Not requested,Requested"
|
|
newline
|
|
eventfld.long 0x00 11. " [11] ,Interrupt request 11" "Not requested,Requested"
|
|
eventfld.long 0x00 10. " [10] ,Interrupt request 10" "Not requested,Requested"
|
|
eventfld.long 0x00 9. " [9] ,Interrupt request 9" "Not requested,Requested"
|
|
eventfld.long 0x00 8. " [8] ,Interrupt request 8" "Not requested,Requested"
|
|
newline
|
|
eventfld.long 0x00 7. " [7] ,Interrupt request 7" "Not requested,Requested"
|
|
eventfld.long 0x00 6. " [6] ,Interrupt request 6" "Not requested,Requested"
|
|
eventfld.long 0x00 5. " [5] ,Interrupt request 5" "Not requested,Requested"
|
|
eventfld.long 0x00 4. " [4] ,Interrupt request 4" "Not requested,Requested"
|
|
newline
|
|
eventfld.long 0x00 3. " [3] ,Interrupt request 3" "Not requested,Requested"
|
|
eventfld.long 0x00 2. " [2] ,Interrupt request 2" "Not requested,Requested"
|
|
eventfld.long 0x00 1. " [1] ,Interrupt request 1" "Not requested,Requested"
|
|
eventfld.long 0x00 0. " [0] ,Interrupt request 0" "Not requested,Requested"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "ERR,Error Register"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
eventfld.long 0x00 31. " ERR[31] ,Error in channel 31" "No error,Error"
|
|
eventfld.long 0x00 30. " [30] ,Error in channel 30" "No error,Error"
|
|
eventfld.long 0x00 29. " [29] ,Error in channel 29" "No error,Error"
|
|
eventfld.long 0x00 28. " [28] ,Error in channel 28" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 27. " [27] ,Error in channel 27" "No error,Error"
|
|
eventfld.long 0x00 26. " [26] ,Error in channel 26" "No error,Error"
|
|
eventfld.long 0x00 25. " [25] ,Error in channel 25" "No error,Error"
|
|
eventfld.long 0x00 24. " [24] ,Error in channel 24" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 23. " [23] ,Error in channel 23" "No error,Error"
|
|
eventfld.long 0x00 22. " [22] ,Error in channel 22" "No error,Error"
|
|
eventfld.long 0x00 21. " [21] ,Error in channel 21" "No error,Error"
|
|
eventfld.long 0x00 20. " [20] ,Error in channel 20" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 19. " [19] ,Error in channel 19" "No error,Error"
|
|
eventfld.long 0x00 18. " [18] ,Error in channel 18" "No error,Error"
|
|
eventfld.long 0x00 17. " [17] ,Error in channel 17" "No error,Error"
|
|
eventfld.long 0x00 16. " [16] ,Error in channel 16" "No error,Error"
|
|
newline
|
|
endif
|
|
eventfld.long 0x00 15. " ERR[15] ,Error in channel 15" "No error,Error"
|
|
eventfld.long 0x00 14. " [14] ,Error in channel 14" "No error,Error"
|
|
eventfld.long 0x00 13. " [13] ,Error in channel 13" "No error,Error"
|
|
eventfld.long 0x00 12. " [12] ,Error in channel 12" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 11. " [11] ,Error in channel 11" "No error,Error"
|
|
eventfld.long 0x00 10. " [10] ,Error in channel 10" "No error,Error"
|
|
eventfld.long 0x00 9. " [9] ,Error in channel 9" "No error,Error"
|
|
eventfld.long 0x00 8. " [8] ,Error in channel 8" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 7. " [7] ,Error in channel 7" "No error,Error"
|
|
eventfld.long 0x00 6. " [6] ,Error in channel 6" "No error,Error"
|
|
eventfld.long 0x00 5. " [5] ,Error in channel 5" "No error,Error"
|
|
eventfld.long 0x00 4. " [4] ,Error in channel 4" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 3. " [3] ,Error in channel 3" "No error,Error"
|
|
eventfld.long 0x00 2. " [2] ,Error in channel 2" "No error,Error"
|
|
eventfld.long 0x00 1. " [1] ,Error in channel 1" "No error,Error"
|
|
eventfld.long 0x00 0. " [0] ,Error in channel 0" "No error,Error"
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "HRS,Hardware Request Status Register"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.long 0x00 31. " HRS[31] ,Hardware request status channel 31" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " [30] ,Hardware request status channel 30" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " [29] ,Hardware request status channel 29" "Not requested,Requested"
|
|
bitfld.long 0x00 28. " [28] ,Hardware request status channel 28" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 27. " [27] ,Hardware request status channel 27" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " [26] ,Hardware request status channel 26" "Not requested,Requested"
|
|
bitfld.long 0x00 25. " [25] ,Hardware request status channel 25" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " [24] ,Hardware request status channel 24" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 23. " [23] ,Hardware request status channel 23" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " [22] ,Hardware request status channel 22" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " [21] ,Hardware request status channel 21" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " [20] ,Hardware request status channel 20" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 19. " [19] ,Hardware request status channel 19" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " [18] ,Hardware request status channel 18" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " [17] ,Hardware request status channel 17" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " [16] ,Hardware request status channel 16" "Not requested,Requested"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 15. " HRS[15] ,Hardware request status channel 15" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " [14] ,Hardware request status channel 14" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " [13] ,Hardware request status channel 13" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " [12] ,Hardware request status channel 12" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 11. " [11] ,Hardware request status channel 11" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " [10] ,Hardware request status channel 10" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " [9] ,Hardware request status channel 9" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " [8] ,Hardware request status channel 8" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 7. " [7] ,Hardware request status channel 7" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " [6] ,Hardware request status channel 6" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " [5] ,Hardware request status channel 5" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " [4] ,Hardware request status channel 4" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x00 3. " [3] ,Hardware request status channel 3" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " [2] ,Hardware request status channel 2" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " [1] ,Hardware request status channel 1" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " [0] ,Hardware request status channel 0" "Not requested,Requested"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "EARS,Enable Asynchronous Request in Stop Register"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.long 0x00 31. " EDREQ[31] ,Enable asynchronous DMA request in stop mode for channel 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " [30] ,Enable asynchronous DMA request in stop mode for channel 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " [29] ,Enable asynchronous DMA request in stop mode for channel 29" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " [28] ,Enable asynchronous DMA request in stop mode for channel 28" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " [27] ,Enable asynchronous DMA request in stop mode for channel 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " [26] ,Enable asynchronous DMA request in stop mode for channel 26" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " [25] ,Enable asynchronous DMA request in stop mode for channel 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " [24] ,Enable asynchronous DMA request in stop mode for channel 24" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. " [23] ,Enable asynchronous DMA request in stop mode for channel 23" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " [22] ,Enable asynchronous DMA request in stop mode for channel 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " [21] ,Enable asynchronous DMA request in stop mode for channel 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " [20] ,Enable asynchronous DMA request in stop mode for channel 20" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " [19] ,Enable asynchronous DMA request in stop mode for channel 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [18] ,Enable asynchronous DMA request in stop mode for channel 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [17] ,Enable asynchronous DMA request in stop mode for channel 17" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " [16] ,Enable asynchronous DMA request in stop mode for channel 16" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 15. " EDREQ[15] ,Enable asynchronous DMA request in stop mode for channel 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " [14] ,Enable asynchronous DMA request in stop mode for channel 14" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " [13] ,Enable asynchronous DMA request in stop mode for channel 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " [12] ,Enable asynchronous DMA request in stop mode for channel 12" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. " [11] ,Enable asynchronous DMA request in stop mode for channel 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " [10] ,Enable asynchronous DMA request in stop mode for channel 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " [9] ,Enable asynchronous DMA request in stop mode for channel 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " [8] ,Enable asynchronous DMA request in stop mode for channel 8" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " [7] ,Enable asynchronous DMA request in stop mode for channel 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [6] ,Enable asynchronous DMA request in stop mode for channel 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " [5] ,Enable asynchronous DMA request in stop mode for channel 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [4] ,Enable asynchronous DMA request in stop mode for channel 4" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " [3] ,Enable asynchronous DMA request in stop mode for channel 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [2] ,Enable asynchronous DMA request in stop mode for channel 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " [1] ,Enable asynchronous DMA request in stop mode for channel 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [0] ,Enable asynchronous DMA request in stop mode for channel 0" "Disabled,Enabled"
|
|
group.byte 0x100++0x00
|
|
line.byte 0x00 "DCHPRI3,Channel 3 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 3 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 3 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x101++0x00
|
|
line.byte 0x00 "DCHPRI2,Channel 2 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 2 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 2 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x102++0x00
|
|
line.byte 0x00 "DCHPRI1,Channel 1 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 1 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 1 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x103++0x00
|
|
line.byte 0x00 "DCHPRI0,Channel 0 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 0 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 0 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x104++0x00
|
|
line.byte 0x00 "DCHPRI7,Channel 7 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 7 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 7 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x105++0x00
|
|
line.byte 0x00 "DCHPRI6,Channel 6 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 6 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 6 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x106++0x00
|
|
line.byte 0x00 "DCHPRI5,Channel 5 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 5 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 5 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x107++0x00
|
|
line.byte 0x00 "DCHPRI4,Channel 4 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 4 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 4 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x108++0x00
|
|
line.byte 0x00 "DCHPRI11,Channel 11 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 11 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 11 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x109++0x00
|
|
line.byte 0x00 "DCHPRI10,Channel 10 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 10 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 10 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x10A++0x00
|
|
line.byte 0x00 "DCHPRI9,Channel 9 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 9 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 9 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x10B++0x00
|
|
line.byte 0x00 "DCHPRI8,Channel 8 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 8 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 8 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x10C++0x00
|
|
line.byte 0x00 "DCHPRI15,Channel 15 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 15 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 15 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x10D++0x00
|
|
line.byte 0x00 "DCHPRI14,Channel 14 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 14 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 14 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x10E++0x00
|
|
line.byte 0x00 "DCHPRI13,Channel 13 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 13 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 13 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x10F++0x00
|
|
line.byte 0x00 "DCHPRI12,Channel 12 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 12 current group priority" "0,1,2,3"
|
|
endif
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 12 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
group.byte 0x110++0x0F
|
|
line.byte 0x00 "DCHPRI19,Channel 19 Priority Register"
|
|
bitfld.byte 0x00 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 4.--5. " GRPPRI ,Channel 19 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " CHPRI ,Channel 19 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x01 "DCHPRI18,Channel 18 Priority Register"
|
|
bitfld.byte 0x01 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x01 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x01 4.--5. " GRPPRI ,Channel 18 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x01 0.--3. " CHPRI ,Channel 18 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x02 "DCHPRI17,Channel 17 Priority Register"
|
|
bitfld.byte 0x02 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x02 4.--5. " GRPPRI ,Channel 17 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x02 0.--3. " CHPRI ,Channel 17 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x03 "DCHPRI16,Channel 16 Priority Register"
|
|
bitfld.byte 0x03 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x03 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x03 4.--5. " GRPPRI ,Channel 16 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x03 0.--3. " CHPRI ,Channel 16 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x04 "DCHPRI23,Channel 23 Priority Register"
|
|
bitfld.byte 0x04 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x04 4.--5. " GRPPRI ,Channel 23 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x04 0.--3. " CHPRI ,Channel 23 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x05 "DCHPRI22,Channel 22 Priority Register"
|
|
bitfld.byte 0x05 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x05 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x05 4.--5. " GRPPRI ,Channel 22 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x05 0.--3. " CHPRI ,Channel 22 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x06 "DCHPRI21,Channel 21 Priority Register"
|
|
bitfld.byte 0x06 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x06 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x06 4.--5. " GRPPRI ,Channel 21 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x06 0.--3. " CHPRI ,Channel 21 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x07 "DCHPRI20,Channel 20 Priority Register"
|
|
bitfld.byte 0x07 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x07 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x07 4.--5. " GRPPRI ,Channel 20 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x07 0.--3. " CHPRI ,Channel 20 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x08 "DCHPRI27,Channel 27 Priority Register"
|
|
bitfld.byte 0x08 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x08 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x08 4.--5. " GRPPRI ,Channel 27 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x08 0.--3. " CHPRI ,Channel 27 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x09 "DCHPRI26,Channel 26 Priority Register"
|
|
bitfld.byte 0x09 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x09 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x09 4.--5. " GRPPRI ,Channel 26 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x09 0.--3. " CHPRI ,Channel 26 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x0A "DCHPRI25,Channel 25 Priority Register"
|
|
bitfld.byte 0x0A 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x0A 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x0A 4.--5. " GRPPRI ,Channel 25 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x0A 0.--3. " CHPRI ,Channel 25 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x0B "DCHPRI24,Channel 24 Priority Register"
|
|
bitfld.byte 0x0B 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x0B 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x0B 4.--5. " GRPPRI ,Channel 24 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x0B 0.--3. " CHPRI ,Channel 24 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x0C "DCHPRI31,Channel 31 Priority Register"
|
|
bitfld.byte 0x0C 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x0C 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x0C 4.--5. " GRPPRI ,Channel 31 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x0C 0.--3. " CHPRI ,Channel 31 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x0D "DCHPRI30,Channel 30 Priority Register"
|
|
bitfld.byte 0x0D 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x0D 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x0D 4.--5. " GRPPRI ,Channel 30 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x0D 0.--3. " CHPRI ,Channel 30 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x0E "DCHPRI29,Channel 29 Priority Register"
|
|
bitfld.byte 0x0E 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x0E 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x0E 4.--5. " GRPPRI ,Channel 29 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x0E 0.--3. " CHPRI ,Channel 29 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x0F "DCHPRI28,Channel 28 Priority Register"
|
|
bitfld.byte 0x0F 7. " ECP ,Enable channel preemption" "Disabled,Enabled"
|
|
bitfld.byte 0x0F 6. " DPA ,Disable preempt ability" "Disabled,Enabled"
|
|
rbitfld.byte 0x0F 4.--5. " GRPPRI ,Channel 28 current group priority" "0,1,2,3"
|
|
bitfld.byte 0x0F 0.--3. " CHPRI ,Channel 28 arbitration priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
width 21.
|
|
group.long 0x1000++0x03 "eDMA Channel 0"
|
|
line.long 0x00 "TCD0_SADDR,TCD Source Address Register"
|
|
group.word (0x1000+0x04)++0x03
|
|
line.word 0x00 "TCD0_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD0_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1000+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1000+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1000+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1000+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1000+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1000+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1000+0x08)++0x03
|
|
line.long 0x00 "TCD0_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1000+0x0C)++0x07
|
|
line.long 0x00 "TCD0_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD0_DADDR,TCD Destination Address Register"
|
|
group.word (0x1000+0x14)++0x1
|
|
line.word 0x00 "TCD0_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1000+0x16)&0x8000)==0x00))
|
|
group.word (0x1000+0x16)++0x01
|
|
line.word 0x00 "TCD0_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1000+0x16)++0x01
|
|
line.word 0x00 "TCD0_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1000+0x18)++0x03
|
|
line.long 0x00 "TCD0_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1000+0x1C)&0x20)==0x20))
|
|
group.word (0x1000+0x1C)++0x01
|
|
line.word 0x00 "TCD0_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1000+0x1C)++0x01
|
|
line.word 0x00 "TCD0_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1000+0x1E)&0x8000)==0x00))
|
|
group.word (0x1000+0x1E)++0x01
|
|
line.word 0x00 "TCD0_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1000+0x1E)++0x01
|
|
line.word 0x00 "TCD0_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1020++0x03 "eDMA Channel 1"
|
|
line.long 0x00 "TCD1_SADDR,TCD Source Address Register"
|
|
group.word (0x1020+0x04)++0x03
|
|
line.word 0x00 "TCD1_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD1_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1020+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1020+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1020+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1020+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1020+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1020+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1020+0x08)++0x03
|
|
line.long 0x00 "TCD1_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1020+0x0C)++0x07
|
|
line.long 0x00 "TCD1_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD1_DADDR,TCD Destination Address Register"
|
|
group.word (0x1020+0x14)++0x1
|
|
line.word 0x00 "TCD1_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1020+0x16)&0x8000)==0x00))
|
|
group.word (0x1020+0x16)++0x01
|
|
line.word 0x00 "TCD1_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1020+0x16)++0x01
|
|
line.word 0x00 "TCD1_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1020+0x18)++0x03
|
|
line.long 0x00 "TCD1_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1020+0x1C)&0x20)==0x20))
|
|
group.word (0x1020+0x1C)++0x01
|
|
line.word 0x00 "TCD1_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1020+0x1C)++0x01
|
|
line.word 0x00 "TCD1_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1020+0x1E)&0x8000)==0x00))
|
|
group.word (0x1020+0x1E)++0x01
|
|
line.word 0x00 "TCD1_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1020+0x1E)++0x01
|
|
line.word 0x00 "TCD1_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1040++0x03 "eDMA Channel 2"
|
|
line.long 0x00 "TCD2_SADDR,TCD Source Address Register"
|
|
group.word (0x1040+0x04)++0x03
|
|
line.word 0x00 "TCD2_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD2_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1040+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1040+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1040+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1040+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1040+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1040+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1040+0x08)++0x03
|
|
line.long 0x00 "TCD2_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1040+0x0C)++0x07
|
|
line.long 0x00 "TCD2_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD2_DADDR,TCD Destination Address Register"
|
|
group.word (0x1040+0x14)++0x1
|
|
line.word 0x00 "TCD2_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1040+0x16)&0x8000)==0x00))
|
|
group.word (0x1040+0x16)++0x01
|
|
line.word 0x00 "TCD2_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1040+0x16)++0x01
|
|
line.word 0x00 "TCD2_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1040+0x18)++0x03
|
|
line.long 0x00 "TCD2_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1040+0x1C)&0x20)==0x20))
|
|
group.word (0x1040+0x1C)++0x01
|
|
line.word 0x00 "TCD2_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1040+0x1C)++0x01
|
|
line.word 0x00 "TCD2_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1040+0x1E)&0x8000)==0x00))
|
|
group.word (0x1040+0x1E)++0x01
|
|
line.word 0x00 "TCD2_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1040+0x1E)++0x01
|
|
line.word 0x00 "TCD2_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1060++0x03 "eDMA Channel 3"
|
|
line.long 0x00 "TCD3_SADDR,TCD Source Address Register"
|
|
group.word (0x1060+0x04)++0x03
|
|
line.word 0x00 "TCD3_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD3_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1060+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1060+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1060+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1060+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1060+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1060+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1060+0x08)++0x03
|
|
line.long 0x00 "TCD3_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1060+0x0C)++0x07
|
|
line.long 0x00 "TCD3_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD3_DADDR,TCD Destination Address Register"
|
|
group.word (0x1060+0x14)++0x1
|
|
line.word 0x00 "TCD3_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1060+0x16)&0x8000)==0x00))
|
|
group.word (0x1060+0x16)++0x01
|
|
line.word 0x00 "TCD3_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1060+0x16)++0x01
|
|
line.word 0x00 "TCD3_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1060+0x18)++0x03
|
|
line.long 0x00 "TCD3_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1060+0x1C)&0x20)==0x20))
|
|
group.word (0x1060+0x1C)++0x01
|
|
line.word 0x00 "TCD3_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1060+0x1C)++0x01
|
|
line.word 0x00 "TCD3_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1060+0x1E)&0x8000)==0x00))
|
|
group.word (0x1060+0x1E)++0x01
|
|
line.word 0x00 "TCD3_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1060+0x1E)++0x01
|
|
line.word 0x00 "TCD3_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1080++0x03 "eDMA Channel 4"
|
|
line.long 0x00 "TCD4_SADDR,TCD Source Address Register"
|
|
group.word (0x1080+0x04)++0x03
|
|
line.word 0x00 "TCD4_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD4_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1080+0x08)++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1080+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1080+0x08)++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1080+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1080+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1080+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1080+0x08)++0x03
|
|
line.long 0x00 "TCD4_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1080+0x0C)++0x07
|
|
line.long 0x00 "TCD4_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD4_DADDR,TCD Destination Address Register"
|
|
group.word (0x1080+0x14)++0x1
|
|
line.word 0x00 "TCD4_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1080+0x16)&0x8000)==0x00))
|
|
group.word (0x1080+0x16)++0x01
|
|
line.word 0x00 "TCD4_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1080+0x16)++0x01
|
|
line.word 0x00 "TCD4_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1080+0x18)++0x03
|
|
line.long 0x00 "TCD4_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1080+0x1C)&0x20)==0x20))
|
|
group.word (0x1080+0x1C)++0x01
|
|
line.word 0x00 "TCD4_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1080+0x1C)++0x01
|
|
line.word 0x00 "TCD4_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1080+0x1E)&0x8000)==0x00))
|
|
group.word (0x1080+0x1E)++0x01
|
|
line.word 0x00 "TCD4_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1080+0x1E)++0x01
|
|
line.word 0x00 "TCD4_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x10A0++0x03 "eDMA Channel 5"
|
|
line.long 0x00 "TCD5_SADDR,TCD Source Address Register"
|
|
group.word (0x10A0+0x04)++0x03
|
|
line.word 0x00 "TCD5_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD5_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x10A0+0x08)++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x10A0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x10A0+0x08)++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x10A0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x10A0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x10A0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x10A0+0x08)++0x03
|
|
line.long 0x00 "TCD5_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x10A0+0x0C)++0x07
|
|
line.long 0x00 "TCD5_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD5_DADDR,TCD Destination Address Register"
|
|
group.word (0x10A0+0x14)++0x1
|
|
line.word 0x00 "TCD5_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x10A0+0x16)&0x8000)==0x00))
|
|
group.word (0x10A0+0x16)++0x01
|
|
line.word 0x00 "TCD5_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x10A0+0x16)++0x01
|
|
line.word 0x00 "TCD5_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x10A0+0x18)++0x03
|
|
line.long 0x00 "TCD5_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x10A0+0x1C)&0x20)==0x20))
|
|
group.word (0x10A0+0x1C)++0x01
|
|
line.word 0x00 "TCD5_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x10A0+0x1C)++0x01
|
|
line.word 0x00 "TCD5_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x10A0+0x1E)&0x8000)==0x00))
|
|
group.word (0x10A0+0x1E)++0x01
|
|
line.word 0x00 "TCD5_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x10A0+0x1E)++0x01
|
|
line.word 0x00 "TCD5_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x10C0++0x03 "eDMA Channel 6"
|
|
line.long 0x00 "TCD6_SADDR,TCD Source Address Register"
|
|
group.word (0x10C0+0x04)++0x03
|
|
line.word 0x00 "TCD6_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD6_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x10C0+0x08)++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x10C0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x10C0+0x08)++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x10C0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x10C0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x10C0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x10C0+0x08)++0x03
|
|
line.long 0x00 "TCD6_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x10C0+0x0C)++0x07
|
|
line.long 0x00 "TCD6_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD6_DADDR,TCD Destination Address Register"
|
|
group.word (0x10C0+0x14)++0x1
|
|
line.word 0x00 "TCD6_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x10C0+0x16)&0x8000)==0x00))
|
|
group.word (0x10C0+0x16)++0x01
|
|
line.word 0x00 "TCD6_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x10C0+0x16)++0x01
|
|
line.word 0x00 "TCD6_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x10C0+0x18)++0x03
|
|
line.long 0x00 "TCD6_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x10C0+0x1C)&0x20)==0x20))
|
|
group.word (0x10C0+0x1C)++0x01
|
|
line.word 0x00 "TCD6_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x10C0+0x1C)++0x01
|
|
line.word 0x00 "TCD6_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x10C0+0x1E)&0x8000)==0x00))
|
|
group.word (0x10C0+0x1E)++0x01
|
|
line.word 0x00 "TCD6_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x10C0+0x1E)++0x01
|
|
line.word 0x00 "TCD6_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x10E0++0x03 "eDMA Channel 7"
|
|
line.long 0x00 "TCD7_SADDR,TCD Source Address Register"
|
|
group.word (0x10E0+0x04)++0x03
|
|
line.word 0x00 "TCD7_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD7_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x10E0+0x08)++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x10E0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x10E0+0x08)++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x10E0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x10E0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x10E0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x10E0+0x08)++0x03
|
|
line.long 0x00 "TCD7_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x10E0+0x0C)++0x07
|
|
line.long 0x00 "TCD7_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD7_DADDR,TCD Destination Address Register"
|
|
group.word (0x10E0+0x14)++0x1
|
|
line.word 0x00 "TCD7_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x10E0+0x16)&0x8000)==0x00))
|
|
group.word (0x10E0+0x16)++0x01
|
|
line.word 0x00 "TCD7_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x10E0+0x16)++0x01
|
|
line.word 0x00 "TCD7_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x10E0+0x18)++0x03
|
|
line.long 0x00 "TCD7_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x10E0+0x1C)&0x20)==0x20))
|
|
group.word (0x10E0+0x1C)++0x01
|
|
line.word 0x00 "TCD7_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x10E0+0x1C)++0x01
|
|
line.word 0x00 "TCD7_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x10E0+0x1E)&0x8000)==0x00))
|
|
group.word (0x10E0+0x1E)++0x01
|
|
line.word 0x00 "TCD7_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x10E0+0x1E)++0x01
|
|
line.word 0x00 "TCD7_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1100++0x03 "eDMA Channel 8"
|
|
line.long 0x00 "TCD8_SADDR,TCD Source Address Register"
|
|
group.word (0x1100+0x04)++0x03
|
|
line.word 0x00 "TCD8_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD8_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1100+0x08)++0x03
|
|
line.long 0x00 "TCD8_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1100+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1100+0x08)++0x03
|
|
line.long 0x00 "TCD8_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1100+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1100+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1100+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1100+0x08)++0x03
|
|
line.long 0x00 "TCD8_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1100+0x0C)++0x07
|
|
line.long 0x00 "TCD8_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD8_DADDR,TCD Destination Address Register"
|
|
group.word (0x1100+0x14)++0x1
|
|
line.word 0x00 "TCD8_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1100+0x16)&0x8000)==0x00))
|
|
group.word (0x1100+0x16)++0x01
|
|
line.word 0x00 "TCD8_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1100+0x16)++0x01
|
|
line.word 0x00 "TCD8_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1100+0x18)++0x03
|
|
line.long 0x00 "TCD8_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1100+0x1C)&0x20)==0x20))
|
|
group.word (0x1100+0x1C)++0x01
|
|
line.word 0x00 "TCD8_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1100+0x1C)++0x01
|
|
line.word 0x00 "TCD8_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1100+0x1E)&0x8000)==0x00))
|
|
group.word (0x1100+0x1E)++0x01
|
|
line.word 0x00 "TCD8_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1100+0x1E)++0x01
|
|
line.word 0x00 "TCD8_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1120++0x03 "eDMA Channel 9"
|
|
line.long 0x00 "TCD9_SADDR,TCD Source Address Register"
|
|
group.word (0x1120+0x04)++0x03
|
|
line.word 0x00 "TCD9_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD9_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1120+0x08)++0x03
|
|
line.long 0x00 "TCD9_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1120+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1120+0x08)++0x03
|
|
line.long 0x00 "TCD9_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1120+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1120+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1120+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1120+0x08)++0x03
|
|
line.long 0x00 "TCD9_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1120+0x0C)++0x07
|
|
line.long 0x00 "TCD9_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD9_DADDR,TCD Destination Address Register"
|
|
group.word (0x1120+0x14)++0x1
|
|
line.word 0x00 "TCD9_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1120+0x16)&0x8000)==0x00))
|
|
group.word (0x1120+0x16)++0x01
|
|
line.word 0x00 "TCD9_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1120+0x16)++0x01
|
|
line.word 0x00 "TCD9_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1120+0x18)++0x03
|
|
line.long 0x00 "TCD9_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1120+0x1C)&0x20)==0x20))
|
|
group.word (0x1120+0x1C)++0x01
|
|
line.word 0x00 "TCD9_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1120+0x1C)++0x01
|
|
line.word 0x00 "TCD9_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1120+0x1E)&0x8000)==0x00))
|
|
group.word (0x1120+0x1E)++0x01
|
|
line.word 0x00 "TCD9_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1120+0x1E)++0x01
|
|
line.word 0x00 "TCD9_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1140++0x03 "eDMA Channel 10"
|
|
line.long 0x00 "TCD10_SADDR,TCD Source Address Register"
|
|
group.word (0x1140+0x04)++0x03
|
|
line.word 0x00 "TCD10_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD10_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1140+0x08)++0x03
|
|
line.long 0x00 "TCD10_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1140+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1140+0x08)++0x03
|
|
line.long 0x00 "TCD10_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1140+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1140+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1140+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1140+0x08)++0x03
|
|
line.long 0x00 "TCD10_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1140+0x0C)++0x07
|
|
line.long 0x00 "TCD10_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD10_DADDR,TCD Destination Address Register"
|
|
group.word (0x1140+0x14)++0x1
|
|
line.word 0x00 "TCD10_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1140+0x16)&0x8000)==0x00))
|
|
group.word (0x1140+0x16)++0x01
|
|
line.word 0x00 "TCD10_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1140+0x16)++0x01
|
|
line.word 0x00 "TCD10_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1140+0x18)++0x03
|
|
line.long 0x00 "TCD10_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1140+0x1C)&0x20)==0x20))
|
|
group.word (0x1140+0x1C)++0x01
|
|
line.word 0x00 "TCD10_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1140+0x1C)++0x01
|
|
line.word 0x00 "TCD10_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1140+0x1E)&0x8000)==0x00))
|
|
group.word (0x1140+0x1E)++0x01
|
|
line.word 0x00 "TCD10_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1140+0x1E)++0x01
|
|
line.word 0x00 "TCD10_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1160++0x03 "eDMA Channel 11"
|
|
line.long 0x00 "TCD11_SADDR,TCD Source Address Register"
|
|
group.word (0x1160+0x04)++0x03
|
|
line.word 0x00 "TCD11_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD11_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1160+0x08)++0x03
|
|
line.long 0x00 "TCD11_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1160+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1160+0x08)++0x03
|
|
line.long 0x00 "TCD11_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1160+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1160+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1160+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1160+0x08)++0x03
|
|
line.long 0x00 "TCD11_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1160+0x0C)++0x07
|
|
line.long 0x00 "TCD11_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD11_DADDR,TCD Destination Address Register"
|
|
group.word (0x1160+0x14)++0x1
|
|
line.word 0x00 "TCD11_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1160+0x16)&0x8000)==0x00))
|
|
group.word (0x1160+0x16)++0x01
|
|
line.word 0x00 "TCD11_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1160+0x16)++0x01
|
|
line.word 0x00 "TCD11_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1160+0x18)++0x03
|
|
line.long 0x00 "TCD11_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1160+0x1C)&0x20)==0x20))
|
|
group.word (0x1160+0x1C)++0x01
|
|
line.word 0x00 "TCD11_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1160+0x1C)++0x01
|
|
line.word 0x00 "TCD11_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1160+0x1E)&0x8000)==0x00))
|
|
group.word (0x1160+0x1E)++0x01
|
|
line.word 0x00 "TCD11_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1160+0x1E)++0x01
|
|
line.word 0x00 "TCD11_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1180++0x03 "eDMA Channel 12"
|
|
line.long 0x00 "TCD12_SADDR,TCD Source Address Register"
|
|
group.word (0x1180+0x04)++0x03
|
|
line.word 0x00 "TCD12_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD12_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1180+0x08)++0x03
|
|
line.long 0x00 "TCD12_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1180+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1180+0x08)++0x03
|
|
line.long 0x00 "TCD12_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1180+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1180+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1180+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1180+0x08)++0x03
|
|
line.long 0x00 "TCD12_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1180+0x0C)++0x07
|
|
line.long 0x00 "TCD12_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD12_DADDR,TCD Destination Address Register"
|
|
group.word (0x1180+0x14)++0x1
|
|
line.word 0x00 "TCD12_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1180+0x16)&0x8000)==0x00))
|
|
group.word (0x1180+0x16)++0x01
|
|
line.word 0x00 "TCD12_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1180+0x16)++0x01
|
|
line.word 0x00 "TCD12_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1180+0x18)++0x03
|
|
line.long 0x00 "TCD12_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1180+0x1C)&0x20)==0x20))
|
|
group.word (0x1180+0x1C)++0x01
|
|
line.word 0x00 "TCD12_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1180+0x1C)++0x01
|
|
line.word 0x00 "TCD12_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1180+0x1E)&0x8000)==0x00))
|
|
group.word (0x1180+0x1E)++0x01
|
|
line.word 0x00 "TCD12_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1180+0x1E)++0x01
|
|
line.word 0x00 "TCD12_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x11A0++0x03 "eDMA Channel 13"
|
|
line.long 0x00 "TCD13_SADDR,TCD Source Address Register"
|
|
group.word (0x11A0+0x04)++0x03
|
|
line.word 0x00 "TCD13_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD13_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x11A0+0x08)++0x03
|
|
line.long 0x00 "TCD13_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x11A0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x11A0+0x08)++0x03
|
|
line.long 0x00 "TCD13_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x11A0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x11A0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x11A0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x11A0+0x08)++0x03
|
|
line.long 0x00 "TCD13_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x11A0+0x0C)++0x07
|
|
line.long 0x00 "TCD13_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD13_DADDR,TCD Destination Address Register"
|
|
group.word (0x11A0+0x14)++0x1
|
|
line.word 0x00 "TCD13_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x11A0+0x16)&0x8000)==0x00))
|
|
group.word (0x11A0+0x16)++0x01
|
|
line.word 0x00 "TCD13_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x11A0+0x16)++0x01
|
|
line.word 0x00 "TCD13_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x11A0+0x18)++0x03
|
|
line.long 0x00 "TCD13_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x11A0+0x1C)&0x20)==0x20))
|
|
group.word (0x11A0+0x1C)++0x01
|
|
line.word 0x00 "TCD13_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x11A0+0x1C)++0x01
|
|
line.word 0x00 "TCD13_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x11A0+0x1E)&0x8000)==0x00))
|
|
group.word (0x11A0+0x1E)++0x01
|
|
line.word 0x00 "TCD13_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x11A0+0x1E)++0x01
|
|
line.word 0x00 "TCD13_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x11C0++0x03 "eDMA Channel 14"
|
|
line.long 0x00 "TCD14_SADDR,TCD Source Address Register"
|
|
group.word (0x11C0+0x04)++0x03
|
|
line.word 0x00 "TCD14_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD14_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x11C0+0x08)++0x03
|
|
line.long 0x00 "TCD14_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x11C0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x11C0+0x08)++0x03
|
|
line.long 0x00 "TCD14_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x11C0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x11C0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x11C0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x11C0+0x08)++0x03
|
|
line.long 0x00 "TCD14_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x11C0+0x0C)++0x07
|
|
line.long 0x00 "TCD14_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD14_DADDR,TCD Destination Address Register"
|
|
group.word (0x11C0+0x14)++0x1
|
|
line.word 0x00 "TCD14_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x11C0+0x16)&0x8000)==0x00))
|
|
group.word (0x11C0+0x16)++0x01
|
|
line.word 0x00 "TCD14_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x11C0+0x16)++0x01
|
|
line.word 0x00 "TCD14_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x11C0+0x18)++0x03
|
|
line.long 0x00 "TCD14_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x11C0+0x1C)&0x20)==0x20))
|
|
group.word (0x11C0+0x1C)++0x01
|
|
line.word 0x00 "TCD14_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x11C0+0x1C)++0x01
|
|
line.word 0x00 "TCD14_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x11C0+0x1E)&0x8000)==0x00))
|
|
group.word (0x11C0+0x1E)++0x01
|
|
line.word 0x00 "TCD14_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x11C0+0x1E)++0x01
|
|
line.word 0x00 "TCD14_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x11E0++0x03 "eDMA Channel 15"
|
|
line.long 0x00 "TCD15_SADDR,TCD Source Address Register"
|
|
group.word (0x11E0+0x04)++0x03
|
|
line.word 0x00 "TCD15_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD15_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x11E0+0x08)++0x03
|
|
line.long 0x00 "TCD15_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x11E0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x11E0+0x08)++0x03
|
|
line.long 0x00 "TCD15_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x11E0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x11E0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x11E0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x11E0+0x08)++0x03
|
|
line.long 0x00 "TCD15_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x11E0+0x0C)++0x07
|
|
line.long 0x00 "TCD15_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD15_DADDR,TCD Destination Address Register"
|
|
group.word (0x11E0+0x14)++0x1
|
|
line.word 0x00 "TCD15_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x11E0+0x16)&0x8000)==0x00))
|
|
group.word (0x11E0+0x16)++0x01
|
|
line.word 0x00 "TCD15_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x11E0+0x16)++0x01
|
|
line.word 0x00 "TCD15_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x11E0+0x18)++0x03
|
|
line.long 0x00 "TCD15_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x11E0+0x1C)&0x20)==0x20))
|
|
group.word (0x11E0+0x1C)++0x01
|
|
line.word 0x00 "TCD15_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x11E0+0x1C)++0x01
|
|
line.word 0x00 "TCD15_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x11E0+0x1E)&0x8000)==0x00))
|
|
group.word (0x11E0+0x1E)++0x01
|
|
line.word 0x00 "TCD15_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x11E0+0x1E)++0x01
|
|
line.word 0x00 "TCD15_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1200++0x03 "eDMA Channel 16"
|
|
line.long 0x00 "TCD16_SADDR,TCD Source Address Register"
|
|
group.word (0x1200+0x04)++0x03
|
|
line.word 0x00 "TCD16_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD16_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1200+0x08)++0x03
|
|
line.long 0x00 "TCD16_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1200+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1200+0x08)++0x03
|
|
line.long 0x00 "TCD16_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1200+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1200+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1200+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1200+0x08)++0x03
|
|
line.long 0x00 "TCD16_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1200+0x0C)++0x07
|
|
line.long 0x00 "TCD16_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD16_DADDR,TCD Destination Address Register"
|
|
group.word (0x1200+0x14)++0x1
|
|
line.word 0x00 "TCD16_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1200+0x16)&0x8000)==0x00))
|
|
group.word (0x1200+0x16)++0x01
|
|
line.word 0x00 "TCD16_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1200+0x16)++0x01
|
|
line.word 0x00 "TCD16_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1200+0x18)++0x03
|
|
line.long 0x00 "TCD16_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1200+0x1C)&0x20)==0x20))
|
|
group.word (0x1200+0x1C)++0x01
|
|
line.word 0x00 "TCD16_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1200+0x1C)++0x01
|
|
line.word 0x00 "TCD16_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1200+0x1E)&0x8000)==0x00))
|
|
group.word (0x1200+0x1E)++0x01
|
|
line.word 0x00 "TCD16_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1200+0x1E)++0x01
|
|
line.word 0x00 "TCD16_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1220++0x03 "eDMA Channel 17"
|
|
line.long 0x00 "TCD17_SADDR,TCD Source Address Register"
|
|
group.word (0x1220+0x04)++0x03
|
|
line.word 0x00 "TCD17_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD17_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1220+0x08)++0x03
|
|
line.long 0x00 "TCD17_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1220+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1220+0x08)++0x03
|
|
line.long 0x00 "TCD17_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1220+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1220+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1220+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1220+0x08)++0x03
|
|
line.long 0x00 "TCD17_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1220+0x0C)++0x07
|
|
line.long 0x00 "TCD17_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD17_DADDR,TCD Destination Address Register"
|
|
group.word (0x1220+0x14)++0x1
|
|
line.word 0x00 "TCD17_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1220+0x16)&0x8000)==0x00))
|
|
group.word (0x1220+0x16)++0x01
|
|
line.word 0x00 "TCD17_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1220+0x16)++0x01
|
|
line.word 0x00 "TCD17_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1220+0x18)++0x03
|
|
line.long 0x00 "TCD17_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1220+0x1C)&0x20)==0x20))
|
|
group.word (0x1220+0x1C)++0x01
|
|
line.word 0x00 "TCD17_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1220+0x1C)++0x01
|
|
line.word 0x00 "TCD17_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1220+0x1E)&0x8000)==0x00))
|
|
group.word (0x1220+0x1E)++0x01
|
|
line.word 0x00 "TCD17_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1220+0x1E)++0x01
|
|
line.word 0x00 "TCD17_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1240++0x03 "eDMA Channel 18"
|
|
line.long 0x00 "TCD18_SADDR,TCD Source Address Register"
|
|
group.word (0x1240+0x04)++0x03
|
|
line.word 0x00 "TCD18_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD18_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1240+0x08)++0x03
|
|
line.long 0x00 "TCD18_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1240+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1240+0x08)++0x03
|
|
line.long 0x00 "TCD18_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1240+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1240+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1240+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1240+0x08)++0x03
|
|
line.long 0x00 "TCD18_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1240+0x0C)++0x07
|
|
line.long 0x00 "TCD18_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD18_DADDR,TCD Destination Address Register"
|
|
group.word (0x1240+0x14)++0x1
|
|
line.word 0x00 "TCD18_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1240+0x16)&0x8000)==0x00))
|
|
group.word (0x1240+0x16)++0x01
|
|
line.word 0x00 "TCD18_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1240+0x16)++0x01
|
|
line.word 0x00 "TCD18_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1240+0x18)++0x03
|
|
line.long 0x00 "TCD18_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1240+0x1C)&0x20)==0x20))
|
|
group.word (0x1240+0x1C)++0x01
|
|
line.word 0x00 "TCD18_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1240+0x1C)++0x01
|
|
line.word 0x00 "TCD18_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1240+0x1E)&0x8000)==0x00))
|
|
group.word (0x1240+0x1E)++0x01
|
|
line.word 0x00 "TCD18_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1240+0x1E)++0x01
|
|
line.word 0x00 "TCD18_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1260++0x03 "eDMA Channel 19"
|
|
line.long 0x00 "TCD19_SADDR,TCD Source Address Register"
|
|
group.word (0x1260+0x04)++0x03
|
|
line.word 0x00 "TCD19_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD19_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1260+0x08)++0x03
|
|
line.long 0x00 "TCD19_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1260+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1260+0x08)++0x03
|
|
line.long 0x00 "TCD19_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1260+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1260+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1260+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1260+0x08)++0x03
|
|
line.long 0x00 "TCD19_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1260+0x0C)++0x07
|
|
line.long 0x00 "TCD19_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD19_DADDR,TCD Destination Address Register"
|
|
group.word (0x1260+0x14)++0x1
|
|
line.word 0x00 "TCD19_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1260+0x16)&0x8000)==0x00))
|
|
group.word (0x1260+0x16)++0x01
|
|
line.word 0x00 "TCD19_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1260+0x16)++0x01
|
|
line.word 0x00 "TCD19_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1260+0x18)++0x03
|
|
line.long 0x00 "TCD19_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1260+0x1C)&0x20)==0x20))
|
|
group.word (0x1260+0x1C)++0x01
|
|
line.word 0x00 "TCD19_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1260+0x1C)++0x01
|
|
line.word 0x00 "TCD19_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1260+0x1E)&0x8000)==0x00))
|
|
group.word (0x1260+0x1E)++0x01
|
|
line.word 0x00 "TCD19_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1260+0x1E)++0x01
|
|
line.word 0x00 "TCD19_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1280++0x03 "eDMA Channel 20"
|
|
line.long 0x00 "TCD20_SADDR,TCD Source Address Register"
|
|
group.word (0x1280+0x04)++0x03
|
|
line.word 0x00 "TCD20_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD20_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1280+0x08)++0x03
|
|
line.long 0x00 "TCD20_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1280+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1280+0x08)++0x03
|
|
line.long 0x00 "TCD20_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1280+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1280+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1280+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1280+0x08)++0x03
|
|
line.long 0x00 "TCD20_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1280+0x0C)++0x07
|
|
line.long 0x00 "TCD20_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD20_DADDR,TCD Destination Address Register"
|
|
group.word (0x1280+0x14)++0x1
|
|
line.word 0x00 "TCD20_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1280+0x16)&0x8000)==0x00))
|
|
group.word (0x1280+0x16)++0x01
|
|
line.word 0x00 "TCD20_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1280+0x16)++0x01
|
|
line.word 0x00 "TCD20_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1280+0x18)++0x03
|
|
line.long 0x00 "TCD20_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1280+0x1C)&0x20)==0x20))
|
|
group.word (0x1280+0x1C)++0x01
|
|
line.word 0x00 "TCD20_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1280+0x1C)++0x01
|
|
line.word 0x00 "TCD20_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1280+0x1E)&0x8000)==0x00))
|
|
group.word (0x1280+0x1E)++0x01
|
|
line.word 0x00 "TCD20_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1280+0x1E)++0x01
|
|
line.word 0x00 "TCD20_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x12A0++0x03 "eDMA Channel 21"
|
|
line.long 0x00 "TCD21_SADDR,TCD Source Address Register"
|
|
group.word (0x12A0+0x04)++0x03
|
|
line.word 0x00 "TCD21_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD21_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x12A0+0x08)++0x03
|
|
line.long 0x00 "TCD21_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x12A0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x12A0+0x08)++0x03
|
|
line.long 0x00 "TCD21_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x12A0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x12A0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x12A0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x12A0+0x08)++0x03
|
|
line.long 0x00 "TCD21_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x12A0+0x0C)++0x07
|
|
line.long 0x00 "TCD21_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD21_DADDR,TCD Destination Address Register"
|
|
group.word (0x12A0+0x14)++0x1
|
|
line.word 0x00 "TCD21_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x12A0+0x16)&0x8000)==0x00))
|
|
group.word (0x12A0+0x16)++0x01
|
|
line.word 0x00 "TCD21_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x12A0+0x16)++0x01
|
|
line.word 0x00 "TCD21_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x12A0+0x18)++0x03
|
|
line.long 0x00 "TCD21_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x12A0+0x1C)&0x20)==0x20))
|
|
group.word (0x12A0+0x1C)++0x01
|
|
line.word 0x00 "TCD21_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x12A0+0x1C)++0x01
|
|
line.word 0x00 "TCD21_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x12A0+0x1E)&0x8000)==0x00))
|
|
group.word (0x12A0+0x1E)++0x01
|
|
line.word 0x00 "TCD21_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x12A0+0x1E)++0x01
|
|
line.word 0x00 "TCD21_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x12C0++0x03 "eDMA Channel 22"
|
|
line.long 0x00 "TCD22_SADDR,TCD Source Address Register"
|
|
group.word (0x12C0+0x04)++0x03
|
|
line.word 0x00 "TCD22_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD22_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x12C0+0x08)++0x03
|
|
line.long 0x00 "TCD22_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x12C0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x12C0+0x08)++0x03
|
|
line.long 0x00 "TCD22_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x12C0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x12C0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x12C0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x12C0+0x08)++0x03
|
|
line.long 0x00 "TCD22_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x12C0+0x0C)++0x07
|
|
line.long 0x00 "TCD22_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD22_DADDR,TCD Destination Address Register"
|
|
group.word (0x12C0+0x14)++0x1
|
|
line.word 0x00 "TCD22_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x12C0+0x16)&0x8000)==0x00))
|
|
group.word (0x12C0+0x16)++0x01
|
|
line.word 0x00 "TCD22_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x12C0+0x16)++0x01
|
|
line.word 0x00 "TCD22_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x12C0+0x18)++0x03
|
|
line.long 0x00 "TCD22_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x12C0+0x1C)&0x20)==0x20))
|
|
group.word (0x12C0+0x1C)++0x01
|
|
line.word 0x00 "TCD22_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x12C0+0x1C)++0x01
|
|
line.word 0x00 "TCD22_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x12C0+0x1E)&0x8000)==0x00))
|
|
group.word (0x12C0+0x1E)++0x01
|
|
line.word 0x00 "TCD22_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x12C0+0x1E)++0x01
|
|
line.word 0x00 "TCD22_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x12E0++0x03 "eDMA Channel 23"
|
|
line.long 0x00 "TCD23_SADDR,TCD Source Address Register"
|
|
group.word (0x12E0+0x04)++0x03
|
|
line.word 0x00 "TCD23_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD23_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x12E0+0x08)++0x03
|
|
line.long 0x00 "TCD23_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x12E0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x12E0+0x08)++0x03
|
|
line.long 0x00 "TCD23_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x12E0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x12E0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x12E0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x12E0+0x08)++0x03
|
|
line.long 0x00 "TCD23_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x12E0+0x0C)++0x07
|
|
line.long 0x00 "TCD23_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD23_DADDR,TCD Destination Address Register"
|
|
group.word (0x12E0+0x14)++0x1
|
|
line.word 0x00 "TCD23_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x12E0+0x16)&0x8000)==0x00))
|
|
group.word (0x12E0+0x16)++0x01
|
|
line.word 0x00 "TCD23_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x12E0+0x16)++0x01
|
|
line.word 0x00 "TCD23_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x12E0+0x18)++0x03
|
|
line.long 0x00 "TCD23_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x12E0+0x1C)&0x20)==0x20))
|
|
group.word (0x12E0+0x1C)++0x01
|
|
line.word 0x00 "TCD23_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x12E0+0x1C)++0x01
|
|
line.word 0x00 "TCD23_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x12E0+0x1E)&0x8000)==0x00))
|
|
group.word (0x12E0+0x1E)++0x01
|
|
line.word 0x00 "TCD23_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x12E0+0x1E)++0x01
|
|
line.word 0x00 "TCD23_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1300++0x03 "eDMA Channel 24"
|
|
line.long 0x00 "TCD24_SADDR,TCD Source Address Register"
|
|
group.word (0x1300+0x04)++0x03
|
|
line.word 0x00 "TCD24_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD24_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1300+0x08)++0x03
|
|
line.long 0x00 "TCD24_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1300+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1300+0x08)++0x03
|
|
line.long 0x00 "TCD24_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1300+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1300+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1300+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1300+0x08)++0x03
|
|
line.long 0x00 "TCD24_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1300+0x0C)++0x07
|
|
line.long 0x00 "TCD24_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD24_DADDR,TCD Destination Address Register"
|
|
group.word (0x1300+0x14)++0x1
|
|
line.word 0x00 "TCD24_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1300+0x16)&0x8000)==0x00))
|
|
group.word (0x1300+0x16)++0x01
|
|
line.word 0x00 "TCD24_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1300+0x16)++0x01
|
|
line.word 0x00 "TCD24_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1300+0x18)++0x03
|
|
line.long 0x00 "TCD24_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1300+0x1C)&0x20)==0x20))
|
|
group.word (0x1300+0x1C)++0x01
|
|
line.word 0x00 "TCD24_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1300+0x1C)++0x01
|
|
line.word 0x00 "TCD24_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1300+0x1E)&0x8000)==0x00))
|
|
group.word (0x1300+0x1E)++0x01
|
|
line.word 0x00 "TCD24_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1300+0x1E)++0x01
|
|
line.word 0x00 "TCD24_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1320++0x03 "eDMA Channel 25"
|
|
line.long 0x00 "TCD25_SADDR,TCD Source Address Register"
|
|
group.word (0x1320+0x04)++0x03
|
|
line.word 0x00 "TCD25_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD25_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1320+0x08)++0x03
|
|
line.long 0x00 "TCD25_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1320+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1320+0x08)++0x03
|
|
line.long 0x00 "TCD25_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1320+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1320+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1320+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1320+0x08)++0x03
|
|
line.long 0x00 "TCD25_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1320+0x0C)++0x07
|
|
line.long 0x00 "TCD25_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD25_DADDR,TCD Destination Address Register"
|
|
group.word (0x1320+0x14)++0x1
|
|
line.word 0x00 "TCD25_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1320+0x16)&0x8000)==0x00))
|
|
group.word (0x1320+0x16)++0x01
|
|
line.word 0x00 "TCD25_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1320+0x16)++0x01
|
|
line.word 0x00 "TCD25_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1320+0x18)++0x03
|
|
line.long 0x00 "TCD25_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1320+0x1C)&0x20)==0x20))
|
|
group.word (0x1320+0x1C)++0x01
|
|
line.word 0x00 "TCD25_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1320+0x1C)++0x01
|
|
line.word 0x00 "TCD25_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1320+0x1E)&0x8000)==0x00))
|
|
group.word (0x1320+0x1E)++0x01
|
|
line.word 0x00 "TCD25_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1320+0x1E)++0x01
|
|
line.word 0x00 "TCD25_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1340++0x03 "eDMA Channel 26"
|
|
line.long 0x00 "TCD26_SADDR,TCD Source Address Register"
|
|
group.word (0x1340+0x04)++0x03
|
|
line.word 0x00 "TCD26_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD26_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1340+0x08)++0x03
|
|
line.long 0x00 "TCD26_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1340+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1340+0x08)++0x03
|
|
line.long 0x00 "TCD26_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1340+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1340+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1340+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1340+0x08)++0x03
|
|
line.long 0x00 "TCD26_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1340+0x0C)++0x07
|
|
line.long 0x00 "TCD26_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD26_DADDR,TCD Destination Address Register"
|
|
group.word (0x1340+0x14)++0x1
|
|
line.word 0x00 "TCD26_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1340+0x16)&0x8000)==0x00))
|
|
group.word (0x1340+0x16)++0x01
|
|
line.word 0x00 "TCD26_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1340+0x16)++0x01
|
|
line.word 0x00 "TCD26_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1340+0x18)++0x03
|
|
line.long 0x00 "TCD26_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1340+0x1C)&0x20)==0x20))
|
|
group.word (0x1340+0x1C)++0x01
|
|
line.word 0x00 "TCD26_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1340+0x1C)++0x01
|
|
line.word 0x00 "TCD26_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1340+0x1E)&0x8000)==0x00))
|
|
group.word (0x1340+0x1E)++0x01
|
|
line.word 0x00 "TCD26_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1340+0x1E)++0x01
|
|
line.word 0x00 "TCD26_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1360++0x03 "eDMA Channel 27"
|
|
line.long 0x00 "TCD27_SADDR,TCD Source Address Register"
|
|
group.word (0x1360+0x04)++0x03
|
|
line.word 0x00 "TCD27_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD27_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1360+0x08)++0x03
|
|
line.long 0x00 "TCD27_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1360+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1360+0x08)++0x03
|
|
line.long 0x00 "TCD27_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1360+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1360+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1360+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1360+0x08)++0x03
|
|
line.long 0x00 "TCD27_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1360+0x0C)++0x07
|
|
line.long 0x00 "TCD27_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD27_DADDR,TCD Destination Address Register"
|
|
group.word (0x1360+0x14)++0x1
|
|
line.word 0x00 "TCD27_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1360+0x16)&0x8000)==0x00))
|
|
group.word (0x1360+0x16)++0x01
|
|
line.word 0x00 "TCD27_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1360+0x16)++0x01
|
|
line.word 0x00 "TCD27_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1360+0x18)++0x03
|
|
line.long 0x00 "TCD27_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1360+0x1C)&0x20)==0x20))
|
|
group.word (0x1360+0x1C)++0x01
|
|
line.word 0x00 "TCD27_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1360+0x1C)++0x01
|
|
line.word 0x00 "TCD27_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1360+0x1E)&0x8000)==0x00))
|
|
group.word (0x1360+0x1E)++0x01
|
|
line.word 0x00 "TCD27_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1360+0x1E)++0x01
|
|
line.word 0x00 "TCD27_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x1380++0x03 "eDMA Channel 28"
|
|
line.long 0x00 "TCD28_SADDR,TCD Source Address Register"
|
|
group.word (0x1380+0x04)++0x03
|
|
line.word 0x00 "TCD28_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD28_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x1380+0x08)++0x03
|
|
line.long 0x00 "TCD28_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1380+0x08)&0xC0000000)==0x00))
|
|
group.long (0x1380+0x08)++0x03
|
|
line.long 0x00 "TCD28_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x1380+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x1380+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x1380+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x1380+0x08)++0x03
|
|
line.long 0x00 "TCD28_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x1380+0x0C)++0x07
|
|
line.long 0x00 "TCD28_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD28_DADDR,TCD Destination Address Register"
|
|
group.word (0x1380+0x14)++0x1
|
|
line.word 0x00 "TCD28_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x1380+0x16)&0x8000)==0x00))
|
|
group.word (0x1380+0x16)++0x01
|
|
line.word 0x00 "TCD28_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x1380+0x16)++0x01
|
|
line.word 0x00 "TCD28_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x1380+0x18)++0x03
|
|
line.long 0x00 "TCD28_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x1380+0x1C)&0x20)==0x20))
|
|
group.word (0x1380+0x1C)++0x01
|
|
line.word 0x00 "TCD28_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x1380+0x1C)++0x01
|
|
line.word 0x00 "TCD28_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x1380+0x1E)&0x8000)==0x00))
|
|
group.word (0x1380+0x1E)++0x01
|
|
line.word 0x00 "TCD28_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x1380+0x1E)++0x01
|
|
line.word 0x00 "TCD28_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x13A0++0x03 "eDMA Channel 29"
|
|
line.long 0x00 "TCD29_SADDR,TCD Source Address Register"
|
|
group.word (0x13A0+0x04)++0x03
|
|
line.word 0x00 "TCD29_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD29_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x13A0+0x08)++0x03
|
|
line.long 0x00 "TCD29_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x13A0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x13A0+0x08)++0x03
|
|
line.long 0x00 "TCD29_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x13A0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x13A0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x13A0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x13A0+0x08)++0x03
|
|
line.long 0x00 "TCD29_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x13A0+0x0C)++0x07
|
|
line.long 0x00 "TCD29_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD29_DADDR,TCD Destination Address Register"
|
|
group.word (0x13A0+0x14)++0x1
|
|
line.word 0x00 "TCD29_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x13A0+0x16)&0x8000)==0x00))
|
|
group.word (0x13A0+0x16)++0x01
|
|
line.word 0x00 "TCD29_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x13A0+0x16)++0x01
|
|
line.word 0x00 "TCD29_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x13A0+0x18)++0x03
|
|
line.long 0x00 "TCD29_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x13A0+0x1C)&0x20)==0x20))
|
|
group.word (0x13A0+0x1C)++0x01
|
|
line.word 0x00 "TCD29_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x13A0+0x1C)++0x01
|
|
line.word 0x00 "TCD29_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x13A0+0x1E)&0x8000)==0x00))
|
|
group.word (0x13A0+0x1E)++0x01
|
|
line.word 0x00 "TCD29_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x13A0+0x1E)++0x01
|
|
line.word 0x00 "TCD29_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x13C0++0x03 "eDMA Channel 30"
|
|
line.long 0x00 "TCD30_SADDR,TCD Source Address Register"
|
|
group.word (0x13C0+0x04)++0x03
|
|
line.word 0x00 "TCD30_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD30_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x13C0+0x08)++0x03
|
|
line.long 0x00 "TCD30_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x13C0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x13C0+0x08)++0x03
|
|
line.long 0x00 "TCD30_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x13C0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x13C0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x13C0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x13C0+0x08)++0x03
|
|
line.long 0x00 "TCD30_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x13C0+0x0C)++0x07
|
|
line.long 0x00 "TCD30_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD30_DADDR,TCD Destination Address Register"
|
|
group.word (0x13C0+0x14)++0x1
|
|
line.word 0x00 "TCD30_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x13C0+0x16)&0x8000)==0x00))
|
|
group.word (0x13C0+0x16)++0x01
|
|
line.word 0x00 "TCD30_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x13C0+0x16)++0x01
|
|
line.word 0x00 "TCD30_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x13C0+0x18)++0x03
|
|
line.long 0x00 "TCD30_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x13C0+0x1C)&0x20)==0x20))
|
|
group.word (0x13C0+0x1C)++0x01
|
|
line.word 0x00 "TCD30_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x13C0+0x1C)++0x01
|
|
line.word 0x00 "TCD30_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x13C0+0x1E)&0x8000)==0x00))
|
|
group.word (0x13C0+0x1E)++0x01
|
|
line.word 0x00 "TCD30_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x13C0+0x1E)++0x01
|
|
line.word 0x00 "TCD30_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
group.long 0x13E0++0x03 "eDMA Channel 31"
|
|
line.long 0x00 "TCD31_SADDR,TCD Source Address Register"
|
|
group.word (0x13E0+0x04)++0x03
|
|
line.word 0x00 "TCD31_SOFF,TCD Signed Source Address Offset Register"
|
|
line.word 0x02 "TCD31_ATTR,TCD Transfer Attributes Register"
|
|
bitfld.word 0x02 11.--15. " SMOD ,Source address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,64-bit,,32-byte,?..."
|
|
else
|
|
bitfld.word 0x02 8.--10. " SSIZE ,Source data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
bitfld.word 0x02 3.--7. " DMOD ,Destination address modulo" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "Disabled,1,2,3,4,5,6,7"
|
|
else
|
|
bitfld.word 0x02 0.--2. " DSIZE ,Destination data transfer size" "8-bit,16-bit,32-bit,,16-byte,32-byte,?..."
|
|
endif
|
|
if (((per.l(ad:0x400E8000)&0x80)==0x00))
|
|
group.long (0x13E0+0x08)++0x03
|
|
line.long 0x00 "TCD31_NBYTES_MLNO,TCD Minor Byte Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " NBYTES ,Minor byte transfer count"
|
|
elif (((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x13E0+0x08)&0xC0000000)==0x00))
|
|
group.long (0x13E0+0x08)++0x03
|
|
line.long 0x00 "TCD31_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset Register(Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long 0x00 0.--29. 1. " NBYTES ,Minor byte transfer count"
|
|
elif ((((per.l(ad:0x400E8000)&0x80)==0x80))&&(((per.l(ad:0x400E8000+0x13E0+0x08)&0xC0000000)==0xC0000000)||((per.l(ad:0x400E8000+0x13E0+0x08)&0xC0000000)==0x80000000)||((per.l(ad:0x400E8000+0x13E0+0x08)&0xC0000000)==0x40000000)))
|
|
group.long (0x13E0+0x08)++0x03
|
|
line.long 0x00 "TCD31_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset Register(Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x00 31. " SMLOE ,Source minor loop offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " DMLOE ,Destination minor loop offset enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 10.--29. 0x04 " MLOFF ,Represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes"
|
|
newline
|
|
hexmask.long.word 0x00 0.--9. 1. " NBYTES ,Minor byte transfer count"
|
|
endif
|
|
group.long (0x13E0+0x0C)++0x07
|
|
line.long 0x00 "TCD31_SLAST,TCD Last Source Address Adjustment Register"
|
|
line.long 0x04 "TCD31_DADDR,TCD Destination Address Register"
|
|
group.word (0x13E0+0x14)++0x1
|
|
line.word 0x00 "TCD31_DOFF,TCD Signed Destination Address Offset Register"
|
|
if (((per.l(ad:0x400E8000+0x13E0+0x16)&0x8000)==0x00))
|
|
group.word (0x13E0+0x16)++0x01
|
|
line.word 0x00 "TCD31_CITER_ELINKNO,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " CITER ,Current major iteration count"
|
|
else
|
|
group.word (0x13E0+0x16)++0x01
|
|
line.word 0x00 "TCD31_CITER_ELINKYES,TCD Current Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enable channel-to-channel linking on minor-loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Minor loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
hexmask.word 0x00 0.--8. 1. " CITER ,Current major iteration count"
|
|
endif
|
|
group.long (0x13E0+0x18)++0x03
|
|
line.long 0x00 "TCD31_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address Register"
|
|
newline
|
|
if (((per.l(ad:0x400E8000+0x13E0+0x1C)&0x20)==0x20))
|
|
group.word (0x13E0+0x1C)++0x01
|
|
line.word 0x00 "TCD31_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 8.--11. " MAJORLINKCH ,Major loop link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
else
|
|
group.word (0x13E0+0x1C)++0x01
|
|
line.word 0x00 "TCD31_CSR,TCD Control and Status Register"
|
|
bitfld.word 0x00 14.--15. " BWC ,Bandwidth control" "No eDMA engine stalls,,Stalls for 4 cycles after each R/W,Stalls for 8 cycles after each R/W"
|
|
bitfld.word 0x00 8.--12. " MAJORLINKCH ,Major loop link channel number" "Disabled,?..."
|
|
newline
|
|
bitfld.word 0x00 7. " DONE ,eDMA has completed the major loop" "Not completed,Completed"
|
|
rbitfld.word 0x00 6. " ACTIVE ,Channel active" "Not active,Active"
|
|
newline
|
|
bitfld.word 0x00 5. " MAJORELINK ,Enable channel-to-channel linking on major loop complete" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " ESG ,Enable scatter/gather processing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 3. " DREQ ,eDMA hardware auto clear the corresponding ERQ bit when the current major iteration count reaches zero" "Not cleared,Cleared"
|
|
bitfld.word 0x00 2. " INTHALF ,Enable an interrupt when major counter is half complete" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 1. " INTMAJOR ,Enable an interrupt when major iteration count completes" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " START ,Channel start" "Not started,Started"
|
|
endif
|
|
if (((per.l(ad:0x400E8000+0x13E0+0x1E)&0x8000)==0x00))
|
|
group.word (0x13E0+0x1E)++0x01
|
|
line.word 0x00 "TCD31_BITER_ELINKNO,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
hexmask.word 0x00 0.--14. 1. " BITER ,Starting major iteration count"
|
|
else
|
|
group.word (0x13E0+0x1E)++0x01
|
|
line.word 0x00 "TCD31_BITER_ELINKYES,TCD Beginning Minor Loop Link/Major Loop Count Register"
|
|
bitfld.word 0x00 15. " ELINK ,Enables channel-to-channel linking on minor loop complete" "Disabled,Enabled"
|
|
sif !cpuis("MWCT1014S")&&!cpuis("MWCT1015S")&&!cpuis("MWCT1016S")
|
|
bitfld.word 0x00 9.--13. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.word 0x00 9.--12. " LINKCH ,Link channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
hexmask.word 0x00 0.--8. 1. " BITER ,Starting major iteration count"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "ENC (Quadrature Decoder)"
|
|
tree "ENC 1"
|
|
base ad:0x403C8000
|
|
width 8.
|
|
if (((per.w(ad:0x403C8000))&0x400)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CTRL,Control Register"
|
|
eventfld.word 0x00 15. " HIRQ ,HOME signal transition interrupt request" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 14. " HIE ,HOME interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " HIP ,Enable HOME to initialize position counters UPOS and LPOS" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 12. " HNE ,Use negative edge of HOME input" "Positive,Negative"
|
|
bitfld.word 0x00 11. " SWIP ,Software triggered initialization of position counters UPOS and LPOS" "No,Yes"
|
|
bitfld.word 0x00 10. " REV ,Enable reverse direction counting" "Normal,Reverse"
|
|
newline
|
|
bitfld.word 0x00 9. " PH1 ,Enable signal phase count mode" "Up,Down"
|
|
eventfld.word 0x00 8. " XIRQ ,INDEX pulse interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " XIE ,INDEX pulse interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 6. " XIP ,INDEX triggered initialization of position counters UPOS and LPOS" "No,Yes"
|
|
bitfld.word 0x00 5. " XNE ,Use negative edge of index pulse" "Positive,Negative"
|
|
eventfld.word 0x00 4. " DIRQ ,Watchdog timeout interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x00 3. " DIE ,Watchdog timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " WDE ,Watchdog enable" "Disabled,Enabled"
|
|
eventfld.word 0x00 1. " CMPIRQ ,Compare interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x00 0. " CMPIE ,Compare interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CTRL,Control Register"
|
|
eventfld.word 0x00 15. " HIRQ ,HOME signal transition interrupt request" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 14. " HIE ,HOME interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " HIP ,Enable HOME to initialize position counters UPOS and LPOS" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 12. " HNE ,Use negative edge of HOME input" "Positive,Negative"
|
|
bitfld.word 0x00 11. " SWIP ,Software triggered initialization of position counters UPOS and LPOS" "No,Yes"
|
|
bitfld.word 0x00 10. " REV ,Enable reverse direction counting" "Normal,Reverse"
|
|
newline
|
|
bitfld.word 0x00 9. " PH1 ,Enable signal phase count mode" "Down,Up"
|
|
eventfld.word 0x00 8. " XIRQ ,INDEX pulse interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " XIE ,INDEX pulse interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 6. " XIP ,INDEX triggered initialization of position counters UPOS and LPOS" "No,Yes"
|
|
bitfld.word 0x00 5. " XNE ,Use negative edge of INDEX pulse" "Positive,Negative"
|
|
eventfld.word 0x00 4. " DIRQ ,Watchdog timeout interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x00 3. " DIE ,Watchdog timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " WDE ,Watchdog enable" "Disabled,Enabled"
|
|
eventfld.word 0x00 1. " CMPIRQ ,Compare interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x00 0. " CMPIE ,Compare interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x02++0x05
|
|
line.word 0x00 "FILT,Input Filter Register"
|
|
bitfld.word 0x00 8.--10. " CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PER ,Input filter sample period"
|
|
line.word 0x02 "WTR,Watchdog Timeout Register"
|
|
line.word 0x04 "POSD,Position Difference Counter"
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "POSDH,Position Difference Hold Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "REV,Revolution Counter Register"
|
|
rgroup.word 0x0C++0x01
|
|
line.word 0x00 "REVH,Revolution Hold Register"
|
|
group.word 0x0E++0x03
|
|
line.word 0x00 "UPOS,Upper Position Counter Register"
|
|
line.word 0x02 "LPOS,Lower Position Counter Register"
|
|
rgroup.word 0x12++0x03
|
|
line.word 0x00 "UPOSH,Upper Position Hold Register"
|
|
line.word 0x02 "LPOSH,Lower Position Hold Register"
|
|
group.word 0x16++0x03
|
|
line.word 0x00 "UINIT,Upper Initialization Register"
|
|
line.word 0x02 "LINIT,Lower Initialization Register"
|
|
rgroup.word 0x1A++0x01
|
|
line.word 0x00 "IMR,Input Monitor Register"
|
|
bitfld.word 0x00 7. " FPHA ,This is the filtered version of PHASEA input" "0,1"
|
|
bitfld.word 0x00 6. " FPHB ,This is the filtered version of PHASEB input" "0,1"
|
|
bitfld.word 0x00 5. " FIND ,This is the filtered version of INDEX input" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. " FHOM ,This is the filtered version of HOME input" "0,1"
|
|
bitfld.word 0x00 3. " PHA ,This is the raw PHASEA input" "0,1"
|
|
bitfld.word 0x00 2. " PHB ,This is the raw PHASEB input" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. " INDEX ,This is the raw INDEX input" "0,1"
|
|
bitfld.word 0x00 0. " HOME ,This is the raw HOME input" "0,1"
|
|
group.word 0x1C++0x0B
|
|
line.word 0x00 "TST,Test Register"
|
|
bitfld.word 0x00 15. " TEN ,Test mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " TCE ,Test counter enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " QDN ,Quadrature decoder negative signal" "Positive,Negative"
|
|
newline
|
|
bitfld.word 0x00 8.--12. " TEST_PERIOD ,These bits hold the period of quadrature phase in IPBus clock cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TEST_COUNT ,These bits hold the number of quadrature advances to generate"
|
|
line.word 0x02 "CTRL2,Control 2 Register"
|
|
sif (cpu()=="MKV42F128VLL16")||(cpu()=="MKV42F256VLL16")||(cpu()=="MKV44F128VLL16")||(cpu()=="MKV44F256VLL16")||(cpu()=="MKV46F128VLL16")||(cpu()=="MKV46F256VLL16")||(cpu()=="MKV42F128VLH16")||(cpu()=="MKV42F256VLH16")||(cpu()=="MKV44F128VLH16")||(cpu()=="MKV44F256VLH16")||(cpu()=="MKV44F64VLH16")||(cpu()=="MKV46F128VLH16")||(cpu()=="MKV46F256VLH16")||(cpu()=="MKV44F128VLF16")||(cpu()=="MKV44F64VLF16")||(cpuis("MKV5*"))||cpuis("IMXRT1021")||cpuis("MKV42F64VLF16")||cpuis("MKV42F128VLF16")||cpuis("MKV42F64VLH16")||cpuis("MKV46F256VLH16*")
|
|
eventfld.word 0x02 11. " SABIRQ , Indicates that the PHASEA and PHASEB inputs changed simultaneously" "Not occurred,Occurred"
|
|
bitfld.word 0x02 10. " SABIE ,Simultaneous PHASEA and PHASEB change interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " OUTCTL ,Output control" "On match,On read"
|
|
newline
|
|
bitfld.word 0x02 8. " REVMOD ,Revolution counter modulus enable" "INDEX pulse,Roll-over/under"
|
|
eventfld.word 0x02 7. " ROIRQ ,Roll-over interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x02 6. " ROIE ,Roll-over interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
eventfld.word 0x02 5. " RUIRQ ,Roll-under interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x02 4. " RUIE ,Roll-under interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x02 3. " DIR ,Count direction flag" "Down,Up"
|
|
newline
|
|
bitfld.word 0x02 2. " MOD ,Enable modulo counting" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UPDPOS ,Update position registers" "Not cleared,Cleared"
|
|
bitfld.word 0x02 0. " UPDHLD ,Update hold registers" "Disabled,Enabled"
|
|
else
|
|
bitfld.word 0x02 9. " OUTCTL ,Output control" "On match,On read"
|
|
bitfld.word 0x02 8. " REVMOD ,Revolution counter modulus enable" "INDEX pulse,Roll-over/under"
|
|
eventfld.word 0x02 7. " ROIRQ ,Roll-over interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x02 6. " ROIE ,Roll-over interrupt enable" "Disabled,Enabled"
|
|
eventfld.word 0x02 5. " RUIRQ ,Roll-under interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x02 4. " RUIE ,Roll-under interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.word 0x02 3. " DIR ,Count direction flag" "Down,Up"
|
|
bitfld.word 0x02 2. " MOD ,Enable modulo counting" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UPDPOS ,Update position registers" "Not cleared,Cleared"
|
|
newline
|
|
bitfld.word 0x02 0. " UPDHLD ,Update hold registers" "No,Yes"
|
|
endif
|
|
line.word 0x04 "UMOD,Upper Modulus Register"
|
|
line.word 0x06 "LMOD,Lower Modulus Register"
|
|
line.word 0x08 "UCOMP,Upper Position Compare Register"
|
|
line.word 0x0A "LCOMP,Lower Position Compare Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "ENC 2"
|
|
base ad:0x403CC000
|
|
width 8.
|
|
if (((per.w(ad:0x403CC000))&0x400)==0x00)
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CTRL,Control Register"
|
|
eventfld.word 0x00 15. " HIRQ ,HOME signal transition interrupt request" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 14. " HIE ,HOME interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " HIP ,Enable HOME to initialize position counters UPOS and LPOS" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 12. " HNE ,Use negative edge of HOME input" "Positive,Negative"
|
|
bitfld.word 0x00 11. " SWIP ,Software triggered initialization of position counters UPOS and LPOS" "No,Yes"
|
|
bitfld.word 0x00 10. " REV ,Enable reverse direction counting" "Normal,Reverse"
|
|
newline
|
|
bitfld.word 0x00 9. " PH1 ,Enable signal phase count mode" "Up,Down"
|
|
eventfld.word 0x00 8. " XIRQ ,INDEX pulse interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " XIE ,INDEX pulse interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 6. " XIP ,INDEX triggered initialization of position counters UPOS and LPOS" "No,Yes"
|
|
bitfld.word 0x00 5. " XNE ,Use negative edge of index pulse" "Positive,Negative"
|
|
eventfld.word 0x00 4. " DIRQ ,Watchdog timeout interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x00 3. " DIE ,Watchdog timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " WDE ,Watchdog enable" "Disabled,Enabled"
|
|
eventfld.word 0x00 1. " CMPIRQ ,Compare interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x00 0. " CMPIE ,Compare interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "CTRL,Control Register"
|
|
eventfld.word 0x00 15. " HIRQ ,HOME signal transition interrupt request" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 14. " HIE ,HOME interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " HIP ,Enable HOME to initialize position counters UPOS and LPOS" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 12. " HNE ,Use negative edge of HOME input" "Positive,Negative"
|
|
bitfld.word 0x00 11. " SWIP ,Software triggered initialization of position counters UPOS and LPOS" "No,Yes"
|
|
bitfld.word 0x00 10. " REV ,Enable reverse direction counting" "Normal,Reverse"
|
|
newline
|
|
bitfld.word 0x00 9. " PH1 ,Enable signal phase count mode" "Down,Up"
|
|
eventfld.word 0x00 8. " XIRQ ,INDEX pulse interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " XIE ,INDEX pulse interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x00 6. " XIP ,INDEX triggered initialization of position counters UPOS and LPOS" "No,Yes"
|
|
bitfld.word 0x00 5. " XNE ,Use negative edge of INDEX pulse" "Positive,Negative"
|
|
eventfld.word 0x00 4. " DIRQ ,Watchdog timeout interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x00 3. " DIE ,Watchdog timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " WDE ,Watchdog enable" "Disabled,Enabled"
|
|
eventfld.word 0x00 1. " CMPIRQ ,Compare interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x00 0. " CMPIE ,Compare interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x02++0x05
|
|
line.word 0x00 "FILT,Input Filter Register"
|
|
bitfld.word 0x00 8.--10. " CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PER ,Input filter sample period"
|
|
line.word 0x02 "WTR,Watchdog Timeout Register"
|
|
line.word 0x04 "POSD,Position Difference Counter"
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "POSDH,Position Difference Hold Register"
|
|
group.word 0x0A++0x01
|
|
line.word 0x00 "REV,Revolution Counter Register"
|
|
rgroup.word 0x0C++0x01
|
|
line.word 0x00 "REVH,Revolution Hold Register"
|
|
group.word 0x0E++0x03
|
|
line.word 0x00 "UPOS,Upper Position Counter Register"
|
|
line.word 0x02 "LPOS,Lower Position Counter Register"
|
|
rgroup.word 0x12++0x03
|
|
line.word 0x00 "UPOSH,Upper Position Hold Register"
|
|
line.word 0x02 "LPOSH,Lower Position Hold Register"
|
|
group.word 0x16++0x03
|
|
line.word 0x00 "UINIT,Upper Initialization Register"
|
|
line.word 0x02 "LINIT,Lower Initialization Register"
|
|
rgroup.word 0x1A++0x01
|
|
line.word 0x00 "IMR,Input Monitor Register"
|
|
bitfld.word 0x00 7. " FPHA ,This is the filtered version of PHASEA input" "0,1"
|
|
bitfld.word 0x00 6. " FPHB ,This is the filtered version of PHASEB input" "0,1"
|
|
bitfld.word 0x00 5. " FIND ,This is the filtered version of INDEX input" "0,1"
|
|
newline
|
|
bitfld.word 0x00 4. " FHOM ,This is the filtered version of HOME input" "0,1"
|
|
bitfld.word 0x00 3. " PHA ,This is the raw PHASEA input" "0,1"
|
|
bitfld.word 0x00 2. " PHB ,This is the raw PHASEB input" "0,1"
|
|
newline
|
|
bitfld.word 0x00 1. " INDEX ,This is the raw INDEX input" "0,1"
|
|
bitfld.word 0x00 0. " HOME ,This is the raw HOME input" "0,1"
|
|
group.word 0x1C++0x0B
|
|
line.word 0x00 "TST,Test Register"
|
|
bitfld.word 0x00 15. " TEN ,Test mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " TCE ,Test counter enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " QDN ,Quadrature decoder negative signal" "Positive,Negative"
|
|
newline
|
|
bitfld.word 0x00 8.--12. " TEST_PERIOD ,These bits hold the period of quadrature phase in IPBus clock cycles" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TEST_COUNT ,These bits hold the number of quadrature advances to generate"
|
|
line.word 0x02 "CTRL2,Control 2 Register"
|
|
sif (cpu()=="MKV42F128VLL16")||(cpu()=="MKV42F256VLL16")||(cpu()=="MKV44F128VLL16")||(cpu()=="MKV44F256VLL16")||(cpu()=="MKV46F128VLL16")||(cpu()=="MKV46F256VLL16")||(cpu()=="MKV42F128VLH16")||(cpu()=="MKV42F256VLH16")||(cpu()=="MKV44F128VLH16")||(cpu()=="MKV44F256VLH16")||(cpu()=="MKV44F64VLH16")||(cpu()=="MKV46F128VLH16")||(cpu()=="MKV46F256VLH16")||(cpu()=="MKV44F128VLF16")||(cpu()=="MKV44F64VLF16")||(cpuis("MKV5*"))||cpuis("IMXRT1021")||cpuis("MKV42F64VLF16")||cpuis("MKV42F128VLF16")||cpuis("MKV42F64VLH16")||cpuis("MKV46F256VLH16*")
|
|
eventfld.word 0x02 11. " SABIRQ , Indicates that the PHASEA and PHASEB inputs changed simultaneously" "Not occurred,Occurred"
|
|
bitfld.word 0x02 10. " SABIE ,Simultaneous PHASEA and PHASEB change interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 9. " OUTCTL ,Output control" "On match,On read"
|
|
newline
|
|
bitfld.word 0x02 8. " REVMOD ,Revolution counter modulus enable" "INDEX pulse,Roll-over/under"
|
|
eventfld.word 0x02 7. " ROIRQ ,Roll-over interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x02 6. " ROIE ,Roll-over interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
eventfld.word 0x02 5. " RUIRQ ,Roll-under interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x02 4. " RUIE ,Roll-under interrupt enable" "Disabled,Enabled"
|
|
rbitfld.word 0x02 3. " DIR ,Count direction flag" "Down,Up"
|
|
newline
|
|
bitfld.word 0x02 2. " MOD ,Enable modulo counting" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UPDPOS ,Update position registers" "Not cleared,Cleared"
|
|
bitfld.word 0x02 0. " UPDHLD ,Update hold registers" "Disabled,Enabled"
|
|
else
|
|
bitfld.word 0x02 9. " OUTCTL ,Output control" "On match,On read"
|
|
bitfld.word 0x02 8. " REVMOD ,Revolution counter modulus enable" "INDEX pulse,Roll-over/under"
|
|
eventfld.word 0x02 7. " ROIRQ ,Roll-over interrupt request" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.word 0x02 6. " ROIE ,Roll-over interrupt enable" "Disabled,Enabled"
|
|
eventfld.word 0x02 5. " RUIRQ ,Roll-under interrupt request" "Not occurred,Occurred"
|
|
bitfld.word 0x02 4. " RUIE ,Roll-under interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.word 0x02 3. " DIR ,Count direction flag" "Down,Up"
|
|
bitfld.word 0x02 2. " MOD ,Enable modulo counting" "Disabled,Enabled"
|
|
bitfld.word 0x02 1. " UPDPOS ,Update position registers" "Not cleared,Cleared"
|
|
newline
|
|
bitfld.word 0x02 0. " UPDHLD ,Update hold registers" "No,Yes"
|
|
endif
|
|
line.word 0x04 "UMOD,Upper Modulus Register"
|
|
line.word 0x06 "LMOD,Lower Modulus Register"
|
|
line.word 0x08 "UCOMP,Upper Position Compare Register"
|
|
line.word 0x0A "LCOMP,Lower Position Compare Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "ENET (10/100-Mbps Ethernet MAC)"
|
|
base ad:0x402D8000
|
|
width 32.
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "EIR,Interrupt Event Register"
|
|
eventfld.long 0x00 30. " BABR ,Babbling receive error" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. " BABT ,Babbling transmit error" "Disabled,Enabled"
|
|
eventfld.long 0x00 28. " GRA ,Graceful stop complete" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 27. " TXF ,Transmit frame interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. " TXB ,Transmit buffer interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 25. " RXF ,Receive frame interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 24. " RXB ,Receive buffer interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. " MII ,MII interrupt" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. " EBERR ,Ethernet bus error" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 21. " LC ,Late collision" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. " RL ,Collision retry limit" "Disabled,Enabled"
|
|
eventfld.long 0x00 19. " UN ,Transmit FIFO underrun" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 18. " PLR ,Payload receive error" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. " WAKEUP ,Node wakeup request indication" "Disabled,Enabled"
|
|
eventfld.long 0x00 16. " TS_AVAIL ,Transmit timestamp available" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 15. " TS_TIMER ,Timestamp timer" "Disabled,Enabled"
|
|
line.long 0x04 "EIMR,Interrupt Mask Register"
|
|
bitfld.long 0x04 30. " BABR ,BABR interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 29. " BABT ,BABT interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 28. " GRA ,GRA interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 27. " TXF ,TXF interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 26. " TXB ,TXB interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 25. " RXF ,RXF interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " RXB ,RXB interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 23. " MII ,MII interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 22. " EBERR ,EBERR interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 21. " LC ,LC interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 20. " RL ,RL interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 19. " UN ,UN interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 18. " PLR ,PLR interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 17. " WAKEUP ,WAKEUP interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 16. " TS_AVAIL ,TS_AVAIL interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " TS_TIMER ,TS_TIMER interrupt mask" "Masked,Not masked"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "RDAR,Receive Descriptor Active Register"
|
|
bitfld.long 0x00 24. " RDAR ,Receive descriptor active" "Masked,Not masked"
|
|
line.long 0x04 "TDAR,Transmit Descriptor Active Register"
|
|
bitfld.long 0x04 24. " TDAR ,Transmit descriptor active" "Masked,Not masked"
|
|
if (((per.l(ad:0x402D8000+0x24)&0x08)==0x08))
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ECR,Ethernet Control Register"
|
|
bitfld.long 0x00 8. " DBSWP ,Descriptor byte swapping enable" "Support big-endian devices,Support little-endian devices"
|
|
bitfld.long 0x00 6. " DBGEN ,Debug enable" "Debug mode,Hardware freeze mode"
|
|
bitfld.long 0x00 4. " EN1588 ,EN1588 enable" "Legacy FEC buffer,Enhanced frame time-stamping"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLEEP ,Sleep mode enable" "Normal operating,Sleep"
|
|
bitfld.long 0x00 2. " MAGICEN ,Magic packet detection enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " ETHEREN ,Ethernet enable" "Reception stops,MAC is enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RESET ,Ethernet MAC reset" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "ECR,Ethernet Control Register"
|
|
bitfld.long 0x00 8. " DBSWP ,Descriptor byte swapping enable" "Support big-endian devices,Support little-endian devices"
|
|
bitfld.long 0x00 6. " DBGEN ,Debug enable" "Debug mode,Hardware freeze mode"
|
|
bitfld.long 0x00 4. " EN1588 ,EN1588 enable" "Legacy FEC buffer,Enhanced frame time-stamping"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLEEP ,Sleep mode enable" "Normal operating,Sleep"
|
|
bitfld.long 0x00 1. " ETHEREN ,Ethernet enable" "Reception stops,MAC is enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RESET ,Ethernet MAC reset" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MMFR,MII Management Frame Register"
|
|
bitfld.long 0x00 30.--31. " ST ,Start of frame delimiter" "Extended MDIO,1,2,3"
|
|
bitfld.long 0x00 28.--29. " OP ,Operation code" "Address write,Write operation,Read inc operation,Read operation"
|
|
bitfld.long 0x00 23.--27. " PA ,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 18.--22. " RA ,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--17. " TA ,Turn around" "0,1,2,3"
|
|
hexmask.long.word 0x00 0.--15. 1. " DATA ,Management frame data"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "MSCR,MII Speed Control Register"
|
|
bitfld.long 0x00 8.--10. " HOLDTIME ,Hold time on MDIO output" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
bitfld.long 0x00 7. " DIS_PRE ,Disable preamble" "Enabled,Not prepended"
|
|
bitfld.long 0x00 1.--6. " MII_SPEED ,MII speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "MIBC,MIB Control Register"
|
|
bitfld.long 0x00 31. " MIB_DIS ,Disable MIB logic" "No,Yes"
|
|
bitfld.long 0x00 30. " MIB_IDLE ,MIB idle" "Updating,Not updating"
|
|
bitfld.long 0x00 29. " MIB_CLEAR ,MIB clear" "Not self-clearing,Reset to 0"
|
|
if (((per.l(ad:0x402D8000+0x84)&0x1000)==0x00))
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "RCR,Receive Control Register"
|
|
rbitfld.long 0x00 31. " GRS ,Graceful receive stopped" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NLC ,Payload length check disable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 16.--29. 1. " MAX_FL ,Maximum frame length"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CFEN ,MAC control frame enable" "MAC control frames accepted,MAC control frames discarded"
|
|
bitfld.long 0x00 14. " CRCFWD ,MAC control frame enable" "Transmitted to the application,Stripped from the frame"
|
|
bitfld.long 0x00 13. " PAUFWD ,Terminate/forward pause frames" "Terminated in the MAC,Forwarded to the application"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PADEN ,Enable frame padding remove on receive" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RMII_10T ,Enables 10-Mbit/s mode of the RMII" "100-Mbit/s,10-Mbit/s"
|
|
bitfld.long 0x00 8. " RMII_MODE ,RMII mode enable" "MII mode,RMII operation"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FCE ,Flow control enable" "MII mode,RMII operation"
|
|
bitfld.long 0x00 4. " BC_REJ ,Broadcast frame reject" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PROM ,Promiscuous mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MII_MODE ,Media independent interface mode" ",MII or RMII"
|
|
bitfld.long 0x00 1. " DRT ,Disable receive on transmit" "Receive,Transmit"
|
|
bitfld.long 0x00 0. " LOOP ,Internal loopback" "Disabled,Enabled"
|
|
else
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "RCR,Receive Control Register"
|
|
rbitfld.long 0x00 31. " GRS ,Graceful receive stopped" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " NLC ,Payload length check disable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 16.--29. 1. " MAX_FL ,Maximum frame length"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CFEN ,MAC control frame enable" "MAC control frames accepted,MAC control frames discarded"
|
|
bitfld.long 0x00 13. " PAUFWD ,Terminate/forward pause frames" "Terminated in the MAC,Forwarded to the application"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PADEN ,Enable frame padding remove on receive" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RMII_10T ,Enables 10-Mbit/s mode of the RMII" "100-Mbit/s,10-Mbit/s"
|
|
bitfld.long 0x00 8. " RMII_MODE ,RMII mode enable" "MII mode,RMII operation"
|
|
textline " "
|
|
bitfld.long 0x00 5. " FCE ,Flow control enable" "MII mode,RMII operation"
|
|
bitfld.long 0x00 4. " BC_REJ ,Broadcast frame reject" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PROM ,Promiscuous mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MII_MODE ,Media independent interface mode" ",MII or RMII"
|
|
bitfld.long 0x00 1. " DRT ,Disable receive on transmit" "Receive,Transmit"
|
|
bitfld.long 0x00 0. " LOOP ,Internal loopback" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l(ad:0x402D8000+0x24)&0x02)==0x00))
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "TCR,Transmit Control Register"
|
|
bitfld.long 0x00 9. " CRCFWD ,Forward frame from application with CRC" "Has a CRC,Not append any CRC"
|
|
bitfld.long 0x00 8. " ADDINS ,Set MAC address on transmit" "Not modified,Modified"
|
|
bitfld.long 0x00 5.--7. " ADDSEL ,Source MAC address select on transmit" "PADDR1/2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFC_PAUSE ,Receive frame control pause" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TFC_PAUSE ,Transmit frame control pause" "No PAUSE,PAUSE"
|
|
bitfld.long 0x00 2. " FDEN ,Full-Duplex enable" "No PAUSE,PAUSE"
|
|
textline " "
|
|
bitfld.long 0x00 0. " GTS ,Graceful transmit stop" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "TCR,Transmit Control Register"
|
|
bitfld.long 0x00 9. " CRCFWD ,Forward frame from application with CRC" "Has a CRC,Not append any CRC"
|
|
bitfld.long 0x00 8. " ADDINS ,Set MAC address on transmit" "Not modified,Modified"
|
|
bitfld.long 0x00 5.--7. " ADDSEL ,Source MAC address select on transmit" "PADDR1/2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFC_PAUSE ,Receive frame control pause" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TFC_PAUSE ,Transmit frame control pause" "No PAUSE,PAUSE"
|
|
rbitfld.long 0x00 2. " FDEN ,Full-Duplex enable" "No PAUSE,PAUSE"
|
|
textline " "
|
|
bitfld.long 0x00 0. " GTS ,Graceful transmit stop" "Disabled,Enabled"
|
|
endif
|
|
group.long 0xE4++0x0F
|
|
line.long 0x00 "PALR,Physical Address Lower Register"
|
|
line.long 0x04 "PAUR,Physical Address Upper Register"
|
|
hexmask.long.word 0x04 16.--31. 0x1 " PADDR2 ,PADDR2"
|
|
hexmask.long.word 0x04 0.--15. 1. " TYPE ,Type field in PAUSE frames"
|
|
line.long 0x08 "OPD,Opcode/pause Duration Register OPD"
|
|
hexmask.long.word 0x08 16.--31. 1. " OPCODE ,Opcode field in PAUSE frames"
|
|
hexmask.long.word 0x08 0.--15. 1. " PAUSE_DUR ,Pause duration"
|
|
line.long 0x0C "TXIC,Transmit Interrupt Coalescing Register"
|
|
bitfld.long 0x0C 31. " ICEN ,Interrupt coalescing enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " ICCS ,Interrupt coalescing timer clock source select" "MII/GMII TX,ENET system"
|
|
hexmask.long.byte 0x0C 20.--27. 1. " ICFT ,Interrupt coalescing frame count threshold"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--15. 1. " ICTT ,Interrupt coalescing timer threshold"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "RXIC,Receive Interrupt Coalescing Register"
|
|
bitfld.long 0x00 31. " ICEN ,Interrupt coalescing enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " ICCS ,Interrupt coalescing timer clock source select" "MII/GMII TX,ENET system"
|
|
hexmask.long.byte 0x00 20.--27. 1. " ICFT ,Interrupt coalescing frame count threshold"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " ICTT ,Interrupt coalescing timer threshold"
|
|
group.long 0x118++0x0F
|
|
line.long 0x00 "IAUR,Descriptor Individual Upper Address Register"
|
|
line.long 0x04 "IALR,Descriptor Individual Lower Address Register"
|
|
line.long 0x08 "GAUR,Descriptor Group Upper Address Register"
|
|
line.long 0x0C "GALR,Descriptor Group Lower Address Register"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "TFWR,Transmit FIFO Watermark Register"
|
|
bitfld.long 0x00 8. " STRFWD ,Store and forward enable" "Reset,Enabled"
|
|
sif cpuis("IMXRT106*")
|
|
bitfld.long 0x00 0.--5. " TFWR ,Transmit FIFO Write" "TFWR_0,TFWR_1,TFWR_2,TFWR_3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,TFWR_31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
bitfld.long 0x00 0.--5. " STRFWD ,Store and forward enable" "64 bytes,64 bytes,128 bytes,192 bytes,256 bytes,320 bytes,384 bytes,448 bytes,512 bytes,576 bytes,640 bytes,704 bytes,768 bytes,832 bytes,896 bytes,960 bytes,1024 bytes,1088 bytes,1152 bytes,1216 bytes,1280 bytes,1344 bytes,1408 bytes,1472 bytes,1536 bytes,1600 bytes,1664 bytes,1728 bytes,1792 bytes,1856 bytes,1920 bytes,1984 bytes,?..."
|
|
endif
|
|
group.long 0x180++0x0B
|
|
line.long 0x00 "RDSR,Receive Descriptor Ring Start Register"
|
|
hexmask.long 0x00 3.--31. 1. " R_DES_START ,Pointer to the beginning of the receive buffer descriptor queue"
|
|
line.long 0x04 "TDSR,Transmit Buffer Descriptor Ring Start Register"
|
|
hexmask.long 0x04 3.--31. 1. " X_DES_START ,Pointer to the beginning of the transmit buffer descriptor queue"
|
|
line.long 0x08 "MRBR,Maximum Receive Buffer Size Register"
|
|
hexmask.long.word 0x08 4.--13. 1. " R_BUF_SIZE ,Receive buffer size in bytes"
|
|
group.long 0x190++0x23
|
|
line.long 0x00 "RSFL,Receive FIFO Section Full Threshold"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RX_SECTION_FULL ,Value of receive FIFO section full threshold"
|
|
line.long 0x04 "RSEM,Receive FIFO Section Empty Threshold"
|
|
bitfld.long 0x04 16.--20. " STAT_SECTION_EMPTY ,RX status FIFO section empty threshold" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RX_SECTION_EMPTY ,Value of the receive FIFO section empty threshold"
|
|
line.long 0x08 "RAEM,Receive FIFO Almost Empty Threshold"
|
|
hexmask.long.byte 0x08 0.--7. 1. " RX_ALMOST_EMPTY ,Value of the receive FIFO almost empty threshold"
|
|
line.long 0x0C "RAFL,Receive FIFO Almost Full Threshold"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " RX_ALMOST_FULL ,Value of the receive FIFO almost full threshold"
|
|
line.long 0x10 "TSEM,Transmit FIFO Section Empty Threshold"
|
|
hexmask.long.byte 0x10 0.--7. 1. " TX_SECTION_EMPTY ,Value of the transmit FIFO section empty threshold"
|
|
line.long 0x14 "TAEM,Transmit FIFO Almost Empty Threshold"
|
|
hexmask.long.byte 0x14 0.--7. 1. " TX_ALMOST_EMPTY ,Value of transmit FIFO almost empty threshold"
|
|
line.long 0x18 "TAFL,Transmit FIFO Almost Full Threshold"
|
|
hexmask.long.byte 0x18 0.--7. 1. " TX_ALMOST_FULL ,Value of the transmit FIFO almost full threshold"
|
|
line.long 0x1C "TIPG,Transmit Inter-Packet Gap"
|
|
bitfld.long 0x1C 0.--4. " IPG ,Transmit Inter-Packet gap" "IPG is 12,IPG is 12,IPG is 12,IPG is 12,IPG is 12,IPG is 12,IPG is 12,IPG is 8,IPG is 9,IPG is 10,IPG is 11,IPG is 12,IPG is 13,IPG is 14,IPG is 15,IPG is 16,IPG is 17,IPG is 18,IPG is 19,IPG is 20,IPG is 21,IPG is 22,IPG is 23,IPG is 24,IPG is 25,IPG is 26,IPG is 12,IPG is 12,IPG is 12,IPG is 12,IPG is 12,IPG is 12"
|
|
line.long 0x20 "FTRL,Frame Truncation Length"
|
|
hexmask.long.word 0x20 0.--13. 1. " TRUNC_FL ,Frame truncation length"
|
|
group.long 0x1C0++0x07
|
|
line.long 0x00 "TACC,Transmit Accelerator Function Configuration"
|
|
bitfld.long 0x00 4. " PROCHK ,Enables insertion of protocol checksum" "Not inserted,Inserted"
|
|
bitfld.long 0x00 3. " IPCHK ,Enables insertion of IP header checksum" "Not inserted,Inserted"
|
|
bitfld.long 0x00 0. " SHIFT16 ,TX FIFO Shift-16" "Disabled,Enabled"
|
|
line.long 0x04 "RACC,Receive Accelerator Function Configuration"
|
|
bitfld.long 0x04 7. " SHIFT16 ,RX FIFO Shift-16" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " LINEDIS ,Enable discard of frames with MAC layer errors" "Not discarded,Discarded"
|
|
bitfld.long 0x04 2. " PRODIS ,Enable discard of frames with wrong protocol checksum" "Not discarded,Discarded"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IPDIS ,Enable discard of frames with wrong ipv4 header checksum" "Not discarded,Discarded"
|
|
bitfld.long 0x04 0. " PADREM ,Enable padding removal for short IP frames" "Not removed,Removed"
|
|
group.long 0x204++0x3F
|
|
line.long 0x00 "RMON_T_PACKETS,Tx Packet Count Statistic Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TXPKTS ,Packet count"
|
|
line.long 0x04 "RMON_T_BC_PKT,Tx Broadcast Packets Statistic Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TXPKTS ,Broadcast packets"
|
|
line.long 0x08 "RMON_T_MC_PKT,Tx Multicast Packets Statistic Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " TXPKTS ,Multicast packets"
|
|
line.long 0x0C "RMON_T_CRC_ALIGN,Tx Packets With Crc/align Error Statistic Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " TXPKTS ,Packets with crc/align error"
|
|
line.long 0x10 "RMON_T_UNDERSIZE,Tx Packets Less Than Bytes And Good CRC Statistic Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " TXPKTS ,Number of transmit packets less than 64 bytes with good CRC"
|
|
line.long 0x14 "RMON_T_OVERSIZE,Tx Packets GT MAX_FL Bytes And Good CRC Statistic Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " TXPKTS ,Number of transmit packets greater than MAX_FL bytes with good CRC"
|
|
line.long 0x18 "RMON_T_FRAG,Tx Packets Less Than 64 Bytes And Bad CRC Statistic Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " TXPKTS ,Number of packets less than 64 bytes with bad CRC"
|
|
line.long 0x1C "RMON_T_JAB,Tx Packets Greater Than MAX_FL Bytes And Bad CRC Statistic Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. " TXPKTS ,Number of transmit packets greater than MAX_FL bytes and bad CRC"
|
|
line.long 0x20 "RMON_T_COL,Tx Collision Count Statistic Register"
|
|
hexmask.long.word 0x20 0.--15. 1. " TXPKTS ,Number of transmit collisions"
|
|
line.long 0x24 "RMON_T_P64,Tx 64-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " TXPKTS ,Number of 64-byte transmit packets"
|
|
line.long 0x28 "RMON_T_P65TO127,Tx 65- To 127-byte Packets Statistic Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " TXPKTS ,Number of 65- to 127-byte transmit packets"
|
|
line.long 0x2C "RMON_T_P128TO255,Tx 128- To 255-byte Packets Statistic Register"
|
|
hexmask.long.word 0x2C 0.--15. 1. " TXPKTS ,Number of 128- to 255-byte transmit packets"
|
|
line.long 0x30 "RMON_T_P256TO511,Tx 256- To 511-byte Packets Statistic Register"
|
|
hexmask.long.word 0x30 0.--15. 1. " TXPKTS ,Number of 256- to 511-byte transmit packets"
|
|
line.long 0x34 "RMON_T_P512TO1023,Tx 512- To 1023-byte Packets Statistic Register"
|
|
hexmask.long.word 0x34 0.--15. 1. " TXPKTS ,Number of 512- to 1023-byte transmit packets"
|
|
line.long 0x38 "RMON_T_P1024TO2047,Tx 1024- To 2047-byte Packets Statistic Register"
|
|
hexmask.long.word 0x38 0.--15. 1. " TXPKTS ,Number of 1024- to 2047-byte transmit packets"
|
|
line.long 0x3C "RMON_T_P_GTE2048,Tx Packets Greater Than 2048 Bytes Statistic Register"
|
|
hexmask.long.word 0x3C 0.--15. 1. " TXPKTS ,Number of transmit packets greater than 2048 bytes"
|
|
rgroup.long 0x244++0x07
|
|
line.long 0x00 "RMON_T_OCTETS,Tx Octets Statistic Register"
|
|
rgroup.long 0x24C++0x1F
|
|
line.long 0x00 "IEEE_T_FRAME_OK,Frames Transmitted OK Statistic Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Number of frames transmitted OK"
|
|
line.long 0x04 "IEEE_T_1COL,Frames Transmitted With Single Collision Statistic Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " COUNT ,Number of frames transmitted with one collision"
|
|
line.long 0x08 "IEEE_T_MCOL,Frames Transmitted With Multiple Collisions Statistic Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " COUNT ,Number of frames transmitted with multiple collisions"
|
|
line.long 0x0C "IEEE_T_DEF,Frames Transmitted After Deferral Delay Statistic Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " COUNT ,Number of frames transmitted with deferral delay"
|
|
line.long 0x10 "IEEE_T_LCOL,Frames Transmitted With Late Collision Statistic Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Number of frames transmitted with late collision"
|
|
line.long 0x14 "IEEE_T_EXCOL,Frames Transmitted With Excessive Collisions Statistic Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Number of frames transmitted with excessive collisions"
|
|
line.long 0x18 "IEEE_T_MACERR,Frames Transmitted With Tx FIFO Underrun Statistic Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Number of frames transmitted with transmit FIFO underrun"
|
|
line.long 0x1C "IEEE_T_CSERR,Frames Transmitted With Carrier Sense Error Statistic Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. " COUNT ,Number of frames transmitted with carrier sense error"
|
|
rgroup.long 0x270++0x07
|
|
line.long 0x00 "IEEE_T_FDXFC,Flow Control Pause Frames Transmitted Statistic Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Number of flow-control pause frames transmitted"
|
|
line.long 0x04 "IEEE_T_OCTETS_OK,Octet Count For Frames Transmitted W/o Error Statistic Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " COUNT ,Octet count for frames transmitted without error"
|
|
rgroup.long 0x284++0x1F
|
|
line.long 0x00 "RMON_R_PACKETS,Rx Packet Count Statistic Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Number of packets received"
|
|
line.long 0x04 "RMON_R_BC_PKT,Rx Broadcast Packets Statistic Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " COUNT ,Number of receive broadcast packets"
|
|
line.long 0x08 "RMON_R_MC_PKT,Rx Multicast Packets Statistic Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " COUNT ,Number of receive multicast packets"
|
|
line.long 0x0C "RMON_R_CRC_ALIGN,Rx Packets With Crc/align Error Statistic Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " COUNT ,Number of receive packets with CRC or align error"
|
|
line.long 0x10 "RMON_R_UNDERSIZE,Rx Packets With Less Than 64 Bytes And Good CRC Statistic Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Number of receive packets with less than 64 bytes and good CRC"
|
|
line.long 0x14 "RMON_R_OVERSIZE,Rx Packets Greater Than MAX_FL And Good CRC Statistic Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Number of receive packets greater than MAX_FL and good CRC"
|
|
line.long 0x18 "RMON_R_FRAG,Rx Packets Less Than 64 Bytes And Bad CRC Statistic Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Number of receive packets with less than 64 bytes and bad CRC"
|
|
line.long 0x1C "RMON_R_JAB,Rx Packets Greater Than MAX_FL Bytes And Bad CRC Statistic Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. " COUNT ,Number of receive packets greater than MAX_FL and bad CRC"
|
|
rgroup.long 0x2A8++0x3B
|
|
line.long 0x00 "RMON_R_P64,Rx 64-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Number of 64-byte receive packets"
|
|
line.long 0x04 "RMON_R_P65TO127,Rx 65- To 127-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " COUNT ,Number of 65- to 127-byte receive packets"
|
|
line.long 0x08 "RMON_R_P128TO255,Rx 128- To 255-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " COUNT ,Number of 128- to 255-byte receive packets"
|
|
line.long 0x0C "RMON_R_P256TO511,Rx 256- To 511-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " COUNT ,Number of 256- to 511-byte receive packets"
|
|
line.long 0x10 "RMON_R_P512TO1023,Rx 512- To 1023-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Number of 512- to 1023-byte receive packets"
|
|
line.long 0x14 "RMON_R_P1024TO2047,Rx 1024- To 2047-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Number of 1024- to 2047-byte receive packets"
|
|
line.long 0x18 "RMON_R_P_GTE2048,Rx Packets Greater Than 2048 Bytes Statistic Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Number of greater-than-2048-byte receive packets"
|
|
line.long 0x1C "RMON_R_OCTETS,Rx Octets Statistic Register"
|
|
line.long 0x20 "IEEE_R_DROP,Frames Not Counted Correctly Statistic Register"
|
|
hexmask.long.word 0x20 0.--15. 1. " COUNT ,Frame count"
|
|
line.long 0x24 "IEEE_R_FRAME_OK,Frames Received OK Statistic Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " COUNT ,Number of frames received OK"
|
|
line.long 0x28 "IEEE_R_CRC,Frames Received With CRC Error Statistic Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " COUNT ,Number of frames received with CRC error"
|
|
line.long 0x2C "IEEE_R_ALIGN,Frames Received With Alignment Error Statistic Register"
|
|
hexmask.long.word 0x2C 0.--15. 1. " COUNT ,Number of frames received with alignment error"
|
|
line.long 0x30 "IEEE_R_MACERR,Receive FIFO Overflow Count Statistic Register"
|
|
hexmask.long.word 0x30 0.--15. 1. " COUNT ,Receive FIFO overflow count"
|
|
line.long 0x34 "IEEE_R_FDXFC,Flow Control Pause Frames Received Statistic Register"
|
|
hexmask.long.word 0x34 0.--15. 1. " COUNT ,Number of flow-control pause frames received"
|
|
line.long 0x38 "IEEE_R_OCTETS_OK,Octet Count For Frames Received Without Error Statistic Register"
|
|
group.long 0x400++0x17
|
|
line.long 0x00 "ATCR,Adjustable Timer Control Register"
|
|
bitfld.long 0x00 13. " SLAVE ,Enable timer slave mode" "Active,Disabled"
|
|
bitfld.long 0x00 11. " CAPTURE ,Capture timer value" "No effect,Captured"
|
|
bitfld.long 0x00 9. " RESTART ,Reset timer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PINPER ,Enables event signal output assertion on period event" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PEREN ,Enable periodical event" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OFFRST ,Reset timer on offset event" "Timer is not affected,Timer resets to zero"
|
|
textline " "
|
|
bitfld.long 0x00 2. " OFFEN ,Enable One-Shot offset event" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Enable timer" "Stops,Starts"
|
|
line.long 0x04 "ATVR,Timer Value Register"
|
|
line.long 0x08 "ATOFF,Timer Offset Register"
|
|
line.long 0x0C "ATPER,Timer Period Register"
|
|
line.long 0x10 "ATCOR,Timer Correction Register"
|
|
hexmask.long 0x10 0.--30. 1. " COR ,Correction counter Wrap-Around value"
|
|
line.long 0x14 "ATINC,Time-Stamping Clock Period Register"
|
|
hexmask.long.byte 0x14 8.--14. 1. " INC_CORR ,Correction increment value"
|
|
hexmask.long.byte 0x14 0.--6. 1. " INC ,Clock period of the timestamping clock in nanoseconds"
|
|
rgroup.long 0x418++0x03
|
|
line.long 0x00 "ATSTMP,Timestamp Of Last Transmitted Frame"
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "TGSR,Timer Global Status Register"
|
|
eventfld.long 0x00 3. " TF3 ,Copy of timer flag for channel 3" "Clear,Set"
|
|
eventfld.long 0x00 2. " TF2 ,Copy of timer flag for channel 2" "Clear,Set"
|
|
eventfld.long 0x00 1. " TF1 ,Copy of timer flag for channel 1" "Clear,Set"
|
|
textline " "
|
|
eventfld.long 0x00 0. " TF0 ,Copy of timer flag for channel 0" "Clear,Set"
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "TCSR0,Timer Control Status Register"
|
|
bitfld.long 0x00 11.--15. " TPWC ,Timer pulsewidth control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 7. " TF ,Timer flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " TMODE ,Timer mode" "Disabled,Rising edge,Falling edge,Both edges,Software only,Toggle output on compare,Clear output on compare,Set output on compare,,Clear output on compare,Set output on compare,,Pulse output low,Pulse output high,?..."
|
|
bitfld.long 0x00 0. " TDRE ,Timer DMA request enable" "Disabled,Enabled"
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "TCSR1,Timer Control Status Register"
|
|
bitfld.long 0x00 11.--15. " TPWC ,Timer pulsewidth control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 7. " TF ,Timer flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " TMODE ,Timer mode" "Disabled,Rising edge,Falling edge,Both edges,Software only,Toggle output on compare,Clear output on compare,Set output on compare,,Clear output on compare,Set output on compare,,Pulse output low,Pulse output high,?..."
|
|
bitfld.long 0x00 0. " TDRE ,Timer DMA request enable" "Disabled,Enabled"
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "TCSR2,Timer Control Status Register"
|
|
bitfld.long 0x00 11.--15. " TPWC ,Timer pulsewidth control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 7. " TF ,Timer flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " TMODE ,Timer mode" "Disabled,Rising edge,Falling edge,Both edges,Software only,Toggle output on compare,Clear output on compare,Set output on compare,,Clear output on compare,Set output on compare,,Pulse output low,Pulse output high,?..."
|
|
bitfld.long 0x00 0. " TDRE ,Timer DMA request enable" "Disabled,Enabled"
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "TCSR3,Timer Control Status Register"
|
|
bitfld.long 0x00 11.--15. " TPWC ,Timer pulsewidth control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 7. " TF ,Timer flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--5. " TMODE ,Timer mode" "Disabled,Rising edge,Falling edge,Both edges,Software only,Toggle output on compare,Clear output on compare,Set output on compare,,Clear output on compare,Set output on compare,,Pulse output low,Pulse output high,?..."
|
|
bitfld.long 0x00 0. " TDRE ,Timer DMA request enable" "Disabled,Enabled"
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "TCCR0,Timer Compare Capture Register"
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "TCCR1,Timer Compare Capture Register"
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "TCCR2,Timer Compare Capture Register"
|
|
group.long 0x624++0x03
|
|
line.long 0x00 "TCCR3,Timer Compare Capture Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "EWM (External Watchdog Monitor)"
|
|
base ad:0x400B4000
|
|
width 14.
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "CTRL,Control Register"
|
|
bitfld.byte 0x00 3. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " INEN ,Input enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " ASSIN ,EWM_in's assertion state select" "0,1"
|
|
bitfld.byte 0x00 0. " EWMEN ,EWM enable" "Disabled,Enabled"
|
|
wgroup.byte 0x01++0x00
|
|
line.byte 0x00 "SERV,Service Register"
|
|
group.byte 0x02++0x03
|
|
line.byte 0x00 "CMPL,Compare Low Register"
|
|
line.byte 0x01 "CMPH,Compare High Register"
|
|
line.byte 0x02 "CLKCTRL,Clock Control Register"
|
|
bitfld.byte 0x02 0.--1. " CLKSEL ,Low power clock sources for EWM counter select" "lpo_clk[0],lpo_clk[1],lpo_clk[2],lpo_clk[3]"
|
|
line.byte 0x03 "CLKPRESCALER,Clock Prescaler Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "FLEXCAN (Flexible Controller Area Network)"
|
|
tree "FLEXCAN 1"
|
|
base ad:0x401D0000
|
|
width 10.
|
|
if (((per.l(ad:0x401D0000)&0x40000000)==0x40000000))
|
|
if (((per.l(ad:0x401D0000))&0x100000)==0x100000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,Module Configuration Register"
|
|
bitfld.long 0x00 31. " MDIS ,FLEXCAN enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FRZ ,Freeze mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " RFEN ,Rx FIFO feature enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " HALT ,FLEXCAN freeze mode request" "Not requested,Requested"
|
|
rbitfld.long 0x00 27. " NOTRDY ,FLEXCAN mode status" "Disabled/Stopped/Frozen,Normal/Listen-only/Loop-back"
|
|
bitfld.long 0x00 26. " WAKMSK ,Wake up interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SOFTRST ,Software reset" "No reset,Reset"
|
|
rbitfld.long 0x00 24. " FRZACK ,FLEXCAN in freeze mode and prescaler stopped" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SUPV ,FLEXCAN registers in supervisor or user mode" "User,Supervisor"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " SLFWAK ,Self wake up feature when FLEXCAN in stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WRNEN ,Enable generation of the TWRN_INT and RWRN_INT flags in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " LPMACK ,FLEXCAN in disable mode or stop mode" "Low power,Disabled/Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WAKSRC ,Integrated low-pass filter is applied to protect the FLEXCAN_RX input from spurious wake up" "Not applied,Applied"
|
|
bitfld.long 0x00 17. " SRXDIS ,FlexCAN allowed to receive frames transmitted by itself" "Not allowed,Allowed"
|
|
bitfld.long 0x00 16. " IRMQ ,Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " LPRIOEN ,Local priority enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " AEN ,Tx abort feature enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " IDAM ,Format of the elements of the Rx FIFO filter table" "A,B,C,D"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " MAXMB ,Number of the last message buffers that will take part in the matching and arbitration processes"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,Module Configuration Register"
|
|
bitfld.long 0x00 31. " MDIS ,FLEXCAN enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FRZ ,Freeze mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " RFEN ,Rx FIFO feature enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " HALT ,FLEXCAN freeze mode request" "Not requested,Requested"
|
|
rbitfld.long 0x00 27. " NOTRDY ,FLEXCAN mode status" "Disabled/Stopped/Frozen,Normal/Listen-only/Loop-back"
|
|
bitfld.long 0x00 26. " WAKMSK ,Wake up interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SOFTRST ,Software reset" "No reset,Reset"
|
|
rbitfld.long 0x00 24. " FRZACK ,FLEXCAN in freeze mode and prescaler stopped" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SUPV ,FLEXCAN registers in supervisor or user mode" "User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SLFWAK ,Self wake up feature when FLEXCAN in stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WRNEN ,Enable generation of the TWRN_INT and RWRN_INT flags in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " LPMACK ,FLEXCAN in disable mode or stop mode" "Low power,Disabled/Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WAKSRC ,Integrated low-pass filter is applied to protect the FLEXCAN_RX input from spurious wake up" "Not applied,Applied"
|
|
bitfld.long 0x00 17. " SRXDIS ,FlexCAN allowed to receive frames transmitted by itself" "Not allowed,Allowed"
|
|
bitfld.long 0x00 16. " IRMQ ,Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " LPRIOEN ,Local priority enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " AEN ,Tx abort feature enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " IDAM ,Format of the elements of the Rx FIFO filter table" "A,B,C,D"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " MAXMB ,Number of the last message buffers that will take part in the matching and arbitration processes"
|
|
endif
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,Module Configuration Register"
|
|
bitfld.long 0x00 31. " MDIS ,FLEXCAN enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FRZ ,Freeze mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " RFEN ,Rx FIFO feature enabled" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 27. " NOTRDY ,FLEXCAN mode status" "Disabled/Stopped/Frozen,Normal/Listen-only/Loop-back"
|
|
bitfld.long 0x00 26. " WAKMSK ,Wake up interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SOFTRST ,Software reset" "No reset,Reset"
|
|
rbitfld.long 0x00 24. " FRZACK ,FLEXCAN in freeze mode and prescaler stopped" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " SUPV ,FLEXCAN registers in supervisor or user mode" "User,Supervisor"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " SLFWAK ,Self wake up feature when FLEXCAN in stop mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " WRNEN ,Enable generation of the TWRN_INT and RWRN_INT flags in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " LPMACK ,FLEXCAN in disable mode or stop mode" "Low power,Disabled/Stopped"
|
|
textline " "
|
|
rbitfld.long 0x00 19. " WAKSRC ,Integrated low-pass filter is applied to protect the FLEXCAN_RX input from spurious wake up" "Not applied,Applied"
|
|
rbitfld.long 0x00 17. " SRXDIS ,FlexCAN allowed to receive frames transmitted by itself" "Not allowed,Allowed"
|
|
rbitfld.long 0x00 16. " IRMQ ,Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " LPRIOEN ,Local priority enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " AEN ,Tx abort feature enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8.--9. " IDAM ,Format of the elements of the Rx FIFO filter table" "A,B,C,D"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " MAXMB ,Number of the last message buffers that will take part in the matching and arbitration processes"
|
|
endif
|
|
if (((per.l((ad:0x401D0000))&0x40200000)==0x40200000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Ratio between the PE clock frequency and the serial clock (Sclock) frequency"
|
|
bitfld.long 0x00 22.--23. " RJW ,Maximum number of time quanta one time quantum is equal to the Sclock period" "1,2,3,4"
|
|
bitfld.long 0x00 19.--21. " PSEG1 ,Length of phase buffer segment 1 in the bit time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " PSEG2 ,Length of phase buffer segment 2 in the bit time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 15. " BOFFMSK ,Mask for the bus off interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERRMSK ,Mask for the error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " LPB ,FlexCAN to operate in loop-back mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TWRNMSK ,Mask for the Tx warning interrupt associated with the TWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RWRNMSK ,Rx warning interrupt associated with the RWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMP ,Sampling mode of CAN bits at the FLEXCAN_RX" "One sample,Three samples"
|
|
bitfld.long 0x00 6. " BOFFREC ,FLEXCAN recovers from bus off state" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TSYN ,Timer sync feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LBUF ,Ordering mechanism for message buffer transmission" "Lowest first,Highest first"
|
|
bitfld.long 0x00 3. " LOM ,FLEXCAN to operate in listen only mode" "Deactivated,Activated"
|
|
bitfld.long 0x00 0.--2. " PROPSEG ,This 3-bit field defines the length of the Propagation Segment in the bit time" "1,2,3,4,5,6,7,8"
|
|
elif (((per.l((ad:0x401D0000))&0x40200000)==0x40000000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Ratio between the PE clock frequency and the serial clock (Sclock) frequency"
|
|
bitfld.long 0x00 22.--23. " RJW ,Maximum number of time quanta one time quantum is equal to the Sclock period" "1,2,3,4"
|
|
bitfld.long 0x00 19.--21. " PSEG1 ,Length of phase buffer segment 1 in the bit time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " PSEG2 ,Length of phase buffer segment 2 in the bit time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 15. " BOFFMSK ,Mask for the bus off interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERRMSK ,Mask for the error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " LPB ,FlexCAN to operate in loop-back mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " TWRNMSK ,Mask for the Tx warning interrupt associated with the TWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " RWRNMSK ,Rx warning interrupt associated with the RWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMP ,Sampling mode of CAN bits at the FLEXCAN_RX" "One sample,Three samples"
|
|
bitfld.long 0x00 6. " BOFFREC ,FLEXCAN recovers from bus off state" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TSYN ,Timer sync feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LBUF ,Ordering mechanism for message buffer transmission" "Lowest first,Highest first"
|
|
bitfld.long 0x00 3. " LOM ,FLEXCAN to operate in listen only mode" "Deactivated,Activated"
|
|
bitfld.long 0x00 0.--2. " PROPSEG ,This 3-bit field defines the length of the Propagation Segment in the bit time" "1,2,3,4,5,6,7,8"
|
|
elif (((per.l((ad:0x401D0000))&0x40200000)==0x200000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Ratio between the PE clock frequency and the serial clock (Sclock) frequency"
|
|
rbitfld.long 0x00 22.--23. " RJW ,Maximum number of time quanta one time quantum is equal to the Sclock period" "1,2,3,4"
|
|
rbitfld.long 0x00 19.--21. " PSEG1 ,Length of phase buffer segment 1 in the bit time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " PSEG2 ,Length of phase buffer segment 2 in the bit time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 15. " BOFFMSK ,Mask for the bus off interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERRMSK ,Mask for the error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " LPB ,FlexCAN to operate in loop-back mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TWRNMSK ,Mask for the Tx warning interrupt associated with the TWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RWRNMSK ,Rx warning interrupt associated with the RWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SMP ,Sampling mode of CAN bits at the FLEXCAN_RX" "One sample,Three samples"
|
|
bitfld.long 0x00 6. " BOFFREC ,FLEXCAN recovers from bus off state" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " TSYN ,Timer sync feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LBUF ,Ordering mechanism for message buffer transmission" "Lowest first,Highest first"
|
|
rbitfld.long 0x00 3. " LOM ,FLEXCAN to operate in listen only mode" "Deactivated,Activated"
|
|
rbitfld.long 0x00 0.--2. " PROPSEG ,This 3-bit field defines the length of the Propagation Segment in the bit time" "1,2,3,4,5,6,7,8"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Ratio between the PE clock frequency and the serial clock (Sclock) frequency"
|
|
rbitfld.long 0x00 22.--23. " RJW ,Maximum number of time quanta one time quantum is equal to the Sclock period" "1,2,3,4"
|
|
rbitfld.long 0x00 19.--21. " PSEG1 ,Length of phase buffer segment 1 in the bit time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " PSEG2 ,Length of phase buffer segment 2 in the bit time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 15. " BOFFMSK ,Mask for the bus off interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERRMSK ,Mask for the error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " LPB ,FlexCAN to operate in loop-back mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " TWRNMSK ,Mask for the Tx warning interrupt associated with the TWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " RWRNMSK ,Rx warning interrupt associated with the RWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SMP ,Sampling mode of CAN bits at the FLEXCAN_RX" "One sample,Three samples"
|
|
bitfld.long 0x00 6. " BOFFREC ,FLEXCAN recovers from bus off state" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " TSYN ,Timer sync feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LBUF ,Ordering mechanism for message buffer transmission" "Lowest first,Highest first"
|
|
rbitfld.long 0x00 3. " LOM ,FLEXCAN to operate in listen only mode" "Deactivated,Activated"
|
|
rbitfld.long 0x00 0.--2. " PROPSEG ,This 3-bit field defines the length of the Propagation Segment in the bit time" "1,2,3,4,5,6,7,8"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TIMER,Free Running Timer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMER ,TIMER"
|
|
textline " "
|
|
if (((per.l((ad:0x401D0000))&0x40000000)==0x40000000))
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mask the mailbox filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the mailbox filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the mailbox filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the mailbox filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mask the mailbox filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the mailbox filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the mailbox filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the mailbox filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mask the mailbox filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the mailbox filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the mailbox filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the mailbox filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mask the mailbox filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the mailbox filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the mailbox filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the mailbox filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mask the mailbox filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the mailbox filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the mailbox filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the mailbox filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mask the mailbox filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the mailbox filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the mailbox filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the mailbox filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mask the mailbox filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the mailbox filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the mailbox filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the mailbox filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mask the mailbox filter bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ID[28] ,Mask mailbox 14 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x04 27. " [27] ,Mask mailbox 14 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [26] ,Mask mailbox 14 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [25] ,Mask mailbox 14 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [24] ,Mask mailbox 14 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x04 23. " [23] ,Mask mailbox 14 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [22] ,Mask mailbox 14 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [21] ,Mask mailbox 14 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " [20] ,Mask mailbox 14 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " [19] ,Mask mailbox 14 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [18] ,Mask mailbox 14 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [17] ,Mask mailbox 14 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [16] ,Mask mailbox 14 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " [15] ,Mask mailbox 14 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [14] ,Mask mailbox 14 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [13] ,Mask mailbox 14 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " [12] ,Mask mailbox 14 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " [11] ,Mask mailbox 14 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [10] ,Mask mailbox 14 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [9] ,Mask mailbox 14 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " [8] ,Mask mailbox 14 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " [7] ,Mask mailbox 14 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [6] ,Mask mailbox 14 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [5] ,Mask mailbox 14 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " [4] ,Mask mailbox 14 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " [3] ,Mask mailbox 14 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [2] ,Mask mailbox 14 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [1] ,Mask mailbox 14 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " [0] ,Mask mailbox 14 filter bit 0" "Not masked,Masked"
|
|
line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ID[28] ,Mask mailbox 15 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " [27] ,Mask mailbox 15 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [26] ,Mask mailbox 15 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [25] ,Mask mailbox 15 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Mask mailbox 15 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x08 23. " [23] ,Mask mailbox 15 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [22] ,Mask mailbox 15 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [21] ,Mask mailbox 15 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 20. " [20] ,Mask mailbox 15 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " [19] ,Mask mailbox 15 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [18] ,Mask mailbox 15 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [17] ,Mask mailbox 15 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [16] ,Mask mailbox 15 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " [15] ,Mask mailbox 15 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [14] ,Mask mailbox 15 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [13] ,Mask mailbox 15 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " [12] ,Mask mailbox 15 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " [11] ,Mask mailbox 15 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [10] ,Mask mailbox 15 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [9] ,Mask mailbox 15 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " [8] ,Mask mailbox 15 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " [7] ,Mask mailbox 15 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [6] ,Mask mailbox 15 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [5] ,Mask mailbox 15 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " [4] ,Mask mailbox 15 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " [3] ,Mask mailbox 15 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [2] ,Mask mailbox 15 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [1] ,Mask mailbox 15 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " [0] ,Mask mailbox 15 filter bit 0" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the mailbox filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the mailbox filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mask the mailbox filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the mailbox filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the mailbox filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the mailbox filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mask the mailbox filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the mailbox filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the mailbox filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the mailbox filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mask the mailbox filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the mailbox filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the mailbox filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the mailbox filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mask the mailbox filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the mailbox filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the mailbox filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the mailbox filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mask the mailbox filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the mailbox filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the mailbox filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the mailbox filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mask the mailbox filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the mailbox filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the mailbox filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the mailbox filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mask the mailbox filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the mailbox filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the mailbox filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the mailbox filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mask the mailbox filter bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
bitfld.long 0x04 31. " RTR[31] ,Mask mailbox 14 filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " IDE[30] ,Mask mailbox 14 filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ID[28] ,Mask mailbox 14 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x04 27. " [27] ,Mask mailbox 14 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [26] ,Mask mailbox 14 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [25] ,Mask mailbox 14 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [24] ,Mask mailbox 14 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x04 23. " [23] ,Mask mailbox 14 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [22] ,Mask mailbox 14 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [21] ,Mask mailbox 14 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " [20] ,Mask mailbox 14 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " [19] ,Mask mailbox 14 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [18] ,Mask mailbox 14 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [17] ,Mask mailbox 14 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [16] ,Mask mailbox 14 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " [15] ,Mask mailbox 14 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [14] ,Mask mailbox 14 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [13] ,Mask mailbox 14 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " [12] ,Mask mailbox 14 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " [11] ,Mask mailbox 14 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [10] ,Mask mailbox 14 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [9] ,Mask mailbox 14 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " [8] ,Mask mailbox 14 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " [7] ,Mask mailbox 14 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [6] ,Mask mailbox 14 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [5] ,Mask mailbox 14 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " [4] ,Mask mailbox 14 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " [3] ,Mask mailbox 14 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [2] ,Mask mailbox 14 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [1] ,Mask mailbox 14 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " [0] ,Mask mailbox 14 filter bit 0" "Not masked,Masked"
|
|
line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
bitfld.long 0x08 31. " RTR[31] ,Mask mailbox 15 filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x08 30. " IDE[30] ,Mask mailbox 15 filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ID[28] ,Mask mailbox 15 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " [27] ,Mask mailbox 15 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [26] ,Mask mailbox 15 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [25] ,Mask mailbox 15 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Mask mailbox 15 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x08 23. " [23] ,Mask mailbox 15 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [22] ,Mask mailbox 15 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [21] ,Mask mailbox 15 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 20. " [20] ,Mask mailbox 15 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " [19] ,Mask mailbox 15 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [18] ,Mask mailbox 15 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [17] ,Mask mailbox 15 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [16] ,Mask mailbox 15 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " [15] ,Mask mailbox 15 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [14] ,Mask mailbox 15 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [13] ,Mask mailbox 15 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " [12] ,Mask mailbox 15 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " [11] ,Mask mailbox 15 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [10] ,Mask mailbox 15 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [9] ,Mask mailbox 15 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " [8] ,Mask mailbox 15 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " [7] ,Mask mailbox 15 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [6] ,Mask mailbox 15 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [5] ,Mask mailbox 15 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " [4] ,Mask mailbox 15 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " [3] ,Mask mailbox 15 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [2] ,Mask mailbox 15 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [1] ,Mask mailbox 15 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " [0] ,Mask mailbox 15 filter bit 0" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
rgroup.long 0x10++0x0B
|
|
line.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mask the mailbox filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the mailbox filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the mailbox filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the mailbox filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mask the mailbox filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the mailbox filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the mailbox filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the mailbox filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mask the mailbox filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the mailbox filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the mailbox filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the mailbox filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mask the mailbox filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the mailbox filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the mailbox filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the mailbox filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mask the mailbox filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the mailbox filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the mailbox filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the mailbox filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mask the mailbox filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the mailbox filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the mailbox filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the mailbox filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mask the mailbox filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the mailbox filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the mailbox filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the mailbox filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mask the mailbox filter bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ID[28] ,Mask mailbox 14 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x04 27. " [27] ,Mask mailbox 14 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [26] ,Mask mailbox 14 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [25] ,Mask mailbox 14 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [24] ,Mask mailbox 14 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x04 23. " [23] ,Mask mailbox 14 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [22] ,Mask mailbox 14 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [21] ,Mask mailbox 14 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " [20] ,Mask mailbox 14 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " [19] ,Mask mailbox 14 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [18] ,Mask mailbox 14 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [17] ,Mask mailbox 14 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [16] ,Mask mailbox 14 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " [15] ,Mask mailbox 14 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [14] ,Mask mailbox 14 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [13] ,Mask mailbox 14 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " [12] ,Mask mailbox 14 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " [11] ,Mask mailbox 14 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [10] ,Mask mailbox 14 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [9] ,Mask mailbox 14 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " [8] ,Mask mailbox 14 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " [7] ,Mask mailbox 14 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [6] ,Mask mailbox 14 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [5] ,Mask mailbox 14 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " [4] ,Mask mailbox 14 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " [3] ,Mask mailbox 14 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [2] ,Mask mailbox 14 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [1] ,Mask mailbox 14 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " [0] ,Mask mailbox 14 filter bit 0" "Not masked,Masked"
|
|
line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ID[28] ,Mask mailbox 15 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " [27] ,Mask mailbox 15 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [26] ,Mask mailbox 15 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [25] ,Mask mailbox 15 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Mask mailbox 15 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x08 23. " [23] ,Mask mailbox 15 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [22] ,Mask mailbox 15 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [21] ,Mask mailbox 15 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 20. " [20] ,Mask mailbox 15 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " [19] ,Mask mailbox 15 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [18] ,Mask mailbox 15 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [17] ,Mask mailbox 15 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [16] ,Mask mailbox 15 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " [15] ,Mask mailbox 15 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [14] ,Mask mailbox 15 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [13] ,Mask mailbox 15 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " [12] ,Mask mailbox 15 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " [11] ,Mask mailbox 15 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [10] ,Mask mailbox 15 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [9] ,Mask mailbox 15 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " [8] ,Mask mailbox 15 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " [7] ,Mask mailbox 15 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [6] ,Mask mailbox 15 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [5] ,Mask mailbox 15 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " [4] ,Mask mailbox 15 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " [3] ,Mask mailbox 15 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [2] ,Mask mailbox 15 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [1] ,Mask mailbox 15 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " [0] ,Mask mailbox 15 filter bit 0" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
rgroup.long 0x10++0x0B
|
|
line.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the mailbox filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the mailbox filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mask the mailbox filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the mailbox filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the mailbox filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the mailbox filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mask the mailbox filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the mailbox filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the mailbox filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the mailbox filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mask the mailbox filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the mailbox filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the mailbox filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the mailbox filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mask the mailbox filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the mailbox filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the mailbox filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the mailbox filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mask the mailbox filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the mailbox filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the mailbox filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the mailbox filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mask the mailbox filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the mailbox filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the mailbox filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the mailbox filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mask the mailbox filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the mailbox filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the mailbox filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the mailbox filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mask the mailbox filter bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
bitfld.long 0x04 31. " RTR[31] ,Mask mailbox 14 filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " IDE[30] ,Mask mailbox 14 filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ID[28] ,Mask mailbox 14 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x04 27. " [27] ,Mask mailbox 14 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [26] ,Mask mailbox 14 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [25] ,Mask mailbox 14 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [24] ,Mask mailbox 14 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x04 23. " [23] ,Mask mailbox 14 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [22] ,Mask mailbox 14 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [21] ,Mask mailbox 14 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " [20] ,Mask mailbox 14 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " [19] ,Mask mailbox 14 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [18] ,Mask mailbox 14 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [17] ,Mask mailbox 14 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [16] ,Mask mailbox 14 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " [15] ,Mask mailbox 14 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [14] ,Mask mailbox 14 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [13] ,Mask mailbox 14 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " [12] ,Mask mailbox 14 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " [11] ,Mask mailbox 14 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [10] ,Mask mailbox 14 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [9] ,Mask mailbox 14 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " [8] ,Mask mailbox 14 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " [7] ,Mask mailbox 14 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [6] ,Mask mailbox 14 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [5] ,Mask mailbox 14 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " [4] ,Mask mailbox 14 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " [3] ,Mask mailbox 14 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [2] ,Mask mailbox 14 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [1] ,Mask mailbox 14 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " [0] ,Mask mailbox 14 filter bit 0" "Not masked,Masked"
|
|
line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
bitfld.long 0x08 31. " RTR[31] ,Mask mailbox 15 filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x08 30. " IDE[30] ,Mask mailbox 15 filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ID[28] ,Mask mailbox 15 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " [27] ,Mask mailbox 15 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [26] ,Mask mailbox 15 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [25] ,Mask mailbox 15 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Mask mailbox 15 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x08 23. " [23] ,Mask mailbox 15 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [22] ,Mask mailbox 15 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [21] ,Mask mailbox 15 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 20. " [20] ,Mask mailbox 15 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " [19] ,Mask mailbox 15 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [18] ,Mask mailbox 15 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [17] ,Mask mailbox 15 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [16] ,Mask mailbox 15 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " [15] ,Mask mailbox 15 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [14] ,Mask mailbox 15 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [13] ,Mask mailbox 15 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " [12] ,Mask mailbox 15 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " [11] ,Mask mailbox 15 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [10] ,Mask mailbox 15 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [9] ,Mask mailbox 15 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " [8] ,Mask mailbox 15 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " [7] ,Mask mailbox 15 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [6] ,Mask mailbox 15 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [5] ,Mask mailbox 15 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " [4] ,Mask mailbox 15 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " [3] ,Mask mailbox 15 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [2] ,Mask mailbox 15 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [1] ,Mask mailbox 15 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " [0] ,Mask mailbox 15 filter bit 0" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
group.long 0x1C++0x17
|
|
line.long 0x00 "ECR,Error Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RX_ERR_COUNTER ,Rx_Err_Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TX_ERR_COUNTER ,Tx_Err_Counter"
|
|
line.long 0x04 "ESR1,Error and Status 1 Register"
|
|
rbitfld.long 0x04 18. " SYNCH ,FlexCAN is synchronized to the CAN bus and able to participate in the communication process" "Not synchronized,Synchronized"
|
|
bitfld.long 0x04 17. " TWRNINT ,Tx error counter reached 96" "Not occurred,Occurred"
|
|
bitfld.long 0x04 16. " RWRNINT ,Rx error counters reached 96" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x04 15. " BIT1ERR ,Inconsistency occurs between the transmitted and the received bit in a message" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 14. " BIT0ERR ,Inconsistency occurs between the transmitted and the received bit in a message" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 13. " ACKERR ,Acknowledge error has been detected by the transmitter node" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x04 12. " CRCERR ,CRC error has been detected by the receiver node" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 11. " FRMERR ,Form error has been detected by the receiver node" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 10. " STFERR ,Stuffing error has been detected" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x04 9. " TXWRN ,Repetitive errors are occurring during message transmission" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 8. " RXWRN ,Repetitive errors are occurring during message reception" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 7. " IDLE ,CAN bus is in IDLE state" "Not idle,Idle"
|
|
textline " "
|
|
rbitfld.long 0x04 6. " TX ,FLEXCAN transmitting a message" "Receiving,Transmitting"
|
|
rbitfld.long 0x04 4.--5. " FLTCONF ,Confinement state of the FLEXCAN module" "Error active,Error passive,Bus off,Bus off"
|
|
rbitfld.long 0x04 3. " RX ,This bit indicates if FlexCAN is receiving a message" "Receiving,Transmitting"
|
|
textline " "
|
|
eventfld.long 0x04 2. " BOFFINT ,FLEXCAN entered bus off state" "Not entered,Entered"
|
|
eventfld.long 0x04 1. " ERRINT ,At least one of the error bits is set" "Not occurred,Occurred"
|
|
eventfld.long 0x04 0. " WAKINT ,In stop mode recessive to dominant transition is detected on the CAN bus" "Not occurred,Occurred"
|
|
textline " "
|
|
line.long 0x08 "IMASK2,Interrupt Masks 2 Register"
|
|
bitfld.long 0x08 31. " BUFHM[63] ,FLEXCAN message buffer MB63 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " [62] ,FLEXCAN message buffer MB62 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " [61] ,FLEXCAN message buffer MB61 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 28. " [60] ,FLEXCAN message buffer MB60 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 27. " [59] ,FLEXCAN message buffer MB59 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 26. " [58] ,FLEXCAN message buffer MB58 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 25. " [57] ,FLEXCAN message buffer MB57 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " [56] ,FLEXCAN message buffer MB56 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 22. " [54] ,FLEXCAN message buffer MB54 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 23. " [55] ,FLEXCAN message buffer MB55 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 21. " [53] ,FLEXCAN message buffer MB53 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " [52] ,FLEXCAN message buffer MB52 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 19. " [51] ,FLEXCAN message buffer MB51 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 18. " [50] ,FLEXCAN message buffer MB50 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " [49] ,FLEXCAN message buffer MB49 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 16. " [48] ,FLEXCAN message buffer MB48 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 15. " [47] ,FLEXCAN message buffer MB47 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " [46] ,FLEXCAN message buffer MB46 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 13. " [45] ,FLEXCAN message buffer MB45 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 12. " [44] ,FLEXCAN message buffer MB44 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 11. " [43] ,FLEXCAN message buffer MB43 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " [42] ,FLEXCAN message buffer MB42 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 9. " [41] ,FLEXCAN message buffer MB41 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " [40] ,FLEXCAN message buffer MB40 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 7. " [39] ,FLEXCAN message buffer MB39 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 6. " [38] ,FLEXCAN message buffer MB38 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " [37] ,FLEXCAN message buffer MB37 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 4. " [36] ,FLEXCAN message buffer MB36 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 3. " [35] ,FLEXCAN message buffer MB35 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 2. " [34] ,FLEXCAN message buffer MB34 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 1. " [33] ,FLEXCAN message buffer MB33 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 0. " [32] ,FLEXCAN message buffer MB32 interrupt" "No interrupt,Interrupt"
|
|
line.long 0x0C "IMASK1,Interrupt Masks 1 Register"
|
|
bitfld.long 0x0C 31. " BUFHM[31] ,FLEXCAN message buffer MB31 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 30. " [30] ,FLEXCAN message buffer MB30 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 29. " [29] ,FLEXCAN message buffer MB29 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 28. " [28] ,FLEXCAN message buffer MB28 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " [27] ,FLEXCAN message buffer MB27 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 26. " [26] ,FLEXCAN message buffer MB26 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 25. " [25] ,FLEXCAN message buffer MB25 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 24. " [24] ,FLEXCAN message buffer MB24 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " [23] ,FLEXCAN message buffer MB23 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 22. " [22] ,FLEXCAN message buffer MB22 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 21. " [21] ,FLEXCAN message buffer MB21 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 20. " [20] ,FLEXCAN message buffer MB20 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " [19] ,FLEXCAN message buffer MB19 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 18. " [18] ,FLEXCAN message buffer MB18 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 17. " [17] ,FLEXCAN message buffer MB17 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 16. " [16] ,FLEXCAN message buffer MB16 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " [15] ,FLEXCAN message buffer MB15 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 14. " [14] ,FLEXCAN message buffer MB14 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 13. " [13] ,FLEXCAN message buffer MB13 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 12. " [12] ,FLEXCAN message buffer MB12 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " [11] ,FLEXCAN message buffer MB11 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 10. " [10] ,FLEXCAN message buffer MB10 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 9. " [9] ,FLEXCAN message buffer MB9 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 8. " [8] ,FLEXCAN message buffer MB8 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " [7] ,FLEXCAN message buffer MB7 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 6. " [6] ,FLEXCAN message buffer MB6 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 5. " [5] ,FLEXCAN message buffer MB5 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 4. " [4] ,FLEXCAN message buffer MB4 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " [3] ,FLEXCAN message buffer MB3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 2. " [2] ,FLEXCAN message buffer MB2 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 1. " [1] ,FLEXCAN message buffer MB1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 0. " [0] ,FLEXCAN message buffer MB0 interrupt" "No interrupt,Interrupt"
|
|
line.long 0x10 "IFLAG2,Interrupt Flags 2 Register"
|
|
bitfld.long 0x10 31. " BUFHI[63] ,FLEXCAN message buffer MB63 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 30. " [62] ,FLEXCAN message buffer MB62 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 29. " [61] ,FLEXCAN message buffer MB61 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 28. " [60] ,FLEXCAN message buffer MB60 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 27. " [59] ,FLEXCAN message buffer MB59 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 26. " [58] ,FLEXCAN message buffer MB58 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 25. " [57] ,FLEXCAN message buffer MB57 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 24. " [56] ,FLEXCAN message buffer MB56 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 23. " [55] ,FLEXCAN message buffer MB55 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 22. " [54] ,FLEXCAN message buffer MB54 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 21. " [53] ,FLEXCAN message buffer MB53 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 20. " [52] ,FLEXCAN message buffer MB52 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 19. " [51] ,FLEXCAN message buffer MB51 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 18. " [50] ,FLEXCAN message buffer MB50 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 17. " [49] ,FLEXCAN message buffer MB49 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 16. " [48] ,FLEXCAN message buffer MB48 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 15. " [47] ,FLEXCAN message buffer MB47 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 14. " [46] ,FLEXCAN message buffer MB46 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 13. " [45] ,FLEXCAN message buffer MB45 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 12. " [44] ,FLEXCAN message buffer MB44 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 11. " [43] ,FLEXCAN message buffer MB43 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 10. " [42] ,FLEXCAN message buffer MB42 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 9. " [41] ,FLEXCAN message buffer MB41 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 8. " [40] ,FLEXCAN message buffer MB40 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 7. " [39] ,FLEXCAN message buffer MB39 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 6. " [38] ,FLEXCAN message buffer MB38 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 5. " [37] ,FLEXCAN message buffer MB37 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 4. " [36] ,FLEXCAN message buffer MB36 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 3. " [35] ,FLEXCAN message buffer MB35 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 2. " [34] ,FLEXCAN message buffer MB34 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 1. " [33] ,FLEXCAN message buffer MB33 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 0. " [32] ,FLEXCAN message buffer MB32 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
line.long 0x14 "IFLAG1,Interrupt Flags 1 Register"
|
|
bitfld.long 0x14 31. " BUF[31] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 30. " [30] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 29. " [29] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 28. " [28] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 27. " [27] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 26. " [26] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 25. " [25] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 24. " [24] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 23. " [23] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 22. " [22] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 21. " [21] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 20. " [20] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 19. " [19] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 18. " [18] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 17. " [17] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 16. " [16] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 15. " [15] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 14. " [14] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 13. " [13] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 12. " [12] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 11. " [11] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 10. " [10] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 9. " [9] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 8. " [8] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 7. " BUF7I ,MB7 completed transmission/reception or FIFO overflow" "Not occurred,Occurred"
|
|
bitfld.long 0x14 6. " BUF6I ,MB6 completed transmission/reception or FIFO almost full" "Not occurred,Occurred"
|
|
bitfld.long 0x14 5. " BUF5I ,MB5 completed transmission/reception or frames available in the FIFO" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 4. " BUF[4] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
bitfld.long 0x14 3. " [3] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
bitfld.long 0x14 2. " [2] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
bitfld.long 0x14 1. " [1] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 0. " [0] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
textline " "
|
|
if (((per.l((ad:0x401D0000))&0x40000000)==0x40000000))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CTRL2,Control 2 Register"
|
|
bitfld.long 0x00 28. " WRMFRZ ,Enable unrestricted write access to FlexCAN memory in freeze mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " RFFN ,Number of Rx FIFO filters" "8,16,24,32,40,48,56,64,72,80,88,96,104,112,120,128"
|
|
bitfld.long 0x00 19.--23. " TASD ,CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MRP ,Matching process starts from the mailboxes and if no match occurs the matching continues on the Rx FIFO" "Rx FIFO -> Mailboxes,Mailboxes -> Rx FIFO"
|
|
bitfld.long 0x00 17. " RRS ,Remote request frame submitted to a matching process and stored in the corresponding message buffer in the same fashion of a data frame" "Generated,Stored"
|
|
bitfld.long 0x00 16. " EACEN ,Comparison control of IDE and RTR bits within Rx mailboxes filters with their corresponding bits in the incoming frame by the matching process" "IDE compared,IDE && RTR compared"
|
|
else
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "CTRL2,Control 2 Register"
|
|
bitfld.long 0x00 28. " WRMFRZ ,Enable unrestricted write access to FlexCAN memory in Freeze mode" "WRMFRZ_0,WRMFRZ_1"
|
|
bitfld.long 0x00 24.--27. " RFFN ,This 4-bit field defines the number of Rx FIFO filters according to" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19.--23. " TASD ,This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MRP ,If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO" "MRP_0,MRP_1"
|
|
bitfld.long 0x00 17. " RRS ,If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame" "RRS_0,RRS_1"
|
|
bitfld.long 0x00 16. " EACEN ,This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process" "EACEN_0,EACEN_1"
|
|
endif
|
|
if (((per.l((ad:0x401D0000)+0x38)&0x4000)==0x4000))
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "ESR2,Error and Status 2 Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " LPTM ,Lowest number inactive mailbox"
|
|
bitfld.long 0x00 14. " VPS ,IMB and LPTM contents valid indicator" "Invalid,Valid"
|
|
bitfld.long 0x00 13. " IMB ,Indicates whether there is any inactive mailbox" "No inactive mailbox,Inactive mailbox"
|
|
else
|
|
if (((per.l((ad:0x401D0000)+0x04)&0x10)==0x00))
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "ESR2,Error and Status 2 Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " LPTM ,One of the greatest arbitration value mailbox"
|
|
bitfld.long 0x00 14. " VPS ,IMB and LPTM contents valid indicator" "Invalid,Valid"
|
|
bitfld.long 0x00 13. " IMB ,Indicates whether there is any inactive mailbox" "No inactive mailbox,Inactive mailbox"
|
|
else
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "ESR2,Error and Status 2 Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " LPTM ,Highest number active Tx mailbox"
|
|
bitfld.long 0x00 14. " VPS ,IMB and LPTM contents valid indicator" "Invalid,Valid"
|
|
bitfld.long 0x00 13. " IMB ,Indicates whether there is any inactive mailbox" "No inactive mailbox,Inactive mailbox"
|
|
endif
|
|
endif
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "CRCR,CRC Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " MBCRC ,Number of the mailbox corresponding to the value in TXCRC field"
|
|
hexmask.long.word 0x00 0.--14. 1. " TXCRC ,CRC value of the last message transmitted"
|
|
textline " "
|
|
if (((per.l((ad:0x401D0000))&0x40000000)==0x40000000))
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mask the ID filter table element bit 0" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mask the ID filter table element bit 0" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mask the ID filter table element bit 0" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mask the ID filter table element bit 0" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x401D0000+0x30))&0x20)==0x20)
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "RXFIR,Rx FIFO Information Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " IDHIT ,Identifier acceptance filter hitted by the received message that is in the output of the Rx FIFO"
|
|
else
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "RXFIR,Rx FIFO Information Register"
|
|
endif
|
|
textline " "
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "DBG1,Debug 1 Register"
|
|
bitfld.long 0x00 24.--28. " CBN ,CAN bit number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--5. " CFSM ,CAN finite state machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "DBG2,Debug 2 Register"
|
|
bitfld.long 0x00 15. " APP ,Arbitration process in progress" "APP_0,APP_1"
|
|
hexmask.long.byte 0x00 8.--14. 1. " TAP ,Tx arbitration pointer"
|
|
bitfld.long 0x00 7. " MPP ,Matching process in progress" "MPP_0,MPP_1"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RMP ,Rx matching pointer"
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D0000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D0000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D0000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D0000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "GFWR,Glitch Filter Width Registers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GFWR ,Glitch filter width"
|
|
width 0x0B
|
|
tree.end
|
|
tree "FLEXCAN 2"
|
|
base ad:0x401D4000
|
|
width 10.
|
|
if (((per.l(ad:0x401D4000)&0x40000000)==0x40000000))
|
|
if (((per.l(ad:0x401D4000))&0x100000)==0x100000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,Module Configuration Register"
|
|
bitfld.long 0x00 31. " MDIS ,FLEXCAN enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FRZ ,Freeze mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " RFEN ,Rx FIFO feature enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " HALT ,FLEXCAN freeze mode request" "Not requested,Requested"
|
|
rbitfld.long 0x00 27. " NOTRDY ,FLEXCAN mode status" "Disabled/Stopped/Frozen,Normal/Listen-only/Loop-back"
|
|
bitfld.long 0x00 26. " WAKMSK ,Wake up interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SOFTRST ,Software reset" "No reset,Reset"
|
|
rbitfld.long 0x00 24. " FRZACK ,FLEXCAN in freeze mode and prescaler stopped" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SUPV ,FLEXCAN registers in supervisor or user mode" "User,Supervisor"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " SLFWAK ,Self wake up feature when FLEXCAN in stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WRNEN ,Enable generation of the TWRN_INT and RWRN_INT flags in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " LPMACK ,FLEXCAN in disable mode or stop mode" "Low power,Disabled/Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WAKSRC ,Integrated low-pass filter is applied to protect the FLEXCAN_RX input from spurious wake up" "Not applied,Applied"
|
|
bitfld.long 0x00 17. " SRXDIS ,FlexCAN allowed to receive frames transmitted by itself" "Not allowed,Allowed"
|
|
bitfld.long 0x00 16. " IRMQ ,Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " LPRIOEN ,Local priority enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " AEN ,Tx abort feature enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " IDAM ,Format of the elements of the Rx FIFO filter table" "A,B,C,D"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " MAXMB ,Number of the last message buffers that will take part in the matching and arbitration processes"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,Module Configuration Register"
|
|
bitfld.long 0x00 31. " MDIS ,FLEXCAN enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FRZ ,Freeze mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " RFEN ,Rx FIFO feature enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " HALT ,FLEXCAN freeze mode request" "Not requested,Requested"
|
|
rbitfld.long 0x00 27. " NOTRDY ,FLEXCAN mode status" "Disabled/Stopped/Frozen,Normal/Listen-only/Loop-back"
|
|
bitfld.long 0x00 26. " WAKMSK ,Wake up interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SOFTRST ,Software reset" "No reset,Reset"
|
|
rbitfld.long 0x00 24. " FRZACK ,FLEXCAN in freeze mode and prescaler stopped" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SUPV ,FLEXCAN registers in supervisor or user mode" "User,Supervisor"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SLFWAK ,Self wake up feature when FLEXCAN in stop mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WRNEN ,Enable generation of the TWRN_INT and RWRN_INT flags in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " LPMACK ,FLEXCAN in disable mode or stop mode" "Low power,Disabled/Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WAKSRC ,Integrated low-pass filter is applied to protect the FLEXCAN_RX input from spurious wake up" "Not applied,Applied"
|
|
bitfld.long 0x00 17. " SRXDIS ,FlexCAN allowed to receive frames transmitted by itself" "Not allowed,Allowed"
|
|
bitfld.long 0x00 16. " IRMQ ,Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " LPRIOEN ,Local priority enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " AEN ,Tx abort feature enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " IDAM ,Format of the elements of the Rx FIFO filter table" "A,B,C,D"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " MAXMB ,Number of the last message buffers that will take part in the matching and arbitration processes"
|
|
endif
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,Module Configuration Register"
|
|
bitfld.long 0x00 31. " MDIS ,FLEXCAN enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " FRZ ,Freeze mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 29. " RFEN ,Rx FIFO feature enabled" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 27. " NOTRDY ,FLEXCAN mode status" "Disabled/Stopped/Frozen,Normal/Listen-only/Loop-back"
|
|
bitfld.long 0x00 26. " WAKMSK ,Wake up interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SOFTRST ,Software reset" "No reset,Reset"
|
|
rbitfld.long 0x00 24. " FRZACK ,FLEXCAN in freeze mode and prescaler stopped" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " SUPV ,FLEXCAN registers in supervisor or user mode" "User,Supervisor"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " SLFWAK ,Self wake up feature when FLEXCAN in stop mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " WRNEN ,Enable generation of the TWRN_INT and RWRN_INT flags in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " LPMACK ,FLEXCAN in disable mode or stop mode" "Low power,Disabled/Stopped"
|
|
textline " "
|
|
rbitfld.long 0x00 19. " WAKSRC ,Integrated low-pass filter is applied to protect the FLEXCAN_RX input from spurious wake up" "Not applied,Applied"
|
|
rbitfld.long 0x00 17. " SRXDIS ,FlexCAN allowed to receive frames transmitted by itself" "Not allowed,Allowed"
|
|
rbitfld.long 0x00 16. " IRMQ ,Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " LPRIOEN ,Local priority enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 12. " AEN ,Tx abort feature enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 8.--9. " IDAM ,Format of the elements of the Rx FIFO filter table" "A,B,C,D"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " MAXMB ,Number of the last message buffers that will take part in the matching and arbitration processes"
|
|
endif
|
|
if (((per.l((ad:0x401D4000))&0x40200000)==0x40200000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Ratio between the PE clock frequency and the serial clock (Sclock) frequency"
|
|
bitfld.long 0x00 22.--23. " RJW ,Maximum number of time quanta one time quantum is equal to the Sclock period" "1,2,3,4"
|
|
bitfld.long 0x00 19.--21. " PSEG1 ,Length of phase buffer segment 1 in the bit time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " PSEG2 ,Length of phase buffer segment 2 in the bit time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 15. " BOFFMSK ,Mask for the bus off interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERRMSK ,Mask for the error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " LPB ,FlexCAN to operate in loop-back mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TWRNMSK ,Mask for the Tx warning interrupt associated with the TWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RWRNMSK ,Rx warning interrupt associated with the RWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMP ,Sampling mode of CAN bits at the FLEXCAN_RX" "One sample,Three samples"
|
|
bitfld.long 0x00 6. " BOFFREC ,FLEXCAN recovers from bus off state" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TSYN ,Timer sync feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LBUF ,Ordering mechanism for message buffer transmission" "Lowest first,Highest first"
|
|
bitfld.long 0x00 3. " LOM ,FLEXCAN to operate in listen only mode" "Deactivated,Activated"
|
|
bitfld.long 0x00 0.--2. " PROPSEG ,This 3-bit field defines the length of the Propagation Segment in the bit time" "1,2,3,4,5,6,7,8"
|
|
elif (((per.l((ad:0x401D4000))&0x40200000)==0x40000000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Ratio between the PE clock frequency and the serial clock (Sclock) frequency"
|
|
bitfld.long 0x00 22.--23. " RJW ,Maximum number of time quanta one time quantum is equal to the Sclock period" "1,2,3,4"
|
|
bitfld.long 0x00 19.--21. " PSEG1 ,Length of phase buffer segment 1 in the bit time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " PSEG2 ,Length of phase buffer segment 2 in the bit time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 15. " BOFFMSK ,Mask for the bus off interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERRMSK ,Mask for the error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " LPB ,FlexCAN to operate in loop-back mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " TWRNMSK ,Mask for the Tx warning interrupt associated with the TWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " RWRNMSK ,Rx warning interrupt associated with the RWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMP ,Sampling mode of CAN bits at the FLEXCAN_RX" "One sample,Three samples"
|
|
bitfld.long 0x00 6. " BOFFREC ,FLEXCAN recovers from bus off state" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TSYN ,Timer sync feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LBUF ,Ordering mechanism for message buffer transmission" "Lowest first,Highest first"
|
|
bitfld.long 0x00 3. " LOM ,FLEXCAN to operate in listen only mode" "Deactivated,Activated"
|
|
bitfld.long 0x00 0.--2. " PROPSEG ,This 3-bit field defines the length of the Propagation Segment in the bit time" "1,2,3,4,5,6,7,8"
|
|
elif (((per.l((ad:0x401D4000))&0x40200000)==0x200000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Ratio between the PE clock frequency and the serial clock (Sclock) frequency"
|
|
rbitfld.long 0x00 22.--23. " RJW ,Maximum number of time quanta one time quantum is equal to the Sclock period" "1,2,3,4"
|
|
rbitfld.long 0x00 19.--21. " PSEG1 ,Length of phase buffer segment 1 in the bit time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " PSEG2 ,Length of phase buffer segment 2 in the bit time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 15. " BOFFMSK ,Mask for the bus off interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERRMSK ,Mask for the error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " LPB ,FlexCAN to operate in loop-back mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TWRNMSK ,Mask for the Tx warning interrupt associated with the TWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " RWRNMSK ,Rx warning interrupt associated with the RWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SMP ,Sampling mode of CAN bits at the FLEXCAN_RX" "One sample,Three samples"
|
|
bitfld.long 0x00 6. " BOFFREC ,FLEXCAN recovers from bus off state" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " TSYN ,Timer sync feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LBUF ,Ordering mechanism for message buffer transmission" "Lowest first,Highest first"
|
|
rbitfld.long 0x00 3. " LOM ,FLEXCAN to operate in listen only mode" "Deactivated,Activated"
|
|
rbitfld.long 0x00 0.--2. " PROPSEG ,This 3-bit field defines the length of the Propagation Segment in the bit time" "1,2,3,4,5,6,7,8"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRESDIV ,Ratio between the PE clock frequency and the serial clock (Sclock) frequency"
|
|
rbitfld.long 0x00 22.--23. " RJW ,Maximum number of time quanta one time quantum is equal to the Sclock period" "1,2,3,4"
|
|
rbitfld.long 0x00 19.--21. " PSEG1 ,Length of phase buffer segment 1 in the bit time" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " PSEG2 ,Length of phase buffer segment 2 in the bit time" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 15. " BOFFMSK ,Mask for the bus off interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ERRMSK ,Mask for the error interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " LPB ,FlexCAN to operate in loop-back mode" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " TWRNMSK ,Mask for the Tx warning interrupt associated with the TWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
rbitfld.long 0x00 10. " RWRNMSK ,Rx warning interrupt associated with the RWRN_INT flag in the error and status register" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SMP ,Sampling mode of CAN bits at the FLEXCAN_RX" "One sample,Three samples"
|
|
bitfld.long 0x00 6. " BOFFREC ,FLEXCAN recovers from bus off state" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. " TSYN ,Timer sync feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LBUF ,Ordering mechanism for message buffer transmission" "Lowest first,Highest first"
|
|
rbitfld.long 0x00 3. " LOM ,FLEXCAN to operate in listen only mode" "Deactivated,Activated"
|
|
rbitfld.long 0x00 0.--2. " PROPSEG ,This 3-bit field defines the length of the Propagation Segment in the bit time" "1,2,3,4,5,6,7,8"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "TIMER,Free Running Timer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMER ,TIMER"
|
|
textline " "
|
|
if (((per.l((ad:0x401D4000))&0x40000000)==0x40000000))
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mask the mailbox filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the mailbox filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the mailbox filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the mailbox filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mask the mailbox filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the mailbox filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the mailbox filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the mailbox filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mask the mailbox filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the mailbox filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the mailbox filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the mailbox filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mask the mailbox filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the mailbox filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the mailbox filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the mailbox filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mask the mailbox filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the mailbox filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the mailbox filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the mailbox filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mask the mailbox filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the mailbox filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the mailbox filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the mailbox filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mask the mailbox filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the mailbox filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the mailbox filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the mailbox filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mask the mailbox filter bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ID[28] ,Mask mailbox 14 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x04 27. " [27] ,Mask mailbox 14 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [26] ,Mask mailbox 14 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [25] ,Mask mailbox 14 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [24] ,Mask mailbox 14 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x04 23. " [23] ,Mask mailbox 14 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [22] ,Mask mailbox 14 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [21] ,Mask mailbox 14 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " [20] ,Mask mailbox 14 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " [19] ,Mask mailbox 14 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [18] ,Mask mailbox 14 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [17] ,Mask mailbox 14 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [16] ,Mask mailbox 14 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " [15] ,Mask mailbox 14 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [14] ,Mask mailbox 14 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [13] ,Mask mailbox 14 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " [12] ,Mask mailbox 14 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " [11] ,Mask mailbox 14 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [10] ,Mask mailbox 14 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [9] ,Mask mailbox 14 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " [8] ,Mask mailbox 14 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " [7] ,Mask mailbox 14 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [6] ,Mask mailbox 14 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [5] ,Mask mailbox 14 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " [4] ,Mask mailbox 14 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " [3] ,Mask mailbox 14 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [2] ,Mask mailbox 14 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [1] ,Mask mailbox 14 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " [0] ,Mask mailbox 14 filter bit 0" "Not masked,Masked"
|
|
line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ID[28] ,Mask mailbox 15 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " [27] ,Mask mailbox 15 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [26] ,Mask mailbox 15 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [25] ,Mask mailbox 15 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Mask mailbox 15 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x08 23. " [23] ,Mask mailbox 15 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [22] ,Mask mailbox 15 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [21] ,Mask mailbox 15 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 20. " [20] ,Mask mailbox 15 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " [19] ,Mask mailbox 15 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [18] ,Mask mailbox 15 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [17] ,Mask mailbox 15 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [16] ,Mask mailbox 15 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " [15] ,Mask mailbox 15 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [14] ,Mask mailbox 15 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [13] ,Mask mailbox 15 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " [12] ,Mask mailbox 15 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " [11] ,Mask mailbox 15 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [10] ,Mask mailbox 15 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [9] ,Mask mailbox 15 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " [8] ,Mask mailbox 15 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " [7] ,Mask mailbox 15 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [6] ,Mask mailbox 15 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [5] ,Mask mailbox 15 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " [4] ,Mask mailbox 15 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " [3] ,Mask mailbox 15 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [2] ,Mask mailbox 15 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [1] ,Mask mailbox 15 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " [0] ,Mask mailbox 15 filter bit 0" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the mailbox filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the mailbox filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mask the mailbox filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the mailbox filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the mailbox filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the mailbox filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mask the mailbox filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the mailbox filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the mailbox filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the mailbox filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mask the mailbox filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the mailbox filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the mailbox filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the mailbox filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mask the mailbox filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the mailbox filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the mailbox filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the mailbox filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mask the mailbox filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the mailbox filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the mailbox filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the mailbox filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mask the mailbox filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the mailbox filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the mailbox filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the mailbox filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mask the mailbox filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the mailbox filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the mailbox filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the mailbox filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mask the mailbox filter bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
bitfld.long 0x04 31. " RTR[31] ,Mask mailbox 14 filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " IDE[30] ,Mask mailbox 14 filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ID[28] ,Mask mailbox 14 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x04 27. " [27] ,Mask mailbox 14 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [26] ,Mask mailbox 14 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [25] ,Mask mailbox 14 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [24] ,Mask mailbox 14 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x04 23. " [23] ,Mask mailbox 14 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [22] ,Mask mailbox 14 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [21] ,Mask mailbox 14 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " [20] ,Mask mailbox 14 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " [19] ,Mask mailbox 14 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [18] ,Mask mailbox 14 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [17] ,Mask mailbox 14 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [16] ,Mask mailbox 14 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " [15] ,Mask mailbox 14 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [14] ,Mask mailbox 14 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [13] ,Mask mailbox 14 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " [12] ,Mask mailbox 14 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " [11] ,Mask mailbox 14 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [10] ,Mask mailbox 14 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [9] ,Mask mailbox 14 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " [8] ,Mask mailbox 14 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " [7] ,Mask mailbox 14 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [6] ,Mask mailbox 14 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [5] ,Mask mailbox 14 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " [4] ,Mask mailbox 14 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " [3] ,Mask mailbox 14 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [2] ,Mask mailbox 14 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [1] ,Mask mailbox 14 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " [0] ,Mask mailbox 14 filter bit 0" "Not masked,Masked"
|
|
line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
bitfld.long 0x08 31. " RTR[31] ,Mask mailbox 15 filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x08 30. " IDE[30] ,Mask mailbox 15 filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ID[28] ,Mask mailbox 15 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " [27] ,Mask mailbox 15 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [26] ,Mask mailbox 15 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [25] ,Mask mailbox 15 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Mask mailbox 15 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x08 23. " [23] ,Mask mailbox 15 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [22] ,Mask mailbox 15 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [21] ,Mask mailbox 15 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 20. " [20] ,Mask mailbox 15 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " [19] ,Mask mailbox 15 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [18] ,Mask mailbox 15 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [17] ,Mask mailbox 15 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [16] ,Mask mailbox 15 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " [15] ,Mask mailbox 15 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [14] ,Mask mailbox 15 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [13] ,Mask mailbox 15 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " [12] ,Mask mailbox 15 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " [11] ,Mask mailbox 15 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [10] ,Mask mailbox 15 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [9] ,Mask mailbox 15 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " [8] ,Mask mailbox 15 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " [7] ,Mask mailbox 15 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [6] ,Mask mailbox 15 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [5] ,Mask mailbox 15 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " [4] ,Mask mailbox 15 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " [3] ,Mask mailbox 15 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [2] ,Mask mailbox 15 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [1] ,Mask mailbox 15 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " [0] ,Mask mailbox 15 filter bit 0" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
hgroup.long 0x14++0x03
|
|
hide.long 0x00 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
rgroup.long 0x10++0x0B
|
|
line.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mask the mailbox filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the mailbox filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the mailbox filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the mailbox filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mask the mailbox filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the mailbox filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the mailbox filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the mailbox filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mask the mailbox filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the mailbox filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the mailbox filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the mailbox filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mask the mailbox filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the mailbox filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the mailbox filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the mailbox filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mask the mailbox filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the mailbox filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the mailbox filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the mailbox filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mask the mailbox filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the mailbox filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the mailbox filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the mailbox filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mask the mailbox filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the mailbox filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the mailbox filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the mailbox filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mask the mailbox filter bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ID[28] ,Mask mailbox 14 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x04 27. " [27] ,Mask mailbox 14 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [26] ,Mask mailbox 14 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [25] ,Mask mailbox 14 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [24] ,Mask mailbox 14 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x04 23. " [23] ,Mask mailbox 14 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [22] ,Mask mailbox 14 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [21] ,Mask mailbox 14 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " [20] ,Mask mailbox 14 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " [19] ,Mask mailbox 14 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [18] ,Mask mailbox 14 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [17] ,Mask mailbox 14 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [16] ,Mask mailbox 14 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " [15] ,Mask mailbox 14 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [14] ,Mask mailbox 14 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [13] ,Mask mailbox 14 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " [12] ,Mask mailbox 14 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " [11] ,Mask mailbox 14 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [10] ,Mask mailbox 14 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [9] ,Mask mailbox 14 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " [8] ,Mask mailbox 14 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " [7] ,Mask mailbox 14 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [6] ,Mask mailbox 14 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [5] ,Mask mailbox 14 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " [4] ,Mask mailbox 14 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " [3] ,Mask mailbox 14 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [2] ,Mask mailbox 14 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [1] ,Mask mailbox 14 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " [0] ,Mask mailbox 14 filter bit 0" "Not masked,Masked"
|
|
line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ID[28] ,Mask mailbox 15 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " [27] ,Mask mailbox 15 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [26] ,Mask mailbox 15 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [25] ,Mask mailbox 15 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Mask mailbox 15 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x08 23. " [23] ,Mask mailbox 15 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [22] ,Mask mailbox 15 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [21] ,Mask mailbox 15 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 20. " [20] ,Mask mailbox 15 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " [19] ,Mask mailbox 15 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [18] ,Mask mailbox 15 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [17] ,Mask mailbox 15 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [16] ,Mask mailbox 15 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " [15] ,Mask mailbox 15 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [14] ,Mask mailbox 15 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [13] ,Mask mailbox 15 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " [12] ,Mask mailbox 15 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " [11] ,Mask mailbox 15 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [10] ,Mask mailbox 15 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [9] ,Mask mailbox 15 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " [8] ,Mask mailbox 15 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " [7] ,Mask mailbox 15 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [6] ,Mask mailbox 15 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [5] ,Mask mailbox 15 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " [4] ,Mask mailbox 15 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " [3] ,Mask mailbox 15 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [2] ,Mask mailbox 15 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [1] ,Mask mailbox 15 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " [0] ,Mask mailbox 15 filter bit 0" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
rgroup.long 0x10++0x0B
|
|
line.long 0x00 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the mailbox filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the mailbox filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mask the mailbox filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the mailbox filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the mailbox filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the mailbox filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mask the mailbox filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the mailbox filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the mailbox filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the mailbox filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mask the mailbox filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the mailbox filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the mailbox filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the mailbox filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mask the mailbox filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the mailbox filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the mailbox filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the mailbox filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mask the mailbox filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the mailbox filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the mailbox filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the mailbox filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mask the mailbox filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the mailbox filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the mailbox filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the mailbox filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mask the mailbox filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the mailbox filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the mailbox filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the mailbox filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mask the mailbox filter bit 0" "Not masked,Masked"
|
|
line.long 0x04 "RX14MASK,Rx Buffer 14 Mask Register"
|
|
bitfld.long 0x04 31. " RTR[31] ,Mask mailbox 14 filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " IDE[30] ,Mask mailbox 14 filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " ID[28] ,Mask mailbox 14 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x04 27. " [27] ,Mask mailbox 14 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [26] ,Mask mailbox 14 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [25] ,Mask mailbox 14 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 24. " [24] ,Mask mailbox 14 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x04 23. " [23] ,Mask mailbox 14 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [22] ,Mask mailbox 14 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [21] ,Mask mailbox 14 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 20. " [20] ,Mask mailbox 14 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x04 19. " [19] ,Mask mailbox 14 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [18] ,Mask mailbox 14 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [17] ,Mask mailbox 14 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " [16] ,Mask mailbox 14 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x04 15. " [15] ,Mask mailbox 14 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [14] ,Mask mailbox 14 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [13] ,Mask mailbox 14 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 12. " [12] ,Mask mailbox 14 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x04 11. " [11] ,Mask mailbox 14 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [10] ,Mask mailbox 14 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [9] ,Mask mailbox 14 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 8. " [8] ,Mask mailbox 14 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x04 7. " [7] ,Mask mailbox 14 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [6] ,Mask mailbox 14 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [5] ,Mask mailbox 14 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " [4] ,Mask mailbox 14 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x04 3. " [3] ,Mask mailbox 14 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [2] ,Mask mailbox 14 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [1] ,Mask mailbox 14 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 0. " [0] ,Mask mailbox 14 filter bit 0" "Not masked,Masked"
|
|
line.long 0x08 "RX15MASK,Rx Buffer 15 Mask Register"
|
|
bitfld.long 0x08 31. " RTR[31] ,Mask mailbox 15 filter bit 31" "Not masked,Masked"
|
|
bitfld.long 0x08 30. " IDE[30] ,Mask mailbox 15 filter bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ID[28] ,Mask mailbox 15 filter bit 28" "Not masked,Masked"
|
|
bitfld.long 0x08 27. " [27] ,Mask mailbox 15 filter bit 27" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [26] ,Mask mailbox 15 filter bit 26" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [25] ,Mask mailbox 15 filter bit 25" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 24. " [24] ,Mask mailbox 15 filter bit 24" "Not masked,Masked"
|
|
bitfld.long 0x08 23. " [23] ,Mask mailbox 15 filter bit 23" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [22] ,Mask mailbox 15 filter bit 22" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [21] ,Mask mailbox 15 filter bit 21" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 20. " [20] ,Mask mailbox 15 filter bit 20" "Not masked,Masked"
|
|
bitfld.long 0x08 19. " [19] ,Mask mailbox 15 filter bit 19" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [18] ,Mask mailbox 15 filter bit 18" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [17] ,Mask mailbox 15 filter bit 17" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 16. " [16] ,Mask mailbox 15 filter bit 16" "Not masked,Masked"
|
|
bitfld.long 0x08 15. " [15] ,Mask mailbox 15 filter bit 15" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [14] ,Mask mailbox 15 filter bit 14" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [13] ,Mask mailbox 15 filter bit 13" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " [12] ,Mask mailbox 15 filter bit 12" "Not masked,Masked"
|
|
bitfld.long 0x08 11. " [11] ,Mask mailbox 15 filter bit 11" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [10] ,Mask mailbox 15 filter bit 10" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [9] ,Mask mailbox 15 filter bit 9" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 8. " [8] ,Mask mailbox 15 filter bit 8" "Not masked,Masked"
|
|
bitfld.long 0x08 7. " [7] ,Mask mailbox 15 filter bit 7" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [6] ,Mask mailbox 15 filter bit 6" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [5] ,Mask mailbox 15 filter bit 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " [4] ,Mask mailbox 15 filter bit 4" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " [3] ,Mask mailbox 15 filter bit 3" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [2] ,Mask mailbox 15 filter bit 2" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [1] ,Mask mailbox 15 filter bit 1" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " [0] ,Mask mailbox 15 filter bit 0" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
group.long 0x1C++0x17
|
|
line.long 0x00 "ECR,Error Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RX_ERR_COUNTER ,Rx_Err_Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TX_ERR_COUNTER ,Tx_Err_Counter"
|
|
line.long 0x04 "ESR1,Error and Status 1 Register"
|
|
rbitfld.long 0x04 18. " SYNCH ,FlexCAN is synchronized to the CAN bus and able to participate in the communication process" "Not synchronized,Synchronized"
|
|
bitfld.long 0x04 17. " TWRNINT ,Tx error counter reached 96" "Not occurred,Occurred"
|
|
bitfld.long 0x04 16. " RWRNINT ,Rx error counters reached 96" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x04 15. " BIT1ERR ,Inconsistency occurs between the transmitted and the received bit in a message" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 14. " BIT0ERR ,Inconsistency occurs between the transmitted and the received bit in a message" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 13. " ACKERR ,Acknowledge error has been detected by the transmitter node" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x04 12. " CRCERR ,CRC error has been detected by the receiver node" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 11. " FRMERR ,Form error has been detected by the receiver node" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 10. " STFERR ,Stuffing error has been detected" "Not occurred,Occurred"
|
|
textline " "
|
|
rbitfld.long 0x04 9. " TXWRN ,Repetitive errors are occurring during message transmission" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 8. " RXWRN ,Repetitive errors are occurring during message reception" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 7. " IDLE ,CAN bus is in IDLE state" "Not idle,Idle"
|
|
textline " "
|
|
rbitfld.long 0x04 6. " TX ,FLEXCAN transmitting a message" "Receiving,Transmitting"
|
|
rbitfld.long 0x04 4.--5. " FLTCONF ,Confinement state of the FLEXCAN module" "Error active,Error passive,Bus off,Bus off"
|
|
rbitfld.long 0x04 3. " RX ,This bit indicates if FlexCAN is receiving a message" "Receiving,Transmitting"
|
|
textline " "
|
|
eventfld.long 0x04 2. " BOFFINT ,FLEXCAN entered bus off state" "Not entered,Entered"
|
|
eventfld.long 0x04 1. " ERRINT ,At least one of the error bits is set" "Not occurred,Occurred"
|
|
eventfld.long 0x04 0. " WAKINT ,In stop mode recessive to dominant transition is detected on the CAN bus" "Not occurred,Occurred"
|
|
textline " "
|
|
line.long 0x08 "IMASK2,Interrupt Masks 2 Register"
|
|
bitfld.long 0x08 31. " BUFHM[63] ,FLEXCAN message buffer MB63 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " [62] ,FLEXCAN message buffer MB62 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " [61] ,FLEXCAN message buffer MB61 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 28. " [60] ,FLEXCAN message buffer MB60 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 27. " [59] ,FLEXCAN message buffer MB59 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 26. " [58] ,FLEXCAN message buffer MB58 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 25. " [57] ,FLEXCAN message buffer MB57 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " [56] ,FLEXCAN message buffer MB56 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 22. " [54] ,FLEXCAN message buffer MB54 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 23. " [55] ,FLEXCAN message buffer MB55 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 21. " [53] ,FLEXCAN message buffer MB53 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " [52] ,FLEXCAN message buffer MB52 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 19. " [51] ,FLEXCAN message buffer MB51 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 18. " [50] ,FLEXCAN message buffer MB50 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " [49] ,FLEXCAN message buffer MB49 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 16. " [48] ,FLEXCAN message buffer MB48 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 15. " [47] ,FLEXCAN message buffer MB47 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " [46] ,FLEXCAN message buffer MB46 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 13. " [45] ,FLEXCAN message buffer MB45 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 12. " [44] ,FLEXCAN message buffer MB44 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 11. " [43] ,FLEXCAN message buffer MB43 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " [42] ,FLEXCAN message buffer MB42 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 9. " [41] ,FLEXCAN message buffer MB41 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " [40] ,FLEXCAN message buffer MB40 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 7. " [39] ,FLEXCAN message buffer MB39 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 6. " [38] ,FLEXCAN message buffer MB38 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " [37] ,FLEXCAN message buffer MB37 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 4. " [36] ,FLEXCAN message buffer MB36 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 3. " [35] ,FLEXCAN message buffer MB35 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 2. " [34] ,FLEXCAN message buffer MB34 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 1. " [33] ,FLEXCAN message buffer MB33 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 0. " [32] ,FLEXCAN message buffer MB32 interrupt" "No interrupt,Interrupt"
|
|
line.long 0x0C "IMASK1,Interrupt Masks 1 Register"
|
|
bitfld.long 0x0C 31. " BUFHM[31] ,FLEXCAN message buffer MB31 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 30. " [30] ,FLEXCAN message buffer MB30 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 29. " [29] ,FLEXCAN message buffer MB29 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 28. " [28] ,FLEXCAN message buffer MB28 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " [27] ,FLEXCAN message buffer MB27 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 26. " [26] ,FLEXCAN message buffer MB26 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 25. " [25] ,FLEXCAN message buffer MB25 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 24. " [24] ,FLEXCAN message buffer MB24 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " [23] ,FLEXCAN message buffer MB23 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 22. " [22] ,FLEXCAN message buffer MB22 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 21. " [21] ,FLEXCAN message buffer MB21 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 20. " [20] ,FLEXCAN message buffer MB20 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " [19] ,FLEXCAN message buffer MB19 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 18. " [18] ,FLEXCAN message buffer MB18 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 17. " [17] ,FLEXCAN message buffer MB17 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 16. " [16] ,FLEXCAN message buffer MB16 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " [15] ,FLEXCAN message buffer MB15 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 14. " [14] ,FLEXCAN message buffer MB14 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 13. " [13] ,FLEXCAN message buffer MB13 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 12. " [12] ,FLEXCAN message buffer MB12 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " [11] ,FLEXCAN message buffer MB11 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 10. " [10] ,FLEXCAN message buffer MB10 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 9. " [9] ,FLEXCAN message buffer MB9 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 8. " [8] ,FLEXCAN message buffer MB8 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " [7] ,FLEXCAN message buffer MB7 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 6. " [6] ,FLEXCAN message buffer MB6 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 5. " [5] ,FLEXCAN message buffer MB5 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 4. " [4] ,FLEXCAN message buffer MB4 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " [3] ,FLEXCAN message buffer MB3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 2. " [2] ,FLEXCAN message buffer MB2 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 1. " [1] ,FLEXCAN message buffer MB1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 0. " [0] ,FLEXCAN message buffer MB0 interrupt" "No interrupt,Interrupt"
|
|
line.long 0x10 "IFLAG2,Interrupt Flags 2 Register"
|
|
bitfld.long 0x10 31. " BUFHI[63] ,FLEXCAN message buffer MB63 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 30. " [62] ,FLEXCAN message buffer MB62 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 29. " [61] ,FLEXCAN message buffer MB61 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 28. " [60] ,FLEXCAN message buffer MB60 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 27. " [59] ,FLEXCAN message buffer MB59 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 26. " [58] ,FLEXCAN message buffer MB58 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 25. " [57] ,FLEXCAN message buffer MB57 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 24. " [56] ,FLEXCAN message buffer MB56 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 23. " [55] ,FLEXCAN message buffer MB55 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 22. " [54] ,FLEXCAN message buffer MB54 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 21. " [53] ,FLEXCAN message buffer MB53 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 20. " [52] ,FLEXCAN message buffer MB52 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 19. " [51] ,FLEXCAN message buffer MB51 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 18. " [50] ,FLEXCAN message buffer MB50 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 17. " [49] ,FLEXCAN message buffer MB49 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 16. " [48] ,FLEXCAN message buffer MB48 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 15. " [47] ,FLEXCAN message buffer MB47 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 14. " [46] ,FLEXCAN message buffer MB46 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 13. " [45] ,FLEXCAN message buffer MB45 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 12. " [44] ,FLEXCAN message buffer MB44 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 11. " [43] ,FLEXCAN message buffer MB43 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 10. " [42] ,FLEXCAN message buffer MB42 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 9. " [41] ,FLEXCAN message buffer MB41 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 8. " [40] ,FLEXCAN message buffer MB40 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 7. " [39] ,FLEXCAN message buffer MB39 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 6. " [38] ,FLEXCAN message buffer MB38 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 5. " [37] ,FLEXCAN message buffer MB37 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 4. " [36] ,FLEXCAN message buffer MB36 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x10 3. " [35] ,FLEXCAN message buffer MB35 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 2. " [34] ,FLEXCAN message buffer MB34 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 1. " [33] ,FLEXCAN message buffer MB33 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x10 0. " [32] ,FLEXCAN message buffer MB32 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
line.long 0x14 "IFLAG1,Interrupt Flags 1 Register"
|
|
bitfld.long 0x14 31. " BUF[31] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 30. " [30] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 29. " [29] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 28. " [28] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 27. " [27] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 26. " [26] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 25. " [25] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 24. " [24] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 23. " [23] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 22. " [22] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 21. " [21] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 20. " [20] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 19. " [19] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 18. " [18] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 17. " [17] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 16. " [16] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 15. " [15] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 14. " [14] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 13. " [13] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 12. " [12] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 11. " [11] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 10. " [10] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 9. " [9] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x14 8. " [8] ,FLEXCAN message buffer MB31 successfully completed transmission or reception occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 7. " BUF7I ,MB7 completed transmission/reception or FIFO overflow" "Not occurred,Occurred"
|
|
bitfld.long 0x14 6. " BUF6I ,MB6 completed transmission/reception or FIFO almost full" "Not occurred,Occurred"
|
|
bitfld.long 0x14 5. " BUF5I ,MB5 completed transmission/reception or frames available in the FIFO" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 4. " BUF[4] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
bitfld.long 0x14 3. " [3] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
bitfld.long 0x14 2. " [2] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
bitfld.long 0x14 1. " [1] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x14 0. " [0] ,MB4 completed transmission/reception" "Not occurred,Occurred"
|
|
textline " "
|
|
if (((per.l((ad:0x401D4000))&0x40000000)==0x40000000))
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "CTRL2,Control 2 Register"
|
|
bitfld.long 0x00 28. " WRMFRZ ,Enable unrestricted write access to FlexCAN memory in freeze mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--27. " RFFN ,Number of Rx FIFO filters" "8,16,24,32,40,48,56,64,72,80,88,96,104,112,120,128"
|
|
bitfld.long 0x00 19.--23. " TASD ,CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MRP ,Matching process starts from the mailboxes and if no match occurs the matching continues on the Rx FIFO" "Rx FIFO -> Mailboxes,Mailboxes -> Rx FIFO"
|
|
bitfld.long 0x00 17. " RRS ,Remote request frame submitted to a matching process and stored in the corresponding message buffer in the same fashion of a data frame" "Generated,Stored"
|
|
bitfld.long 0x00 16. " EACEN ,Comparison control of IDE and RTR bits within Rx mailboxes filters with their corresponding bits in the incoming frame by the matching process" "IDE compared,IDE && RTR compared"
|
|
else
|
|
rgroup.long 0x34++0x03
|
|
line.long 0x00 "CTRL2,Control 2 Register"
|
|
bitfld.long 0x00 28. " WRMFRZ ,Enable unrestricted write access to FlexCAN memory in Freeze mode" "WRMFRZ_0,WRMFRZ_1"
|
|
bitfld.long 0x00 24.--27. " RFFN ,This 4-bit field defines the number of Rx FIFO filters according to" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 19.--23. " TASD ,This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MRP ,If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO" "MRP_0,MRP_1"
|
|
bitfld.long 0x00 17. " RRS ,If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame" "RRS_0,RRS_1"
|
|
bitfld.long 0x00 16. " EACEN ,This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process" "EACEN_0,EACEN_1"
|
|
endif
|
|
if (((per.l((ad:0x401D4000)+0x38)&0x4000)==0x4000))
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "ESR2,Error and Status 2 Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " LPTM ,Lowest number inactive mailbox"
|
|
bitfld.long 0x00 14. " VPS ,IMB and LPTM contents valid indicator" "Invalid,Valid"
|
|
bitfld.long 0x00 13. " IMB ,Indicates whether there is any inactive mailbox" "No inactive mailbox,Inactive mailbox"
|
|
else
|
|
if (((per.l((ad:0x401D4000)+0x04)&0x10)==0x00))
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "ESR2,Error and Status 2 Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " LPTM ,One of the greatest arbitration value mailbox"
|
|
bitfld.long 0x00 14. " VPS ,IMB and LPTM contents valid indicator" "Invalid,Valid"
|
|
bitfld.long 0x00 13. " IMB ,Indicates whether there is any inactive mailbox" "No inactive mailbox,Inactive mailbox"
|
|
else
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "ESR2,Error and Status 2 Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " LPTM ,Highest number active Tx mailbox"
|
|
bitfld.long 0x00 14. " VPS ,IMB and LPTM contents valid indicator" "Invalid,Valid"
|
|
bitfld.long 0x00 13. " IMB ,Indicates whether there is any inactive mailbox" "No inactive mailbox,Inactive mailbox"
|
|
endif
|
|
endif
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "CRCR,CRC Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " MBCRC ,Number of the mailbox corresponding to the value in TXCRC field"
|
|
hexmask.long.word 0x00 0.--14. 1. " TXCRC ,CRC value of the last message transmitted"
|
|
textline " "
|
|
if (((per.l((ad:0x401D4000))&0x40000000)==0x40000000))
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mask the ID filter table element bit 0" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mask the ID filter table element bit 0" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mask the ID filter table element bit 0" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Mask the ID filter table element bit 31" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Mask the ID filter table element bit 30" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Mask the ID filter table element bit 29" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Mask the ID filter table element bit 28" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Mask the ID filter table element bit 27" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mask the ID filter table element bit 26" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mask the ID filter table element bit 25" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mask the ID filter table element bit 24" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Mask the ID filter table element bit 23" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mask the ID filter table element bit 22" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mask the ID filter table element bit 21" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mask the ID filter table element bit 20" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Mask the ID filter table element bit 19" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mask the ID filter table element bit 18" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mask the ID filter table element bit 17" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mask the ID filter table element bit 16" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Mask the ID filter table element bit 15" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mask the ID filter table element bit 14" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mask the ID filter table element bit 13" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mask the ID filter table element bit 12" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Mask the ID filter table element bit 11" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mask the ID filter table element bit 10" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mask the ID filter table element bit 9" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mask the ID filter table element bit 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Mask the ID filter table element bit 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mask the ID filter table element bit 6" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mask the ID filter table element bit 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mask the ID filter table element bit 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Mask the ID filter table element bit 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mask the ID filter table element bit 2" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mask the ID filter table element bit 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mask the ID filter table element bit 0" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x401D4000+0x30))&0x20)==0x20)
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "RXFIR,Rx FIFO Information Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " IDHIT ,Identifier acceptance filter hitted by the received message that is in the output of the Rx FIFO"
|
|
else
|
|
rgroup.long 0x4C++0x03
|
|
line.long 0x00 "RXFIR,Rx FIFO Information Register"
|
|
endif
|
|
textline " "
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "DBG1,Debug 1 Register"
|
|
bitfld.long 0x00 24.--28. " CBN ,CAN bit number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--5. " CFSM ,CAN finite state machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "DBG2,Debug 2 Register"
|
|
bitfld.long 0x00 15. " APP ,Arbitration process in progress" "APP_0,APP_1"
|
|
hexmask.long.byte 0x00 8.--14. 1. " TAP ,Tx arbitration pointer"
|
|
bitfld.long 0x00 7. " MPP ,Matching process in progress" "MPP_0,MPP_1"
|
|
hexmask.long.byte 0x00 0.--6. 1. " RMP ,Rx matching pointer"
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR0,Rx Individual Mask Registers 0"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR1,Rx Individual Mask Registers 1"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR2,Rx Individual Mask Registers 2"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR3,Rx Individual Mask Registers 3"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR4,Rx Individual Mask Registers 4"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR5,Rx Individual Mask Registers 5"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR6,Rx Individual Mask Registers 6"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR7,Rx Individual Mask Registers 7"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR8,Rx Individual Mask Registers 8"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR9,Rx Individual Mask Registers 9"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR10,Rx Individual Mask Registers 10"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR11,Rx Individual Mask Registers 11"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR12,Rx Individual Mask Registers 12"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR13,Rx Individual Mask Registers 13"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR14,Rx Individual Mask Registers 14"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR15,Rx Individual Mask Registers 15"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR16,Rx Individual Mask Registers 16"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR17,Rx Individual Mask Registers 17"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR18,Rx Individual Mask Registers 18"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR19,Rx Individual Mask Registers 19"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR20,Rx Individual Mask Registers 20"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR21,Rx Individual Mask Registers 21"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR22,Rx Individual Mask Registers 22"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR23,Rx Individual Mask Registers 23"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR24,Rx Individual Mask Registers 24"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR25,Rx Individual Mask Registers 25"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR26,Rx Individual Mask Registers 26"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR27,Rx Individual Mask Registers 27"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR28,Rx Individual Mask Registers 28"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR29,Rx Individual Mask Registers 29"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR30,Rx Individual Mask Registers 30"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR31,Rx Individual Mask Registers 31"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR32,Rx Individual Mask Registers 32"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR33,Rx Individual Mask Registers 33"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR34,Rx Individual Mask Registers 34"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR35,Rx Individual Mask Registers 35"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR36,Rx Individual Mask Registers 36"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR37,Rx Individual Mask Registers 37"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR38,Rx Individual Mask Registers 38"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR39,Rx Individual Mask Registers 39"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR40,Rx Individual Mask Registers 40"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR41,Rx Individual Mask Registers 41"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR42,Rx Individual Mask Registers 42"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR43,Rx Individual Mask Registers 43"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR44,Rx Individual Mask Registers 44"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR45,Rx Individual Mask Registers 45"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR46,Rx Individual Mask Registers 46"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR47,Rx Individual Mask Registers 47"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR48,Rx Individual Mask Registers 48"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR49,Rx Individual Mask Registers 49"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR50,Rx Individual Mask Registers 50"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR51,Rx Individual Mask Registers 51"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR52,Rx Individual Mask Registers 52"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR53,Rx Individual Mask Registers 53"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR54,Rx Individual Mask Registers 54"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR55,Rx Individual Mask Registers 55"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR56,Rx Individual Mask Registers 56"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR57,Rx Individual Mask Registers 57"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR58,Rx Individual Mask Registers 58"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR59,Rx Individual Mask Registers 59"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR60,Rx Individual Mask Registers 60"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR61,Rx Individual Mask Registers 61"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR62,Rx Individual Mask Registers 62"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x401D4000))&0x20000000)==0x20000000)
|
|
if (((per.l(ad:0x401D4000))&0x300)==0x00)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDA[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x100)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 31. " RTR[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " RXIDB[29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RTR[15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " IDE[14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RXIDB[13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000))&0x300)==0x200)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 31. " RXIDC[31] ,Rx FIFO ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Rx FIFO ID filter table element 30 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Rx FIFO ID filter table element 29 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Rx FIFO ID filter table element 28 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,Rx FIFO ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Rx FIFO ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Rx FIFO ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Rx FIFO ID filter table element 24 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,Rx FIFO ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Rx FIFO ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Rx FIFO ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Rx FIFO ID filter table element 20 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Rx FIFO ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Rx FIFO ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Rx FIFO ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Rx FIFO ID filter table element 16 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,Rx FIFO ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Rx FIFO ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Rx FIFO ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Rx FIFO ID filter table element 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,Rx FIFO ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Rx FIFO ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Rx FIFO ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Rx FIFO ID filter table element 8 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Rx FIFO ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Rx FIFO ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Rx FIFO ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Rx FIFO ID filter table element 4 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,Rx FIFO ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Rx FIFO ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Rx FIFO ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Rx FIFO ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x401D4000+0x34))&0x20000)==0x00)
|
|
hgroup.long 0x880++0x03
|
|
hide.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x20000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
elif (((per.l(ad:0x401D4000+0x34))&0x30000)==0x30000)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "RXIMR63,Rx Individual Mask Registers 63"
|
|
bitfld.long 0x00 31. " RTR[31] ,Mailbox filter ID filter table element 31 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " IDE[30] ,Mailbox filter ID filter table element 30 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ID[28] ,Mailbox filter ID filter table element 28 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Mailbox filter ID filter table element 27 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Mailbox filter ID filter table element 26 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,Mailbox filter ID filter table element 25 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [24] ,Mailbox filter ID filter table element 24 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Mailbox filter ID filter table element 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Mailbox filter ID filter table element 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Mailbox filter ID filter table element 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " [20] ,Mailbox filter ID filter table element 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " [19] ,Mailbox filter ID filter table element 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Mailbox filter ID filter table element 18 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Mailbox filter ID filter table element 17 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [16] ,Mailbox filter ID filter table element 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Mailbox filter ID filter table element 15 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Mailbox filter ID filter table element 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,Mailbox filter ID filter table element 13 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " [12] ,Mailbox filter ID filter table element 12 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Mailbox filter ID filter table element 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Mailbox filter ID filter table element 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Mailbox filter ID filter table element 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " [8] ,Mailbox filter ID filter table element 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " [7] ,Mailbox filter ID filter table element 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Mailbox filter ID filter table element 6 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Mailbox filter ID filter table element 5 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " [4] ,Mailbox filter ID filter table element 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Mailbox filter ID filter table element 3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Mailbox filter ID filter table element 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,Mailbox filter ID filter table element 1 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " [0] ,Mailbox filter ID filter table element 0 mask" "Not masked,Masked"
|
|
endif
|
|
endif
|
|
textline " "
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "GFWR,Glitch Filter Width Registers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GFWR ,Glitch filter width"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "FLEXIO (Flexible I/O)"
|
|
base ad:0x401AC000
|
|
width 12.
|
|
rgroup.long 0x00++0x07 "Common Registers"
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major revision number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor revision number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature specification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " TRIGGER ,Number of external triggers implemented"
|
|
hexmask.long.byte 0x04 16.--23. 1. " PIN ,Number of pins implemented"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TIMER ,Number of timers implemented"
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " SHIFTER ,Number of shifters implemented"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL,Flexio Control Register"
|
|
bitfld.long 0x00 31. " DOZEN ,Disables flexio operation in doze modes" "Flexio enabled,Flexio disabled"
|
|
bitfld.long 0x00 30. " DBGE ,Enables flexio operation in debug mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " FASTACC ,Enables fast register accesses to flexio registers" "Normal access,Fast access"
|
|
newline
|
|
bitfld.long 0x00 1. " SWRST ,Software reset" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FLEXEN ,Flexio module enable" "Disabled,Enabled"
|
|
newline
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")||cpuis("IMXRT1021")
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PIN,Pin State Register"
|
|
bitfld.long 0x00 31. " PDI[31] ,Pin 31 data input" "0,1"
|
|
bitfld.long 0x00 30. " PDI[30] ,Pin 30 data input" "0,1"
|
|
bitfld.long 0x00 29. " PDI[29] ,Pin 29 data input" "0,1"
|
|
bitfld.long 0x00 28. " PDI[28] ,Pin 28 data input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 27. " PDI[27] ,Pin 27 data input" "0,1"
|
|
bitfld.long 0x00 26. " PDI[26] ,Pin 26 data input" "0,1"
|
|
bitfld.long 0x00 25. " PDI[25] ,Pin 25 data input" "0,1"
|
|
bitfld.long 0x00 24. " PDI[24] ,Pin 24 data input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 23. " PDI[23] ,Pin 23 data input" "0,1"
|
|
bitfld.long 0x00 22. " PDI[22] ,Pin 22 data input" "0,1"
|
|
bitfld.long 0x00 21. " PDI[21] ,Pin 21 data input" "0,1"
|
|
bitfld.long 0x00 20. " PDI[20] ,Pin 20 data input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 19. " PDI[19] ,Pin 19 data input" "0,1"
|
|
bitfld.long 0x00 18. " PDI[18] ,Pin 18 data input" "0,1"
|
|
bitfld.long 0x00 17. " PDI[17] ,Pin 17 data input" "0,1"
|
|
bitfld.long 0x00 16. " PDI[16] ,Pin 16 data input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 15. " PDI[15] ,Pin 15 data input" "0,1"
|
|
bitfld.long 0x00 14. " PDI[14] ,Pin 14 data input" "0,1"
|
|
bitfld.long 0x00 13. " PDI[13] ,Pin 13 data input" "0,1"
|
|
bitfld.long 0x00 12. " PDI[12] ,Pin 12 data input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 11. " PDI[11] ,Pin 11 data input" "0,1"
|
|
bitfld.long 0x00 10. " PDI[10] ,Pin 10 data input" "0,1"
|
|
bitfld.long 0x00 9. " PDI[9] ,Pin 9 data input" "0,1"
|
|
bitfld.long 0x00 8. " PDI[8] ,Pin 8 data input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 7. " PDI[7] ,Pin 7 data input" "0,1"
|
|
bitfld.long 0x00 6. " PDI[6] ,Pin 6 data input" "0,1"
|
|
bitfld.long 0x00 5. " PDI[5] ,Pin 5 data input" "0,1"
|
|
bitfld.long 0x00 4. " PDI[4] ,Pin 4 data input" "0,1"
|
|
newline
|
|
bitfld.long 0x00 3. " PDI[3] ,Pin 3 data input" "0,1"
|
|
bitfld.long 0x00 2. " PDI[2] ,Pin 2 data input" "0,1"
|
|
bitfld.long 0x00 1. " PDI[1] ,Pin 1 data input" "0,1"
|
|
bitfld.long 0x00 0. " PDI[0] ,Pin 0 data input" "0,1"
|
|
endif
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "SHIFTSTAT,Shifter Status Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")
|
|
eventfld.long 0x00 7. " SSF[7] ,Shifter 7 status flag" "Cleared,Set"
|
|
eventfld.long 0x00 6. " SSF[6] ,Shifter 6 status flag" "Cleared,Set"
|
|
eventfld.long 0x00 5. " SSF[5] ,Shifter 5 status flag" "Cleared,Set"
|
|
eventfld.long 0x00 4. " SSF[4] ,Shifter 4 status flag" "Cleared,Set"
|
|
newline
|
|
endif
|
|
eventfld.long 0x00 3. " SSF[3] ,Shifter 3 status flag" "Cleared,Set"
|
|
eventfld.long 0x00 2. " SSF[2] ,Shifter 2 status flag" "Cleared,Set"
|
|
eventfld.long 0x00 1. " SSF[1] ,Shifter 1 status flag" "Cleared,Set"
|
|
eventfld.long 0x00 0. " SSF[0] ,Shifter 0 status flag" "Cleared,Set"
|
|
line.long 0x04 "SHIFTERR,Shifter Error Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")
|
|
eventfld.long 0x04 7. " SEF[7] ,Shifter 7 error flags" "Cleared,Set"
|
|
eventfld.long 0x04 6. " SEF[6] ,Shifter 6 error flags" "Cleared,Set"
|
|
eventfld.long 0x04 5. " SEF[5] ,Shifter 5 error flags" "Cleared,Set"
|
|
eventfld.long 0x04 4. " SEF[4] ,Shifter 4 error flags" "Cleared,Set"
|
|
newline
|
|
endif
|
|
eventfld.long 0x04 3. " SEF[3] ,Shifter 3 error flags" "Cleared,Set"
|
|
eventfld.long 0x04 2. " SEF[2] ,Shifter 2 error flags" "Cleared,Set"
|
|
eventfld.long 0x04 1. " SEF[1] ,Shifter 1 error flags" "Cleared,Set"
|
|
eventfld.long 0x04 0. " SEF[0] ,Shifter 0 error flags" "Cleared,Set"
|
|
line.long 0x08 "TIMSTAT,Timer Status Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")
|
|
eventfld.long 0x08 7. " TSF[7] ,Timer 7 status flags" "Cleared,Set"
|
|
eventfld.long 0x08 6. " TSF[6] ,Timer 6 status flags" "Cleared,Set"
|
|
eventfld.long 0x08 5. " TSF[5] ,Timer 5 status flags" "Cleared,Set"
|
|
eventfld.long 0x08 4. " TSF[4] ,Timer 4 status flags" "Cleared,Set"
|
|
newline
|
|
endif
|
|
eventfld.long 0x08 3. " TSF[3] ,Timer 3 status flags" "Cleared,Set"
|
|
eventfld.long 0x08 2. " TSF[2] ,Timer 2 status flags" "Cleared,Set"
|
|
eventfld.long 0x08 1. " TSF[1] ,Timer 1 status flags" "Cleared,Set"
|
|
eventfld.long 0x08 0. " TSF[0] ,Timer 0 status flags" "Cleared,Set"
|
|
group.long 0x20++0x0B
|
|
line.long 0x00 "SHIFTSIEN,Shifter Status Interrupt Enable Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")
|
|
bitfld.long 0x00 7. " SSIE[7] ,Enables interrupt generation when SSF[7] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SSIE[6] ,Enables interrupt generation when SSF[6] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SSIE[5] ,Enables interrupt generation when SSF[5] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SSIE[4] ,Enables interrupt generation when SSF[4] is set" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 3. " SSIE[3] ,Enables interrupt generation when SSF[3] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SSIE[2] ,Enables interrupt generation when SSF[2] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SSIE[1] ,Enables interrupt generation when SSF[1] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SSIE[0] ,Enables interrupt generation when SSF[0] is set" "Disabled,Enabled"
|
|
line.long 0x04 "SHIFTEIEN,Shifter Error Interrupt Enable Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")
|
|
bitfld.long 0x04 7. " SEIE[7] ,Enables interrupt generation when SEF[7] is set" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " SEIE[6] ,Enables interrupt generation when SEF[6] is set" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SEIE[5] ,Enables interrupt generation when SEF[5] is set" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " SEIE[4] ,Enables interrupt generation when SEF[4] is set" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x04 3. " SEIE[3] ,Enables interrupt generation when SEF[3] is set" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SEIE[2] ,Enables interrupt generation when SEF[2] is set" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " SEIE[1] ,Enables interrupt generation when SEF[1] is set" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SEIE[0] ,Enables interrupt generation when SEF[0] is set" "Disabled,Enabled"
|
|
line.long 0x08 "TIMIEN,Timer Interrupt Enable Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")
|
|
bitfld.long 0x08 7. " TEIE[7] ,Enables interrupt generation when TSF[7] is set" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " TEIE[6] ,Enables interrupt generation when TSF[6] is set" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " TEIE[5] ,Enables interrupt generation when TSF[5] is set" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " TEIE[4] ,Enables interrupt generation when TSF[4] is set" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x08 3. " TEIE[3] ,Enables interrupt generation when TSF[3] is set" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " TEIE[2] ,Enables interrupt generation when TSF[2] is set" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " TEIE[1] ,Enables interrupt generation when TSF[1] is set" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TEIE[0] ,Enables interrupt generation when TSF[0] is set" "Disabled,Enabled"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SHIFTSDEN,Shifter Status DMA Enable Register"
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")
|
|
bitfld.long 0x00 7. " SSDE[7] ,Enables DMA request generation when SSF[7] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SSDE[6] ,Enables DMA request generation when SSF[6] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SSDE[5] ,Enables DMA request generation when SSF[5] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SSDE[4] ,Enables DMA request generation when SSF[4] is set" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 3. " SSDE[3] ,Enables DMA request generation when SSF[3] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SSDE[2] ,Enables DMA request generation when SSF[2] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SSDE[1] ,Enables DMA request generation when SSF[1] is set" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SSDE[0] ,Enables DMA request generation when SSF[0] is set" "Disabled,Enabled"
|
|
sif cpuis("MK84FN2M0CAU15R")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SHIFTSTATE,Shifter State Register"
|
|
bitfld.long 0x00 0.--3. " STATE ,Current state pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
elif cpuis("MK8?FN256V*")||cpuis("MKL82Z*")||cpuis("IMXRT1021")
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "SHIFTSTATE,Shifter State Register"
|
|
bitfld.long 0x00 0.--2. " STATE ,Current state pointer" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif cpuis("MK84FN2M0CAU15R")||cpuis("MK8?FN256V*")||cpuis("MKL82Z*")
|
|
width 17.
|
|
tree "Shifter Registers"
|
|
group.long (0x0+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_0,Shifter Control 0 Register"
|
|
bitfld.long 0x00 24.--26. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,Timer 5,Timer 6,Timer 7"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Posedge,Negedge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,State mode,Logic mode"
|
|
newline
|
|
if (((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x05)
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_0,Shifter Configuration 0 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
group.long (0x0+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_0,Shifter Buffer 0 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SHIFTBUF[31:16] ,Shift buffer data to match"
|
|
newline
|
|
bitfld.long 0x00 15. " SHIFTBUF[15] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " SHIFTBUF[14] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " SHIFTBUF[13] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " SHIFTBUF[12] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 11. " SHIFTBUF[11] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " SHIFTBUF[10] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " SHIFTBUF[9] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " SHIFTBUF[8] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 7. " SHIFTBUF[7] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " SHIFTBUF[6] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SHIFTBUF[5] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SHIFTBUF[4] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 3. " SHIFTBUF[3] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SHIFTBUF[2] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SHIFTBUF[1] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SHIFTBUF[0] ,Shift buffer mask" "Not masked,Masked"
|
|
group.long (0x0+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_0,Shifter Buffer 0 Bit Swapped Register"
|
|
group.long (0x0+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_0,Shifter Buffer 0 Byte Swapped Register"
|
|
group.long (0x0+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_0,Shifter Buffer 0 Bit Byte Swapped Register"
|
|
else
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_0,Shifter Configuration 0 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x0+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_0,Shifter Buffer 0 Register"
|
|
group.long (0x0+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_0,Shifter Buffer 0 Bit Swapped Register"
|
|
group.long (0x0+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_0,Shifter Buffer 0 Byte Swapped Register"
|
|
group.long (0x0+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_0,Shifter Buffer 0 Bit Byte Swapped Register"
|
|
endif
|
|
group.long (0x4+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_1,Shifter Control 1 Register"
|
|
bitfld.long 0x00 24.--26. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,Timer 5,Timer 6,Timer 7"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Posedge,Negedge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,State mode,Logic mode"
|
|
newline
|
|
if (((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x05)
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_1,Shifter Configuration 1 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
group.long (0x4+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_1,Shifter Buffer 1 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SHIFTBUF[31:16] ,Shift buffer data to match"
|
|
newline
|
|
bitfld.long 0x00 15. " SHIFTBUF[15] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " SHIFTBUF[14] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " SHIFTBUF[13] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " SHIFTBUF[12] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 11. " SHIFTBUF[11] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " SHIFTBUF[10] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " SHIFTBUF[9] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " SHIFTBUF[8] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 7. " SHIFTBUF[7] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " SHIFTBUF[6] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SHIFTBUF[5] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SHIFTBUF[4] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 3. " SHIFTBUF[3] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SHIFTBUF[2] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SHIFTBUF[1] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SHIFTBUF[0] ,Shift buffer mask" "Not masked,Masked"
|
|
group.long (0x4+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_1,Shifter Buffer 1 Bit Swapped Register"
|
|
group.long (0x4+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_1,Shifter Buffer 1 Byte Swapped Register"
|
|
group.long (0x4+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_1,Shifter Buffer 1 Bit Byte Swapped Register"
|
|
else
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_1,Shifter Configuration 1 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x4+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_1,Shifter Buffer 1 Register"
|
|
group.long (0x4+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_1,Shifter Buffer 1 Bit Swapped Register"
|
|
group.long (0x4+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_1,Shifter Buffer 1 Byte Swapped Register"
|
|
group.long (0x4+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_1,Shifter Buffer 1 Bit Byte Swapped Register"
|
|
endif
|
|
group.long (0x8+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_2,Shifter Control 2 Register"
|
|
bitfld.long 0x00 24.--26. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,Timer 5,Timer 6,Timer 7"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Posedge,Negedge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,State mode,Logic mode"
|
|
newline
|
|
if (((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x05)
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_2,Shifter Configuration 2 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
group.long (0x8+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_2,Shifter Buffer 2 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SHIFTBUF[31:16] ,Shift buffer data to match"
|
|
newline
|
|
bitfld.long 0x00 15. " SHIFTBUF[15] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " SHIFTBUF[14] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " SHIFTBUF[13] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " SHIFTBUF[12] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 11. " SHIFTBUF[11] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " SHIFTBUF[10] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " SHIFTBUF[9] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " SHIFTBUF[8] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 7. " SHIFTBUF[7] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " SHIFTBUF[6] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SHIFTBUF[5] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SHIFTBUF[4] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 3. " SHIFTBUF[3] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SHIFTBUF[2] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SHIFTBUF[1] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SHIFTBUF[0] ,Shift buffer mask" "Not masked,Masked"
|
|
group.long (0x8+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_2,Shifter Buffer 2 Bit Swapped Register"
|
|
group.long (0x8+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_2,Shifter Buffer 2 Byte Swapped Register"
|
|
group.long (0x8+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_2,Shifter Buffer 2 Bit Byte Swapped Register"
|
|
else
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_2,Shifter Configuration 2 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x8+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_2,Shifter Buffer 2 Register"
|
|
group.long (0x8+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_2,Shifter Buffer 2 Bit Swapped Register"
|
|
group.long (0x8+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_2,Shifter Buffer 2 Byte Swapped Register"
|
|
group.long (0x8+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_2,Shifter Buffer 2 Bit Byte Swapped Register"
|
|
endif
|
|
group.long (0xC+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_3,Shifter Control 3 Register"
|
|
bitfld.long 0x00 24.--26. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,Timer 5,Timer 6,Timer 7"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Posedge,Negedge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,State mode,Logic mode"
|
|
newline
|
|
if (((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x05)
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_3,Shifter Configuration 3 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
group.long (0xC+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_3,Shifter Buffer 3 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SHIFTBUF[31:16] ,Shift buffer data to match"
|
|
newline
|
|
bitfld.long 0x00 15. " SHIFTBUF[15] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " SHIFTBUF[14] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " SHIFTBUF[13] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " SHIFTBUF[12] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 11. " SHIFTBUF[11] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " SHIFTBUF[10] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " SHIFTBUF[9] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " SHIFTBUF[8] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 7. " SHIFTBUF[7] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " SHIFTBUF[6] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SHIFTBUF[5] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SHIFTBUF[4] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 3. " SHIFTBUF[3] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SHIFTBUF[2] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SHIFTBUF[1] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SHIFTBUF[0] ,Shift buffer mask" "Not masked,Masked"
|
|
group.long (0xC+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_3,Shifter Buffer 3 Bit Swapped Register"
|
|
group.long (0xC+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_3,Shifter Buffer 3 Byte Swapped Register"
|
|
group.long (0xC+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_3,Shifter Buffer 3 Bit Byte Swapped Register"
|
|
else
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_3,Shifter Configuration 3 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0xC+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_3,Shifter Buffer 3 Register"
|
|
group.long (0xC+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_3,Shifter Buffer 3 Bit Swapped Register"
|
|
group.long (0xC+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_3,Shifter Buffer 3 Byte Swapped Register"
|
|
group.long (0xC+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_3,Shifter Buffer 3 Bit Byte Swapped Register"
|
|
endif
|
|
group.long (0x10+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_4,Shifter Control 4 Register"
|
|
bitfld.long 0x00 24.--26. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,Timer 5,Timer 6,Timer 7"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Posedge,Negedge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,State mode,Logic mode"
|
|
newline
|
|
if (((per.l(ad:0x401AC000+0x80+0x10))&0x07)==0x05)
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_4,Shifter Configuration 4 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
group.long (0x10+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_4,Shifter Buffer 4 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SHIFTBUF[31:16] ,Shift buffer data to match"
|
|
newline
|
|
bitfld.long 0x00 15. " SHIFTBUF[15] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " SHIFTBUF[14] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " SHIFTBUF[13] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " SHIFTBUF[12] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 11. " SHIFTBUF[11] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " SHIFTBUF[10] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " SHIFTBUF[9] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " SHIFTBUF[8] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 7. " SHIFTBUF[7] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " SHIFTBUF[6] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SHIFTBUF[5] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SHIFTBUF[4] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 3. " SHIFTBUF[3] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SHIFTBUF[2] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SHIFTBUF[1] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SHIFTBUF[0] ,Shift buffer mask" "Not masked,Masked"
|
|
group.long (0x10+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_4,Shifter Buffer 4 Bit Swapped Register"
|
|
group.long (0x10+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_4,Shifter Buffer 4 Byte Swapped Register"
|
|
group.long (0x10+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_4,Shifter Buffer 4 Bit Byte Swapped Register"
|
|
else
|
|
group.long (0x10+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_4,Shifter Configuration 4 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x10+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_4,Shifter Buffer 4 Register"
|
|
group.long (0x10+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_4,Shifter Buffer 4 Bit Swapped Register"
|
|
group.long (0x10+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_4,Shifter Buffer 4 Byte Swapped Register"
|
|
group.long (0x10+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_4,Shifter Buffer 4 Bit Byte Swapped Register"
|
|
endif
|
|
group.long (0x14+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_5,Shifter Control 5 Register"
|
|
bitfld.long 0x00 24.--26. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,Timer 5,Timer 6,Timer 7"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Posedge,Negedge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,State mode,Logic mode"
|
|
newline
|
|
if (((per.l(ad:0x401AC000+0x80+0x14))&0x07)==0x05)
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_5,Shifter Configuration 5 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
group.long (0x14+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_5,Shifter Buffer 5 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SHIFTBUF[31:16] ,Shift buffer data to match"
|
|
newline
|
|
bitfld.long 0x00 15. " SHIFTBUF[15] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " SHIFTBUF[14] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " SHIFTBUF[13] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " SHIFTBUF[12] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 11. " SHIFTBUF[11] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " SHIFTBUF[10] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " SHIFTBUF[9] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " SHIFTBUF[8] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 7. " SHIFTBUF[7] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " SHIFTBUF[6] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SHIFTBUF[5] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SHIFTBUF[4] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 3. " SHIFTBUF[3] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SHIFTBUF[2] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SHIFTBUF[1] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SHIFTBUF[0] ,Shift buffer mask" "Not masked,Masked"
|
|
group.long (0x14+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_5,Shifter Buffer 5 Bit Swapped Register"
|
|
group.long (0x14+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_5,Shifter Buffer 5 Byte Swapped Register"
|
|
group.long (0x14+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_5,Shifter Buffer 5 Bit Byte Swapped Register"
|
|
else
|
|
group.long (0x14+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_5,Shifter Configuration 5 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x14+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_5,Shifter Buffer 5 Register"
|
|
group.long (0x14+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_5,Shifter Buffer 5 Bit Swapped Register"
|
|
group.long (0x14+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_5,Shifter Buffer 5 Byte Swapped Register"
|
|
group.long (0x14+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_5,Shifter Buffer 5 Bit Byte Swapped Register"
|
|
endif
|
|
group.long (0x18+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_6,Shifter Control 6 Register"
|
|
bitfld.long 0x00 24.--26. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,Timer 5,Timer 6,Timer 7"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Posedge,Negedge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,State mode,Logic mode"
|
|
newline
|
|
if (((per.l(ad:0x401AC000+0x80+0x18))&0x07)==0x05)
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_6,Shifter Configuration 6 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
group.long (0x18+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_6,Shifter Buffer 6 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SHIFTBUF[31:16] ,Shift buffer data to match"
|
|
newline
|
|
bitfld.long 0x00 15. " SHIFTBUF[15] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " SHIFTBUF[14] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " SHIFTBUF[13] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " SHIFTBUF[12] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 11. " SHIFTBUF[11] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " SHIFTBUF[10] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " SHIFTBUF[9] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " SHIFTBUF[8] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 7. " SHIFTBUF[7] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " SHIFTBUF[6] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SHIFTBUF[5] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SHIFTBUF[4] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 3. " SHIFTBUF[3] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SHIFTBUF[2] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SHIFTBUF[1] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SHIFTBUF[0] ,Shift buffer mask" "Not masked,Masked"
|
|
group.long (0x18+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_6,Shifter Buffer 6 Bit Swapped Register"
|
|
group.long (0x18+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_6,Shifter Buffer 6 Byte Swapped Register"
|
|
group.long (0x18+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_6,Shifter Buffer 6 Bit Byte Swapped Register"
|
|
else
|
|
group.long (0x18+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_6,Shifter Configuration 6 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x18+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_6,Shifter Buffer 6 Register"
|
|
group.long (0x18+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_6,Shifter Buffer 6 Bit Swapped Register"
|
|
group.long (0x18+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_6,Shifter Buffer 6 Byte Swapped Register"
|
|
group.long (0x18+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_6,Shifter Buffer 6 Bit Byte Swapped Register"
|
|
endif
|
|
group.long (0x1C+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_7,Shifter Control 7 Register"
|
|
bitfld.long 0x00 24.--26. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,Timer 5,Timer 6,Timer 7"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Posedge,Negedge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,State mode,Logic mode"
|
|
newline
|
|
if (((per.l(ad:0x401AC000+0x80+0x1C))&0x07)==0x05)
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_7,Shifter Configuration 7 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
group.long (0x1C+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_7,Shifter Buffer 7 Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SHIFTBUF[31:16] ,Shift buffer data to match"
|
|
newline
|
|
bitfld.long 0x00 15. " SHIFTBUF[15] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " SHIFTBUF[14] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " SHIFTBUF[13] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " SHIFTBUF[12] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 11. " SHIFTBUF[11] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " SHIFTBUF[10] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " SHIFTBUF[9] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " SHIFTBUF[8] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 7. " SHIFTBUF[7] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " SHIFTBUF[6] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " SHIFTBUF[5] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " SHIFTBUF[4] ,Shift buffer mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 3. " SHIFTBUF[3] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " SHIFTBUF[2] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " SHIFTBUF[1] ,Shift buffer mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " SHIFTBUF[0] ,Shift buffer mask" "Not masked,Masked"
|
|
group.long (0x1C+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_7,Shifter Buffer 7 Bit Swapped Register"
|
|
group.long (0x1C+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_7,Shifter Buffer 7 Byte Swapped Register"
|
|
group.long (0x1C+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_7,Shifter Buffer 7 Bit Byte Swapped Register"
|
|
else
|
|
group.long (0x1C+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_7,Shifter Configuration 7 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit shift,4-bit shift,4-bit shift,4-bit shift,8-bit shift,8-bit shift,8-bit shift,8-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,16-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift,32-bit shift"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x1C+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_7,Shifter Buffer 7 Register"
|
|
group.long (0x1C+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_7,Shifter Buffer 7 Bit Swapped Register"
|
|
group.long (0x1C+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_7,Shifter Buffer 7 Byte Swapped Register"
|
|
group.long (0x1C+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_7,Shifter Buffer 7 Bit Byte Swapped Register"
|
|
endif
|
|
tree.end
|
|
width 10.
|
|
tree "Timer Registers"
|
|
if (((per.l(ad:0x401AC000+0x400+0x0))&0x400000)==0x400000)
|
|
group.long (0x0+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_0,Timer Control 0 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,CMP_1,,PIT_0,PIT_1,PIT_2,PIT_3,FTM_0,FTM_1,FTM_2,FTM_3,RTC alarm,RTC seconds,LPTMR,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
group.long (0x0+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_0,Timer Control 0 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,Shifter 4 status flag,FXIO0_D9,Timer 4 trigger output,FXIO0_D10,Shifter 5 status flag,FXIO0_D11,Timer 5 trigger output,FXIO0_D12,Shifter 6 status flag,FXIO0_D13,Timer 6 trigger output,FXIO0_D14,Shifter 7 status flag,FXIO0_D15,Timer 7 trigger output,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
group.long (0x0+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_0,Timer Configuration 0 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (and optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis.,Timer cmp.,Timer cmp. & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp.,On timer disable,On timer cmp. & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x0))&0x3)==0x1)
|
|
group.long (0x0+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_0,Timer Compare 0 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x0))&0x3)==0x2)
|
|
group.long (0x0+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_0,Timer Compare 0 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x0))&0x3)==0x3)
|
|
group.long (0x0+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_0,Timer Compare 0 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
else
|
|
group.long (0x0+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_0,Timer Compare 0 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
if (((per.l(ad:0x401AC000+0x400+0x4))&0x400000)==0x400000)
|
|
group.long (0x4+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_1,Timer Control 1 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,CMP_1,,PIT_0,PIT_1,PIT_2,PIT_3,FTM_0,FTM_1,FTM_2,FTM_3,RTC alarm,RTC seconds,LPTMR,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
group.long (0x4+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_1,Timer Control 1 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,Shifter 4 status flag,FXIO0_D9,Timer 4 trigger output,FXIO0_D10,Shifter 5 status flag,FXIO0_D11,Timer 5 trigger output,FXIO0_D12,Shifter 6 status flag,FXIO0_D13,Timer 6 trigger output,FXIO0_D14,Shifter 7 status flag,FXIO0_D15,Timer 7 trigger output,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
group.long (0x4+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_1,Timer Configuration 1 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (and optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis.,Timer cmp.,Timer cmp. & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp.,On timer disable,On timer cmp. & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x4))&0x3)==0x1)
|
|
group.long (0x4+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_1,Timer Compare 1 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x4))&0x3)==0x2)
|
|
group.long (0x4+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_1,Timer Compare 1 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x4))&0x3)==0x3)
|
|
group.long (0x4+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_1,Timer Compare 1 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
else
|
|
group.long (0x4+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_1,Timer Compare 1 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
if (((per.l(ad:0x401AC000+0x400+0x8))&0x400000)==0x400000)
|
|
group.long (0x8+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_2,Timer Control 2 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,CMP_1,,PIT_0,PIT_1,PIT_2,PIT_3,FTM_0,FTM_1,FTM_2,FTM_3,RTC alarm,RTC seconds,LPTMR,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
group.long (0x8+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_2,Timer Control 2 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,Shifter 4 status flag,FXIO0_D9,Timer 4 trigger output,FXIO0_D10,Shifter 5 status flag,FXIO0_D11,Timer 5 trigger output,FXIO0_D12,Shifter 6 status flag,FXIO0_D13,Timer 6 trigger output,FXIO0_D14,Shifter 7 status flag,FXIO0_D15,Timer 7 trigger output,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
group.long (0x8+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_2,Timer Configuration 2 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (and optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis.,Timer cmp.,Timer cmp. & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp.,On timer disable,On timer cmp. & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x8))&0x3)==0x1)
|
|
group.long (0x8+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_2,Timer Compare 2 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x8))&0x3)==0x2)
|
|
group.long (0x8+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_2,Timer Compare 2 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x8))&0x3)==0x3)
|
|
group.long (0x8+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_2,Timer Compare 2 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
else
|
|
group.long (0x8+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_2,Timer Compare 2 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
if (((per.l(ad:0x401AC000+0x400+0xC))&0x400000)==0x400000)
|
|
group.long (0xC+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_3,Timer Control 3 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,CMP_1,,PIT_0,PIT_1,PIT_2,PIT_3,FTM_0,FTM_1,FTM_2,FTM_3,RTC alarm,RTC seconds,LPTMR,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
group.long (0xC+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_3,Timer Control 3 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,Shifter 4 status flag,FXIO0_D9,Timer 4 trigger output,FXIO0_D10,Shifter 5 status flag,FXIO0_D11,Timer 5 trigger output,FXIO0_D12,Shifter 6 status flag,FXIO0_D13,Timer 6 trigger output,FXIO0_D14,Shifter 7 status flag,FXIO0_D15,Timer 7 trigger output,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
group.long (0xC+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_3,Timer Configuration 3 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (and optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis.,Timer cmp.,Timer cmp. & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp.,On timer disable,On timer cmp. & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0xC))&0x3)==0x1)
|
|
group.long (0xC+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_3,Timer Compare 3 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0xC))&0x3)==0x2)
|
|
group.long (0xC+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_3,Timer Compare 3 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0xC))&0x3)==0x3)
|
|
group.long (0xC+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_3,Timer Compare 3 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
else
|
|
group.long (0xC+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_3,Timer Compare 3 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
if (((per.l(ad:0x401AC000+0x400+0x10))&0x400000)==0x400000)
|
|
group.long (0x10+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_4,Timer Control 4 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,CMP_1,,PIT_0,PIT_1,PIT_2,PIT_3,FTM_0,FTM_1,FTM_2,FTM_3,RTC alarm,RTC seconds,LPTMR,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
group.long (0x10+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_4,Timer Control 4 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,Shifter 4 status flag,FXIO0_D9,Timer 4 trigger output,FXIO0_D10,Shifter 5 status flag,FXIO0_D11,Timer 5 trigger output,FXIO0_D12,Shifter 6 status flag,FXIO0_D13,Timer 6 trigger output,FXIO0_D14,Shifter 7 status flag,FXIO0_D15,Timer 7 trigger output,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
group.long (0x10+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_4,Timer Configuration 4 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (and optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis.,Timer cmp.,Timer cmp. & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp.,On timer disable,On timer cmp. & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x10))&0x3)==0x1)
|
|
group.long (0x10+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_4,Timer Compare 4 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x10))&0x3)==0x2)
|
|
group.long (0x10+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_4,Timer Compare 4 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x10))&0x3)==0x3)
|
|
group.long (0x10+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_4,Timer Compare 4 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
else
|
|
group.long (0x10+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_4,Timer Compare 4 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
if (((per.l(ad:0x401AC000+0x400+0x14))&0x400000)==0x400000)
|
|
group.long (0x14+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_5,Timer Control 5 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,CMP_1,,PIT_0,PIT_1,PIT_2,PIT_3,FTM_0,FTM_1,FTM_2,FTM_3,RTC alarm,RTC seconds,LPTMR,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
group.long (0x14+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_5,Timer Control 5 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,Shifter 4 status flag,FXIO0_D9,Timer 4 trigger output,FXIO0_D10,Shifter 5 status flag,FXIO0_D11,Timer 5 trigger output,FXIO0_D12,Shifter 6 status flag,FXIO0_D13,Timer 6 trigger output,FXIO0_D14,Shifter 7 status flag,FXIO0_D15,Timer 7 trigger output,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
group.long (0x14+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_5,Timer Configuration 5 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (and optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis.,Timer cmp.,Timer cmp. & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp.,On timer disable,On timer cmp. & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x14))&0x3)==0x1)
|
|
group.long (0x14+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_5,Timer Compare 5 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x14))&0x3)==0x2)
|
|
group.long (0x14+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_5,Timer Compare 5 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x14))&0x3)==0x3)
|
|
group.long (0x14+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_5,Timer Compare 5 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
else
|
|
group.long (0x14+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_5,Timer Compare 5 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
if (((per.l(ad:0x401AC000+0x400+0x18))&0x400000)==0x400000)
|
|
group.long (0x18+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_6,Timer Control 6 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,CMP_1,,PIT_0,PIT_1,PIT_2,PIT_3,FTM_0,FTM_1,FTM_2,FTM_3,RTC alarm,RTC seconds,LPTMR,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
group.long (0x18+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_6,Timer Control 6 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,Shifter 4 status flag,FXIO0_D9,Timer 4 trigger output,FXIO0_D10,Shifter 5 status flag,FXIO0_D11,Timer 5 trigger output,FXIO0_D12,Shifter 6 status flag,FXIO0_D13,Timer 6 trigger output,FXIO0_D14,Shifter 7 status flag,FXIO0_D15,Timer 7 trigger output,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
group.long (0x18+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_6,Timer Configuration 6 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (and optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis.,Timer cmp.,Timer cmp. & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp.,On timer disable,On timer cmp. & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x18))&0x3)==0x1)
|
|
group.long (0x18+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_6,Timer Compare 6 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x18))&0x3)==0x2)
|
|
group.long (0x18+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_6,Timer Compare 6 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x18))&0x3)==0x3)
|
|
group.long (0x18+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_6,Timer Compare 6 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
else
|
|
group.long (0x18+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_6,Timer Compare 6 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
if (((per.l(ad:0x401AC000+0x400+0x1C))&0x400000)==0x400000)
|
|
group.long (0x1C+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_7,Timer Control 7 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,CMP_1,,PIT_0,PIT_1,PIT_2,PIT_3,FTM_0,FTM_1,FTM_2,FTM_3,RTC alarm,RTC seconds,LPTMR,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
group.long (0x1C+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_7,Timer Control 7 Register"
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,Shifter 4 status flag,FXIO0_D9,Timer 4 trigger output,FXIO0_D10,Shifter 5 status flag,FXIO0_D11,Timer 5 trigger output,FXIO0_D12,Shifter 6 status flag,FXIO0_D13,Timer 6 trigger output,FXIO0_D14,Shifter 7 status flag,FXIO0_D15,Timer 7 trigger output,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
group.long (0x1C+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_7,Timer Configuration 7 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (and optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis.,Timer cmp.,Timer cmp. & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp.,On timer disable,On timer cmp. & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x1C))&0x3)==0x1)
|
|
group.long (0x1C+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_7,Timer Compare 7 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x1C))&0x3)==0x2)
|
|
group.long (0x1C+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_7,Timer Compare 7 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x1C))&0x3)==0x3)
|
|
group.long (0x1C+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_7,Timer Compare 7 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
else
|
|
group.long (0x1C+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_7,Timer Compare 7 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
tree.end
|
|
width 15.
|
|
tree "Shifter Buffers"
|
|
group.long (0x0+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS_0,Shifter Buffer 0 Nibble Byte Swapped Register"
|
|
group.long (0x0+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS_0,Shifter Buffer 0 Half Word Swapped Register"
|
|
group.long (0x0+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS_0,Shifter Buffer 0 Nibble Swapped Register"
|
|
group.long (0x4+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS_1,Shifter Buffer 1 Nibble Byte Swapped Register"
|
|
group.long (0x4+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS_1,Shifter Buffer 1 Half Word Swapped Register"
|
|
group.long (0x4+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS_1,Shifter Buffer 1 Nibble Swapped Register"
|
|
group.long (0x8+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS_2,Shifter Buffer 2 Nibble Byte Swapped Register"
|
|
group.long (0x8+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS_2,Shifter Buffer 2 Half Word Swapped Register"
|
|
group.long (0x8+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS_2,Shifter Buffer 2 Nibble Swapped Register"
|
|
group.long (0xC+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS_3,Shifter Buffer 3 Nibble Byte Swapped Register"
|
|
group.long (0xC+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS_3,Shifter Buffer 3 Half Word Swapped Register"
|
|
group.long (0xC+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS_3,Shifter Buffer 3 Nibble Swapped Register"
|
|
group.long (0x10+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS_4,Shifter Buffer 4 Nibble Byte Swapped Register"
|
|
group.long (0x10+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS_4,Shifter Buffer 4 Half Word Swapped Register"
|
|
group.long (0x10+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS_4,Shifter Buffer 4 Nibble Swapped Register"
|
|
group.long (0x14+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS_5,Shifter Buffer 5 Nibble Byte Swapped Register"
|
|
group.long (0x14+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS_5,Shifter Buffer 5 Half Word Swapped Register"
|
|
group.long (0x14+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS_5,Shifter Buffer 5 Nibble Swapped Register"
|
|
group.long (0x18+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS_6,Shifter Buffer 6 Nibble Byte Swapped Register"
|
|
group.long (0x18+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS_6,Shifter Buffer 6 Half Word Swapped Register"
|
|
group.long (0x18+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS_6,Shifter Buffer 6 Nibble Swapped Register"
|
|
group.long (0x1C+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS_7,Shifter Buffer 7 Nibble Byte Swapped Register"
|
|
group.long (0x1C+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS_7,Shifter Buffer 7 Half Word Swapped Register"
|
|
group.long (0x1C+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS_7,Shifter Buffer 7 Nibble Swapped Register"
|
|
tree.end
|
|
else
|
|
width 15.
|
|
tree "Shifter 0"
|
|
group.long (0x0+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_0,Shifter Control 0 Register"
|
|
bitfld.long 0x00 24.--25. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Pos. edge,Neg. edge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO_D0,FXIO_D1,FXIO_D2,FXIO_D3,FXIO_D4,FXIO_D5,FXIO_D6,FXIO_D7,FXIO_D8,FXIO_D9,FXIO_D10,FXIO_D11,FXIO_D12,FXIO_D13,FXIO_D14,FXIO_D15,FXIO_D16,FXIO_D17,FXIO_D18,FXIO_D19,FXIO_D20,FXIO_D21,FXIO_D22,FXIO_D23,FXIO_D24,FXIO_D25,FXIO_D26,FXIO_D27,FXIO_D28,FXIO_D29,FXIO_D30,FXIO_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive,Transmit,,Match store,Match continuous,State,Logic"
|
|
else
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,?..."
|
|
endif
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
if ((((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x05)||(((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x00))
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_0,Shifter Configuration 0 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit,4-bit,4-bit,4-bit,8-bit,8-bit,8-bit,8-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
elif (((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x06)
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_0,Shifter Configuration 0 Register"
|
|
bitfld.long 0x00 19. " PWIDTH[3] ,Pin FXIO_D7 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 18. " [2] ,Pin FXIO_D6 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 17. " [1] ,Pin FXIO_D5 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " [0] ,Pin FXIO_D4 disable" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 5. " SSTOP[1] ,Pin FXIO_D3 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " [0] ,Pin FXIO_D2 disable" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " SSTART[1] ,Pin FXIO_D1 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " [0] ,Pin FXIO_D0 disable" "Enabled,Disabled"
|
|
elif (((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x07)
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_0,Shifter Configuration 0 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 5. " SSTOP[1] ,Pin FXIO_D3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [0] ,Pin FXIO_D2 mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 1. " SSTART[1] ,Pin FXIO_D1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Pin FXIO_D0 mask" "Not masked,Masked"
|
|
elif ((((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x01)||(((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x02)||(((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x04))
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_0,Shifter Configuration 0 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit,4-bit,4-bit,4-bit,8-bit,8-bit,8-bit,8-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,Output 0 / Expect 0,Output 1 / Expect 1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Load on enable,Load on 1st shift,Output 0 / Expect 0,Output 1 / Expect 1"
|
|
endif
|
|
group.long (0x0+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_0,Shifter Buffer 0 Register"
|
|
group.long (0x0+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_0,Shifter Buffer 0 Bit Swapped Register"
|
|
group.long (0x0+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_0,Shifter Buffer 0 Byte Swapped Register"
|
|
group.long (0x0+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_0,Shifter Buffer 0 Bit Byte Swapped Register"
|
|
else
|
|
if (((per.l(ad:0x401AC000+0x80+0x0))&0x07)==0x05)
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_0,Shifter Configuration 0 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
hgroup.long (0x0+0x200)++0x03
|
|
hide.long 0x00 "SHIFTBUF_0,Shifter Buffer 0 Register"
|
|
in
|
|
hgroup.long (0x0+0x280)++0x03
|
|
hide.long 0x00 "SHIFTBUFBIS_0,Shifter Buffer 0 Bit Swapped Register"
|
|
in
|
|
hgroup.long (0x0+0x300)++0x03
|
|
hide.long 0x00 "SHIFTBUFBYS_0,Shifter Buffer 0 Byte Swapped Register"
|
|
in
|
|
hgroup.long (0x0+0x380)++0x03
|
|
hide.long 0x00 "SHIFTBUFBBS_0,Shifter Buffer 0 Bit Byte Swapped Register"
|
|
in
|
|
else
|
|
group.long (0x0+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_0,Shifter Configuration 0 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x0+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_0,Shifter Buffer 0 Register"
|
|
group.long (0x0+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_0,Shifter Buffer 0 Bit Swapped Register"
|
|
group.long (0x0+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_0,Shifter Buffer 0 Byte Swapped Register"
|
|
group.long (0x0+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_0,Shifter Buffer 0 Bit Byte Swapped Register"
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "Shifter 1"
|
|
group.long (0x4+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_1,Shifter Control 1 Register"
|
|
bitfld.long 0x00 24.--25. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Pos. edge,Neg. edge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO_D0,FXIO_D1,FXIO_D2,FXIO_D3,FXIO_D4,FXIO_D5,FXIO_D6,FXIO_D7,FXIO_D8,FXIO_D9,FXIO_D10,FXIO_D11,FXIO_D12,FXIO_D13,FXIO_D14,FXIO_D15,FXIO_D16,FXIO_D17,FXIO_D18,FXIO_D19,FXIO_D20,FXIO_D21,FXIO_D22,FXIO_D23,FXIO_D24,FXIO_D25,FXIO_D26,FXIO_D27,FXIO_D28,FXIO_D29,FXIO_D30,FXIO_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive,Transmit,,Match store,Match continuous,State,Logic"
|
|
else
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,?..."
|
|
endif
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
if ((((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x05)||(((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x00))
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_1,Shifter Configuration 1 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit,4-bit,4-bit,4-bit,8-bit,8-bit,8-bit,8-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
elif (((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x06)
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_1,Shifter Configuration 1 Register"
|
|
bitfld.long 0x00 19. " PWIDTH[3] ,Pin FXIO_D7 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 18. " [2] ,Pin FXIO_D6 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 17. " [1] ,Pin FXIO_D5 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " [0] ,Pin FXIO_D4 disable" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 5. " SSTOP[1] ,Pin FXIO_D3 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " [0] ,Pin FXIO_D2 disable" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " SSTART[1] ,Pin FXIO_D1 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " [0] ,Pin FXIO_D0 disable" "Enabled,Disabled"
|
|
elif (((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x07)
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_1,Shifter Configuration 1 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 5. " SSTOP[1] ,Pin FXIO_D3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [0] ,Pin FXIO_D2 mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 1. " SSTART[1] ,Pin FXIO_D1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Pin FXIO_D0 mask" "Not masked,Masked"
|
|
elif ((((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x01)||(((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x02)||(((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x04))
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_1,Shifter Configuration 1 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit,4-bit,4-bit,4-bit,8-bit,8-bit,8-bit,8-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,Output 0 / Expect 0,Output 1 / Expect 1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Load on enable,Load on 1st shift,Output 0 / Expect 0,Output 1 / Expect 1"
|
|
endif
|
|
group.long (0x4+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_1,Shifter Buffer 1 Register"
|
|
group.long (0x4+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_1,Shifter Buffer 1 Bit Swapped Register"
|
|
group.long (0x4+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_1,Shifter Buffer 1 Byte Swapped Register"
|
|
group.long (0x4+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_1,Shifter Buffer 1 Bit Byte Swapped Register"
|
|
else
|
|
if (((per.l(ad:0x401AC000+0x80+0x4))&0x07)==0x05)
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_1,Shifter Configuration 1 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
hgroup.long (0x4+0x200)++0x03
|
|
hide.long 0x00 "SHIFTBUF_1,Shifter Buffer 1 Register"
|
|
in
|
|
hgroup.long (0x4+0x280)++0x03
|
|
hide.long 0x00 "SHIFTBUFBIS_1,Shifter Buffer 1 Bit Swapped Register"
|
|
in
|
|
hgroup.long (0x4+0x300)++0x03
|
|
hide.long 0x00 "SHIFTBUFBYS_1,Shifter Buffer 1 Byte Swapped Register"
|
|
in
|
|
hgroup.long (0x4+0x380)++0x03
|
|
hide.long 0x00 "SHIFTBUFBBS_1,Shifter Buffer 1 Bit Byte Swapped Register"
|
|
in
|
|
else
|
|
group.long (0x4+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_1,Shifter Configuration 1 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x4+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_1,Shifter Buffer 1 Register"
|
|
group.long (0x4+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_1,Shifter Buffer 1 Bit Swapped Register"
|
|
group.long (0x4+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_1,Shifter Buffer 1 Byte Swapped Register"
|
|
group.long (0x4+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_1,Shifter Buffer 1 Bit Byte Swapped Register"
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "Shifter 2"
|
|
group.long (0x8+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_2,Shifter Control 2 Register"
|
|
bitfld.long 0x00 24.--25. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Pos. edge,Neg. edge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO_D0,FXIO_D1,FXIO_D2,FXIO_D3,FXIO_D4,FXIO_D5,FXIO_D6,FXIO_D7,FXIO_D8,FXIO_D9,FXIO_D10,FXIO_D11,FXIO_D12,FXIO_D13,FXIO_D14,FXIO_D15,FXIO_D16,FXIO_D17,FXIO_D18,FXIO_D19,FXIO_D20,FXIO_D21,FXIO_D22,FXIO_D23,FXIO_D24,FXIO_D25,FXIO_D26,FXIO_D27,FXIO_D28,FXIO_D29,FXIO_D30,FXIO_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive,Transmit,,Match store,Match continuous,State,Logic"
|
|
else
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,?..."
|
|
endif
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
if ((((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x05)||(((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x00))
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_2,Shifter Configuration 2 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit,4-bit,4-bit,4-bit,8-bit,8-bit,8-bit,8-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
elif (((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x06)
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_2,Shifter Configuration 2 Register"
|
|
bitfld.long 0x00 19. " PWIDTH[3] ,Pin FXIO_D7 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 18. " [2] ,Pin FXIO_D6 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 17. " [1] ,Pin FXIO_D5 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " [0] ,Pin FXIO_D4 disable" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 5. " SSTOP[1] ,Pin FXIO_D3 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " [0] ,Pin FXIO_D2 disable" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " SSTART[1] ,Pin FXIO_D1 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " [0] ,Pin FXIO_D0 disable" "Enabled,Disabled"
|
|
elif (((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x07)
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_2,Shifter Configuration 2 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 5. " SSTOP[1] ,Pin FXIO_D3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [0] ,Pin FXIO_D2 mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 1. " SSTART[1] ,Pin FXIO_D1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Pin FXIO_D0 mask" "Not masked,Masked"
|
|
elif ((((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x01)||(((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x02)||(((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x04))
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_2,Shifter Configuration 2 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit,4-bit,4-bit,4-bit,8-bit,8-bit,8-bit,8-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,Output 0 / Expect 0,Output 1 / Expect 1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Load on enable,Load on 1st shift,Output 0 / Expect 0,Output 1 / Expect 1"
|
|
endif
|
|
group.long (0x8+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_2,Shifter Buffer 2 Register"
|
|
group.long (0x8+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_2,Shifter Buffer 2 Bit Swapped Register"
|
|
group.long (0x8+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_2,Shifter Buffer 2 Byte Swapped Register"
|
|
group.long (0x8+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_2,Shifter Buffer 2 Bit Byte Swapped Register"
|
|
else
|
|
if (((per.l(ad:0x401AC000+0x80+0x8))&0x07)==0x05)
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_2,Shifter Configuration 2 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
hgroup.long (0x8+0x200)++0x03
|
|
hide.long 0x00 "SHIFTBUF_2,Shifter Buffer 2 Register"
|
|
in
|
|
hgroup.long (0x8+0x280)++0x03
|
|
hide.long 0x00 "SHIFTBUFBIS_2,Shifter Buffer 2 Bit Swapped Register"
|
|
in
|
|
hgroup.long (0x8+0x300)++0x03
|
|
hide.long 0x00 "SHIFTBUFBYS_2,Shifter Buffer 2 Byte Swapped Register"
|
|
in
|
|
hgroup.long (0x8+0x380)++0x03
|
|
hide.long 0x00 "SHIFTBUFBBS_2,Shifter Buffer 2 Bit Byte Swapped Register"
|
|
in
|
|
else
|
|
group.long (0x8+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_2,Shifter Configuration 2 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0x8+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_2,Shifter Buffer 2 Register"
|
|
group.long (0x8+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_2,Shifter Buffer 2 Bit Swapped Register"
|
|
group.long (0x8+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_2,Shifter Buffer 2 Byte Swapped Register"
|
|
group.long (0x8+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_2,Shifter Buffer 2 Bit Byte Swapped Register"
|
|
endif
|
|
endif
|
|
tree.end
|
|
tree "Shifter 3"
|
|
group.long (0xC+0x80)++0x03
|
|
line.long 0x00 "SHIFTCTL_3,Shifter Control 3 Register"
|
|
bitfld.long 0x00 24.--25. " TIMSEL ,Selects which timer is used for controlling the logic/shift register and generating the shift clock" "Timer 0,Timer 1,Timer 2,Timer 3"
|
|
bitfld.long 0x00 23. " TIMPOL ,Timer polarity" "Pos. edge,Neg. edge"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Shifter pin configuration" "Disabled,Open drain or bidir/Out,Bidir/Out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Shifter pin select" "FXIO_D0,FXIO_D1,FXIO_D2,FXIO_D3,FXIO_D4,FXIO_D5,FXIO_D6,FXIO_D7,FXIO_D8,FXIO_D9,FXIO_D10,FXIO_D11,FXIO_D12,FXIO_D13,FXIO_D14,FXIO_D15,FXIO_D16,FXIO_D17,FXIO_D18,FXIO_D19,FXIO_D20,FXIO_D21,FXIO_D22,FXIO_D23,FXIO_D24,FXIO_D25,FXIO_D26,FXIO_D27,FXIO_D28,FXIO_D29,FXIO_D30,FXIO_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Shifter pin select" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Shifter pin polarity" "Active high,Active low"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive,Transmit,,Match store,Match continuous,State,Logic"
|
|
else
|
|
bitfld.long 0x00 0.--2. " SMOD ,Configures the mode of the shifter" "Disabled,Receive mode,Transmit mode,,Match store,Match continuous,?..."
|
|
endif
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
if ((((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x05)||(((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x00))
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_3,Shifter Configuration 3 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit,4-bit,4-bit,4-bit,8-bit,8-bit,8-bit,8-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
elif (((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x06)
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_3,Shifter Configuration 3 Register"
|
|
bitfld.long 0x00 19. " PWIDTH[3] ,Pin FXIO_D7 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 18. " [2] ,Pin FXIO_D6 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 17. " [1] ,Pin FXIO_D5 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " [0] ,Pin FXIO_D4 disable" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 5. " SSTOP[1] ,Pin FXIO_D3 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " [0] ,Pin FXIO_D2 disable" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " SSTART[1] ,Pin FXIO_D1 disable" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " [0] ,Pin FXIO_D0 disable" "Enabled,Disabled"
|
|
elif (((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x07)
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_3,Shifter Configuration 3 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 5. " SSTOP[1] ,Pin FXIO_D3 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [0] ,Pin FXIO_D2 mask" "Not masked,Masked"
|
|
newline
|
|
bitfld.long 0x00 1. " SSTART[1] ,Pin FXIO_D1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Pin FXIO_D0 mask" "Not masked,Masked"
|
|
elif ((((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x01)||(((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x02)||(((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x04))
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_3,Shifter Configuration 3 Register"
|
|
bitfld.long 0x00 16.--20. " PWIDTH ,Parallel width" "1-bit,4-bit,4-bit,4-bit,8-bit,8-bit,8-bit,8-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,16-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,Output 0 / Expect 0,Output 1 / Expect 1"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Load on enable,Load on 1st shift,Output 0 / Expect 0,Output 1 / Expect 1"
|
|
endif
|
|
group.long (0xC+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_3,Shifter Buffer 3 Register"
|
|
group.long (0xC+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_3,Shifter Buffer 3 Bit Swapped Register"
|
|
group.long (0xC+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_3,Shifter Buffer 3 Byte Swapped Register"
|
|
group.long (0xC+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_3,Shifter Buffer 3 Bit Byte Swapped Register"
|
|
else
|
|
if (((per.l(ad:0x401AC000+0x80+0xC))&0x07)==0x05)
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_3,Shifter Configuration 3 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
hgroup.long (0xC+0x200)++0x03
|
|
hide.long 0x00 "SHIFTBUF_3,Shifter Buffer 3 Register"
|
|
in
|
|
hgroup.long (0xC+0x280)++0x03
|
|
hide.long 0x00 "SHIFTBUFBIS_3,Shifter Buffer 3 Bit Swapped Register"
|
|
in
|
|
hgroup.long (0xC+0x300)++0x03
|
|
hide.long 0x00 "SHIFTBUFBYS_3,Shifter Buffer 3 Byte Swapped Register"
|
|
in
|
|
hgroup.long (0xC+0x380)++0x03
|
|
hide.long 0x00 "SHIFTBUFBBS_3,Shifter Buffer 3 Bit Byte Swapped Register"
|
|
in
|
|
else
|
|
group.long (0xC+0x100)++0x03
|
|
line.long 0x00 "SHIFTCFG_3,Shifter Configuration 3 Register"
|
|
bitfld.long 0x00 8. " INSRC ,Selects the input source for the shifter" "Pin,Shifter N+1 output"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " SSTOP ,Shifter stop bit" "Disabled,,0 on store,1 on store"
|
|
newline
|
|
bitfld.long 0x00 0.--1. " SSTART ,Shifter start bit" "Disabled / load on enable,Disabled / load on first shift,0 before first shift,1 before first shift"
|
|
group.long (0xC+0x200)++0x03
|
|
line.long 0x00 "SHIFTBUF_3,Shifter Buffer 3 Register"
|
|
group.long (0xC+0x280)++0x03
|
|
line.long 0x00 "SHIFTBUFBIS_3,Shifter Buffer 3 Bit Swapped Register"
|
|
group.long (0xC+0x300)++0x03
|
|
line.long 0x00 "SHIFTBUFBYS_3,Shifter Buffer 3 Byte Swapped Register"
|
|
group.long (0xC+0x380)++0x03
|
|
line.long 0x00 "SHIFTBUFBBS_3,Shifter Buffer 3 Bit Byte Swapped Register"
|
|
endif
|
|
endif
|
|
tree.end
|
|
width 10.
|
|
tree "Timer 0"
|
|
if (((per.l(ad:0x401AC000+0x400+0x0))&0x400000)==0x400000)
|
|
group.long (0x0+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_0,Timer Control N Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,,FXIO0_D9,,FXIO0_D10,,FXIO0_D11,,FXIO0_D12,,FXIO0_D13,,FXIO0_D14,,FXIO0_D15,,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
else
|
|
bitfld.long 0x00 24.--27. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,,,PIT_0,PIT_1,,,TMP_0,TMP_1,TMP_2,,RTC alarm,RTC seconds,LPTMR,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--1. " TIMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
else
|
|
group.long (0x0+0x400)++0x03 "Timer 0"
|
|
line.long 0x00 "TIMCTL_0,Timer Control N Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
bitfld.long 0x00 24.--27. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--1. " TIMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
endif
|
|
group.long (0x0+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_0,Timer Configuration 0 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (And optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis,Timer cmp,Timer cmp & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp,On timer disable,On timer cmp & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x0))&0x3)==0x1)
|
|
group.long (0x0+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_0,Timer Compare 0 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x0))&0x3)==0x2)
|
|
group.long (0x0+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_0,Timer Compare 0 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x0))&0x3)==0x3)
|
|
group.long (0x0+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_0,Timer Compare 0 Register"
|
|
sif cpuis("IMXRT1021")
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider to equal (CMP[15:0] + 1)*2 (if shift clock source is timer output) or (CMP[15:0] + 1)/2 (if shift clock source is a pin or trigger input)"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
endif
|
|
else
|
|
group.long (0x0+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_0,Timer Compare 0 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
tree.end
|
|
tree "Timer 1"
|
|
if (((per.l(ad:0x401AC000+0x400+0x4))&0x400000)==0x400000)
|
|
group.long (0x4+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_1,Timer Control N Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,,FXIO0_D9,,FXIO0_D10,,FXIO0_D11,,FXIO0_D12,,FXIO0_D13,,FXIO0_D14,,FXIO0_D15,,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
else
|
|
bitfld.long 0x00 24.--27. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,,,PIT_0,PIT_1,,,TMP_0,TMP_1,TMP_2,,RTC alarm,RTC seconds,LPTMR,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--1. " TIMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
else
|
|
group.long (0x4+0x400)++0x03 "Timer 1"
|
|
line.long 0x00 "TIMCTL_1,Timer Control N Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
bitfld.long 0x00 24.--27. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--1. " TIMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
endif
|
|
group.long (0x4+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_1,Timer Configuration 1 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (And optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis,Timer cmp,Timer cmp & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp,On timer disable,On timer cmp & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x4))&0x3)==0x1)
|
|
group.long (0x4+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_1,Timer Compare 1 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x4))&0x3)==0x2)
|
|
group.long (0x4+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_1,Timer Compare 1 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x4))&0x3)==0x3)
|
|
group.long (0x4+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_1,Timer Compare 1 Register"
|
|
sif cpuis("IMXRT1021")
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider to equal (CMP[15:0] + 1)*2 (if shift clock source is timer output) or (CMP[15:0] + 1)/2 (if shift clock source is a pin or trigger input)"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
endif
|
|
else
|
|
group.long (0x4+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_1,Timer Compare 1 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
tree.end
|
|
tree "Timer 2"
|
|
if (((per.l(ad:0x401AC000+0x400+0x8))&0x400000)==0x400000)
|
|
group.long (0x8+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_2,Timer Control N Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,,FXIO0_D9,,FXIO0_D10,,FXIO0_D11,,FXIO0_D12,,FXIO0_D13,,FXIO0_D14,,FXIO0_D15,,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
else
|
|
bitfld.long 0x00 24.--27. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,,,PIT_0,PIT_1,,,TMP_0,TMP_1,TMP_2,,RTC alarm,RTC seconds,LPTMR,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--1. " TIMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
else
|
|
group.long (0x8+0x400)++0x03 "Timer 2"
|
|
line.long 0x00 "TIMCTL_2,Timer Control N Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
bitfld.long 0x00 24.--27. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--1. " TIMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
endif
|
|
group.long (0x8+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_2,Timer Configuration 2 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (And optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis,Timer cmp,Timer cmp & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp,On timer disable,On timer cmp & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0x8))&0x3)==0x1)
|
|
group.long (0x8+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_2,Timer Compare 2 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x8))&0x3)==0x2)
|
|
group.long (0x8+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_2,Timer Compare 2 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0x8))&0x3)==0x3)
|
|
group.long (0x8+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_2,Timer Compare 2 Register"
|
|
sif cpuis("IMXRT1021")
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider to equal (CMP[15:0] + 1)*2 (if shift clock source is timer output) or (CMP[15:0] + 1)/2 (if shift clock source is a pin or trigger input)"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
endif
|
|
else
|
|
group.long (0x8+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_2,Timer Compare 2 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
tree.end
|
|
tree "Timer 3"
|
|
if (((per.l(ad:0x401AC000+0x400+0xC))&0x400000)==0x400000)
|
|
group.long (0xC+0x400)++0x03
|
|
line.long 0x00 "TIMCTL_3,Timer Control N Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output,FXIO0_D8,,FXIO0_D9,,FXIO0_D10,,FXIO0_D11,,FXIO0_D12,,FXIO0_D13,,FXIO0_D14,,FXIO0_D15,,FXIO0_D16,,FXIO0_D17,,FXIO0_D18,,FXIO0_D19,,FXIO0_D20,,FXIO0_D21,,FXIO0_D22,,FXIO0_D23,,FXIO0_D24,,FXIO0_D25,,FXIO0_D26,,FXIO0_D27,,FXIO0_D28,,FXIO0_D29,,FXIO0_D30,,FXIO0_D31,?..."
|
|
else
|
|
bitfld.long 0x00 24.--27. " TRGSEL ,Trigger select" "EXTRG_IN,CMP_0,,,PIT_0,PIT_1,,,TMP_0,TMP_1,TMP_2,,RTC alarm,RTC seconds,LPTMR,?..."
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--1. " TIMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
else
|
|
group.long (0xC+0x400)++0x03 "Timer 3"
|
|
line.long 0x00 "TIMCTL_3,Timer Control N Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 24.--29. " TRGSEL ,Trigger select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
bitfld.long 0x00 24.--27. " TRGSEL ,Trigger select" "FXIO0_D0,Shifter 0 status flag,FXIO0_D1,Timer 0 trigger output,FXIO0_D2,Shifter 1 status flag,FXIO0_D3,Timer 1 trigger output,FXIO0_D4,Shifter 2 status flag,FXIO0_D5,Timer 2 trigger output,FXIO0_D6,Shifter 3 status flag,FXIO0_D7,Timer 3 trigger output"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 23. " TRGPOL ,Trigger polarity" "Active high,Active low"
|
|
newline
|
|
bitfld.long 0x00 22. " TRGSRC ,Trigger source" "External,Internal"
|
|
bitfld.long 0x00 16.--17. " PINCFG ,Timer pin configuration" "Disabled,Open drain or bidir out,Bidir out data,Output"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 8.--12. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7,FXIO0_D8,FXIO0_D9,FXIO0_D10,FXIO0_D11,FXIO0_D12,FXIO0_D13,FXIO0_D14,FXIO0_D15,FXIO0_D16,FXIO0_D17,FXIO0_D18,FXIO0_D19,FXIO0_D20,FXIO0_D21,FXIO0_D22,FXIO0_D23,FXIO0_D24,FXIO0_D25,FXIO0_D26,FXIO0_D27,FXIO0_D28,FXIO0_D29,FXIO0_D30,FXIO0_D31"
|
|
else
|
|
bitfld.long 0x00 8.--10. " PINSEL ,Selects which pin is used by the timer input or output" "FXIO0_D0,FXIO0_D1,FXIO0_D2,FXIO0_D3,FXIO0_D4,FXIO0_D5,FXIO0_D6,FXIO0_D7"
|
|
endif
|
|
bitfld.long 0x00 7. " PINPOL ,Timer pin polarity" "Active high,Active low"
|
|
newline
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x00 0.--1. " TIMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
else
|
|
bitfld.long 0x00 0.--1. " TMOD ,Timer mode" "Disabled,Dual 8-bit baud/bit,Dual 8-bit PWM,Single 16-bit"
|
|
endif
|
|
endif
|
|
group.long (0xC+0x480)++0x03
|
|
line.long 0x00 "TIMCFG_3,Timer Configuration 3 Register"
|
|
bitfld.long 0x00 24.--25. " TIMOUT ,Configures the initial state of the timer output and whether it is affected by the timer reset" "1 not affected,0 not affected,1 on reset,0 on reset"
|
|
bitfld.long 0x00 20.--21. " TIMDEC ,Configures the source of the timer decrement and the source of the shift clock" "Flexio clk / shift clk = timer out,Trigger input / shift clk = timer out,Pin input / shift clk = pin input,Trigger input / shift clk = trigger input"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " TIMRST ,Configures the condition that causes the timer counter (And optionally the timer output) to be reset" "Never,,Pin == timer output,Trigger == timer output,Pin rising,,Trigger rising,Trigger rising or falling"
|
|
bitfld.long 0x00 12.--14. " TIMDIS ,Configures the condition that causes the timer to be disabled and stop decrementing" "Never,Timer N+1 dis,Timer cmp,Timer cmp & trigger low,Pin both edges,Pin both edges & trigger high,Trigger falling,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--10. " TIMENA ,Configures the condition that causes the timer to be enabled and start decrementing" "Always enabled,Timer N-1 enable,Trigger high,Trigger & pin high,Pin rising,Pin rising & trigger high,Trigger rising,Trigger both edges"
|
|
bitfld.long 0x00 4.--5. " TSTOP ,Timer stop bit" "Disabled,On timer cmp,On timer disable,On timer cmp & disable"
|
|
newline
|
|
bitfld.long 0x00 1. " TSTART ,Timer start bit enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x401AC000+0x400+0xC))&0x3)==0x1)
|
|
group.long (0xC+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_3,Timer Compare 3 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the number of bits in each word equal to (CMP[15:8] + 1)/2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the baud rate divider equal to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0xC))&0x3)==0x2)
|
|
group.long (0xC+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_3,Timer Compare 3 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CMP[15:8] ,Configures the low period of the output to (CMP[15:8] + 1) * 2"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " CMP[7:0] ,Configures the high period of the output to (CMP[7:0] + 1) * 2"
|
|
elif (((per.l(ad:0x401AC000+0x400+0xC))&0x3)==0x3)
|
|
group.long (0xC+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_3,Timer Compare 3 Register"
|
|
sif cpuis("IMXRT1021")
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider to equal (CMP[15:0] + 1)*2 (if shift clock source is timer output) or (CMP[15:0] + 1)/2 (if shift clock source is a pin or trigger input)"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Baud rate divider (If shift clock source is timer output) to equal (CMP[15:0] + 1)*2 or"
|
|
endif
|
|
else
|
|
group.long (0xC+0x500)++0x03
|
|
line.long 0x00 "TIMCMP_3,Timer Compare 3 Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMP[15:0] ,Timer compare value"
|
|
endif
|
|
tree.end
|
|
endif
|
|
sif cpuis("IMXRT1021")
|
|
width 14.
|
|
newline
|
|
group.long (0x0+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS0,Shifter Buffer 0 Nibble Byte Swapped"
|
|
group.long (0x0+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS0,Shifter Buffer 0 Half Word Swapped"
|
|
group.long (0x0+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS0,Shifter Buffer 0 Nibble Swapped"
|
|
newline
|
|
group.long (0x4+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS1,Shifter Buffer 1 Nibble Byte Swapped"
|
|
group.long (0x4+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS1,Shifter Buffer 1 Half Word Swapped"
|
|
group.long (0x4+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS1,Shifter Buffer 1 Nibble Swapped"
|
|
newline
|
|
group.long (0x8+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS2,Shifter Buffer 2 Nibble Byte Swapped"
|
|
group.long (0x8+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS2,Shifter Buffer 2 Half Word Swapped"
|
|
group.long (0x8+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS2,Shifter Buffer 2 Nibble Swapped"
|
|
newline
|
|
group.long (0xC+0x680)++0x03
|
|
line.long 0x00 "SHIFTBUFNBS3,Shifter Buffer 3 Nibble Byte Swapped"
|
|
group.long (0xC+0x700)++0x03
|
|
line.long 0x00 "SHIFTBUFHWS3,Shifter Buffer 3 Half Word Swapped"
|
|
group.long (0xC+0x780)++0x03
|
|
line.long 0x00 "SHIFTBUFNIS3,Shifter Buffer 3 Nibble Swapped"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "eFlexPWM (Enhanced Flex Pulse Width Modulator)"
|
|
tree "PWM 1"
|
|
base ad:0x403DC000
|
|
width 14.
|
|
rgroup.word 0x0++0x01
|
|
line.word 0x00 "SM0CNT,Counter Register"
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<0))==(0x01<<0))
|
|
rgroup.word (0x0+0x02)++0x01
|
|
line.word 0x00 "SM0INIT,Initial Count Register"
|
|
else
|
|
group.word (0x0+0x02)++0x01
|
|
line.word 0x00 "SM0INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x0+0x04)++0x1
|
|
line.word 0x00 "SM0CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<0))==(0x01<<0))
|
|
if (((per.w(ad:0x403DC000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403DC000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<0))==(0x01<<0))
|
|
rgroup.word (0x0+0x08)++0x15
|
|
line.word 0x00 "SM0VAL0,Value Register 0"
|
|
line.word 0x02 "SM0FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM0VAL1,Value Register 1"
|
|
line.word 0x06 "SM0FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM0VAL2,Value Register 2"
|
|
line.word 0x0A "SM0FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM0VAL3,Value Register 3"
|
|
line.word 0x0E "SM0FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM0VAL4,Value Register 4"
|
|
line.word 0x12 "SM0FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM0VAL5,Value Register 5"
|
|
else
|
|
group.word (0x0+0x08)++0x15
|
|
line.word 0x00 "SM0VAL0,Value Register 0"
|
|
line.word 0x02 "SM0FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM0VAL1,Value Register 1"
|
|
line.word 0x06 "SM0FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM0VAL2,Value Register 2"
|
|
line.word 0x0A "SM0FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM0VAL3,Value Register 3"
|
|
line.word 0x0E "SM0FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM0VAL4,Value Register 4"
|
|
line.word 0x12 "SM0FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM0VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<0))==(0x01<<0))||(((per.w(ad:0x403DC000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x20)++0x01
|
|
line.word 0x00 "SM0FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x20)++0x01
|
|
line.word 0x00 "SM0FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x0+0x22)++0x1D
|
|
line.word 0x00 "SM0OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM0STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM0INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM0DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM0TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM0DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM0DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM0DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM0DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM0CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM0CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM0CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM0CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM0CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM0CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x0+0x40)++0x17
|
|
line.word 0x00 "SM0CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM0CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM0CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM0CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM0CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM0CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM0CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM0CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM0CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM0CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM0CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM0CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x60++0x01
|
|
line.word 0x00 "SM1CNT,Counter Register"
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<1))==(0x01<<1))
|
|
rgroup.word (0x60+0x02)++0x01
|
|
line.word 0x00 "SM1INIT,Initial Count Register"
|
|
else
|
|
group.word (0x60+0x02)++0x01
|
|
line.word 0x00 "SM1INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x60+0x04)++0x1
|
|
line.word 0x00 "SM1CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<1))==(0x01<<1))
|
|
if (((per.w(ad:0x403DC000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403DC000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<1))==(0x01<<1))
|
|
rgroup.word (0x60+0x08)++0x15
|
|
line.word 0x00 "SM1VAL0,Value Register 0"
|
|
line.word 0x02 "SM1FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM1VAL1,Value Register 1"
|
|
line.word 0x06 "SM1FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM1VAL2,Value Register 2"
|
|
line.word 0x0A "SM1FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM1VAL3,Value Register 3"
|
|
line.word 0x0E "SM1FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM1VAL4,Value Register 4"
|
|
line.word 0x12 "SM1FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM1VAL5,Value Register 5"
|
|
else
|
|
group.word (0x60+0x08)++0x15
|
|
line.word 0x00 "SM1VAL0,Value Register 0"
|
|
line.word 0x02 "SM1FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM1VAL1,Value Register 1"
|
|
line.word 0x06 "SM1FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM1VAL2,Value Register 2"
|
|
line.word 0x0A "SM1FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM1VAL3,Value Register 3"
|
|
line.word 0x0E "SM1FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM1VAL4,Value Register 4"
|
|
line.word 0x12 "SM1FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM1VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<1))==(0x01<<1))||(((per.w(ad:0x403DC000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x20)++0x01
|
|
line.word 0x00 "SM1FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x20)++0x01
|
|
line.word 0x00 "SM1FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x60+0x22)++0x1D
|
|
line.word 0x00 "SM1OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM1STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM1INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM1DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM1TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM1DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM1DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM1DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM1DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM1CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM1CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM1CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM1CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM1CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM1CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x60+0x40)++0x17
|
|
line.word 0x00 "SM1CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM1CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM1CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM1CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM1CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM1CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM1CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM1CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM1CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM1CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM1CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM1CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0xC0++0x01
|
|
line.word 0x00 "SM2CNT,Counter Register"
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<2))==(0x01<<2))
|
|
rgroup.word (0xC0+0x02)++0x01
|
|
line.word 0x00 "SM2INIT,Initial Count Register"
|
|
else
|
|
group.word (0xC0+0x02)++0x01
|
|
line.word 0x00 "SM2INIT,Initial Count Register"
|
|
endif
|
|
group.word (0xC0+0x04)++0x1
|
|
line.word 0x00 "SM2CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<2))==(0x01<<2))
|
|
if (((per.w(ad:0x403DC000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403DC000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<2))==(0x01<<2))
|
|
rgroup.word (0xC0+0x08)++0x15
|
|
line.word 0x00 "SM2VAL0,Value Register 0"
|
|
line.word 0x02 "SM2FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM2VAL1,Value Register 1"
|
|
line.word 0x06 "SM2FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM2VAL2,Value Register 2"
|
|
line.word 0x0A "SM2FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM2VAL3,Value Register 3"
|
|
line.word 0x0E "SM2FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM2VAL4,Value Register 4"
|
|
line.word 0x12 "SM2FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM2VAL5,Value Register 5"
|
|
else
|
|
group.word (0xC0+0x08)++0x15
|
|
line.word 0x00 "SM2VAL0,Value Register 0"
|
|
line.word 0x02 "SM2FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM2VAL1,Value Register 1"
|
|
line.word 0x06 "SM2FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM2VAL2,Value Register 2"
|
|
line.word 0x0A "SM2FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM2VAL3,Value Register 3"
|
|
line.word 0x0E "SM2FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM2VAL4,Value Register 4"
|
|
line.word 0x12 "SM2FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM2VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<2))==(0x01<<2))||(((per.w(ad:0x403DC000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x20)++0x01
|
|
line.word 0x00 "SM2FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x20)++0x01
|
|
line.word 0x00 "SM2FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0xC0+0x22)++0x1D
|
|
line.word 0x00 "SM2OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM2STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM2INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM2DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM2TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM2DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM2DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM2DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM2DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM2CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM2CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM2CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM2CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM2CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM2CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0xC0+0x40)++0x17
|
|
line.word 0x00 "SM2CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM2CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM2CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM2CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM2CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM2CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM2CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM2CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM2CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM2CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM2CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM2CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x120++0x01
|
|
line.word 0x00 "SM3CNT,Counter Register"
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<3))==(0x01<<3))
|
|
rgroup.word (0x120+0x02)++0x01
|
|
line.word 0x00 "SM3INIT,Initial Count Register"
|
|
else
|
|
group.word (0x120+0x02)++0x01
|
|
line.word 0x00 "SM3INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x120+0x04)++0x1
|
|
line.word 0x00 "SM3CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<3))==(0x01<<3))
|
|
if (((per.w(ad:0x403DC000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403DC000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<3))==(0x01<<3))
|
|
rgroup.word (0x120+0x08)++0x15
|
|
line.word 0x00 "SM3VAL0,Value Register 0"
|
|
line.word 0x02 "SM3FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM3VAL1,Value Register 1"
|
|
line.word 0x06 "SM3FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM3VAL2,Value Register 2"
|
|
line.word 0x0A "SM3FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM3VAL3,Value Register 3"
|
|
line.word 0x0E "SM3FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM3VAL4,Value Register 4"
|
|
line.word 0x12 "SM3FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM3VAL5,Value Register 5"
|
|
else
|
|
group.word (0x120+0x08)++0x15
|
|
line.word 0x00 "SM3VAL0,Value Register 0"
|
|
line.word 0x02 "SM3FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM3VAL1,Value Register 1"
|
|
line.word 0x06 "SM3FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM3VAL2,Value Register 2"
|
|
line.word 0x0A "SM3FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM3VAL3,Value Register 3"
|
|
line.word 0x0E "SM3FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM3VAL4,Value Register 4"
|
|
line.word 0x12 "SM3FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM3VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403DC000+0x188))&(0x01<<3))==(0x01<<3))||(((per.w(ad:0x403DC000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x20)++0x01
|
|
line.word 0x00 "SM3FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x20)++0x01
|
|
line.word 0x00 "SM3FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x120+0x22)++0x1D
|
|
line.word 0x00 "SM3OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM3STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM3INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM3DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM3TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM3DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM3DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM3DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM3DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM3CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM3CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM3CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM3CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM3CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM3CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x120+0x40)++0x17
|
|
line.word 0x00 "SM3CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM3CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM3CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM3CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM3CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM3CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM3CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM3CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM3CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM3CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM3CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM3CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x180++0x15
|
|
line.word 0x00 "OUTEN,Output Enable Register"
|
|
bitfld.word 0x00 11. " PWMA_EN[3] ,PWM_A output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " [2] ,PWM_A output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " [1] ,PWM_A output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " [0] ,PWM_A output 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " PWMB_EN[3] ,PWM_B output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " [2] ,PWM_B output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " [1] ,PWM_B output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " [0] ,PWM_B output 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " PWMX_EN[3] ,PWM_X output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " [2] ,PWM_X output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " [1] ,PWM_X output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " [0] ,PWM_X output 0 enable" "Disabled,Enabled"
|
|
line.word 0x02 "MASK,Mask Register"
|
|
eventfld.word 0x02 15. " UPDATE_MASK[3] ,Update mask bit of PWM_X submodule 3 immediately" "No effect,Update"
|
|
eventfld.word 0x02 14. " [2] ,Update mask bit of PWM_X submodule 2 immediately" "No effect,Update"
|
|
eventfld.word 0x02 13. " [1] ,Update mask bit of PWM_X submodule 1 immediately" "No effect,Update"
|
|
eventfld.word 0x02 12. " [0] ,Update mask bit of PWM_X submodule 0 immediately" "No effect,Update"
|
|
textline " "
|
|
bitfld.word 0x02 11. " MASKA[3] ,PWM_A mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 10. " [2] ,PWM_A mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 9. " [1] ,PWM_A mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 8. " [0] ,PWM_A mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x02 7. " MASKB[3] ,PWM_B mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 6. " [2] ,PWM_B mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 5. " [1] ,PWM_B mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 4. " [0] ,PWM_B mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x02 3. " MASKX[3] ,PWM_X mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 2. " [2] ,PWM_X mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 1. " [1] ,PWM_X mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 0. " [0] ,PWM_X mask 0" "Not masked,Masked"
|
|
line.word 0x04 "SWCOUT,Software Controlled Output Register"
|
|
bitfld.word 0x04 7. " SM3OUT23 ,Submodule 3 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 6. " SM3OUT45 ,Submodule 3 software controlled output 45" "0,1"
|
|
bitfld.word 0x04 5. " SM2OUT23 ,Submodule 2 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 4. " SM2OUT45 ,Submodule 2 software controlled output 45" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 3. " SM1OUT23 ,Submodule 1 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 2. " SM1OUT45 ,Submodule 1 software controlled output 45" "0,1"
|
|
bitfld.word 0x04 1. " SM0OUT23 ,Submodule 0 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 0. " SM0OUT45 ,Submodule 0 software controlled output 45" "0,1"
|
|
line.word 0x06 "DTSRCSEL,PWM Source Select Register"
|
|
bitfld.word 0x06 14.--15. " SM3SEL23 ,Submodule 3 PWM23 control select" "SM3PWM23,Inverted SM3PWM23,SWCOUT[SM3OUT23],PWM_EXTA3"
|
|
bitfld.word 0x06 12.--13. " SM3SEL45 ,Submodule 3 PWM45 control select" "SM3PWM45,Inverted SM3PWM45,SWCOUT[SM3OUT45],PWM_EXTB3"
|
|
bitfld.word 0x06 10.--11. " SM2SEL23 ,Submodule 2 PWM23 control select" "SM2PWM23,Inverted SM2PWM23,SWCOUT[SM2OUT23],PWM_EXTA2"
|
|
bitfld.word 0x06 8.--9. " SM2SEL45 ,Submodule 2 PWM45 control select" "SM2PWM45,Inverted SM2PWM45,SWCOUT[SM2OUT45],PWM_EXTB2"
|
|
textline " "
|
|
bitfld.word 0x06 6.--7. " SM1SEL23 ,Submodule 1 PWM23 control select" "SM1PWM23,Inverted SM1PWM23,SWCOUT[SM1OUT23],PWM_EXTA1"
|
|
bitfld.word 0x06 4.--5. " SM1SEL45 ,Submodule 1 PWM45 control select" "SM1PWM45,Inverted SM1PWM45,SWCOUT[SM1OUT45],PWM_EXTB1"
|
|
bitfld.word 0x06 2.--3. " SM0SEL23 ,Submodule 0 PWM23 control select" "SM0PWM23,Inverted SM0WM23,SWCOUT[SM0OUT23],PWM_EXTA0"
|
|
bitfld.word 0x06 0.--1. " SM0SEL45 ,Submodule 0 PWM45 control select" "SM0PWM45,Inverted SM0PWM45,SWCOUT[SM0OUT45],PWM_EXTB0"
|
|
line.word 0x08 "MCTRL0,Master Control 0 Register"
|
|
bitfld.word 0x08 15. " IPOL[3] ,Current polarity of submodule 3" "PWM23,PWM45"
|
|
bitfld.word 0x08 14. " [2] ,Current polarity of submodule 2" "PWM23,PWM45"
|
|
bitfld.word 0x08 13. " [1] ,Current polarity of submodule 1" "PWM23,PWM45"
|
|
bitfld.word 0x08 12. " [0] ,Current polarity of submodule 0" "PWM23,PWM45"
|
|
textline " "
|
|
bitfld.word 0x08 11. " RUN[3] , PWM generator of submodule 3" "Disabled,Enabled"
|
|
bitfld.word 0x08 10. " [2] , PWM generator of submodule 2" "Disabled,Enabled"
|
|
bitfld.word 0x08 9. " [1] , PWM generator of submodule 1" "Disabled,Enabled"
|
|
bitfld.word 0x08 8. " [0] , PWM generator of submodule 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 7. " CLDOK[3] ,LDOK 3 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 6. " [2] ,LDOK 2 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 5. " [1] ,LDOK 1 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 4. " [0] ,LDOK 0 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x08 3. " LDOK[3] ,Load okay of submodule 3" "Not loaded,Loaded"
|
|
bitfld.word 0x08 2. " [2] ,Load okay of submodule 2" "Not loaded,Loaded"
|
|
bitfld.word 0x08 1. " [1] ,Load okay of submodule 1" "Not loaded,Loaded"
|
|
bitfld.word 0x08 0. " [0] ,Load okay of submodule 0" "Not loaded,Loaded"
|
|
line.word 0x0A "MCTRL2,Master Control 2 Register"
|
|
bitfld.word 0x0A 0.--1. " MONPLL ,Monitor PLL state" "Not locked(Do not monitor),Not locked(Monitor),Locked(Do not monitor),Locked(Monitor)"
|
|
line.word 0x0C "FCTRL0,Fault Control Register"
|
|
bitfld.word 0x0C 15. " FLVL[3] ,Fault 3 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 14. " [2] ,Fault 2 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 13. " [1] ,Fault 1 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 12. " [0] ,Fault 0 level" "Logic 0,Logic 1"
|
|
textline " "
|
|
bitfld.word 0x0C 11. " FAUTO[3] ,Automatic fault clearing 3" "Manual,Automatic"
|
|
bitfld.word 0x0C 10. " [2] ,Automatic fault clearing 2" "Manual,Automatic"
|
|
bitfld.word 0x0C 9. " [1] ,Automatic fault clearing 1" "Manual,Automatic"
|
|
bitfld.word 0x0C 8. " [0] ,Automatic fault clearing 0" "Manual,Automatic"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " FSAFE[3] ,Fault safety mode 3" "Normal,Safe"
|
|
bitfld.word 0x0C 6. " [2] ,Fault safety mode 2" "Normal,Safe"
|
|
bitfld.word 0x0C 5. " [1] ,Fault safety mode 1" "Normal,Safe"
|
|
bitfld.word 0x0C 4. " [0] ,Fault safety mode 0" "Normal,Safe"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " FIE[3] ,Fault interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x0C 2. " [2] ,Fault interrupt enable 2" "Disabled,Enabled"
|
|
bitfld.word 0x0C 1. " [1] ,Fault interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x0C 0. " [0] ,Fault interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x0E "FSTS0,Fault Status Register"
|
|
bitfld.word 0x0E 15. " FHALF[3] ,Half cycle fault 3 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 14. " [2] ,Half cycle fault 2 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 13. " [1] ,Half cycle fault 1 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 12. " [0] ,Half cycle fault 0 recovery" "Not re-enabled,Re-enabled"
|
|
textline " "
|
|
rbitfld.word 0x0E 11. " FFPIN[3] ,Filtered fault pin 3" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 10. " [2] ,Filtered fault pin 2" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 9. " [1] ,Filtered fault pin 1" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 8. " [0] ,Filtered fault pin 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x0E 7. " FFULL[3] ,Full cycle 3" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 6. " [2] ,Full cycle 2" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 5. " [1] ,Full cycle 1" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 4. " [0] ,Full cycle 0" "Not re-enabled,Re-enabled"
|
|
textline " "
|
|
eventfld.word 0x0E 3. " FFLAG[3] ,Fault flag 3" "Not fault,Fault"
|
|
eventfld.word 0x0E 2. " [2] ,Fault flag 2" "Not fault,Fault"
|
|
eventfld.word 0x0E 1. " [1] ,Fault flag 1" "Not fault,Fault"
|
|
eventfld.word 0x0E 0. " [0] ,Fault flag 0" "Not fault,Fault"
|
|
line.word 0x10 "FFILT0,Fault Filter Register"
|
|
bitfld.word 0x10 15. " GSTR ,Fault glitch stretch enable" "Disabled,Enabled"
|
|
bitfld.word 0x10 8.--10. " FILT_CNT ,Fault filter count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x10 0.--7. 1. " FILT_PER ,Fault filter period"
|
|
line.word 0x12 "FTST,Fault Test Register"
|
|
bitfld.word 0x12 0. " FTEST ,Fault test" "Not fault,Simulated fault"
|
|
line.word 0x14 "FCTRL2,Fault control 2 register"
|
|
bitfld.word 0x14 3. " NOCOMB[3] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 2. " [2] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 1. " [1] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 0. " [0] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PWM 2"
|
|
base ad:0x403E0000
|
|
width 14.
|
|
rgroup.word 0x0++0x01
|
|
line.word 0x00 "SM0CNT,Counter Register"
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<0))==(0x01<<0))
|
|
rgroup.word (0x0+0x02)++0x01
|
|
line.word 0x00 "SM0INIT,Initial Count Register"
|
|
else
|
|
group.word (0x0+0x02)++0x01
|
|
line.word 0x00 "SM0INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x0+0x04)++0x1
|
|
line.word 0x00 "SM0CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<0))==(0x01<<0))
|
|
if (((per.w(ad:0x403E0000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E0000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<0))==(0x01<<0))
|
|
rgroup.word (0x0+0x08)++0x15
|
|
line.word 0x00 "SM0VAL0,Value Register 0"
|
|
line.word 0x02 "SM0FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM0VAL1,Value Register 1"
|
|
line.word 0x06 "SM0FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM0VAL2,Value Register 2"
|
|
line.word 0x0A "SM0FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM0VAL3,Value Register 3"
|
|
line.word 0x0E "SM0FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM0VAL4,Value Register 4"
|
|
line.word 0x12 "SM0FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM0VAL5,Value Register 5"
|
|
else
|
|
group.word (0x0+0x08)++0x15
|
|
line.word 0x00 "SM0VAL0,Value Register 0"
|
|
line.word 0x02 "SM0FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM0VAL1,Value Register 1"
|
|
line.word 0x06 "SM0FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM0VAL2,Value Register 2"
|
|
line.word 0x0A "SM0FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM0VAL3,Value Register 3"
|
|
line.word 0x0E "SM0FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM0VAL4,Value Register 4"
|
|
line.word 0x12 "SM0FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM0VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<0))==(0x01<<0))||(((per.w(ad:0x403E0000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x20)++0x01
|
|
line.word 0x00 "SM0FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x20)++0x01
|
|
line.word 0x00 "SM0FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x0+0x22)++0x1D
|
|
line.word 0x00 "SM0OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM0STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM0INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM0DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM0TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM0DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM0DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM0DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM0DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM0CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM0CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM0CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM0CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM0CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM0CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x0+0x40)++0x17
|
|
line.word 0x00 "SM0CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM0CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM0CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM0CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM0CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM0CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM0CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM0CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM0CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM0CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM0CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM0CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x60++0x01
|
|
line.word 0x00 "SM1CNT,Counter Register"
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<1))==(0x01<<1))
|
|
rgroup.word (0x60+0x02)++0x01
|
|
line.word 0x00 "SM1INIT,Initial Count Register"
|
|
else
|
|
group.word (0x60+0x02)++0x01
|
|
line.word 0x00 "SM1INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x60+0x04)++0x1
|
|
line.word 0x00 "SM1CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<1))==(0x01<<1))
|
|
if (((per.w(ad:0x403E0000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E0000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<1))==(0x01<<1))
|
|
rgroup.word (0x60+0x08)++0x15
|
|
line.word 0x00 "SM1VAL0,Value Register 0"
|
|
line.word 0x02 "SM1FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM1VAL1,Value Register 1"
|
|
line.word 0x06 "SM1FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM1VAL2,Value Register 2"
|
|
line.word 0x0A "SM1FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM1VAL3,Value Register 3"
|
|
line.word 0x0E "SM1FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM1VAL4,Value Register 4"
|
|
line.word 0x12 "SM1FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM1VAL5,Value Register 5"
|
|
else
|
|
group.word (0x60+0x08)++0x15
|
|
line.word 0x00 "SM1VAL0,Value Register 0"
|
|
line.word 0x02 "SM1FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM1VAL1,Value Register 1"
|
|
line.word 0x06 "SM1FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM1VAL2,Value Register 2"
|
|
line.word 0x0A "SM1FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM1VAL3,Value Register 3"
|
|
line.word 0x0E "SM1FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM1VAL4,Value Register 4"
|
|
line.word 0x12 "SM1FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM1VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<1))==(0x01<<1))||(((per.w(ad:0x403E0000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x20)++0x01
|
|
line.word 0x00 "SM1FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x20)++0x01
|
|
line.word 0x00 "SM1FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x60+0x22)++0x1D
|
|
line.word 0x00 "SM1OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM1STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM1INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM1DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM1TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM1DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM1DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM1DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM1DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM1CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM1CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM1CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM1CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM1CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM1CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x60+0x40)++0x17
|
|
line.word 0x00 "SM1CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM1CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM1CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM1CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM1CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM1CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM1CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM1CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM1CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM1CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM1CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM1CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0xC0++0x01
|
|
line.word 0x00 "SM2CNT,Counter Register"
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<2))==(0x01<<2))
|
|
rgroup.word (0xC0+0x02)++0x01
|
|
line.word 0x00 "SM2INIT,Initial Count Register"
|
|
else
|
|
group.word (0xC0+0x02)++0x01
|
|
line.word 0x00 "SM2INIT,Initial Count Register"
|
|
endif
|
|
group.word (0xC0+0x04)++0x1
|
|
line.word 0x00 "SM2CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<2))==(0x01<<2))
|
|
if (((per.w(ad:0x403E0000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E0000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<2))==(0x01<<2))
|
|
rgroup.word (0xC0+0x08)++0x15
|
|
line.word 0x00 "SM2VAL0,Value Register 0"
|
|
line.word 0x02 "SM2FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM2VAL1,Value Register 1"
|
|
line.word 0x06 "SM2FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM2VAL2,Value Register 2"
|
|
line.word 0x0A "SM2FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM2VAL3,Value Register 3"
|
|
line.word 0x0E "SM2FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM2VAL4,Value Register 4"
|
|
line.word 0x12 "SM2FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM2VAL5,Value Register 5"
|
|
else
|
|
group.word (0xC0+0x08)++0x15
|
|
line.word 0x00 "SM2VAL0,Value Register 0"
|
|
line.word 0x02 "SM2FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM2VAL1,Value Register 1"
|
|
line.word 0x06 "SM2FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM2VAL2,Value Register 2"
|
|
line.word 0x0A "SM2FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM2VAL3,Value Register 3"
|
|
line.word 0x0E "SM2FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM2VAL4,Value Register 4"
|
|
line.word 0x12 "SM2FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM2VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<2))==(0x01<<2))||(((per.w(ad:0x403E0000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x20)++0x01
|
|
line.word 0x00 "SM2FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x20)++0x01
|
|
line.word 0x00 "SM2FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0xC0+0x22)++0x1D
|
|
line.word 0x00 "SM2OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM2STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM2INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM2DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM2TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM2DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM2DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM2DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM2DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM2CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM2CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM2CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM2CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM2CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM2CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0xC0+0x40)++0x17
|
|
line.word 0x00 "SM2CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM2CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM2CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM2CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM2CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM2CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM2CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM2CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM2CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM2CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM2CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM2CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x120++0x01
|
|
line.word 0x00 "SM3CNT,Counter Register"
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<3))==(0x01<<3))
|
|
rgroup.word (0x120+0x02)++0x01
|
|
line.word 0x00 "SM3INIT,Initial Count Register"
|
|
else
|
|
group.word (0x120+0x02)++0x01
|
|
line.word 0x00 "SM3INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x120+0x04)++0x1
|
|
line.word 0x00 "SM3CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<3))==(0x01<<3))
|
|
if (((per.w(ad:0x403E0000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E0000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<3))==(0x01<<3))
|
|
rgroup.word (0x120+0x08)++0x15
|
|
line.word 0x00 "SM3VAL0,Value Register 0"
|
|
line.word 0x02 "SM3FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM3VAL1,Value Register 1"
|
|
line.word 0x06 "SM3FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM3VAL2,Value Register 2"
|
|
line.word 0x0A "SM3FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM3VAL3,Value Register 3"
|
|
line.word 0x0E "SM3FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM3VAL4,Value Register 4"
|
|
line.word 0x12 "SM3FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM3VAL5,Value Register 5"
|
|
else
|
|
group.word (0x120+0x08)++0x15
|
|
line.word 0x00 "SM3VAL0,Value Register 0"
|
|
line.word 0x02 "SM3FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM3VAL1,Value Register 1"
|
|
line.word 0x06 "SM3FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM3VAL2,Value Register 2"
|
|
line.word 0x0A "SM3FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM3VAL3,Value Register 3"
|
|
line.word 0x0E "SM3FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM3VAL4,Value Register 4"
|
|
line.word 0x12 "SM3FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM3VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E0000+0x188))&(0x01<<3))==(0x01<<3))||(((per.w(ad:0x403E0000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x20)++0x01
|
|
line.word 0x00 "SM3FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x20)++0x01
|
|
line.word 0x00 "SM3FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x120+0x22)++0x1D
|
|
line.word 0x00 "SM3OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM3STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM3INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM3DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM3TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM3DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM3DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM3DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM3DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM3CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM3CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM3CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM3CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM3CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM3CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x120+0x40)++0x17
|
|
line.word 0x00 "SM3CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM3CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM3CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM3CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM3CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM3CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM3CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM3CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM3CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM3CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM3CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM3CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x180++0x15
|
|
line.word 0x00 "OUTEN,Output Enable Register"
|
|
bitfld.word 0x00 11. " PWMA_EN[3] ,PWM_A output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " [2] ,PWM_A output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " [1] ,PWM_A output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " [0] ,PWM_A output 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " PWMB_EN[3] ,PWM_B output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " [2] ,PWM_B output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " [1] ,PWM_B output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " [0] ,PWM_B output 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " PWMX_EN[3] ,PWM_X output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " [2] ,PWM_X output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " [1] ,PWM_X output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " [0] ,PWM_X output 0 enable" "Disabled,Enabled"
|
|
line.word 0x02 "MASK,Mask Register"
|
|
eventfld.word 0x02 15. " UPDATE_MASK[3] ,Update mask bit of PWM_X submodule 3 immediately" "No effect,Update"
|
|
eventfld.word 0x02 14. " [2] ,Update mask bit of PWM_X submodule 2 immediately" "No effect,Update"
|
|
eventfld.word 0x02 13. " [1] ,Update mask bit of PWM_X submodule 1 immediately" "No effect,Update"
|
|
eventfld.word 0x02 12. " [0] ,Update mask bit of PWM_X submodule 0 immediately" "No effect,Update"
|
|
textline " "
|
|
bitfld.word 0x02 11. " MASKA[3] ,PWM_A mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 10. " [2] ,PWM_A mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 9. " [1] ,PWM_A mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 8. " [0] ,PWM_A mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x02 7. " MASKB[3] ,PWM_B mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 6. " [2] ,PWM_B mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 5. " [1] ,PWM_B mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 4. " [0] ,PWM_B mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x02 3. " MASKX[3] ,PWM_X mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 2. " [2] ,PWM_X mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 1. " [1] ,PWM_X mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 0. " [0] ,PWM_X mask 0" "Not masked,Masked"
|
|
line.word 0x04 "SWCOUT,Software Controlled Output Register"
|
|
bitfld.word 0x04 7. " SM3OUT23 ,Submodule 3 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 6. " SM3OUT45 ,Submodule 3 software controlled output 45" "0,1"
|
|
bitfld.word 0x04 5. " SM2OUT23 ,Submodule 2 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 4. " SM2OUT45 ,Submodule 2 software controlled output 45" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 3. " SM1OUT23 ,Submodule 1 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 2. " SM1OUT45 ,Submodule 1 software controlled output 45" "0,1"
|
|
bitfld.word 0x04 1. " SM0OUT23 ,Submodule 0 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 0. " SM0OUT45 ,Submodule 0 software controlled output 45" "0,1"
|
|
line.word 0x06 "DTSRCSEL,PWM Source Select Register"
|
|
bitfld.word 0x06 14.--15. " SM3SEL23 ,Submodule 3 PWM23 control select" "SM3PWM23,Inverted SM3PWM23,SWCOUT[SM3OUT23],PWM_EXTA3"
|
|
bitfld.word 0x06 12.--13. " SM3SEL45 ,Submodule 3 PWM45 control select" "SM3PWM45,Inverted SM3PWM45,SWCOUT[SM3OUT45],PWM_EXTB3"
|
|
bitfld.word 0x06 10.--11. " SM2SEL23 ,Submodule 2 PWM23 control select" "SM2PWM23,Inverted SM2PWM23,SWCOUT[SM2OUT23],PWM_EXTA2"
|
|
bitfld.word 0x06 8.--9. " SM2SEL45 ,Submodule 2 PWM45 control select" "SM2PWM45,Inverted SM2PWM45,SWCOUT[SM2OUT45],PWM_EXTB2"
|
|
textline " "
|
|
bitfld.word 0x06 6.--7. " SM1SEL23 ,Submodule 1 PWM23 control select" "SM1PWM23,Inverted SM1PWM23,SWCOUT[SM1OUT23],PWM_EXTA1"
|
|
bitfld.word 0x06 4.--5. " SM1SEL45 ,Submodule 1 PWM45 control select" "SM1PWM45,Inverted SM1PWM45,SWCOUT[SM1OUT45],PWM_EXTB1"
|
|
bitfld.word 0x06 2.--3. " SM0SEL23 ,Submodule 0 PWM23 control select" "SM0PWM23,Inverted SM0WM23,SWCOUT[SM0OUT23],PWM_EXTA0"
|
|
bitfld.word 0x06 0.--1. " SM0SEL45 ,Submodule 0 PWM45 control select" "SM0PWM45,Inverted SM0PWM45,SWCOUT[SM0OUT45],PWM_EXTB0"
|
|
line.word 0x08 "MCTRL0,Master Control 0 Register"
|
|
bitfld.word 0x08 15. " IPOL[3] ,Current polarity of submodule 3" "PWM23,PWM45"
|
|
bitfld.word 0x08 14. " [2] ,Current polarity of submodule 2" "PWM23,PWM45"
|
|
bitfld.word 0x08 13. " [1] ,Current polarity of submodule 1" "PWM23,PWM45"
|
|
bitfld.word 0x08 12. " [0] ,Current polarity of submodule 0" "PWM23,PWM45"
|
|
textline " "
|
|
bitfld.word 0x08 11. " RUN[3] , PWM generator of submodule 3" "Disabled,Enabled"
|
|
bitfld.word 0x08 10. " [2] , PWM generator of submodule 2" "Disabled,Enabled"
|
|
bitfld.word 0x08 9. " [1] , PWM generator of submodule 1" "Disabled,Enabled"
|
|
bitfld.word 0x08 8. " [0] , PWM generator of submodule 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 7. " CLDOK[3] ,LDOK 3 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 6. " [2] ,LDOK 2 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 5. " [1] ,LDOK 1 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 4. " [0] ,LDOK 0 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x08 3. " LDOK[3] ,Load okay of submodule 3" "Not loaded,Loaded"
|
|
bitfld.word 0x08 2. " [2] ,Load okay of submodule 2" "Not loaded,Loaded"
|
|
bitfld.word 0x08 1. " [1] ,Load okay of submodule 1" "Not loaded,Loaded"
|
|
bitfld.word 0x08 0. " [0] ,Load okay of submodule 0" "Not loaded,Loaded"
|
|
line.word 0x0A "MCTRL2,Master Control 2 Register"
|
|
bitfld.word 0x0A 0.--1. " MONPLL ,Monitor PLL state" "Not locked(Do not monitor),Not locked(Monitor),Locked(Do not monitor),Locked(Monitor)"
|
|
line.word 0x0C "FCTRL0,Fault Control Register"
|
|
bitfld.word 0x0C 15. " FLVL[3] ,Fault 3 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 14. " [2] ,Fault 2 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 13. " [1] ,Fault 1 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 12. " [0] ,Fault 0 level" "Logic 0,Logic 1"
|
|
textline " "
|
|
bitfld.word 0x0C 11. " FAUTO[3] ,Automatic fault clearing 3" "Manual,Automatic"
|
|
bitfld.word 0x0C 10. " [2] ,Automatic fault clearing 2" "Manual,Automatic"
|
|
bitfld.word 0x0C 9. " [1] ,Automatic fault clearing 1" "Manual,Automatic"
|
|
bitfld.word 0x0C 8. " [0] ,Automatic fault clearing 0" "Manual,Automatic"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " FSAFE[3] ,Fault safety mode 3" "Normal,Safe"
|
|
bitfld.word 0x0C 6. " [2] ,Fault safety mode 2" "Normal,Safe"
|
|
bitfld.word 0x0C 5. " [1] ,Fault safety mode 1" "Normal,Safe"
|
|
bitfld.word 0x0C 4. " [0] ,Fault safety mode 0" "Normal,Safe"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " FIE[3] ,Fault interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x0C 2. " [2] ,Fault interrupt enable 2" "Disabled,Enabled"
|
|
bitfld.word 0x0C 1. " [1] ,Fault interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x0C 0. " [0] ,Fault interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x0E "FSTS0,Fault Status Register"
|
|
bitfld.word 0x0E 15. " FHALF[3] ,Half cycle fault 3 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 14. " [2] ,Half cycle fault 2 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 13. " [1] ,Half cycle fault 1 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 12. " [0] ,Half cycle fault 0 recovery" "Not re-enabled,Re-enabled"
|
|
textline " "
|
|
rbitfld.word 0x0E 11. " FFPIN[3] ,Filtered fault pin 3" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 10. " [2] ,Filtered fault pin 2" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 9. " [1] ,Filtered fault pin 1" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 8. " [0] ,Filtered fault pin 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x0E 7. " FFULL[3] ,Full cycle 3" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 6. " [2] ,Full cycle 2" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 5. " [1] ,Full cycle 1" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 4. " [0] ,Full cycle 0" "Not re-enabled,Re-enabled"
|
|
textline " "
|
|
eventfld.word 0x0E 3. " FFLAG[3] ,Fault flag 3" "Not fault,Fault"
|
|
eventfld.word 0x0E 2. " [2] ,Fault flag 2" "Not fault,Fault"
|
|
eventfld.word 0x0E 1. " [1] ,Fault flag 1" "Not fault,Fault"
|
|
eventfld.word 0x0E 0. " [0] ,Fault flag 0" "Not fault,Fault"
|
|
line.word 0x10 "FFILT0,Fault Filter Register"
|
|
bitfld.word 0x10 15. " GSTR ,Fault glitch stretch enable" "Disabled,Enabled"
|
|
bitfld.word 0x10 8.--10. " FILT_CNT ,Fault filter count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x10 0.--7. 1. " FILT_PER ,Fault filter period"
|
|
line.word 0x12 "FTST,Fault Test Register"
|
|
bitfld.word 0x12 0. " FTEST ,Fault test" "Not fault,Simulated fault"
|
|
line.word 0x14 "FCTRL2,Fault control 2 register"
|
|
bitfld.word 0x14 3. " NOCOMB[3] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 2. " [2] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 1. " [1] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 0. " [0] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PWM 3"
|
|
base ad:0x403E4000
|
|
width 14.
|
|
rgroup.word 0x0++0x01
|
|
line.word 0x00 "SM0CNT,Counter Register"
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<0))==(0x01<<0))
|
|
rgroup.word (0x0+0x02)++0x01
|
|
line.word 0x00 "SM0INIT,Initial Count Register"
|
|
else
|
|
group.word (0x0+0x02)++0x01
|
|
line.word 0x00 "SM0INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x0+0x04)++0x1
|
|
line.word 0x00 "SM0CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<0))==(0x01<<0))
|
|
if (((per.w(ad:0x403E4000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E4000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<0))==(0x01<<0))
|
|
rgroup.word (0x0+0x08)++0x15
|
|
line.word 0x00 "SM0VAL0,Value Register 0"
|
|
line.word 0x02 "SM0FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM0VAL1,Value Register 1"
|
|
line.word 0x06 "SM0FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM0VAL2,Value Register 2"
|
|
line.word 0x0A "SM0FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM0VAL3,Value Register 3"
|
|
line.word 0x0E "SM0FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM0VAL4,Value Register 4"
|
|
line.word 0x12 "SM0FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM0VAL5,Value Register 5"
|
|
else
|
|
group.word (0x0+0x08)++0x15
|
|
line.word 0x00 "SM0VAL0,Value Register 0"
|
|
line.word 0x02 "SM0FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM0VAL1,Value Register 1"
|
|
line.word 0x06 "SM0FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM0VAL2,Value Register 2"
|
|
line.word 0x0A "SM0FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM0VAL3,Value Register 3"
|
|
line.word 0x0E "SM0FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM0VAL4,Value Register 4"
|
|
line.word 0x12 "SM0FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM0VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<0))==(0x01<<0))||(((per.w(ad:0x403E4000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x20)++0x01
|
|
line.word 0x00 "SM0FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x20)++0x01
|
|
line.word 0x00 "SM0FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x0+0x22)++0x1D
|
|
line.word 0x00 "SM0OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM0STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM0INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM0DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM0TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM0DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM0DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM0DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM0DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM0CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM0CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM0CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM0CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM0CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM0CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x0+0x40)++0x17
|
|
line.word 0x00 "SM0CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM0CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM0CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM0CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM0CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM0CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM0CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM0CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM0CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM0CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM0CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM0CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x60++0x01
|
|
line.word 0x00 "SM1CNT,Counter Register"
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<1))==(0x01<<1))
|
|
rgroup.word (0x60+0x02)++0x01
|
|
line.word 0x00 "SM1INIT,Initial Count Register"
|
|
else
|
|
group.word (0x60+0x02)++0x01
|
|
line.word 0x00 "SM1INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x60+0x04)++0x1
|
|
line.word 0x00 "SM1CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<1))==(0x01<<1))
|
|
if (((per.w(ad:0x403E4000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E4000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<1))==(0x01<<1))
|
|
rgroup.word (0x60+0x08)++0x15
|
|
line.word 0x00 "SM1VAL0,Value Register 0"
|
|
line.word 0x02 "SM1FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM1VAL1,Value Register 1"
|
|
line.word 0x06 "SM1FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM1VAL2,Value Register 2"
|
|
line.word 0x0A "SM1FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM1VAL3,Value Register 3"
|
|
line.word 0x0E "SM1FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM1VAL4,Value Register 4"
|
|
line.word 0x12 "SM1FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM1VAL5,Value Register 5"
|
|
else
|
|
group.word (0x60+0x08)++0x15
|
|
line.word 0x00 "SM1VAL0,Value Register 0"
|
|
line.word 0x02 "SM1FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM1VAL1,Value Register 1"
|
|
line.word 0x06 "SM1FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM1VAL2,Value Register 2"
|
|
line.word 0x0A "SM1FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM1VAL3,Value Register 3"
|
|
line.word 0x0E "SM1FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM1VAL4,Value Register 4"
|
|
line.word 0x12 "SM1FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM1VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<1))==(0x01<<1))||(((per.w(ad:0x403E4000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x20)++0x01
|
|
line.word 0x00 "SM1FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x20)++0x01
|
|
line.word 0x00 "SM1FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x60+0x22)++0x1D
|
|
line.word 0x00 "SM1OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM1STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM1INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM1DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM1TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM1DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM1DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM1DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM1DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM1CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM1CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM1CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM1CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM1CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM1CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x60+0x40)++0x17
|
|
line.word 0x00 "SM1CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM1CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM1CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM1CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM1CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM1CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM1CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM1CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM1CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM1CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM1CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM1CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0xC0++0x01
|
|
line.word 0x00 "SM2CNT,Counter Register"
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<2))==(0x01<<2))
|
|
rgroup.word (0xC0+0x02)++0x01
|
|
line.word 0x00 "SM2INIT,Initial Count Register"
|
|
else
|
|
group.word (0xC0+0x02)++0x01
|
|
line.word 0x00 "SM2INIT,Initial Count Register"
|
|
endif
|
|
group.word (0xC0+0x04)++0x1
|
|
line.word 0x00 "SM2CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<2))==(0x01<<2))
|
|
if (((per.w(ad:0x403E4000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E4000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<2))==(0x01<<2))
|
|
rgroup.word (0xC0+0x08)++0x15
|
|
line.word 0x00 "SM2VAL0,Value Register 0"
|
|
line.word 0x02 "SM2FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM2VAL1,Value Register 1"
|
|
line.word 0x06 "SM2FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM2VAL2,Value Register 2"
|
|
line.word 0x0A "SM2FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM2VAL3,Value Register 3"
|
|
line.word 0x0E "SM2FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM2VAL4,Value Register 4"
|
|
line.word 0x12 "SM2FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM2VAL5,Value Register 5"
|
|
else
|
|
group.word (0xC0+0x08)++0x15
|
|
line.word 0x00 "SM2VAL0,Value Register 0"
|
|
line.word 0x02 "SM2FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM2VAL1,Value Register 1"
|
|
line.word 0x06 "SM2FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM2VAL2,Value Register 2"
|
|
line.word 0x0A "SM2FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM2VAL3,Value Register 3"
|
|
line.word 0x0E "SM2FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM2VAL4,Value Register 4"
|
|
line.word 0x12 "SM2FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM2VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<2))==(0x01<<2))||(((per.w(ad:0x403E4000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x20)++0x01
|
|
line.word 0x00 "SM2FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x20)++0x01
|
|
line.word 0x00 "SM2FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0xC0+0x22)++0x1D
|
|
line.word 0x00 "SM2OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM2STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM2INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM2DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM2TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM2DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM2DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM2DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM2DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM2CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM2CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM2CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM2CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM2CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM2CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0xC0+0x40)++0x17
|
|
line.word 0x00 "SM2CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM2CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM2CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM2CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM2CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM2CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM2CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM2CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM2CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM2CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM2CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM2CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x120++0x01
|
|
line.word 0x00 "SM3CNT,Counter Register"
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<3))==(0x01<<3))
|
|
rgroup.word (0x120+0x02)++0x01
|
|
line.word 0x00 "SM3INIT,Initial Count Register"
|
|
else
|
|
group.word (0x120+0x02)++0x01
|
|
line.word 0x00 "SM3INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x120+0x04)++0x1
|
|
line.word 0x00 "SM3CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<3))==(0x01<<3))
|
|
if (((per.w(ad:0x403E4000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E4000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<3))==(0x01<<3))
|
|
rgroup.word (0x120+0x08)++0x15
|
|
line.word 0x00 "SM3VAL0,Value Register 0"
|
|
line.word 0x02 "SM3FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM3VAL1,Value Register 1"
|
|
line.word 0x06 "SM3FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM3VAL2,Value Register 2"
|
|
line.word 0x0A "SM3FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM3VAL3,Value Register 3"
|
|
line.word 0x0E "SM3FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM3VAL4,Value Register 4"
|
|
line.word 0x12 "SM3FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM3VAL5,Value Register 5"
|
|
else
|
|
group.word (0x120+0x08)++0x15
|
|
line.word 0x00 "SM3VAL0,Value Register 0"
|
|
line.word 0x02 "SM3FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM3VAL1,Value Register 1"
|
|
line.word 0x06 "SM3FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM3VAL2,Value Register 2"
|
|
line.word 0x0A "SM3FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM3VAL3,Value Register 3"
|
|
line.word 0x0E "SM3FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM3VAL4,Value Register 4"
|
|
line.word 0x12 "SM3FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM3VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E4000+0x188))&(0x01<<3))==(0x01<<3))||(((per.w(ad:0x403E4000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x20)++0x01
|
|
line.word 0x00 "SM3FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x20)++0x01
|
|
line.word 0x00 "SM3FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x120+0x22)++0x1D
|
|
line.word 0x00 "SM3OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM3STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM3INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM3DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM3TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM3DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM3DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM3DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM3DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM3CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM3CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM3CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM3CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM3CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM3CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x120+0x40)++0x17
|
|
line.word 0x00 "SM3CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM3CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM3CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM3CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM3CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM3CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM3CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM3CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM3CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM3CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM3CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM3CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x180++0x15
|
|
line.word 0x00 "OUTEN,Output Enable Register"
|
|
bitfld.word 0x00 11. " PWMA_EN[3] ,PWM_A output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " [2] ,PWM_A output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " [1] ,PWM_A output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " [0] ,PWM_A output 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " PWMB_EN[3] ,PWM_B output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " [2] ,PWM_B output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " [1] ,PWM_B output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " [0] ,PWM_B output 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " PWMX_EN[3] ,PWM_X output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " [2] ,PWM_X output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " [1] ,PWM_X output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " [0] ,PWM_X output 0 enable" "Disabled,Enabled"
|
|
line.word 0x02 "MASK,Mask Register"
|
|
eventfld.word 0x02 15. " UPDATE_MASK[3] ,Update mask bit of PWM_X submodule 3 immediately" "No effect,Update"
|
|
eventfld.word 0x02 14. " [2] ,Update mask bit of PWM_X submodule 2 immediately" "No effect,Update"
|
|
eventfld.word 0x02 13. " [1] ,Update mask bit of PWM_X submodule 1 immediately" "No effect,Update"
|
|
eventfld.word 0x02 12. " [0] ,Update mask bit of PWM_X submodule 0 immediately" "No effect,Update"
|
|
textline " "
|
|
bitfld.word 0x02 11. " MASKA[3] ,PWM_A mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 10. " [2] ,PWM_A mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 9. " [1] ,PWM_A mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 8. " [0] ,PWM_A mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x02 7. " MASKB[3] ,PWM_B mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 6. " [2] ,PWM_B mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 5. " [1] ,PWM_B mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 4. " [0] ,PWM_B mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x02 3. " MASKX[3] ,PWM_X mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 2. " [2] ,PWM_X mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 1. " [1] ,PWM_X mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 0. " [0] ,PWM_X mask 0" "Not masked,Masked"
|
|
line.word 0x04 "SWCOUT,Software Controlled Output Register"
|
|
bitfld.word 0x04 7. " SM3OUT23 ,Submodule 3 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 6. " SM3OUT45 ,Submodule 3 software controlled output 45" "0,1"
|
|
bitfld.word 0x04 5. " SM2OUT23 ,Submodule 2 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 4. " SM2OUT45 ,Submodule 2 software controlled output 45" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 3. " SM1OUT23 ,Submodule 1 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 2. " SM1OUT45 ,Submodule 1 software controlled output 45" "0,1"
|
|
bitfld.word 0x04 1. " SM0OUT23 ,Submodule 0 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 0. " SM0OUT45 ,Submodule 0 software controlled output 45" "0,1"
|
|
line.word 0x06 "DTSRCSEL,PWM Source Select Register"
|
|
bitfld.word 0x06 14.--15. " SM3SEL23 ,Submodule 3 PWM23 control select" "SM3PWM23,Inverted SM3PWM23,SWCOUT[SM3OUT23],PWM_EXTA3"
|
|
bitfld.word 0x06 12.--13. " SM3SEL45 ,Submodule 3 PWM45 control select" "SM3PWM45,Inverted SM3PWM45,SWCOUT[SM3OUT45],PWM_EXTB3"
|
|
bitfld.word 0x06 10.--11. " SM2SEL23 ,Submodule 2 PWM23 control select" "SM2PWM23,Inverted SM2PWM23,SWCOUT[SM2OUT23],PWM_EXTA2"
|
|
bitfld.word 0x06 8.--9. " SM2SEL45 ,Submodule 2 PWM45 control select" "SM2PWM45,Inverted SM2PWM45,SWCOUT[SM2OUT45],PWM_EXTB2"
|
|
textline " "
|
|
bitfld.word 0x06 6.--7. " SM1SEL23 ,Submodule 1 PWM23 control select" "SM1PWM23,Inverted SM1PWM23,SWCOUT[SM1OUT23],PWM_EXTA1"
|
|
bitfld.word 0x06 4.--5. " SM1SEL45 ,Submodule 1 PWM45 control select" "SM1PWM45,Inverted SM1PWM45,SWCOUT[SM1OUT45],PWM_EXTB1"
|
|
bitfld.word 0x06 2.--3. " SM0SEL23 ,Submodule 0 PWM23 control select" "SM0PWM23,Inverted SM0WM23,SWCOUT[SM0OUT23],PWM_EXTA0"
|
|
bitfld.word 0x06 0.--1. " SM0SEL45 ,Submodule 0 PWM45 control select" "SM0PWM45,Inverted SM0PWM45,SWCOUT[SM0OUT45],PWM_EXTB0"
|
|
line.word 0x08 "MCTRL0,Master Control 0 Register"
|
|
bitfld.word 0x08 15. " IPOL[3] ,Current polarity of submodule 3" "PWM23,PWM45"
|
|
bitfld.word 0x08 14. " [2] ,Current polarity of submodule 2" "PWM23,PWM45"
|
|
bitfld.word 0x08 13. " [1] ,Current polarity of submodule 1" "PWM23,PWM45"
|
|
bitfld.word 0x08 12. " [0] ,Current polarity of submodule 0" "PWM23,PWM45"
|
|
textline " "
|
|
bitfld.word 0x08 11. " RUN[3] , PWM generator of submodule 3" "Disabled,Enabled"
|
|
bitfld.word 0x08 10. " [2] , PWM generator of submodule 2" "Disabled,Enabled"
|
|
bitfld.word 0x08 9. " [1] , PWM generator of submodule 1" "Disabled,Enabled"
|
|
bitfld.word 0x08 8. " [0] , PWM generator of submodule 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 7. " CLDOK[3] ,LDOK 3 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 6. " [2] ,LDOK 2 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 5. " [1] ,LDOK 1 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 4. " [0] ,LDOK 0 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x08 3. " LDOK[3] ,Load okay of submodule 3" "Not loaded,Loaded"
|
|
bitfld.word 0x08 2. " [2] ,Load okay of submodule 2" "Not loaded,Loaded"
|
|
bitfld.word 0x08 1. " [1] ,Load okay of submodule 1" "Not loaded,Loaded"
|
|
bitfld.word 0x08 0. " [0] ,Load okay of submodule 0" "Not loaded,Loaded"
|
|
line.word 0x0A "MCTRL2,Master Control 2 Register"
|
|
bitfld.word 0x0A 0.--1. " MONPLL ,Monitor PLL state" "Not locked(Do not monitor),Not locked(Monitor),Locked(Do not monitor),Locked(Monitor)"
|
|
line.word 0x0C "FCTRL0,Fault Control Register"
|
|
bitfld.word 0x0C 15. " FLVL[3] ,Fault 3 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 14. " [2] ,Fault 2 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 13. " [1] ,Fault 1 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 12. " [0] ,Fault 0 level" "Logic 0,Logic 1"
|
|
textline " "
|
|
bitfld.word 0x0C 11. " FAUTO[3] ,Automatic fault clearing 3" "Manual,Automatic"
|
|
bitfld.word 0x0C 10. " [2] ,Automatic fault clearing 2" "Manual,Automatic"
|
|
bitfld.word 0x0C 9. " [1] ,Automatic fault clearing 1" "Manual,Automatic"
|
|
bitfld.word 0x0C 8. " [0] ,Automatic fault clearing 0" "Manual,Automatic"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " FSAFE[3] ,Fault safety mode 3" "Normal,Safe"
|
|
bitfld.word 0x0C 6. " [2] ,Fault safety mode 2" "Normal,Safe"
|
|
bitfld.word 0x0C 5. " [1] ,Fault safety mode 1" "Normal,Safe"
|
|
bitfld.word 0x0C 4. " [0] ,Fault safety mode 0" "Normal,Safe"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " FIE[3] ,Fault interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x0C 2. " [2] ,Fault interrupt enable 2" "Disabled,Enabled"
|
|
bitfld.word 0x0C 1. " [1] ,Fault interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x0C 0. " [0] ,Fault interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x0E "FSTS0,Fault Status Register"
|
|
bitfld.word 0x0E 15. " FHALF[3] ,Half cycle fault 3 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 14. " [2] ,Half cycle fault 2 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 13. " [1] ,Half cycle fault 1 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 12. " [0] ,Half cycle fault 0 recovery" "Not re-enabled,Re-enabled"
|
|
textline " "
|
|
rbitfld.word 0x0E 11. " FFPIN[3] ,Filtered fault pin 3" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 10. " [2] ,Filtered fault pin 2" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 9. " [1] ,Filtered fault pin 1" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 8. " [0] ,Filtered fault pin 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x0E 7. " FFULL[3] ,Full cycle 3" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 6. " [2] ,Full cycle 2" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 5. " [1] ,Full cycle 1" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 4. " [0] ,Full cycle 0" "Not re-enabled,Re-enabled"
|
|
textline " "
|
|
eventfld.word 0x0E 3. " FFLAG[3] ,Fault flag 3" "Not fault,Fault"
|
|
eventfld.word 0x0E 2. " [2] ,Fault flag 2" "Not fault,Fault"
|
|
eventfld.word 0x0E 1. " [1] ,Fault flag 1" "Not fault,Fault"
|
|
eventfld.word 0x0E 0. " [0] ,Fault flag 0" "Not fault,Fault"
|
|
line.word 0x10 "FFILT0,Fault Filter Register"
|
|
bitfld.word 0x10 15. " GSTR ,Fault glitch stretch enable" "Disabled,Enabled"
|
|
bitfld.word 0x10 8.--10. " FILT_CNT ,Fault filter count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x10 0.--7. 1. " FILT_PER ,Fault filter period"
|
|
line.word 0x12 "FTST,Fault Test Register"
|
|
bitfld.word 0x12 0. " FTEST ,Fault test" "Not fault,Simulated fault"
|
|
line.word 0x14 "FCTRL2,Fault control 2 register"
|
|
bitfld.word 0x14 3. " NOCOMB[3] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 2. " [2] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 1. " [1] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 0. " [0] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
width 0x0B
|
|
tree.end
|
|
tree "PWM 4"
|
|
base ad:0x403E8000
|
|
width 14.
|
|
rgroup.word 0x0++0x01
|
|
line.word 0x00 "SM0CNT,Counter Register"
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<0))==(0x01<<0))
|
|
rgroup.word (0x0+0x02)++0x01
|
|
line.word 0x00 "SM0INIT,Initial Count Register"
|
|
else
|
|
group.word (0x0+0x02)++0x01
|
|
line.word 0x00 "SM0INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x0+0x04)++0x1
|
|
line.word 0x00 "SM0CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<0))==(0x01<<0))
|
|
if (((per.w(ad:0x403E8000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E8000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x06)++0x01
|
|
line.word 0x00 "SM0CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<0))==(0x01<<0))
|
|
rgroup.word (0x0+0x08)++0x15
|
|
line.word 0x00 "SM0VAL0,Value Register 0"
|
|
line.word 0x02 "SM0FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM0VAL1,Value Register 1"
|
|
line.word 0x06 "SM0FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM0VAL2,Value Register 2"
|
|
line.word 0x0A "SM0FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM0VAL3,Value Register 3"
|
|
line.word 0x0E "SM0FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM0VAL4,Value Register 4"
|
|
line.word 0x12 "SM0FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM0VAL5,Value Register 5"
|
|
else
|
|
group.word (0x0+0x08)++0x15
|
|
line.word 0x00 "SM0VAL0,Value Register 0"
|
|
line.word 0x02 "SM0FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM0VAL1,Value Register 1"
|
|
line.word 0x06 "SM0FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM0VAL2,Value Register 2"
|
|
line.word 0x0A "SM0FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM0VAL3,Value Register 3"
|
|
line.word 0x0E "SM0FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM0VAL4,Value Register 4"
|
|
line.word 0x12 "SM0FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM0VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<0))==(0x01<<0))||(((per.w(ad:0x403E8000+0x0+0x06))&0x01)==0x01)
|
|
group.word (0x0+0x20)++0x01
|
|
line.word 0x00 "SM0FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x0+0x20)++0x01
|
|
line.word 0x00 "SM0FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x0+0x22)++0x1D
|
|
line.word 0x00 "SM0OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM0STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM0INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM0DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM0TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM0DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM0DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM0DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM0DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM0CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM0CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM0CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM0CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM0CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM0CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x0+0x40)++0x17
|
|
line.word 0x00 "SM0CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM0CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM0CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM0CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM0CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM0CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM0CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM0CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM0CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM0CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM0CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM0CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x60++0x01
|
|
line.word 0x00 "SM1CNT,Counter Register"
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<1))==(0x01<<1))
|
|
rgroup.word (0x60+0x02)++0x01
|
|
line.word 0x00 "SM1INIT,Initial Count Register"
|
|
else
|
|
group.word (0x60+0x02)++0x01
|
|
line.word 0x00 "SM1INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x60+0x04)++0x1
|
|
line.word 0x00 "SM1CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<1))==(0x01<<1))
|
|
if (((per.w(ad:0x403E8000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E8000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x06)++0x01
|
|
line.word 0x00 "SM1CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<1))==(0x01<<1))
|
|
rgroup.word (0x60+0x08)++0x15
|
|
line.word 0x00 "SM1VAL0,Value Register 0"
|
|
line.word 0x02 "SM1FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM1VAL1,Value Register 1"
|
|
line.word 0x06 "SM1FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM1VAL2,Value Register 2"
|
|
line.word 0x0A "SM1FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM1VAL3,Value Register 3"
|
|
line.word 0x0E "SM1FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM1VAL4,Value Register 4"
|
|
line.word 0x12 "SM1FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM1VAL5,Value Register 5"
|
|
else
|
|
group.word (0x60+0x08)++0x15
|
|
line.word 0x00 "SM1VAL0,Value Register 0"
|
|
line.word 0x02 "SM1FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM1VAL1,Value Register 1"
|
|
line.word 0x06 "SM1FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM1VAL2,Value Register 2"
|
|
line.word 0x0A "SM1FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM1VAL3,Value Register 3"
|
|
line.word 0x0E "SM1FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM1VAL4,Value Register 4"
|
|
line.word 0x12 "SM1FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM1VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<1))==(0x01<<1))||(((per.w(ad:0x403E8000+0x60+0x06))&0x01)==0x01)
|
|
group.word (0x60+0x20)++0x01
|
|
line.word 0x00 "SM1FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x60+0x20)++0x01
|
|
line.word 0x00 "SM1FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x60+0x22)++0x1D
|
|
line.word 0x00 "SM1OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM1STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM1INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM1DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM1TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM1DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM1DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM1DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM1DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM1CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM1CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM1CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM1CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM1CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM1CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x60+0x40)++0x17
|
|
line.word 0x00 "SM1CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM1CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM1CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM1CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM1CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM1CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM1CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM1CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM1CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM1CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM1CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM1CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0xC0++0x01
|
|
line.word 0x00 "SM2CNT,Counter Register"
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<2))==(0x01<<2))
|
|
rgroup.word (0xC0+0x02)++0x01
|
|
line.word 0x00 "SM2INIT,Initial Count Register"
|
|
else
|
|
group.word (0xC0+0x02)++0x01
|
|
line.word 0x00 "SM2INIT,Initial Count Register"
|
|
endif
|
|
group.word (0xC0+0x04)++0x1
|
|
line.word 0x00 "SM2CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<2))==(0x01<<2))
|
|
if (((per.w(ad:0x403E8000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E8000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x06)++0x01
|
|
line.word 0x00 "SM2CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<2))==(0x01<<2))
|
|
rgroup.word (0xC0+0x08)++0x15
|
|
line.word 0x00 "SM2VAL0,Value Register 0"
|
|
line.word 0x02 "SM2FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM2VAL1,Value Register 1"
|
|
line.word 0x06 "SM2FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM2VAL2,Value Register 2"
|
|
line.word 0x0A "SM2FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM2VAL3,Value Register 3"
|
|
line.word 0x0E "SM2FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM2VAL4,Value Register 4"
|
|
line.word 0x12 "SM2FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM2VAL5,Value Register 5"
|
|
else
|
|
group.word (0xC0+0x08)++0x15
|
|
line.word 0x00 "SM2VAL0,Value Register 0"
|
|
line.word 0x02 "SM2FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM2VAL1,Value Register 1"
|
|
line.word 0x06 "SM2FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM2VAL2,Value Register 2"
|
|
line.word 0x0A "SM2FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM2VAL3,Value Register 3"
|
|
line.word 0x0E "SM2FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM2VAL4,Value Register 4"
|
|
line.word 0x12 "SM2FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM2VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<2))==(0x01<<2))||(((per.w(ad:0x403E8000+0xC0+0x06))&0x01)==0x01)
|
|
group.word (0xC0+0x20)++0x01
|
|
line.word 0x00 "SM2FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0xC0+0x20)++0x01
|
|
line.word 0x00 "SM2FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0xC0+0x22)++0x1D
|
|
line.word 0x00 "SM2OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM2STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM2INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM2DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM2TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM2DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM2DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM2DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM2DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM2CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM2CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM2CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM2CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM2CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM2CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0xC0+0x40)++0x17
|
|
line.word 0x00 "SM2CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM2CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM2CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM2CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM2CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM2CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM2CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM2CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM2CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM2CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM2CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM2CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.word 0x120++0x01
|
|
line.word 0x00 "SM3CNT,Counter Register"
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<3))==(0x01<<3))
|
|
rgroup.word (0x120+0x02)++0x01
|
|
line.word 0x00 "SM3INIT,Initial Count Register"
|
|
else
|
|
group.word (0x120+0x02)++0x01
|
|
line.word 0x00 "SM3INIT,Initial Count Register"
|
|
endif
|
|
group.word (0x120+0x04)++0x1
|
|
line.word 0x00 "SM3CTRL2,Control 2 Register"
|
|
bitfld.word 0x00 15. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " WAITEN ,WAIT enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " INDEP ,Independent or complementary pair operation" "Complementary,Independent"
|
|
bitfld.word 0x00 12. " PWM23_INIT ,PWM23 initial value" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " PWM45_INIT ,PWM45 initial value" "0,1"
|
|
bitfld.word 0x00 10. " PWMX_INIT ,PWM_X initial value" "0,1"
|
|
bitfld.word 0x00 8.--9. " INIT_SEL ,Initialization control select" "Local sync,Master reload,Master sync,EXT_SYNC"
|
|
bitfld.word 0x00 7. " FRCEN ,Force initialization enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FORCE ,Force initialization" "No effect,Initialized"
|
|
bitfld.word 0x00 3.--5. " FORCE_SEL ,Source of the FORCE OUTPUT signal for this submodule" "Local force signal,Master force signal,Local reload signal,Master reload signal,Local sync signal,Master sync signal,External force signal,External sync signal"
|
|
bitfld.word 0x00 2. " RELOAD_SEL ,Reload source select" "Local,Master"
|
|
bitfld.word 0x00 0.--1. " CLK_SEL ,Clock source select" "IPBus,EXT_CLK,AUX_CLK,?..."
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<3))==(0x01<<3))
|
|
if (((per.w(ad:0x403E8000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
rbitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.w(ad:0x403E8000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SPLIT ,Split the DBLPWM signal to PWMA and PWMB" "Not split,Split"
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "SM3CTRL,Control Register"
|
|
bitfld.word 0x00 12.--15. " LDFQ ,Select load every PWM opportunity" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.word 0x00 11. " HALF ,Half cycle reload" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " FULL ,Full cycle reload" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 9. " DT[1] ,PWMX input after deadtime 1" "0,1"
|
|
rbitfld.word 0x00 8. " [0] ,PWMX input after deadtime 0" "0,1"
|
|
bitfld.word 0x00 7. " COMPMODE ,Compare mode" "Equal to,Equal to or greater than"
|
|
bitfld.word 0x00 4.--6. " PRSC ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " LDMOD ,Load mode select" "Next reload,Immediately"
|
|
bitfld.word 0x00 1. " DBLX ,PWMX double switching enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DBLEN ,Double switching enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<3))==(0x01<<3))
|
|
rgroup.word (0x120+0x08)++0x15
|
|
line.word 0x00 "SM3VAL0,Value Register 0"
|
|
line.word 0x02 "SM3FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM3VAL1,Value Register 1"
|
|
line.word 0x06 "SM3FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM3VAL2,Value Register 2"
|
|
line.word 0x0A "SM3FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM3VAL3,Value Register 3"
|
|
line.word 0x0E "SM3FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM3VAL4,Value Register 4"
|
|
line.word 0x12 "SM3FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM3VAL5,Value Register 5"
|
|
else
|
|
group.word (0x120+0x08)++0x15
|
|
line.word 0x00 "SM3VAL0,Value Register 0"
|
|
line.word 0x02 "SM3FRACVAL1,Fractional Value Register 1"
|
|
bitfld.word 0x02 11.--15. " FRACVAL1 ,Fractional value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x04 "SM3VAL1,Value Register 1"
|
|
line.word 0x06 "SM3FRACVAL2,Fractional Value Register 2"
|
|
bitfld.word 0x06 11.--15. " FRACVAL2 ,Fractional value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x08 "SM3VAL2,Value Register 2"
|
|
line.word 0x0A "SM3FRACVAL3,Fractional Value Register 3"
|
|
bitfld.word 0x0A 11.--15. " FRACVAL3 ,Fractional value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x0C "SM3VAL3,Value Register 3"
|
|
line.word 0x0E "SM3FRACVAL4,Fractional Value Register 4"
|
|
bitfld.word 0x0E 11.--15. " FRACVAL4 ,Fractional value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x10 "SM3VAL4,Value Register 4"
|
|
line.word 0x12 "SM3FRACVAL5,Fractional Value Register 5"
|
|
bitfld.word 0x12 11.--15. " FRACVAL5 ,Fractional value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.word 0x14 "SM3VAL5,Value Register 5"
|
|
endif
|
|
if (((per.l(ad:0x403E8000+0x188))&(0x01<<3))==(0x01<<3))||(((per.w(ad:0x403E8000+0x120+0x06))&0x01)==0x01)
|
|
group.word (0x120+0x20)++0x01
|
|
line.word 0x00 "SM3FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
rbitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
rbitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
else
|
|
group.word (0x120+0x20)++0x01
|
|
line.word 0x00 "SM3FRCTRL,Fractional Control Register"
|
|
rbitfld.word 0x00 15. " TEST ,Test status bit" "0,1"
|
|
bitfld.word 0x00 8. " FRAC_PU ,Fractional delay circuit power up" "Powered down,Powered up"
|
|
bitfld.word 0x00 4. " FRAC45_EN ,Fractional cycle placement enable for PWM_B" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " FRAC23_EN ,Fractional cycle placement enable for PWM_A" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FRAC1_EN ,Fractional cycle PWM period enable" "Disabled,Enabled"
|
|
endif
|
|
group.word (0x120+0x22)++0x1D
|
|
line.word 0x00 "SM3OCTRL,Output Control Register"
|
|
rbitfld.word 0x00 15. " PWMA_IN ,PWM_A input" "0,1"
|
|
rbitfld.word 0x00 14. " PWMB_IN ,PWM_B input" "0,1"
|
|
rbitfld.word 0x00 13. " PWMX_IN ,PWM_X input" "0,1"
|
|
bitfld.word 0x00 10. " POLA ,PWM_A output polarity" "Not inverted,Inverted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " POLB ,PWM_B output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 8. " POLX ,PWM_X output polarity" "Not inverted,Inverted"
|
|
bitfld.word 0x00 4.--5. " PWMAFS ,PWM_A fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
bitfld.word 0x00 2.--3. " PWMBFS ,PWM_B fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " PWMXFS ,PWM_X fault state" "Forced to 0,Forced to 1,Tristated,Tristated"
|
|
line.word 0x02 "SM3STS,Status Register"
|
|
rbitfld.word 0x02 14. " RUF ,Registers updated flag" "Not updated,Updated"
|
|
eventfld.word 0x02 13. " REF ,Reload error Flag" "No error,Error"
|
|
eventfld.word 0x02 12. " RF ,Reload flag" "Not reloaded,Reloaded"
|
|
eventfld.word 0x02 11. " CFA1 ,Capture flag A1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 10. " CFA0 ,Capture flag A0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 9. " CFB1 ,Capture flag B1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 8. " CFB0 ,Capture flag B0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 7. " CFX1 ,Capture flag X1" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 6. " CFX0 ,Capture flag X0" "Not occurred,Occurred"
|
|
eventfld.word 0x02 5. " CMPF[5] ,Compare flag VAL5" "Not occurred,Occurred"
|
|
eventfld.word 0x02 4. " [4] ,Compare flag VAL4" "Not occurred,Occurred"
|
|
eventfld.word 0x02 3. " [3] ,Compare flag VAL3" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.word 0x02 2. " [2] ,Compare flag VAL2" "Not occurred,Occurred"
|
|
eventfld.word 0x02 1. " [1] ,Compare flag VAL1" "Not occurred,Occurred"
|
|
eventfld.word 0x02 0. " [0] ,Compare flag VAL0" "Not occurred,Occurred"
|
|
line.word 0x04 "SM3INTEN,Interrupt Enable Register"
|
|
bitfld.word 0x04 13. " REIE ,Reload error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 12. " RIE ,Reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 11. " CA1IE ,Capture A1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 10. " CA0IE ,Capture A0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 9. " CB1IE ,Capture B1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " CB0IE ,Capture B0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 7. " CX1IE ,Capture X1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x04 6. " CX0IE ,Capture X0 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 5. " CMPIE[5] ,Compare interrupt enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x04 4. " [4] ,Compare interrupt enable 4" "Disabled,Enabled"
|
|
bitfld.word 0x04 3. " [3] ,Compare interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x04 2. " [2] ,Compare interrupt enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x04 1. " [1] ,Compare interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " [0] ,Compare interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x06 "SM3DMAEN,DMA Enable Register"
|
|
bitfld.word 0x06 9. " VALDE ,Value registers DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 8. " FAND ,FIFO watermark AND control" "OR,AND"
|
|
bitfld.word 0x06 6.--7. " CAPTDE ,Capture DMA enable source select" "Disabled,DMA read,Local sync,Local reload"
|
|
bitfld.word 0x06 5. " CA1DE ,Capture A1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 4. " CA0DE ,Capture A0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 3. " CB1DE ,Capture B1 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 2. " CB0DE ,Capture B0 FIFO DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x06 1. " CX1DE ,Capture X1 FIFO DMA enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x06 0. " CX0DE ,Capture X0 FIFO DMA enable" "Disabled,Enabled"
|
|
line.word 0x08 "SM3TCTRL,Output Trigger Control Register"
|
|
bitfld.word 0x08 15. " PWAOT0 ,Output trigger 0 source select" "PWM_OUT_TRIG0,PWMA output"
|
|
bitfld.word 0x08 14. " PWBOT1 ,Output trigger 1 source select" "PWM_OUT_TRIG1,PWMB output"
|
|
bitfld.word 0x08 12. " TRGFRQ ,Trigger frequency" "Every PWM period,Final PWM period"
|
|
bitfld.word 0x08 5. " OUT_TRIG_EN[5] ,Output trigger 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 4. " [4] ,Output trigger 4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 3. " [3] ,Output trigger 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 2. " [2] ,Output trigger 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x08 1. " [1] ,Output trigger 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 0. " [0] ,Output trigger 0 enable" "Disabled,Enabled"
|
|
line.word 0x0A "SM3DISMAP0,Fault Disable Mapping Register 0"
|
|
bitfld.word 0x0A 11. " DIS0X_3 ,PWM_X fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 10. " DIS0X_2 ,PWM_X fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 9. " DIS0X_1 ,PWM_X fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 8. " DIS0X_0 ,PWM_X fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 7. " DIS0B_3 ,PWM_B fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 6. " DIS0B_2 ,PWM_B fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 5. " DIS0B_1 ,PWM_B fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 4. " DIS0B_0 ,PWM_B fault disable mask 0 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0A 3. " DIS0A_3 ,PWM_A fault disable mask 0 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0A 2. " DIS0A_2 ,PWM_A fault disable mask 0 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0A 1. " DIS0A_1 ,PWM_A fault disable mask 0 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0A 0. " DIS0A_0 ,PWM_A fault disable mask 0 bit 0" "Not masked,Masked"
|
|
line.word 0x0C "SM3DISMAP1,Fault Disable Mapping Register 1"
|
|
bitfld.word 0x0C 11. " DIS1X_3 ,PWM_X fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 10. " DIS1X_2 ,PWM_X fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 9. " DIS0X_1 ,PWM_X fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 8. " DIS1X_0 ,PWM_X fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " DIS1B_3 ,PWM_B fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 6. " DIS1B_2 ,PWM_B fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 5. " DIS1B_1 ,PWM_B fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 4. " DIS1B_0 ,PWM_B fault disable mask 1 bit 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " DIS1A_3 ,PWM_A fault disable mask 1 bit 3" "Not masked,Masked"
|
|
bitfld.word 0x0C 2. " DIS1A_2 ,PWM_A fault disable mask 1 bit 2" "Not masked,Masked"
|
|
bitfld.word 0x0C 1. " DIS1A_1 ,PWM_A fault disable mask 1 bit 1" "Not masked,Masked"
|
|
bitfld.word 0x0C 0. " DIS1A_0 ,PWM_A fault disable mask 1 bit 0" "Not masked,Masked"
|
|
line.word 0x0E "SM3DTCNT0,Deadtime Count Register 0"
|
|
line.word 0x10 "SM3DTCNT1,Deadtime Count Register 1"
|
|
line.word 0x12 "SM3CAPTCTRLA,Capture Control A Register"
|
|
rbitfld.word 0x12 13.--15. " CA1CNT ,Capture A1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x12 10.--12. " CA0CNT ,Capture A0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x12 8.--9. " CFAWM ,Capture A FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x12 7. " EDGCNTA_EN ,Edge counter A enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x12 6. " INP_SELA ,Input select A" "Raw PWM_A,Counter/Compare"
|
|
bitfld.word 0x12 4.--5. " EDGA1 ,Edge A1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 2.--3. " EDGA0 ,Edge A0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x12 1. " ONESHOTA ,One shot mode A" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x12 0. " ARMA ,Arm A" "Disabled,Enabled"
|
|
line.word 0x14 "SM3CAPTCOMPA,Capture Compare A Register"
|
|
hexmask.word.byte 0x14 8.--15. 1. " EDGCNTA ,Edge counter A"
|
|
hexmask.word.byte 0x14 0.--7. 1. " EDGCMPA ,Edge compare A"
|
|
line.word 0x16 "SM3CAPTCTRLB,Capture Control B Register"
|
|
rbitfld.word 0x16 13.--15. " CB1CNT ,Capture B1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x16 10.--12. " CB0CNT ,Capture B0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x16 8.--9. " CFBWM ,Capture B FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x16 7. " EDGCNTB_EN ,Edge counter B enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x16 6. " INP_SELB ,Input select B" "Raw PWM_B,Counter/Compare"
|
|
bitfld.word 0x16 4.--5. " EDGB1 ,Edge B1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 2.--3. " EDGB0 ,Edge B0" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x16 1. " ONESHOTB ,One shot mode B" "Free run,One shot"
|
|
textline " "
|
|
bitfld.word 0x16 0. " ARMB ,Arm B" "Disabled,Enabled"
|
|
line.word 0x18 "SM3CAPTCOMPB,Capture Compare B Register"
|
|
hexmask.word.byte 0x18 8.--15. 1. " EDGCNTB ,Edge counter B"
|
|
hexmask.word.byte 0x18 0.--7. 1. " EDGCMPB ,Edge compare B"
|
|
line.word 0x1A "SM3CAPTCTRLX,Capture Control X Register"
|
|
rbitfld.word 0x1A 13.--15. " CX1CNT ,Capture X1 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
rbitfld.word 0x1A 10.--12. " CX0CNT ,Capture X0 FIFO word count" "1,2,3,4,5,6,7,8"
|
|
bitfld.word 0x1A 8.--9. " CFXWM ,Capture X FIFOs water mark" "1,2,3,4"
|
|
bitfld.word 0x1A 7. " EDGCNTX_EN ,Edge counter X enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x1A 6. " INP_SELX ,Input select X" "Raw PWM_X,Counter/Compare"
|
|
bitfld.word 0x1A 4.--5. " EDGX1 ,Edge X1" "Disabled,Falling,Rising,Any"
|
|
bitfld.word 0x1A 2.--3. " EDGX0 ,Edge X0" "Disabled,Falling,Rising,Any"
|
|
textline " "
|
|
bitfld.word 0x1A 1. " ONESHOTX ,One shot mode X" "Free run,One shot"
|
|
bitfld.word 0x1A 0. " ARMX ,Arm X" "Disabled,Enabled"
|
|
line.word 0x1C "SM3CAPTCOMPX,Capture Compare X Register"
|
|
hexmask.word.byte 0x1C 8.--15. 1. " EDGCNTX ,Edge counter X"
|
|
hexmask.word.byte 0x1C 0.--7. 1. " EDGCMPX ,Edge compare X"
|
|
rgroup.word (0x120+0x40)++0x17
|
|
line.word 0x00 "SM3CVAL0,Capture Value 0 Register"
|
|
line.word 0x02 "SM3CVAL0CYC,Capture Value 0 Cycle Register"
|
|
bitfld.word 0x02 0.--3. " CVAL0CYC ,Cycle number corresponding to the value captured in CVAL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x04 "SM3CVAL1,Capture Value 1 Register"
|
|
line.word 0x06 "SM3CVAL1CYC,Capture Value 1 Cycle Register"
|
|
bitfld.word 0x06 0.--3. " CVAL1CYC ,Cycle number corresponding to the value captured in CVAL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x08 "SM3CVAL2,Capture Value 2 Register"
|
|
line.word 0x0A "SM3CVAL2CYC,Capture Value 2 Cycle Register"
|
|
bitfld.word 0x0A 0.--3. " CVAL2CYC ,Cycle number corresponding to the value captured in CVAL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x0C "SM3CVAL3,Capture Value 3 Register"
|
|
line.word 0x0E "SM3CVAL3CYC,Capture Value 3 Cycle Register"
|
|
bitfld.word 0x0E 0.--3. " CVAL3CYC ,Cycle number corresponding to the value captured in CVAL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x10 "SM3CVAL4,Capture Value 4 Register"
|
|
line.word 0x12 "SM3CVAL4CYC,Capture Value 4 Cycle Register"
|
|
bitfld.word 0x12 0.--3. " CVAL4CYC ,Cycle number corresponding to the value captured in CVAL4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.word 0x14 "SM3CVAL5,Capture Value 5 Register"
|
|
line.word 0x16 "SM3CVAL5CYC,Capture Value 5 Cycle Register"
|
|
bitfld.word 0x16 0.--3. " CVAL5CYC ,Cycle number corresponding to the value captured in CVAL5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.word 0x180++0x15
|
|
line.word 0x00 "OUTEN,Output Enable Register"
|
|
bitfld.word 0x00 11. " PWMA_EN[3] ,PWM_A output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " [2] ,PWM_A output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " [1] ,PWM_A output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " [0] ,PWM_A output 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " PWMB_EN[3] ,PWM_B output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " [2] ,PWM_B output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " [1] ,PWM_B output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " [0] ,PWM_B output 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " PWMX_EN[3] ,PWM_X output 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " [2] ,PWM_X output 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " [1] ,PWM_X output 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " [0] ,PWM_X output 0 enable" "Disabled,Enabled"
|
|
line.word 0x02 "MASK,Mask Register"
|
|
eventfld.word 0x02 15. " UPDATE_MASK[3] ,Update mask bit of PWM_X submodule 3 immediately" "No effect,Update"
|
|
eventfld.word 0x02 14. " [2] ,Update mask bit of PWM_X submodule 2 immediately" "No effect,Update"
|
|
eventfld.word 0x02 13. " [1] ,Update mask bit of PWM_X submodule 1 immediately" "No effect,Update"
|
|
eventfld.word 0x02 12. " [0] ,Update mask bit of PWM_X submodule 0 immediately" "No effect,Update"
|
|
textline " "
|
|
bitfld.word 0x02 11. " MASKA[3] ,PWM_A mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 10. " [2] ,PWM_A mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 9. " [1] ,PWM_A mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 8. " [0] ,PWM_A mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x02 7. " MASKB[3] ,PWM_B mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 6. " [2] ,PWM_B mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 5. " [1] ,PWM_B mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 4. " [0] ,PWM_B mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.word 0x02 3. " MASKX[3] ,PWM_X mask 3" "Not masked,Masked"
|
|
bitfld.word 0x02 2. " [2] ,PWM_X mask 2" "Not masked,Masked"
|
|
bitfld.word 0x02 1. " [1] ,PWM_X mask 1" "Not masked,Masked"
|
|
bitfld.word 0x02 0. " [0] ,PWM_X mask 0" "Not masked,Masked"
|
|
line.word 0x04 "SWCOUT,Software Controlled Output Register"
|
|
bitfld.word 0x04 7. " SM3OUT23 ,Submodule 3 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 6. " SM3OUT45 ,Submodule 3 software controlled output 45" "0,1"
|
|
bitfld.word 0x04 5. " SM2OUT23 ,Submodule 2 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 4. " SM2OUT45 ,Submodule 2 software controlled output 45" "0,1"
|
|
textline " "
|
|
bitfld.word 0x04 3. " SM1OUT23 ,Submodule 1 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 2. " SM1OUT45 ,Submodule 1 software controlled output 45" "0,1"
|
|
bitfld.word 0x04 1. " SM0OUT23 ,Submodule 0 software controlled output 23" "0,1"
|
|
bitfld.word 0x04 0. " SM0OUT45 ,Submodule 0 software controlled output 45" "0,1"
|
|
line.word 0x06 "DTSRCSEL,PWM Source Select Register"
|
|
bitfld.word 0x06 14.--15. " SM3SEL23 ,Submodule 3 PWM23 control select" "SM3PWM23,Inverted SM3PWM23,SWCOUT[SM3OUT23],PWM_EXTA3"
|
|
bitfld.word 0x06 12.--13. " SM3SEL45 ,Submodule 3 PWM45 control select" "SM3PWM45,Inverted SM3PWM45,SWCOUT[SM3OUT45],PWM_EXTB3"
|
|
bitfld.word 0x06 10.--11. " SM2SEL23 ,Submodule 2 PWM23 control select" "SM2PWM23,Inverted SM2PWM23,SWCOUT[SM2OUT23],PWM_EXTA2"
|
|
bitfld.word 0x06 8.--9. " SM2SEL45 ,Submodule 2 PWM45 control select" "SM2PWM45,Inverted SM2PWM45,SWCOUT[SM2OUT45],PWM_EXTB2"
|
|
textline " "
|
|
bitfld.word 0x06 6.--7. " SM1SEL23 ,Submodule 1 PWM23 control select" "SM1PWM23,Inverted SM1PWM23,SWCOUT[SM1OUT23],PWM_EXTA1"
|
|
bitfld.word 0x06 4.--5. " SM1SEL45 ,Submodule 1 PWM45 control select" "SM1PWM45,Inverted SM1PWM45,SWCOUT[SM1OUT45],PWM_EXTB1"
|
|
bitfld.word 0x06 2.--3. " SM0SEL23 ,Submodule 0 PWM23 control select" "SM0PWM23,Inverted SM0WM23,SWCOUT[SM0OUT23],PWM_EXTA0"
|
|
bitfld.word 0x06 0.--1. " SM0SEL45 ,Submodule 0 PWM45 control select" "SM0PWM45,Inverted SM0PWM45,SWCOUT[SM0OUT45],PWM_EXTB0"
|
|
line.word 0x08 "MCTRL0,Master Control 0 Register"
|
|
bitfld.word 0x08 15. " IPOL[3] ,Current polarity of submodule 3" "PWM23,PWM45"
|
|
bitfld.word 0x08 14. " [2] ,Current polarity of submodule 2" "PWM23,PWM45"
|
|
bitfld.word 0x08 13. " [1] ,Current polarity of submodule 1" "PWM23,PWM45"
|
|
bitfld.word 0x08 12. " [0] ,Current polarity of submodule 0" "PWM23,PWM45"
|
|
textline " "
|
|
bitfld.word 0x08 11. " RUN[3] , PWM generator of submodule 3" "Disabled,Enabled"
|
|
bitfld.word 0x08 10. " [2] , PWM generator of submodule 2" "Disabled,Enabled"
|
|
bitfld.word 0x08 9. " [1] , PWM generator of submodule 1" "Disabled,Enabled"
|
|
bitfld.word 0x08 8. " [0] , PWM generator of submodule 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x08 7. " CLDOK[3] ,LDOK 3 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 6. " [2] ,LDOK 2 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 5. " [1] ,LDOK 1 clear" "No effect,Cleared"
|
|
bitfld.word 0x08 4. " [0] ,LDOK 0 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x08 3. " LDOK[3] ,Load okay of submodule 3" "Not loaded,Loaded"
|
|
bitfld.word 0x08 2. " [2] ,Load okay of submodule 2" "Not loaded,Loaded"
|
|
bitfld.word 0x08 1. " [1] ,Load okay of submodule 1" "Not loaded,Loaded"
|
|
bitfld.word 0x08 0. " [0] ,Load okay of submodule 0" "Not loaded,Loaded"
|
|
line.word 0x0A "MCTRL2,Master Control 2 Register"
|
|
bitfld.word 0x0A 0.--1. " MONPLL ,Monitor PLL state" "Not locked(Do not monitor),Not locked(Monitor),Locked(Do not monitor),Locked(Monitor)"
|
|
line.word 0x0C "FCTRL0,Fault Control Register"
|
|
bitfld.word 0x0C 15. " FLVL[3] ,Fault 3 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 14. " [2] ,Fault 2 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 13. " [1] ,Fault 1 level" "Logic 0,Logic 1"
|
|
bitfld.word 0x0C 12. " [0] ,Fault 0 level" "Logic 0,Logic 1"
|
|
textline " "
|
|
bitfld.word 0x0C 11. " FAUTO[3] ,Automatic fault clearing 3" "Manual,Automatic"
|
|
bitfld.word 0x0C 10. " [2] ,Automatic fault clearing 2" "Manual,Automatic"
|
|
bitfld.word 0x0C 9. " [1] ,Automatic fault clearing 1" "Manual,Automatic"
|
|
bitfld.word 0x0C 8. " [0] ,Automatic fault clearing 0" "Manual,Automatic"
|
|
textline " "
|
|
bitfld.word 0x0C 7. " FSAFE[3] ,Fault safety mode 3" "Normal,Safe"
|
|
bitfld.word 0x0C 6. " [2] ,Fault safety mode 2" "Normal,Safe"
|
|
bitfld.word 0x0C 5. " [1] ,Fault safety mode 1" "Normal,Safe"
|
|
bitfld.word 0x0C 4. " [0] ,Fault safety mode 0" "Normal,Safe"
|
|
textline " "
|
|
bitfld.word 0x0C 3. " FIE[3] ,Fault interrupt enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x0C 2. " [2] ,Fault interrupt enable 2" "Disabled,Enabled"
|
|
bitfld.word 0x0C 1. " [1] ,Fault interrupt enable 1" "Disabled,Enabled"
|
|
bitfld.word 0x0C 0. " [0] ,Fault interrupt enable 0" "Disabled,Enabled"
|
|
line.word 0x0E "FSTS0,Fault Status Register"
|
|
bitfld.word 0x0E 15. " FHALF[3] ,Half cycle fault 3 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 14. " [2] ,Half cycle fault 2 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 13. " [1] ,Half cycle fault 1 recovery" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 12. " [0] ,Half cycle fault 0 recovery" "Not re-enabled,Re-enabled"
|
|
textline " "
|
|
rbitfld.word 0x0E 11. " FFPIN[3] ,Filtered fault pin 3" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 10. " [2] ,Filtered fault pin 2" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 9. " [1] ,Filtered fault pin 1" "Not occurred,Occurred"
|
|
rbitfld.word 0x0E 8. " [0] ,Filtered fault pin 0" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x0E 7. " FFULL[3] ,Full cycle 3" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 6. " [2] ,Full cycle 2" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 5. " [1] ,Full cycle 1" "Not re-enabled,Re-enabled"
|
|
bitfld.word 0x0E 4. " [0] ,Full cycle 0" "Not re-enabled,Re-enabled"
|
|
textline " "
|
|
eventfld.word 0x0E 3. " FFLAG[3] ,Fault flag 3" "Not fault,Fault"
|
|
eventfld.word 0x0E 2. " [2] ,Fault flag 2" "Not fault,Fault"
|
|
eventfld.word 0x0E 1. " [1] ,Fault flag 1" "Not fault,Fault"
|
|
eventfld.word 0x0E 0. " [0] ,Fault flag 0" "Not fault,Fault"
|
|
line.word 0x10 "FFILT0,Fault Filter Register"
|
|
bitfld.word 0x10 15. " GSTR ,Fault glitch stretch enable" "Disabled,Enabled"
|
|
bitfld.word 0x10 8.--10. " FILT_CNT ,Fault filter count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x10 0.--7. 1. " FILT_PER ,Fault filter period"
|
|
line.word 0x12 "FTST,Fault Test Register"
|
|
bitfld.word 0x12 0. " FTEST ,Fault test" "Not fault,Simulated fault"
|
|
line.word 0x14 "FCTRL2,Fault control 2 register"
|
|
bitfld.word 0x14 3. " NOCOMB[3] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 2. " [2] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 1. " [1] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
bitfld.word 0x14 0. " [0] ,No combinational path from fault input to PWM output" "No,Yes"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "FLEXRAM (FlexRAM)"
|
|
base ad:0x400B0000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "TCM_CTRL,TCM CRTL Register"
|
|
bitfld.long 0x00 2. " FORCE_CLK_ON ,Force RAM clock always on" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " TCM_RWAIT_EN ,TCM read wait mode enable" "Fast mode,Wait mode"
|
|
bitfld.long 0x00 0. " TCM_WWAIT_EN ,TCM write wait mode enable" "Fast mode,Wait mode"
|
|
sif (cpu()=="IMXRT1021")
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "OCRAM_MAGIC_ADDR,OCRAM Magic Address Register"
|
|
hexmask.long.word 0x00 1.--16. 1. " OCRAM_MAGIC_ADDR ,OCRAM magic address"
|
|
bitfld.long 0x00 0. " OCRAM_WR_RD_SEL ,OCRAM write read select" "Read,Write"
|
|
line.long 0x04 "DTCM_MAGIC_ADDR,DTCM Magic Address Register"
|
|
hexmask.long.word 0x04 1.--16. 1. " DTCM_MAGIC_ADDR ,DTCM magic address"
|
|
bitfld.long 0x04 0. " DTCM_WR_RD_SEL ,DTCM write read select" "Read,Write"
|
|
line.long 0x08 "ITCM_MAGIC_ADDR,ITCM Magic Address Register"
|
|
hexmask.long.word 0x08 1.--16. 1. " ITCM_MAGIC_ADDR ,ITCM Magic Address"
|
|
bitfld.long 0x08 0. " ITCM_WR_RD_SEL ,ITCM write read select" "Read,Write"
|
|
endif
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "INT_STATUS,Interrupt Status Register"
|
|
eventfld.long 0x00 5. " OCRAM_ERR_STATUS ,OCRAM access error status" "Not occurred,Occurred"
|
|
eventfld.long 0x00 4. " DTCM_ERR_STATUS ,DTCM access error status" "Not occurred,Occurred"
|
|
eventfld.long 0x00 3. " ITCM_ERR_STATUS ,ITCM access error status" "Not occurred,Occurred"
|
|
sif (cpu()=="IMXRT1021")
|
|
textline " "
|
|
bitfld.long 0x00 2. " OCRAM_MAM_STATUS ,OCRAM magic address match status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " DTCM_MAM_STATUS ,DTCM magic address match status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ITCM_MAM_STATUS ,ITCM magic address match status" "Not occurred,Occurred"
|
|
endif
|
|
line.long 0x04 "INT_STAT_EN,Interrupt Status Enable Register"
|
|
bitfld.long 0x04 5. " OCRAM_ERR_STAT_EN ,OCRAM access error status enable" "Masked,Enabled"
|
|
bitfld.long 0x04 4. " DTCM_ERR_STAT_EN ,DTCM Access Error Status Enable" "Masked,Enabled"
|
|
bitfld.long 0x04 3. " ITCM_ERR_STAT_EN ,ITCM Access Error Status Enable" "Masked,Enabled"
|
|
sif (cpu()=="IMXRT1021")
|
|
newline
|
|
bitfld.long 0x04 2. " OCRAM_MAM_STAT_EN ,OCRAM magic address match status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " DTCM_MAM_STAT_EN ,DTCM magic address match status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ITCM_MAM_STAT_EN ,ITCM magic address match status enable" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x08 "INT_SIG_EN,Interrupt Enable Register"
|
|
bitfld.long 0x08 5. " OCRAM_ERR_SIG_EN ,OCRAM access error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " DTCM_ERR_SIG_EN ,DTCM Access Error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " ITCM_ERR_SIG_EN ,ITCM Access Error Interrupt Enable" "Disabled,Enabled"
|
|
sif (cpu()=="IMXRT1021")
|
|
newline
|
|
bitfld.long 0x08 2. " OCRAM_MAM_SIG_EN ,OCRAM magic address match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " DTCM_MAM_SIG_EN ,DTCM magic address match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " ITCM_MAM_SIG_EN ,ITCM magic address match interrupt enable" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "FlexSPI (Flex Serial Peripheral Interface)"
|
|
base ad:0x402A8000
|
|
width 14.
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "MCR0,Module Control Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " AHBGRANTWAIT ,Timeout wait cycle for AHB command grant"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--23. 1. " IPGRANTWAIT ,Time out wait cycle for IP command grant."
|
|
textline " "
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 15. " LEARNEN ,Data learning feature enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 14. " SCKFREERUNEN ,Force SCK output free-running" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpu()=="IMXRT1021")
|
|
bitfld.long 0x00 13. " COMBINATIONEN ,Flash octal mode access by combining Port A and B Data pins" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 13. " COMBINATIONEN ,Flash octal mode access by combining Port A and B Data pins" "Disabled,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 12. " DOZEEN ,Doze mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " HSEN ,Half speed serial flash access enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ATDFEN ,Enable AHB bus write access to IP Tx FIFO" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ARDFEN ,Enable AHB bus read access to IP Rx FIFO" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " RXCLKSRC ,Sample clock source selection for flash reading" "Dummy Read strobe/internal loopback,Dummy Read strobe/DQS pad loopback,,Flash provided Read strobe"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MDIS ,Module disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRESET ,Software reset" "Not reset,Reset"
|
|
line.long 0x04 "MCR1,Module Control Register 1"
|
|
hexmask.long.word 0x04 16.--31. 1. " SEQWAIT ,Command sequence execution timeout value"
|
|
hexmask.long.word 0x04 0.--15. 1. " AHBBUSWAIT ,AHB Read/Write access to serial flash memory space timeout value"
|
|
line.long 0x08 "MCR2,Module Control Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RESUMEWAIT ,Wait cycle for idle state before suspended command sequence resumed"
|
|
bitfld.long 0x08 19. " SCKBDIFFOPT ,SCKB pad usage" "Port B SCK clock,Port A SCK inverted clock"
|
|
bitfld.long 0x08 15. " SAMEDEVICEEN ,Same devices for A1/A2/B1/B2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 14. " CLRLEARNPHASE ,Sampling clock phase selection reset" "No reset,Reset"
|
|
bitfld.long 0x08 11. " CLRAHBBUFOPT ,AHB Rx buffer and AHB Tx buffer auto clean enable" "Disabled,Enabled"
|
|
line.long 0x0C "AHBCR,AHB Bus Control Register"
|
|
bitfld.long 0x0C 6. " READADDROPT ,AHB read address option bit" "Alignment limitation,No alignment limitation"
|
|
bitfld.long 0x0C 5. " PREFETCHEN ,AHB read prefetch enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " BUFFERABLEEN ,Enable AHB bus bufferable write access support" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " CACHABLEEN ,Enable AHB bus cachable read access support" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " APAREN ,Parallel mode enabled for AHB triggered command" "Disabled,Enabled"
|
|
textline " "
|
|
line.long 0x10 "INTEN,Interrupt Enable Register"
|
|
bitfld.long 0x10 11. " SEQTIMEOUTEN ,Sequence execution timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 10. " AHBBUSTIMEOUTEN ,AHB Bus timeout interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " SCKSTOPBYWREN ,SCK stopped during command sequence because Async Tx FIFO empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 8. " SCKSTOPBYRDEN ,SCK stopped during command sequence because Async Rx FIFO full interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " IPTXWEEN ,IP Tx FIFO watermark empty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " IPRXWAEN ,IP Rx FIFO watermark available interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " AHBCMDERREN ,AHB triggered command sequences error detected interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " IPCMDERREN ,IP triggered command sequences error detected interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " AHBCMDGEEN ,AHB triggered command sequences grant timeout interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " IPCMDGEEN ,IP triggered command sequences grant timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " IPCMDDONEEN ,IP triggered command sequences execution finished interrupt enable" "Disabled,Enabled"
|
|
line.long 0x14 "INTR,Interrupt Register"
|
|
eventfld.long 0x14 11. " SEQTIMEOUT ,Sequence execution timeout interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x14 10. " AHBBUSTIMEOUT ,AHB Bus timeout interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x14 9. " SCKSTOPBYWR ,SCK stopped during command sequence because Async Tx FIFO empty interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x14 8. " SCKSTOPBYRD ,SCK stopped during command sequence because Async Rx FIFO full interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x14 6. " IPTXWE ,IP Tx FIFO watermark empty interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x14 5. " IPRXWA ,IP Rx FIFO watermark available interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x14 4. " AHBCMDERR ,AHB triggered command sequences error detected interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x14 3. " IPCMDERR ,IP triggered command sequences error detected interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x14 2. " AHBCMDGE ,AHB triggered command sequences grant timeout interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x14 1. " IPCMDGE ,IP triggered command sequences grant timeout interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x14 0. " IPCMDDONE ,IP triggered command sequences execution finished interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
line.long 0x18 "LUTKEY,LUT Key Register"
|
|
line.long 0x1C "LUTCR,LUT Control Register"
|
|
bitfld.long 0x1C 1. " UNLOCK ,Unlock LUT" "Locked,Unlocked"
|
|
bitfld.long 0x1C 0. " LOCK ,Lock LUT" "Unlocked,Locked"
|
|
textline " "
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "AHBRXBUF0CR0,AHB Rx Buffer 0 Control Register 0"
|
|
bitfld.long 0x00 24.--25. " PRIORITY ,AHB master read priority" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. " MSTRID ,AHB Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BUFSZ ,AHB Rx buffer size in 64 bits"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "AHBRXBUF1CR0,AHB Rx Buffer 1 Control Register 0"
|
|
bitfld.long 0x00 24.--25. " PRIORITY ,AHB master read priority" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. " MSTRID ,AHB Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BUFSZ ,AHB Rx buffer size in 64 bits"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "AHBRXBUF2CR0,AHB Rx Buffer 2 Control Register 0"
|
|
bitfld.long 0x00 24.--25. " PRIORITY ,AHB master read priority" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. " MSTRID ,AHB Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BUFSZ ,AHB Rx buffer size in 64 bits"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "AHBRXBUF3CR0,AHB Rx Buffer 3 Control Register 0"
|
|
bitfld.long 0x00 24.--25. " PRIORITY ,AHB master read priority" "0,1,2,3"
|
|
bitfld.long 0x00 16.--19. " MSTRID ,AHB Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BUFSZ ,AHB Rx buffer size in 64 bits"
|
|
textline " "
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "FLSHA1CR0,Flash A1 Control Register 0"
|
|
hexmask.long.tbyte 0x00 0.--22. 1. " FLSHSZ ,Flash size in KByte"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "FLSHA2CR0,Flash A2 Control Register 0"
|
|
hexmask.long.tbyte 0x00 0.--22. 1. " FLSHSZ ,Flash size in KByte"
|
|
group.long 0x68++0x3
|
|
line.long 0x00 "FLSHB1CR0,Flash B1 Control Register 0"
|
|
hexmask.long.tbyte 0x00 0.--22. 1. " FLSHSZ ,Flash size in KByte"
|
|
group.long 0x6C++0x3
|
|
line.long 0x00 "FLSHB2CR0,Flash B2 Control Register 0"
|
|
hexmask.long.tbyte 0x00 0.--22. 1. " FLSHSZ ,Flash size in KByte"
|
|
textline " "
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "FLSHA1CR1,Flash A1 Control Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " CSINTERVAL ,Minimum interval between flash device chip selection deassertion and flash device chip selection assertion"
|
|
bitfld.long 0x00 15. " CSINTERVALUNIT ,CS interval unit" "1 cycle,256 cycles"
|
|
bitfld.long 0x00 11.--14. " CAS ,Column address size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WA ,Word addressable" "No,Yes"
|
|
bitfld.long 0x00 5.--9. " TCSH ,Serial flash CS hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " TCSS ,Serial flash CS setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "FLSHA2CR1,Flash A2 Control Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " CSINTERVAL ,Minimum interval between flash device chip selection deassertion and flash device chip selection assertion"
|
|
bitfld.long 0x00 15. " CSINTERVALUNIT ,CS interval unit" "1 cycle,256 cycles"
|
|
bitfld.long 0x00 11.--14. " CAS ,Column address size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WA ,Word addressable" "No,Yes"
|
|
bitfld.long 0x00 5.--9. " TCSH ,Serial flash CS hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " TCSS ,Serial flash CS setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x78++0x3
|
|
line.long 0x00 "FLSHB1CR1,Flash B1 Control Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " CSINTERVAL ,Minimum interval between flash device chip selection deassertion and flash device chip selection assertion"
|
|
bitfld.long 0x00 15. " CSINTERVALUNIT ,CS interval unit" "1 cycle,256 cycles"
|
|
bitfld.long 0x00 11.--14. " CAS ,Column address size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WA ,Word addressable" "No,Yes"
|
|
bitfld.long 0x00 5.--9. " TCSH ,Serial flash CS hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " TCSS ,Serial flash CS setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x7C++0x3
|
|
line.long 0x00 "FLSHB2CR1,Flash B2 Control Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " CSINTERVAL ,Minimum interval between flash device chip selection deassertion and flash device chip selection assertion"
|
|
bitfld.long 0x00 15. " CSINTERVALUNIT ,CS interval unit" "1 cycle,256 cycles"
|
|
bitfld.long 0x00 11.--14. " CAS ,Column address size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WA ,Word addressable" "No,Yes"
|
|
bitfld.long 0x00 5.--9. " TCSH ,Serial flash CS hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " TCSS ,Serial flash CS setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "FLSHA1CR2,Flash A1 Control Register 2"
|
|
bitfld.long 0x00 31. " CLRINSTRPTR ,Clear instruction pointer which is internally saved pointer by JMP_ON_CS" "No clear,Clear"
|
|
bitfld.long 0x00 28.--30. " AWRWAITUNIT ,AWRWAIT unit" "2 ahb cycles,8 ahb cycles,32 ahb cycles,128 ahb cycles,512 ahb cycles,2048 ahb cycles,8192 ahb cycles,32768 ahb cycles"
|
|
hexmask.long.word 0x00 16.--27. 1. " AWRWAIT ,Factor of wait cycle between AHB triggered command sequences finished on FlexSPI interface and AHB return bus ready"
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " AWRSEQNUM ,Sequence number for AHB write triggered command" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " AWRSEQID ,Sequence index for AHB write triggered command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--7. " ARDSEQNUM ,Sequence number for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 0.--4. " ARDSEQID ,Sequence index for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 0.--3. " ARDSEQID ,Sequence index for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "FLSHA2CR2,Flash A2 Control Register 2"
|
|
bitfld.long 0x00 31. " CLRINSTRPTR ,Clear instruction pointer which is internally saved pointer by JMP_ON_CS" "No clear,Clear"
|
|
bitfld.long 0x00 28.--30. " AWRWAITUNIT ,AWRWAIT unit" "2 ahb cycles,8 ahb cycles,32 ahb cycles,128 ahb cycles,512 ahb cycles,2048 ahb cycles,8192 ahb cycles,32768 ahb cycles"
|
|
hexmask.long.word 0x00 16.--27. 1. " AWRWAIT ,Factor of wait cycle between AHB triggered command sequences finished on FlexSPI interface and AHB return bus ready"
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " AWRSEQNUM ,Sequence number for AHB write triggered command" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " AWRSEQID ,Sequence index for AHB write triggered command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--7. " ARDSEQNUM ,Sequence number for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 0.--4. " ARDSEQID ,Sequence index for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 0.--3. " ARDSEQID ,Sequence index for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0x88++0x3
|
|
line.long 0x00 "FLSHB1CR2,Flash B1 Control Register 2"
|
|
bitfld.long 0x00 31. " CLRINSTRPTR ,Clear instruction pointer which is internally saved pointer by JMP_ON_CS" "No clear,Clear"
|
|
bitfld.long 0x00 28.--30. " AWRWAITUNIT ,AWRWAIT unit" "2 ahb cycles,8 ahb cycles,32 ahb cycles,128 ahb cycles,512 ahb cycles,2048 ahb cycles,8192 ahb cycles,32768 ahb cycles"
|
|
hexmask.long.word 0x00 16.--27. 1. " AWRWAIT ,Factor of wait cycle between AHB triggered command sequences finished on FlexSPI interface and AHB return bus ready"
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " AWRSEQNUM ,Sequence number for AHB write triggered command" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " AWRSEQID ,Sequence index for AHB write triggered command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--7. " ARDSEQNUM ,Sequence number for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 0.--4. " ARDSEQID ,Sequence index for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 0.--3. " ARDSEQID ,Sequence index for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0x8C++0x3
|
|
line.long 0x00 "FLSHB2CR2,Flash B2 Control Register 2"
|
|
bitfld.long 0x00 31. " CLRINSTRPTR ,Clear instruction pointer which is internally saved pointer by JMP_ON_CS" "No clear,Clear"
|
|
bitfld.long 0x00 28.--30. " AWRWAITUNIT ,AWRWAIT unit" "2 ahb cycles,8 ahb cycles,32 ahb cycles,128 ahb cycles,512 ahb cycles,2048 ahb cycles,8192 ahb cycles,32768 ahb cycles"
|
|
hexmask.long.word 0x00 16.--27. 1. " AWRWAIT ,Factor of wait cycle between AHB triggered command sequences finished on FlexSPI interface and AHB return bus ready"
|
|
textline " "
|
|
bitfld.long 0x00 13.--15. " AWRSEQNUM ,Sequence number for AHB write triggered command" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " AWRSEQID ,Sequence index for AHB write triggered command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--7. " ARDSEQNUM ,Sequence number for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 0.--4. " ARDSEQID ,Sequence index for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 0.--3. " ARDSEQID ,Sequence index for AHB read triggered command in LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
textline " "
|
|
group.long 0x94++0x3
|
|
line.long 0x00 "FLSHCR4,Flash Control Register 4"
|
|
bitfld.long 0x00 3. " WMENB ,Write mask enable bit for flash device on port B" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WMENA ,Write mask enable bit for flash device on port A" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WMOPT1 ,Write mask option bit 1 (DQS pin used as write mask when writing to external device)" "Used,Not used"
|
|
textline " "
|
|
group.long 0xA0++0x7
|
|
line.long 0x00 "IPCR0,IP Control Register 0"
|
|
line.long 0x04 "IPCR1,IP Control Register 1"
|
|
bitfld.long 0x04 31. " IPAREN ,Parallel mode enabled for IP command" "Disabled,Enabled"
|
|
bitfld.long 0x04 24.--26. " ISEQNUM ,Sequence number for IP command" "0,1,2,3,4,5,6,7"
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x04 16.--20. " ISEQID ,Sequence index in LUT for IP command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x04 16.--19. " ISEQID ,Sequence index in LUT for IP command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
textline " "
|
|
hexmask.long.word 0x04 0.--15. 1. " IDATSZ ,Flash read/program data size for IP command"
|
|
group.long 0xB0++0x3
|
|
line.long 0x00 "IPCMD,IP Command Register"
|
|
bitfld.long 0x00 0. " TRG ,IP command trigger" "No trigger,Trigger"
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "DLPR,Data Learn Pattern Register"
|
|
endif
|
|
group.long 0xB8++0xF
|
|
line.long 0x00 "IPRXFCR,IP Rx FIFO Control Register"
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 2.--7. " RXWMRK ,Watermark level" "1*64 bits,2*64 bits,3*64 bits,4*64 bits,5*64 bits,6*64 bits,7*64 bits,8*64 bits,9*64 bits,10*64 bits,11*64 bits,12*64 bits,13*64 bits,14*64 bits,15*64 bits,16*64 bits,17*64 bits,18*64 bits,19*64 bits,20*64 bits,21*64 bits,22*64 bits,23*64 bits,24*64 bits,25*64 bits,26*64 bits,27*64 bits,28*64 bits,29*64 bits,30*64 bits,31*64 bits,32*64 bits,33*64 bits,34*64 bits,35*64 bits,36*64 bits,37*64 bits,38*64 bits,39*64 bits,40*64 bits,41*64 bits,42*64 bits,43*64 bits,44*64 bits,45*64 bits,46*64 bits,47*64 bits,48*64 bits,49*64 bits,50*64 bits,51*64 bits,52*64 bits,53*64 bits,54*64 bits,55*64 bits,56*64 bits,57*64 bits,58*64 bits,59*64 bits,60*64 bits,61*64 bits,62*64 bits,63*64 bits,64*64 bits"
|
|
else
|
|
bitfld.long 0x00 2.--5. " RXWMRK ,Watermark level" "1*64 bits,2*64 bits,3*64 bits,4*64 bits,5*64 bits,6*64 bits,7*64 bits,8*64 bits,9*64 bits,10*64 bits,11*64 bits,12*64 bits,13*64 bits,14*64 bits,15*64 bits,16*64 bits"
|
|
endif
|
|
bitfld.long 0x00 1. " RXDMAEN ,IP Rx FIFO reading by DMA enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLRIPRXF ,Clear all valid data entries in IP Rx FIFO" "No clear,Clear"
|
|
line.long 0x04 "IPTXFCR,IP Tx FIFO Control Register"
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
hexmask.long.byte 0x04 2.--8. 1. " TXWMRK ,Watermark level"
|
|
bitfld.long 0x04 1. " TXDMAEN ,IP Tx FIFO filling by DMA enabled" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLRIPTXF ,Clear all valid data entries in IP Tx FIFO" "No clear,Clear"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x04 2.--5. " TXWMRK ,Watermark level" "1*64 bits,2*64 bits,3*64 bits,4*64 bits,5*64 bits,6*64 bits,7*64 bits,8*64 bits,9*64 bits,10*64 bits,11*64 bits,12*64 bits,13*64 bits,14*64 bits,15*64 bits,16*64 bits"
|
|
bitfld.long 0x04 1. " TXDMAEN ,IP Tx FIFO filling by DMA enabled" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLRIPTXF ,Clear all valid data entries in IP Tx FIFO" "No clear,Clear"
|
|
textline " "
|
|
endif
|
|
line.long 0x08 "DLLACR,DLL Control Register 0 A"
|
|
bitfld.long 0x08 9.--14. " OVRDVAL ,Slave clock delay line delay cell number selection override value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
bitfld.long 0x08 8. " OVRDEN ,Slave clock delay line delay cell number selection override enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3.--6. " SLVDLYTARGET ,Slave line delay target" "1/32 cycle,2/32 cycle,3/32 cycle,4/32 cycle,5/32 cycle,6/32 cycle,7/32 cycle,8/32 cycle,9/32 cycle,10/32 cycle,11/32 cycle,12/32 cycle,13/32 cycle,14/32 cycle,15/32 cycle,16/32 cycle"
|
|
textline " "
|
|
bitfld.long 0x08 1. " DLLRESET ,DLL reset" "No reset,Reset"
|
|
bitfld.long 0x08 0. " DLLEN ,DLL calibration enable" "Disabled,Enabled"
|
|
line.long 0x0C "DLLBCR,DLL Control Register 0 B"
|
|
bitfld.long 0x0C 9.--14. " OVRDVAL ,Slave clock delay line delay cell number selection override value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
bitfld.long 0x0C 8. " OVRDEN ,Slave clock delay line delay cell number selection override enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3.--6. " SLVDLYTARGET ,Slave line delay target" "1/32 cycle,2/32 cycle,3/32 cycle,4/32 cycle,5/32 cycle,6/32 cycle,7/32 cycle,8/32 cycle,9/32 cycle,10/32 cycle,11/32 cycle,12/32 cycle,13/32 cycle,14/32 cycle,15/32 cycle,16/32 cycle"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " DLLRESET ,DLL reset" "No reset,Reset"
|
|
bitfld.long 0x0C 0. " DLLEN ,DLL calibration enable" "Disabled,Enabled"
|
|
textline " "
|
|
if (((per.l(ad:0x402A8000+0xE0))&0x2)==0x02)
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x00 "STS0,Status Register 0"
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 8.--11. " DATLRNPHASEB ,Indicate the sampling clock phase selection on Port B after data learning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DATLRNPHASEA ,Indicate the sampling clock phase selection on Port A after data learning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2.--3. " ARBCMDSRC ,Trigger source of current command sequence granted by arbitrator" "?..."
|
|
bitfld.long 0x00 1. " ARBIDLE ,Status of state machine in ARB_CTL" "Busy,Idle"
|
|
bitfld.long 0x00 0. " SEQIDLE ,Status of state machine in SEQ_CTL" "Busy,Idle"
|
|
else
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x00 "STS0,Status Register 0"
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 8.--11. " DATLRNPHASEB ,Indicate the sampling clock phase selection on Port B after data learning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DATLRNPHASEA ,Indicate the sampling clock phase selection on Port A after data learning" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 2.--3. " ARBCMDSRC ,Trigger source of current command sequence granted by arbitrator" "AHB read command,AHB write command,IP command,Suspended command"
|
|
bitfld.long 0x00 1. " ARBIDLE ,Status of state machine in ARB_CTL" "Busy,Idle"
|
|
bitfld.long 0x00 0. " SEQIDLE ,Status of state machine in SEQ_CTL" "Busy,Idle"
|
|
endif
|
|
rgroup.long 0xE4++0x13
|
|
line.long 0x00 "STS1,Status Register 1"
|
|
bitfld.long 0x00 24.--27. " IPCMDERRCODE ,Error code when IP command error detected" "No error,,IP cmd-JMP_ON_CS,Unknown opcode,DUMMY_[SDR/RWDS_SDR] in DDR,DUMMY_[DDR/RWDS_DDR] in SDR,Flash access start out of range,,,,,,,,Sequence execution timeout,Flash boundary crossed"
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 16.--20. " IPCMDERRID ,Sequence index when IP command error detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 16.--19. " IPCMDERRID ,Sequence index when IP command error detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
bitfld.long 0x00 8.--11. " AHBCMDERRCODE ,Error code when AHB command error detected" "No error,,AHB write cmd-JMP_ON_CS,Unknown opcode,DUMMY_[SDR/RWDS_SDR] in DDR,DUMMY_[DDR/RWDS_DDR] in SDR,,,,,,,,,Sequence execution timeout,?..."
|
|
textline " "
|
|
sif cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
bitfld.long 0x00 0.--4. " AHBCMDERRID ,Sequence index when an AHB command error is detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
bitfld.long 0x00 0.--3. " AHBCMDERRID ,Sequence index when an AHB command error is detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
line.long 0x04 "STS2,Status Register 2"
|
|
bitfld.long 0x04 24.--29. " BREFSEL ,Flash B sample clock reference delay line delay cell number selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 18.--23. " BSLVSEL ,Flash B sample clock slave delay line delay cell number selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 17. " BREFLOCK ,Flash B sample clock reference delay line locked" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " BSLVLOCK ,Flash B sample clock slave delay line locked" "Unlocked,Locked"
|
|
bitfld.long 0x04 8.--13. " AREFSEL ,Flash A sample clock reference delay line delay cell number selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 2.--7. " ASLVSEL ,Flash A sample clock slave delay line delay cell number selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x04 1. " AREFLOCK ,Flash A sample clock reference delay line locked" "Unlocked,Locked"
|
|
bitfld.long 0x04 0. " ASLVLOCK ,Flash A sample clock slave delay line locked" "Unlocked,Locked"
|
|
line.long 0x08 "AHBSPNDSTS,AHB Suspend Status Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " DATLFT ,Left data size for suspended command sequence (in bytes)"
|
|
bitfld.long 0x08 1.--3. " BUFID ,AHB Rx BUF ID for suspended command sequence" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0. " ACTIVE ,AHB read prefetch command sequence suspend status" "Not suspended,Suspended"
|
|
line.long 0x0C "IPRXFSTS,IP Rx FIFO Status Register"
|
|
hexmask.long.word 0x0C 16.--31. 1. " RDCNTR ,Total read data counter: RDCNTR * 64 bits"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " FILL ,Fill level of IP Rx FIFO: FILL * 64 bits"
|
|
line.long 0x10 "IPTXFSTS,IP Tx FIFO Status Register"
|
|
hexmask.long.word 0x10 16.--31. 1. " WRCNTR ,Total write data counter: WRCNTR * 64 bits"
|
|
hexmask.long.byte 0x10 0.--7. 1. " FILL ,Fill level of IP Tx FIFO: FILL * 64 bits"
|
|
width 8.
|
|
tree "RFDR Registers"
|
|
rgroup.long 0x100++0x3
|
|
line.long 0x00 "RFDR0,IP Rx FIFO Data Register 0"
|
|
rgroup.long 0x104++0x3
|
|
line.long 0x00 "RFDR1,IP Rx FIFO Data Register 1"
|
|
rgroup.long 0x108++0x3
|
|
line.long 0x00 "RFDR2,IP Rx FIFO Data Register 2"
|
|
rgroup.long 0x10C++0x3
|
|
line.long 0x00 "RFDR3,IP Rx FIFO Data Register 3"
|
|
rgroup.long 0x110++0x3
|
|
line.long 0x00 "RFDR4,IP Rx FIFO Data Register 4"
|
|
rgroup.long 0x114++0x3
|
|
line.long 0x00 "RFDR5,IP Rx FIFO Data Register 5"
|
|
rgroup.long 0x118++0x3
|
|
line.long 0x00 "RFDR6,IP Rx FIFO Data Register 6"
|
|
rgroup.long 0x11C++0x3
|
|
line.long 0x00 "RFDR7,IP Rx FIFO Data Register 7"
|
|
rgroup.long 0x120++0x3
|
|
line.long 0x00 "RFDR8,IP Rx FIFO Data Register 8"
|
|
rgroup.long 0x124++0x3
|
|
line.long 0x00 "RFDR9,IP Rx FIFO Data Register 9"
|
|
rgroup.long 0x128++0x3
|
|
line.long 0x00 "RFDR10,IP Rx FIFO Data Register 10"
|
|
rgroup.long 0x12C++0x3
|
|
line.long 0x00 "RFDR11,IP Rx FIFO Data Register 11"
|
|
rgroup.long 0x130++0x3
|
|
line.long 0x00 "RFDR12,IP Rx FIFO Data Register 12"
|
|
rgroup.long 0x134++0x3
|
|
line.long 0x00 "RFDR13,IP Rx FIFO Data Register 13"
|
|
rgroup.long 0x138++0x3
|
|
line.long 0x00 "RFDR14,IP Rx FIFO Data Register 14"
|
|
rgroup.long 0x13C++0x3
|
|
line.long 0x00 "RFDR15,IP Rx FIFO Data Register 15"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x00 "RFDR16,IP Rx FIFO Data Register 16"
|
|
rgroup.long 0x144++0x3
|
|
line.long 0x00 "RFDR17,IP Rx FIFO Data Register 17"
|
|
rgroup.long 0x148++0x3
|
|
line.long 0x00 "RFDR18,IP Rx FIFO Data Register 18"
|
|
rgroup.long 0x14C++0x3
|
|
line.long 0x00 "RFDR19,IP Rx FIFO Data Register 19"
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x00 "RFDR20,IP Rx FIFO Data Register 20"
|
|
rgroup.long 0x154++0x3
|
|
line.long 0x00 "RFDR21,IP Rx FIFO Data Register 21"
|
|
rgroup.long 0x158++0x3
|
|
line.long 0x00 "RFDR22,IP Rx FIFO Data Register 22"
|
|
rgroup.long 0x15C++0x3
|
|
line.long 0x00 "RFDR23,IP Rx FIFO Data Register 23"
|
|
rgroup.long 0x160++0x3
|
|
line.long 0x00 "RFDR24,IP Rx FIFO Data Register 24"
|
|
rgroup.long 0x164++0x3
|
|
line.long 0x00 "RFDR25,IP Rx FIFO Data Register 25"
|
|
rgroup.long 0x168++0x3
|
|
line.long 0x00 "RFDR26,IP Rx FIFO Data Register 26"
|
|
rgroup.long 0x16C++0x3
|
|
line.long 0x00 "RFDR27,IP Rx FIFO Data Register 27"
|
|
rgroup.long 0x170++0x3
|
|
line.long 0x00 "RFDR28,IP Rx FIFO Data Register 28"
|
|
rgroup.long 0x174++0x3
|
|
line.long 0x00 "RFDR29,IP Rx FIFO Data Register 29"
|
|
rgroup.long 0x178++0x3
|
|
line.long 0x00 "RFDR30,IP Rx FIFO Data Register 30"
|
|
rgroup.long 0x17C++0x3
|
|
line.long 0x00 "RFDR31,IP Rx FIFO Data Register 31"
|
|
tree.end
|
|
tree "TFDR Registers"
|
|
wgroup.long 0x180++0x3
|
|
line.long 0x00 "TFDR0,IP Tx FIFO Data Register 0"
|
|
wgroup.long 0x184++0x3
|
|
line.long 0x00 "TFDR1,IP Tx FIFO Data Register 1"
|
|
wgroup.long 0x188++0x3
|
|
line.long 0x00 "TFDR2,IP Tx FIFO Data Register 2"
|
|
wgroup.long 0x18C++0x3
|
|
line.long 0x00 "TFDR3,IP Tx FIFO Data Register 3"
|
|
wgroup.long 0x190++0x3
|
|
line.long 0x00 "TFDR4,IP Tx FIFO Data Register 4"
|
|
wgroup.long 0x194++0x3
|
|
line.long 0x00 "TFDR5,IP Tx FIFO Data Register 5"
|
|
wgroup.long 0x198++0x3
|
|
line.long 0x00 "TFDR6,IP Tx FIFO Data Register 6"
|
|
wgroup.long 0x19C++0x3
|
|
line.long 0x00 "TFDR7,IP Tx FIFO Data Register 7"
|
|
wgroup.long 0x1A0++0x3
|
|
line.long 0x00 "TFDR8,IP Tx FIFO Data Register 8"
|
|
wgroup.long 0x1A4++0x3
|
|
line.long 0x00 "TFDR9,IP Tx FIFO Data Register 9"
|
|
wgroup.long 0x1A8++0x3
|
|
line.long 0x00 "TFDR10,IP Tx FIFO Data Register 10"
|
|
wgroup.long 0x1AC++0x3
|
|
line.long 0x00 "TFDR11,IP Tx FIFO Data Register 11"
|
|
wgroup.long 0x1B0++0x3
|
|
line.long 0x00 "TFDR12,IP Tx FIFO Data Register 12"
|
|
wgroup.long 0x1B4++0x3
|
|
line.long 0x00 "TFDR13,IP Tx FIFO Data Register 13"
|
|
wgroup.long 0x1B8++0x3
|
|
line.long 0x00 "TFDR14,IP Tx FIFO Data Register 14"
|
|
wgroup.long 0x1BC++0x3
|
|
line.long 0x00 "TFDR15,IP Tx FIFO Data Register 15"
|
|
wgroup.long 0x1C0++0x3
|
|
line.long 0x00 "TFDR16,IP Tx FIFO Data Register 16"
|
|
wgroup.long 0x1C4++0x3
|
|
line.long 0x00 "TFDR17,IP Tx FIFO Data Register 17"
|
|
wgroup.long 0x1C8++0x3
|
|
line.long 0x00 "TFDR18,IP Tx FIFO Data Register 18"
|
|
wgroup.long 0x1CC++0x3
|
|
line.long 0x00 "TFDR19,IP Tx FIFO Data Register 19"
|
|
wgroup.long 0x1D0++0x3
|
|
line.long 0x00 "TFDR20,IP Tx FIFO Data Register 20"
|
|
wgroup.long 0x1D4++0x3
|
|
line.long 0x00 "TFDR21,IP Tx FIFO Data Register 21"
|
|
wgroup.long 0x1D8++0x3
|
|
line.long 0x00 "TFDR22,IP Tx FIFO Data Register 22"
|
|
wgroup.long 0x1DC++0x3
|
|
line.long 0x00 "TFDR23,IP Tx FIFO Data Register 23"
|
|
wgroup.long 0x1E0++0x3
|
|
line.long 0x00 "TFDR24,IP Tx FIFO Data Register 24"
|
|
wgroup.long 0x1E4++0x3
|
|
line.long 0x00 "TFDR25,IP Tx FIFO Data Register 25"
|
|
wgroup.long 0x1E8++0x3
|
|
line.long 0x00 "TFDR26,IP Tx FIFO Data Register 26"
|
|
wgroup.long 0x1EC++0x3
|
|
line.long 0x00 "TFDR27,IP Tx FIFO Data Register 27"
|
|
wgroup.long 0x1F0++0x3
|
|
line.long 0x00 "TFDR28,IP Tx FIFO Data Register 28"
|
|
wgroup.long 0x1F4++0x3
|
|
line.long 0x00 "TFDR29,IP Tx FIFO Data Register 29"
|
|
wgroup.long 0x1F8++0x3
|
|
line.long 0x00 "TFDR30,IP Tx FIFO Data Register 30"
|
|
wgroup.long 0x1FC++0x3
|
|
line.long 0x00 "TFDR31,IP Tx FIFO Data Register 31"
|
|
tree.end
|
|
width 7.
|
|
tree "LUT Registers"
|
|
group.long 0x200++0x3
|
|
line.long 0x00 "LUT0,LUT 0"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x204++0x3
|
|
line.long 0x00 "LUT1,LUT 1"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x208++0x3
|
|
line.long 0x00 "LUT2,LUT 2"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x20C++0x3
|
|
line.long 0x00 "LUT3,LUT 3"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x210++0x3
|
|
line.long 0x00 "LUT4,LUT 4"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x214++0x3
|
|
line.long 0x00 "LUT5,LUT 5"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x218++0x3
|
|
line.long 0x00 "LUT6,LUT 6"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x21C++0x3
|
|
line.long 0x00 "LUT7,LUT 7"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x220++0x3
|
|
line.long 0x00 "LUT8,LUT 8"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x224++0x3
|
|
line.long 0x00 "LUT9,LUT 9"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x228++0x3
|
|
line.long 0x00 "LUT10,LUT 10"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x22C++0x3
|
|
line.long 0x00 "LUT11,LUT 11"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x230++0x3
|
|
line.long 0x00 "LUT12,LUT 12"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x234++0x3
|
|
line.long 0x00 "LUT13,LUT 13"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x238++0x3
|
|
line.long 0x00 "LUT14,LUT 14"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x23C++0x3
|
|
line.long 0x00 "LUT15,LUT 15"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x240++0x3
|
|
line.long 0x00 "LUT16,LUT 16"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x244++0x3
|
|
line.long 0x00 "LUT17,LUT 17"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x248++0x3
|
|
line.long 0x00 "LUT18,LUT 18"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x24C++0x3
|
|
line.long 0x00 "LUT19,LUT 19"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x250++0x3
|
|
line.long 0x00 "LUT20,LUT 20"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x254++0x3
|
|
line.long 0x00 "LUT21,LUT 21"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x258++0x3
|
|
line.long 0x00 "LUT22,LUT 22"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x25C++0x3
|
|
line.long 0x00 "LUT23,LUT 23"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x260++0x3
|
|
line.long 0x00 "LUT24,LUT 24"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x264++0x3
|
|
line.long 0x00 "LUT25,LUT 25"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x268++0x3
|
|
line.long 0x00 "LUT26,LUT 26"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x26C++0x3
|
|
line.long 0x00 "LUT27,LUT 27"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x270++0x3
|
|
line.long 0x00 "LUT28,LUT 28"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x274++0x3
|
|
line.long 0x00 "LUT29,LUT 29"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x278++0x3
|
|
line.long 0x00 "LUT30,LUT 30"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x27C++0x3
|
|
line.long 0x00 "LUT31,LUT 31"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x280++0x3
|
|
line.long 0x00 "LUT32,LUT 32"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x284++0x3
|
|
line.long 0x00 "LUT33,LUT 33"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x288++0x3
|
|
line.long 0x00 "LUT34,LUT 34"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x28C++0x3
|
|
line.long 0x00 "LUT35,LUT 35"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x290++0x3
|
|
line.long 0x00 "LUT36,LUT 36"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x294++0x3
|
|
line.long 0x00 "LUT37,LUT 37"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x298++0x3
|
|
line.long 0x00 "LUT38,LUT 38"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x29C++0x3
|
|
line.long 0x00 "LUT39,LUT 39"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x00 "LUT40,LUT 40"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2A4++0x3
|
|
line.long 0x00 "LUT41,LUT 41"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2A8++0x3
|
|
line.long 0x00 "LUT42,LUT 42"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2AC++0x3
|
|
line.long 0x00 "LUT43,LUT 43"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2B0++0x3
|
|
line.long 0x00 "LUT44,LUT 44"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2B4++0x3
|
|
line.long 0x00 "LUT45,LUT 45"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2B8++0x3
|
|
line.long 0x00 "LUT46,LUT 46"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2BC++0x3
|
|
line.long 0x00 "LUT47,LUT 47"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2C0++0x3
|
|
line.long 0x00 "LUT48,LUT 48"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2C4++0x3
|
|
line.long 0x00 "LUT49,LUT 49"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2C8++0x3
|
|
line.long 0x00 "LUT50,LUT 50"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2CC++0x3
|
|
line.long 0x00 "LUT51,LUT 51"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2D0++0x3
|
|
line.long 0x00 "LUT52,LUT 52"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2D4++0x3
|
|
line.long 0x00 "LUT53,LUT 53"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2D8++0x3
|
|
line.long 0x00 "LUT54,LUT 54"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2DC++0x3
|
|
line.long 0x00 "LUT55,LUT 55"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2E0++0x3
|
|
line.long 0x00 "LUT56,LUT 56"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2E4++0x3
|
|
line.long 0x00 "LUT57,LUT 57"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2E8++0x3
|
|
line.long 0x00 "LUT58,LUT 58"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2EC++0x3
|
|
line.long 0x00 "LUT59,LUT 59"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2F0++0x3
|
|
line.long 0x00 "LUT60,LUT 60"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2F4++0x3
|
|
line.long 0x00 "LUT61,LUT 61"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2F8++0x3
|
|
line.long 0x00 "LUT62,LUT 62"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
group.long 0x2FC++0x3
|
|
line.long 0x00 "LUT63,LUT 63"
|
|
bitfld.long 0x00 26.--31. " OPCODE1 ,OPCODE 1" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 24.--25. " NUM_PADS1 ,NUM_PADS 1" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OPERAND1 ,OPERAND 1"
|
|
textline " "
|
|
bitfld.long 0x00 10.--15. " OPCODE0 ,OPCODE" "STOP,CMD_SDR,RADDR_SDR,CADDR_SDR,MODE1_SDR,MODE2_SDR,MODE4_SDR,MODE8_SDR,WRITE_SDR,READ_SDR,LEARN_SDR,DATSZ_SDR,DUMMY_SDR,DUMMY_RWDS_SDR,,,,,,,,,,,,,,,,,,JUMP_ON_CS,,CMD_DDR,RADDR_DDR,CADDR_DDR,MODE1_DDR,MODE2_DDR,MODE4_DDR,MODE8_DDR,WRITE_DDR,READ_DDR,LEARN_DDR,DATSZ_DDR,DUMMY_DDR,DUMMY_RWDS_DDR,,,,,,,,,,,,,,,,,,?..."
|
|
bitfld.long 0x00 8.--9. " NUM_PADS0 ,NUM_PADS 0" "Single mode,Dual mode,Quad mode,Octal mode"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OPERAND0 ,OPERAND 0"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPC (General Power Controller)"
|
|
base ad:0x400F4000
|
|
tree "GPC"
|
|
width 6.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CNTR,GPC Interface control register"
|
|
bitfld.long 0x00 22. " PDRAM0_PGE ,FlexRAM PDRAM0 power gate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MEGA_PUP_REQ ,MEGA domain power up request" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " MEGA_PDN_REQ ,MEGA domain power down request" "Not requested,Requested"
|
|
textline " "
|
|
group.long 0x08++0x0F
|
|
line.long 0x00 "IMR1,IRQ Masking Register 1"
|
|
bitfld.long 0x00 31. " IMR1[31] ,IRQ[31] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,IRQ[30] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,IRQ[29] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,IRQ[28] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,IRQ[27] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,IRQ[26] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [25] ,IRQ[25] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,IRQ[24] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,IRQ[23] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,IRQ[22] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,IRQ[21] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,IRQ[20] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,IRQ[19] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,IRQ[18] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,IRQ[17] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,IRQ[16] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,IRQ[15] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,IRQ[14] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [13] ,IRQ[13] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,IRQ[12] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,IRQ[11] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,IRQ[10] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,IRQ[9] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,IRQ[8] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,IRQ[7] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,IRQ[6] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,IRQ[5] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,IRQ[4] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,IRQ[3] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,IRQ[2] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [1] ,IRQ[1] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,IRQ[0] masking bit" "Not masked,Masked"
|
|
line.long 0x04 "IMR2,IRQ masking register 2"
|
|
bitfld.long 0x04 31. " IMR2[63] ,IRQ[63] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 30. " [62] ,IRQ[62] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 29. " [61] ,IRQ[61] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 28. " [60] ,IRQ[60] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 27. " [59] ,IRQ[59] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 26. " [58] ,IRQ[58] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 25. " [57] ,IRQ[57] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 24. " [56] ,IRQ[56] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 23. " [55] ,IRQ[55] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 22. " [54] ,IRQ[54] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 21. " [53] ,IRQ[53] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 20. " [52] ,IRQ[52] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [51] ,IRQ[51] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 18. " [50] ,IRQ[50] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 17. " [49] ,IRQ[49] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 16. " [48] ,IRQ[48] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 15. " [47] ,IRQ[47] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 14. " [46] ,IRQ[46] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 13. " [45] ,IRQ[45] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 12. " [44] ,IRQ[44] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 11. " [43] ,IRQ[43] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 10. " [42] ,IRQ[42] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 9. " [41] ,IRQ[41] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " [40] ,IRQ[40] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " [39] ,IRQ[39] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " [38] ,IRQ[38] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 5. " [37] ,IRQ[37] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " [36] ,IRQ[36] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " [35] ,IRQ[35] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " [34] ,IRQ[34] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 1. " [33] ,IRQ[33] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x04 0. " [32] ,IRQ[32] masking bit" "Not masked,Masked"
|
|
line.long 0x08 "IMR3,IRQ masking register 3"
|
|
bitfld.long 0x08 31. " IMR3[95] ,IRQ[95] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 30. " [94] ,IRQ[94] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 29. " [93] ,IRQ[93] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 28. " [92] ,IRQ[92] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 27. " [91] ,IRQ[91] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 26. " [90] ,IRQ[90] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 25. " [89] ,IRQ[89] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 24. " [88] ,IRQ[88] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 23. " [87] ,IRQ[87] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 22. " [86] ,IRQ[86] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 21. " [85] ,IRQ[85] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 20. " [84] ,IRQ[84] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 19. " [83] ,IRQ[83] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 18. " [82] ,IRQ[82] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 17. " [81] ,IRQ[81] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 16. " [80] ,IRQ[80] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 15. " [79] ,IRQ[79] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " [78] ,IRQ[78] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 13. " [77] ,IRQ[77] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 12. " [76] ,IRQ[76] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 11. " [75] ,IRQ[75] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 10. " [74] ,IRQ[74] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 9. " [73] ,IRQ[73] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 8. " [72] ,IRQ[72] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 7. " [71] ,IRQ[71] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 6. " [70] ,IRQ[70] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 5. " [69] ,IRQ[69] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 4. " [68] ,IRQ[68] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 3. " [67] ,IRQ[67] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 2. " [66] ,IRQ[66] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " [65] ,IRQ[65] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x08 0. " [64] ,IRQ[64] masking bit" "Not masked,Masked"
|
|
line.long 0x0C "IMR4,IRQ masking register 4"
|
|
bitfld.long 0x0C 31. " IMR4[127] ,IRQ[127] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 30. " [126] ,IRQ[126] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 29. " [125] ,IRQ[125] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 28. " [124] ,IRQ[124] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " [123] ,IRQ[123] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 26. " [122] ,IRQ[122] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 25. " [121] ,IRQ[121] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 24. " [120] ,IRQ[120] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " [119] ,IRQ[119] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 22. " [118] ,IRQ[118] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 21. " [117] ,IRQ[117] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 20. " [116] ,IRQ[116] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " [115] ,IRQ[115] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 18. " [114] ,IRQ[114] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 17. " [113] ,IRQ[113] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 16. " [112] ,IRQ[112] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " [111] ,IRQ[111] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 14. " [110] ,IRQ[110] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 13. " [109] ,IRQ[109] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 12. " [108] ,IRQ[108] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " [107] ,IRQ[107] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 10. " [106] ,IRQ[106] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 9. " [105] ,IRQ[105] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 8. " [104] ,IRQ[104] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " [103] ,IRQ[103] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 6. " [102] ,IRQ[102] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 5. " [101] ,IRQ[101] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 4. " [100] ,IRQ[100] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " [99] ,IRQ[99] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 2. " [98] ,IRQ[98] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 1. " [97] ,IRQ[97] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x0C 0. " [96] ,IRQ[96] masking bit" "Not masked,Masked"
|
|
rgroup.long 0x18++0x0F
|
|
line.long 0x00 "ISR1,IRQ Status Resister 1"
|
|
bitfld.long 0x00 31. " ISR1[31] ,IRQ[31] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " [30] ,IRQ[30] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " [29] ,IRQ[29] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " [28] ,IRQ[28] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [27] ,IRQ[27] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " [26] ,IRQ[26] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " [25] ,IRQ[25] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " [24] ,IRQ[24] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [23] ,IRQ[23] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " [22] ,IRQ[22] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " [21] ,IRQ[21] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " [20] ,IRQ[20] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,IRQ[19] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " [18] ,IRQ[18] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " [17] ,IRQ[17] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " [16] ,IRQ[16] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [15] ,IRQ[15] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " [14] ,IRQ[14] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " [13] ,IRQ[13] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " [12] ,IRQ[12] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [11] ,IRQ[11] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " [10] ,IRQ[10] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " [9] ,IRQ[9] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " [8] ,IRQ[8] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,IRQ[7] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " [6] ,IRQ[6] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " [5] ,IRQ[5] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " [4] ,IRQ[4] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [3] ,IRQ[3] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " [2] ,IRQ[2] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " [1] ,IRQ[1] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " [0] ,IRQ[0] status" "No interrupt,Interrupt"
|
|
line.long 0x04 "ISR2,IRQ Status Resister 2"
|
|
bitfld.long 0x04 31. " ISR2[63] ,IRQ[63] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " [62] ,IRQ[62] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " [61] ,IRQ[61] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 28. " [60] ,IRQ[60] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 27. " [59] ,IRQ[59] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " [58] ,IRQ[58] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 25. " [57] ,IRQ[57] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " [56] ,IRQ[56] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 23. " [55] ,IRQ[55] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " [54] ,IRQ[54] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 21. " [53] ,IRQ[53] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " [52] ,IRQ[52] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [51] ,IRQ[51] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " [50] ,IRQ[50] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " [49] ,IRQ[49] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 16. " [48] ,IRQ[48] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 15. " [47] ,IRQ[47] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " [46] ,IRQ[46] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " [45] ,IRQ[45] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " [44] ,IRQ[44] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 11. " [43] ,IRQ[43] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " [42] ,IRQ[42] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " [41] ,IRQ[41] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " [40] ,IRQ[40] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " [39] ,IRQ[39] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " [38] ,IRQ[38] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " [37] ,IRQ[37] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " [36] ,IRQ[36] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " [35] ,IRQ[35] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " [34] ,IRQ[34] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " [33] ,IRQ[33] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " [32] ,IRQ[32] status" "No interrupt,Interrupt"
|
|
line.long 0x08 "ISR3,IRQ Status Resister 3"
|
|
bitfld.long 0x08 31. " ISR3[95] ,IRQ[95] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " [94] ,IRQ[94] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " [93] ,IRQ[93] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 28. " [92] ,IRQ[92] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 27. " [91] ,IRQ[91] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 26. " [90] ,IRQ[90] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 25. " [89] ,IRQ[89] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " [88] ,IRQ[88] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 23. " [87] ,IRQ[87] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 22. " [86] ,IRQ[86] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 21. " [85] ,IRQ[85] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " [84] ,IRQ[84] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 19. " [83] ,IRQ[83] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 18. " [82] ,IRQ[82] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " [81] ,IRQ[81] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 16. " [80] ,IRQ[80] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 15. " [79] ,IRQ[79] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " [78] ,IRQ[78] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 13. " [77] ,IRQ[77] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 12. " [76] ,IRQ[76] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 11. " [75] ,IRQ[75] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " [74] ,IRQ[74] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 9. " [73] ,IRQ[73] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " [72] ,IRQ[72] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 7. " [71] ,IRQ[71] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 6. " [70] ,IRQ[70] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " [69] ,IRQ[69] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 4. " [68] ,IRQ[68] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 3. " [67] ,IRQ[67] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 2. " [66] ,IRQ[66] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 1. " [65] ,IRQ[65] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 0. " [64] ,IRQ[64] status" "No interrupt,Interrupt"
|
|
line.long 0x0C "ISR4,IRQ status resister 4"
|
|
bitfld.long 0x0C 31. " ISR4[127] ,IRQ[127] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 30. " [126] ,IRQ[126] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 29. " [125] ,IRQ[125] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 28. " [124] ,IRQ[124] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " [123] ,IRQ[123] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 26. " [122] ,IRQ[122] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 25. " [121] ,IRQ[121] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 24. " [120] ,IRQ[120] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 23. " [119] ,IRQ[119] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 22. " [118] ,IRQ[118] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 21. " [117] ,IRQ[117] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 20. " [116] ,IRQ[116] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " [115] ,IRQ[115] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 18. " [114] ,IRQ[114] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 17. " [113] ,IRQ[113] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 16. " [112] ,IRQ[112] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " [111] ,IRQ[111] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 14. " [110] ,IRQ[110] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 13. " [109] ,IRQ[109] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 12. " [108] ,IRQ[108] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " [107] ,IRQ[107] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 10. " [106] ,IRQ[106] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 9. " [105] ,IRQ[105] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 8. " [104] ,IRQ[104] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " [103] ,IRQ[103] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 6. " [102] ,IRQ[102] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 5. " [101] ,IRQ[101] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 4. " [100] ,IRQ[100] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " [99] ,IRQ[99] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 2. " [98] ,IRQ[98] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 1. " [97] ,IRQ[97] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 0. " [96] ,IRQ[96] status" "No interrupt,Interrupt"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "IMR5,IRQ masking register 5"
|
|
bitfld.long 0x00 31. " IMR5[159] ,IRQ[159] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [158] ,IRQ[158] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [157] ,IRQ[157] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [156] ,IRQ[156] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [155] ,IRQ[155] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [154] ,IRQ[154] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 25. " [153] ,IRQ[153] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [152] ,IRQ[152] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [151] ,IRQ[151] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [150] ,IRQ[150] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [149] ,IRQ[149] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [148] ,IRQ[148] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [147] ,IRQ[147] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [146] ,IRQ[146] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [145] ,IRQ[145] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [144] ,IRQ[144] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [143] ,IRQ[143] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [142] ,IRQ[142] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " [141] ,IRQ[141] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [140] ,IRQ[140] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [139] ,IRQ[139] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [138] ,IRQ[138] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [137] ,IRQ[137] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [136] ,IRQ[136] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [135] ,IRQ[135] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [134] ,IRQ[134] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [133] ,IRQ[133] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [132] ,IRQ[132] masking bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [131] ,IRQ[131] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [130] ,IRQ[130] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " [129] ,IRQ[129] masking bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [128] ,IRQ[128] masking bit" "Not masked,Masked"
|
|
rgroup.long 0x38++0x03
|
|
line.long 0x00 "ISR5,IRQ Status Resister 5"
|
|
bitfld.long 0x00 31. " ISR5[159] ,IRQ[159] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " [158] ,IRQ[158] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " [157] ,IRQ[157] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " [156] ,IRQ[156] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " [155] ,IRQ[155] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " [154] ,IRQ[154] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 25. " [153] ,IRQ[153] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " [152] ,IRQ[152] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 23. " [151] ,IRQ[151] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " [150] ,IRQ[150] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " [149] ,IRQ[149] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " [148] ,IRQ[148] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [147] ,IRQ[147] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " [146] ,IRQ[146] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " [145] ,IRQ[145] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " [144] ,IRQ[144] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " [143] ,IRQ[143] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " [142] ,IRQ[142] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " [141] ,IRQ[141] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " [140] ,IRQ[140] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " [139] ,IRQ[139] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " [138] ,IRQ[138] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " [137] ,IRQ[137] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " [136] ,IRQ[136] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [135] ,IRQ[135] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " [134] ,IRQ[134] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " [133] ,IRQ[133] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " [132] ,IRQ[132] status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " [131] ,IRQ[131] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " [130] ,IRQ[130] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " [129] ,IRQ[129] status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " [128] ,IRQ[128] status" "No interrupt,Interrupt"
|
|
tree.end
|
|
tree "PGC"
|
|
width 13.
|
|
group.long 0x220++0x0F
|
|
line.long 0x00 "MEGA_CTRL,PGC Mega Control Register"
|
|
bitfld.long 0x00 0. " PCR ,Power control" "No switch off,Switch off"
|
|
line.long 0x04 "MEGA_PUPSCR,PGC Mega Power Up Sequence Control Register"
|
|
bitfld.long 0x04 8.--13. " SW2ISO ,Number of IPG clocks to wait for before negating isolation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--5. " SW ,Number of IPG clocks to wait for before asserting power toggle on/off signal (switch_b)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x08 "MEGA_PDNSCR,PGC Mega Pull Down Sequence Control Register"
|
|
bitfld.long 0x08 8.--13. " ISO2SW ,Number of IPG clocks to wait for before negating power toggle on/off signal (switch_b)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x08 0.--5. " ISO ,Number of IPG clocks to wait for before asserting isolation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x0C "MEGA_SR,PGC Mega Power Gating Controller Status Register"
|
|
eventfld.long 0x0C 0. " PSR ,Power status" "Not powered down,Powered down"
|
|
textline " "
|
|
group.long 0x2A0++0x0F
|
|
line.long 0x00 "CPU_CTRL,PGC CPU Control Register"
|
|
bitfld.long 0x00 0. " PCR ,Power control" "No switch off,Switch off"
|
|
line.long 0x04 "CPU_PUPSCR,PGC CPU Power Up Sequence Control Register"
|
|
bitfld.long 0x04 8.--13. " SW2ISO ,Number of 2048 IPG clocks to wait for before negating isolation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--5. " SW ,Number of 2048 IPG clocks to wait for before switching on ARM power" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x08 "CPU_PDNSCR,PGC CPU Pull Down Sequence Control Register"
|
|
bitfld.long 0x08 8.--13. " ISO2SW ,Number of 32k clocks to wait for before negating isolation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x08 0.--5. " ISO ,Number of 32k clocks to wait for before asserting isolation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x0C "CPU_SR,PGC CPU Power Gating Controller Status Register"
|
|
eventfld.long 0x0C 0. " PSR ,Power status" "Not powered down,Powered down"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "GPIO (General Purpose Input/Output)"
|
|
tree "GPIO 1"
|
|
base ad:0x401B8000
|
|
width 11.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DR,GPIO Data Register"
|
|
bitfld.long 0x00 31. " DR[31] ,Data bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,Data bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " [29] ,Data bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,Data bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " [27] ,Data bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,Data bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Data bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,Data bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " [23] ,Data bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,Data bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,Data bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,Data bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Data bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,Data bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,Data bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,Data bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,Data bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,Data bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Data bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,Data bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " [11] ,Data bit 11" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,Data bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,Data bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,Data bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Data bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,Data bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,Data bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,Data bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " [3] ,Data bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,Data bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Data bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,Data bit 0" "Low,High"
|
|
line.long 0x04 "GDIR,GPIO Direction Register"
|
|
bitfld.long 0x04 31. " GDIR[31] ,GPIO direction 31 bit" "Input,Output"
|
|
bitfld.long 0x04 30. " [30] ,GPIO direction 30 bit" "Input,Output"
|
|
bitfld.long 0x04 29. " [29] ,GPIO direction 29 bit" "Input,Output"
|
|
bitfld.long 0x04 28. " [28] ,GPIO direction 28 bit" "Input,Output"
|
|
bitfld.long 0x04 27. " [27] ,GPIO direction 27 bit" "Input,Output"
|
|
bitfld.long 0x04 26. " [26] ,GPIO direction 26 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 25. " [25] ,GPIO direction 25 bit" "Input,Output"
|
|
bitfld.long 0x04 24. " [24] ,GPIO direction 24 bit" "Input,Output"
|
|
bitfld.long 0x04 23. " [23] ,GPIO direction 23 bit" "Input,Output"
|
|
bitfld.long 0x04 22. " [22] ,GPIO direction 22 bit" "Input,Output"
|
|
bitfld.long 0x04 21. " [21] ,GPIO direction 21 bit" "Input,Output"
|
|
bitfld.long 0x04 20. " [20] ,GPIO direction 20 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [19] ,GPIO direction 19 bit" "Input,Output"
|
|
bitfld.long 0x04 18. " [18] ,GPIO direction 18 bit" "Input,Output"
|
|
bitfld.long 0x04 17. " [17] ,GPIO direction 17 bit" "Input,Output"
|
|
bitfld.long 0x04 16. " [16] ,GPIO direction 16 bit" "Input,Output"
|
|
bitfld.long 0x04 15. " [15] ,GPIO direction 15 bit" "Input,Output"
|
|
bitfld.long 0x04 14. " [14] ,GPIO direction 14 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 13. " [13] ,GPIO direction 13 bit" "Input,Output"
|
|
bitfld.long 0x04 12. " [12] ,GPIO direction 12 bit" "Input,Output"
|
|
bitfld.long 0x04 11. " [11] ,GPIO direction 11 bit" "Input,Output"
|
|
bitfld.long 0x04 10. " [10] ,GPIO direction 10 bit" "Input,Output"
|
|
bitfld.long 0x04 9. " [9] ,GPIO direction 9 bit" "Input,Output"
|
|
bitfld.long 0x04 8. " [8] ,GPIO direction 8 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " [7] ,GPIO direction 7 bit" "Input,Output"
|
|
bitfld.long 0x04 6. " [6] ,GPIO direction 6 bit" "Input,Output"
|
|
bitfld.long 0x04 5. " [5] ,GPIO direction 5 bit" "Input,Output"
|
|
bitfld.long 0x04 4. " [4] ,GPIO direction 4 bit" "Input,Output"
|
|
bitfld.long 0x04 3. " [3] ,GPIO direction 3 bit" "Input,Output"
|
|
bitfld.long 0x04 2. " [2] ,GPIO direction 2 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " [1] ,GPIO direction 1 bit" "Input,Output"
|
|
bitfld.long 0x04 0. " [0] ,GPIO direction 0 bit" "Input,Output"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "PSR,GPIO Pad Status Register"
|
|
bitfld.long 0x00 31. " PSR[31] ,GPIO pad status bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,GPIO pad status bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " [29] ,GPIO pad status bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,GPIO pad status bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " [27] ,GPIO pad status bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,GPIO pad status bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,GPIO pad status bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,GPIO pad status bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " [23] ,GPIO pad status bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,GPIO pad status bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,GPIO pad status bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,GPIO pad status bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,GPIO pad status bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,GPIO pad status bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,GPIO pad status bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,GPIO pad status bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,GPIO pad status bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,GPIO pad status bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,GPIO pad status bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,GPIO pad status bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " [11] ,GPIO pad status bit 11" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,GPIO pad status bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,GPIO pad status bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,GPIO pad status bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,GPIO pad status bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,GPIO pad status bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,GPIO pad status bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,GPIO pad status bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " [3] ,GPIO pad status bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,GPIO pad status bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,GPIO pad status bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,GPIO pad status bit 0" "Low,High"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR[15] ,Active condition of the interrupt function for GPIO interrupt 15" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 28.--29. " [14] ,Active condition of the interrupt function for GPIO interrupt 14" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 26.--27. " [13] ,Active condition of the interrupt function for GPIO interrupt 13" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 24.--25. " [12] ,Active condition of the interrupt function for GPIO interrupt 12" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 22.--23. " [11] ,Active condition of the interrupt function for GPIO interrupt 11" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 20.--21. " [10] ,Active condition of the interrupt function for GPIO interrupt 10" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " [9] ,Active condition of the interrupt function for GPIO interrupt 9" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 16.--17. " [8] ,Active condition of the interrupt function for GPIO interrupt 8" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 14.--15. " [7] ,Active condition of the interrupt function for GPIO interrupt 7" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 12.--13. " [6] ,Active condition of the interrupt function for GPIO interrupt 6" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 10.--11. " [5] ,Active condition of the interrupt function for GPIO interrupt 5" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 8.--9. " [4] ,Active condition of the interrupt function for GPIO interrupt 4" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " [3] ,Active condition of the interrupt function for GPIO interrupt 3" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 4.--5. " [2] ,Active condition of the interrupt function for GPIO interrupt 2" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 2.--3. " [1] ,Active condition of the interrupt function for GPIO interrupt 1" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 0.--1. " [0] ,Active condition of the interrupt function for GPIO interrupt 0" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ICR2,GPIO Interrupt Configuration Register 2"
|
|
bitfld.long 0x00 30.--31. " ICR31 ,Active condition of the interrupt function for GPIO interrupt 31" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 28.--29. " [30] ,Active condition of the interrupt function for GPIO interrupt 30" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 26.--27. " [29] ,Active condition of the interrupt function for GPIO interrupt 29" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 24.--25. " [28] ,Active condition of the interrupt function for GPIO interrupt 28" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 22.--23. " [27] ,Active condition of the interrupt function for GPIO interrupt 27" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 20.--21. " [26] ,Active condition of the interrupt function for GPIO interrupt 26" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " [25] ,Active condition of the interrupt function for GPIO interrupt 25" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 16.--17. " [24] ,Active condition of the interrupt function for GPIO interrupt 24" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 14.--15. " [23] ,Active condition of the interrupt function for GPIO interrupt 23" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 12.--13. " [22] ,Active condition of the interrupt function for GPIO interrupt 22" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 10.--11. " [21] ,Active condition of the interrupt function for GPIO interrupt 21" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 8.--9. " [20] ,Active condition of the interrupt function for GPIO interrupt 20" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " [19] ,Active condition of the interrupt function for GPIO interrupt 19" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 4.--5. " [18] ,Active condition of the interrupt function for GPIO interrupt 18" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 2.--3. " [17] ,Active condition of the interrupt function for GPIO interrupt 17" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 0.--1. " [16] ,Active condition of the interrupt function for GPIO interrupt 16" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
sif cpuis("IMXRT1021")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " IMR[31] ,Interrupt 31 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " [30] ,Interrupt 30 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " [29] ,Interrupt 29 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " [28] ,Interrupt 28 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " [27] ,Interrupt 27 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " [26] ,Interrupt 26 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Interrupt 25 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " [24] ,Interrupt 24 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " [23] ,Interrupt 23 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 22. " [22] ,Interrupt 22 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " [21] ,Interrupt 21 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " [20] ,Interrupt 20 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Interrupt 19 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " [18] ,Interrupt 18 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " [17] ,Interrupt 17 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 16. " [16] ,Interrupt 16 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " [15] ,Interrupt 15 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " [14] ,Interrupt 14 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Interrupt 13 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " [12] ,Interrupt 12 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " [11] ,Interrupt 11 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " [10] ,Interrupt 10 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " [9] ,Interrupt 9 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " [8] ,Interrupt 8 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Interrupt 7 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " [6] ,Interrupt 6 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " [5] ,Interrupt 5 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " [4] ,Interrupt 4 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " [3] ,Interrupt 3 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " [2] ,Interrupt 2 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Interrupt 1 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " [0] ,Interrupt 0 mask bit" "Masked,Not masked"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " IMR[31] ,Interrupt 31 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Interrupt 30 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Interrupt 29 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Interrupt 28 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Interrupt 27 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Interrupt 26 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Interrupt 25 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Interrupt 24 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Interrupt 23 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Interrupt 22 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Interrupt 21 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Interrupt 20 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Interrupt 19 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Interrupt 18 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Interrupt 17 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Interrupt 16 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Interrupt 15 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Interrupt 14 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Interrupt 13 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Interrupt 12 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Interrupt 11 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Interrupt 10 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Interrupt 9 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Interrupt 8 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Interrupt 7 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Interrupt 6 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Interrupt 5 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Interrupt 4 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Interrupt 3 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Interrupt 2 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Interrupt 1 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Interrupt 0 mask bit" "Not masked,Masked"
|
|
endif
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "ISR,GPIO Interrupt Status Register"
|
|
eventfld.long 0x00 31. " ISR[31] ,Interrupt 31 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " [30] ,Interrupt 30 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 29. " [29] ,Interrupt 29 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 28. " [28] ,Interrupt 28 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 27. " [27] ,Interrupt 27 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 26. " [26] ,Interrupt 26 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 25. " [25] ,Interrupt 25 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " [24] ,Interrupt 24 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 23. " [23] ,Interrupt 23 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 22. " [22] ,Interrupt 22 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 21. " [21] ,Interrupt 21 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " [20] ,Interrupt 20 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " [19] ,Interrupt 19 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " [18] ,Interrupt 18 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " [17] ,Interrupt 17 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " [16] ,Interrupt 16 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 15. " [15] ,Interrupt 15 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " [14] ,Interrupt 14 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 13. " [13] ,Interrupt 13 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 12. " [12] ,Interrupt 12 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 11. " [11] ,Interrupt 11 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " [10] ,Interrupt 10 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " [9] ,Interrupt 9 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " [8] ,Interrupt 8 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " [7] ,Interrupt 7 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " [6] ,Interrupt 6 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " [5] ,Interrupt 5 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " [4] ,Interrupt 4 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 3. " [3] ,Interrupt 3 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " [2] ,Interrupt 2 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " [1] ,Interrupt 1 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " [0] ,Interrupt 0 status bit" "No interrupt,Interrupt"
|
|
line.long 0x04 "EDGE_SEL,GPIO Edge Select Register"
|
|
bitfld.long 0x04 31. " GPIO_EDGE_SEL[31] ,Edge select bit 31" "ICR31 setting,Any edge"
|
|
bitfld.long 0x04 30. " [30] ,Edge select bit 30" "ICR30 setting,Any edge"
|
|
bitfld.long 0x04 29. " [29] ,Edge select bit 29" "ICR29 setting,Any edge"
|
|
bitfld.long 0x04 28. " [28] ,Edge select bit 28" "ICR28 setting,Any edge"
|
|
bitfld.long 0x04 27. " [27] ,Edge select bit 27" "ICR27 setting,Any edge"
|
|
bitfld.long 0x04 26. " [26] ,Edge select bit 26" "ICR26 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 25. " [25] ,Edge select bit 25" "ICR25 setting,Any edge"
|
|
bitfld.long 0x04 24. " [24] ,Edge select bit 24" "ICR24 setting,Any edge"
|
|
bitfld.long 0x04 23. " [23] ,Edge select bit 23" "ICR23 setting,Any edge"
|
|
bitfld.long 0x04 22. " [22] ,Edge select bit 22" "ICR22 setting,Any edge"
|
|
bitfld.long 0x04 21. " [21] ,Edge select bit 21" "ICR21 setting,Any edge"
|
|
bitfld.long 0x04 20. " [20] ,Edge select bit 20" "ICR20 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [19] ,Edge select bit 19" "ICR19 setting,Any edge"
|
|
bitfld.long 0x04 18. " [18] ,Edge select bit 18" "ICR18 setting,Any edge"
|
|
bitfld.long 0x04 17. " [17] ,Edge select bit 17" "ICR17 setting,Any edge"
|
|
bitfld.long 0x04 16. " [16] ,Edge select bit 16" "ICR16 setting,Any edge"
|
|
bitfld.long 0x04 15. " [15] ,Edge select bit 15" "ICR15 setting,Any edge"
|
|
bitfld.long 0x04 14. " [14] ,Edge select bit 14" "ICR14 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 13. " [13] ,Edge select bit 13" "ICR13 setting,Any edge"
|
|
bitfld.long 0x04 12. " [12] ,Edge select bit 12" "ICR12 setting,Any edge"
|
|
bitfld.long 0x04 11. " [11] ,Edge select bit 11" "ICR11 setting,Any edge"
|
|
bitfld.long 0x04 10. " [10] ,Edge select bit 10" "ICR10 setting,Any edge"
|
|
bitfld.long 0x04 9. " [9] ,Edge select bit 9" "ICR9 setting,Any edge"
|
|
bitfld.long 0x04 8. " [8] ,Edge select bit 8" "ICR8 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 7. " [7] ,Edge select bit 7" "ICR7 setting,Any edge"
|
|
bitfld.long 0x04 6. " [6] ,Edge select bit 6" "ICR6 setting,Any edge"
|
|
bitfld.long 0x04 5. " [5] ,Edge select bit 5" "ICR5 setting,Any edge"
|
|
bitfld.long 0x04 4. " [4] ,Edge select bit 4" "ICR4 setting,Any edge"
|
|
bitfld.long 0x04 3. " [3] ,Edge select bit 3" "ICR3 setting,Any edge"
|
|
bitfld.long 0x04 2. " [2] ,Edge select bit 2" "ICR2 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 1. " [1] ,Edge select bit 1" "ICR1 setting,Any edge"
|
|
bitfld.long 0x04 0. " [0] ,Edge select bit 0" "ICR0 setting,Any edge"
|
|
sif cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
wgroup.long 0x84++0x0B
|
|
line.long 0x00 "DR_SET,GPIO Data Register SET Register"
|
|
line.long 0x04 "DR_CLEAR,GPIO Data Register CLEAR Register"
|
|
line.long 0x08 "DR_TOGGLE,GPIO Data Register TOGGLE Register"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPIO 2"
|
|
base ad:0x401BC000
|
|
width 11.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DR,GPIO Data Register"
|
|
bitfld.long 0x00 31. " DR[31] ,Data bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,Data bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " [29] ,Data bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,Data bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " [27] ,Data bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,Data bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Data bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,Data bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " [23] ,Data bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,Data bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,Data bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,Data bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Data bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,Data bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,Data bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,Data bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,Data bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,Data bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Data bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,Data bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " [11] ,Data bit 11" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,Data bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,Data bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,Data bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Data bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,Data bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,Data bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,Data bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " [3] ,Data bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,Data bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Data bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,Data bit 0" "Low,High"
|
|
line.long 0x04 "GDIR,GPIO Direction Register"
|
|
bitfld.long 0x04 31. " GDIR[31] ,GPIO direction 31 bit" "Input,Output"
|
|
bitfld.long 0x04 30. " [30] ,GPIO direction 30 bit" "Input,Output"
|
|
bitfld.long 0x04 29. " [29] ,GPIO direction 29 bit" "Input,Output"
|
|
bitfld.long 0x04 28. " [28] ,GPIO direction 28 bit" "Input,Output"
|
|
bitfld.long 0x04 27. " [27] ,GPIO direction 27 bit" "Input,Output"
|
|
bitfld.long 0x04 26. " [26] ,GPIO direction 26 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 25. " [25] ,GPIO direction 25 bit" "Input,Output"
|
|
bitfld.long 0x04 24. " [24] ,GPIO direction 24 bit" "Input,Output"
|
|
bitfld.long 0x04 23. " [23] ,GPIO direction 23 bit" "Input,Output"
|
|
bitfld.long 0x04 22. " [22] ,GPIO direction 22 bit" "Input,Output"
|
|
bitfld.long 0x04 21. " [21] ,GPIO direction 21 bit" "Input,Output"
|
|
bitfld.long 0x04 20. " [20] ,GPIO direction 20 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [19] ,GPIO direction 19 bit" "Input,Output"
|
|
bitfld.long 0x04 18. " [18] ,GPIO direction 18 bit" "Input,Output"
|
|
bitfld.long 0x04 17. " [17] ,GPIO direction 17 bit" "Input,Output"
|
|
bitfld.long 0x04 16. " [16] ,GPIO direction 16 bit" "Input,Output"
|
|
bitfld.long 0x04 15. " [15] ,GPIO direction 15 bit" "Input,Output"
|
|
bitfld.long 0x04 14. " [14] ,GPIO direction 14 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 13. " [13] ,GPIO direction 13 bit" "Input,Output"
|
|
bitfld.long 0x04 12. " [12] ,GPIO direction 12 bit" "Input,Output"
|
|
bitfld.long 0x04 11. " [11] ,GPIO direction 11 bit" "Input,Output"
|
|
bitfld.long 0x04 10. " [10] ,GPIO direction 10 bit" "Input,Output"
|
|
bitfld.long 0x04 9. " [9] ,GPIO direction 9 bit" "Input,Output"
|
|
bitfld.long 0x04 8. " [8] ,GPIO direction 8 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " [7] ,GPIO direction 7 bit" "Input,Output"
|
|
bitfld.long 0x04 6. " [6] ,GPIO direction 6 bit" "Input,Output"
|
|
bitfld.long 0x04 5. " [5] ,GPIO direction 5 bit" "Input,Output"
|
|
bitfld.long 0x04 4. " [4] ,GPIO direction 4 bit" "Input,Output"
|
|
bitfld.long 0x04 3. " [3] ,GPIO direction 3 bit" "Input,Output"
|
|
bitfld.long 0x04 2. " [2] ,GPIO direction 2 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " [1] ,GPIO direction 1 bit" "Input,Output"
|
|
bitfld.long 0x04 0. " [0] ,GPIO direction 0 bit" "Input,Output"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "PSR,GPIO Pad Status Register"
|
|
bitfld.long 0x00 31. " PSR[31] ,GPIO pad status bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,GPIO pad status bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " [29] ,GPIO pad status bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,GPIO pad status bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " [27] ,GPIO pad status bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,GPIO pad status bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,GPIO pad status bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,GPIO pad status bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " [23] ,GPIO pad status bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,GPIO pad status bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,GPIO pad status bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,GPIO pad status bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,GPIO pad status bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,GPIO pad status bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,GPIO pad status bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,GPIO pad status bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,GPIO pad status bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,GPIO pad status bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,GPIO pad status bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " [12] ,GPIO pad status bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " [11] ,GPIO pad status bit 11" "Low,High"
|
|
bitfld.long 0x00 10. " [10] ,GPIO pad status bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,GPIO pad status bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,GPIO pad status bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,GPIO pad status bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,GPIO pad status bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,GPIO pad status bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,GPIO pad status bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " [3] ,GPIO pad status bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,GPIO pad status bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,GPIO pad status bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,GPIO pad status bit 0" "Low,High"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR[15] ,Active condition of the interrupt function for GPIO interrupt 15" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 28.--29. " [14] ,Active condition of the interrupt function for GPIO interrupt 14" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 26.--27. " [13] ,Active condition of the interrupt function for GPIO interrupt 13" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 24.--25. " [12] ,Active condition of the interrupt function for GPIO interrupt 12" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 22.--23. " [11] ,Active condition of the interrupt function for GPIO interrupt 11" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 20.--21. " [10] ,Active condition of the interrupt function for GPIO interrupt 10" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " [9] ,Active condition of the interrupt function for GPIO interrupt 9" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 16.--17. " [8] ,Active condition of the interrupt function for GPIO interrupt 8" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 14.--15. " [7] ,Active condition of the interrupt function for GPIO interrupt 7" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 12.--13. " [6] ,Active condition of the interrupt function for GPIO interrupt 6" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 10.--11. " [5] ,Active condition of the interrupt function for GPIO interrupt 5" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 8.--9. " [4] ,Active condition of the interrupt function for GPIO interrupt 4" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " [3] ,Active condition of the interrupt function for GPIO interrupt 3" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 4.--5. " [2] ,Active condition of the interrupt function for GPIO interrupt 2" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 2.--3. " [1] ,Active condition of the interrupt function for GPIO interrupt 1" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 0.--1. " [0] ,Active condition of the interrupt function for GPIO interrupt 0" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ICR2,GPIO Interrupt Configuration Register 2"
|
|
bitfld.long 0x00 30.--31. " ICR31 ,Active condition of the interrupt function for GPIO interrupt 31" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 28.--29. " [30] ,Active condition of the interrupt function for GPIO interrupt 30" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 26.--27. " [29] ,Active condition of the interrupt function for GPIO interrupt 29" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 24.--25. " [28] ,Active condition of the interrupt function for GPIO interrupt 28" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 22.--23. " [27] ,Active condition of the interrupt function for GPIO interrupt 27" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 20.--21. " [26] ,Active condition of the interrupt function for GPIO interrupt 26" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " [25] ,Active condition of the interrupt function for GPIO interrupt 25" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 16.--17. " [24] ,Active condition of the interrupt function for GPIO interrupt 24" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 14.--15. " [23] ,Active condition of the interrupt function for GPIO interrupt 23" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 12.--13. " [22] ,Active condition of the interrupt function for GPIO interrupt 22" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 10.--11. " [21] ,Active condition of the interrupt function for GPIO interrupt 21" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 8.--9. " [20] ,Active condition of the interrupt function for GPIO interrupt 20" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " [19] ,Active condition of the interrupt function for GPIO interrupt 19" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 4.--5. " [18] ,Active condition of the interrupt function for GPIO interrupt 18" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 2.--3. " [17] ,Active condition of the interrupt function for GPIO interrupt 17" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 0.--1. " [16] ,Active condition of the interrupt function for GPIO interrupt 16" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
sif cpuis("IMXRT1021")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " IMR[31] ,Interrupt 31 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " [30] ,Interrupt 30 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " [29] ,Interrupt 29 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " [28] ,Interrupt 28 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " [27] ,Interrupt 27 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " [26] ,Interrupt 26 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Interrupt 25 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " [24] ,Interrupt 24 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " [23] ,Interrupt 23 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 22. " [22] ,Interrupt 22 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " [21] ,Interrupt 21 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " [20] ,Interrupt 20 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Interrupt 19 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " [18] ,Interrupt 18 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " [17] ,Interrupt 17 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 16. " [16] ,Interrupt 16 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " [15] ,Interrupt 15 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " [14] ,Interrupt 14 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Interrupt 13 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " [12] ,Interrupt 12 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " [11] ,Interrupt 11 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " [10] ,Interrupt 10 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " [9] ,Interrupt 9 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " [8] ,Interrupt 8 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Interrupt 7 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " [6] ,Interrupt 6 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " [5] ,Interrupt 5 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " [4] ,Interrupt 4 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " [3] ,Interrupt 3 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " [2] ,Interrupt 2 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Interrupt 1 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " [0] ,Interrupt 0 mask bit" "Masked,Not masked"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " IMR[31] ,Interrupt 31 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Interrupt 30 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Interrupt 29 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Interrupt 28 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Interrupt 27 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Interrupt 26 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Interrupt 25 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Interrupt 24 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Interrupt 23 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Interrupt 22 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Interrupt 21 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Interrupt 20 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Interrupt 19 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Interrupt 18 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Interrupt 17 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Interrupt 16 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Interrupt 15 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Interrupt 14 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Interrupt 13 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " [12] ,Interrupt 12 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " [11] ,Interrupt 11 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " [10] ,Interrupt 10 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Interrupt 9 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Interrupt 8 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Interrupt 7 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Interrupt 6 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Interrupt 5 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Interrupt 4 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Interrupt 3 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Interrupt 2 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Interrupt 1 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Interrupt 0 mask bit" "Not masked,Masked"
|
|
endif
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "ISR,GPIO Interrupt Status Register"
|
|
eventfld.long 0x00 31. " ISR[31] ,Interrupt 31 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " [30] ,Interrupt 30 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 29. " [29] ,Interrupt 29 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 28. " [28] ,Interrupt 28 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 27. " [27] ,Interrupt 27 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 26. " [26] ,Interrupt 26 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 25. " [25] ,Interrupt 25 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " [24] ,Interrupt 24 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 23. " [23] ,Interrupt 23 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 22. " [22] ,Interrupt 22 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 21. " [21] ,Interrupt 21 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " [20] ,Interrupt 20 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " [19] ,Interrupt 19 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " [18] ,Interrupt 18 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " [17] ,Interrupt 17 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " [16] ,Interrupt 16 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 15. " [15] ,Interrupt 15 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " [14] ,Interrupt 14 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 13. " [13] ,Interrupt 13 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 12. " [12] ,Interrupt 12 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 11. " [11] ,Interrupt 11 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " [10] ,Interrupt 10 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " [9] ,Interrupt 9 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " [8] ,Interrupt 8 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " [7] ,Interrupt 7 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " [6] ,Interrupt 6 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " [5] ,Interrupt 5 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " [4] ,Interrupt 4 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 3. " [3] ,Interrupt 3 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " [2] ,Interrupt 2 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " [1] ,Interrupt 1 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " [0] ,Interrupt 0 status bit" "No interrupt,Interrupt"
|
|
line.long 0x04 "EDGE_SEL,GPIO Edge Select Register"
|
|
bitfld.long 0x04 31. " GPIO_EDGE_SEL[31] ,Edge select bit 31" "ICR31 setting,Any edge"
|
|
bitfld.long 0x04 30. " [30] ,Edge select bit 30" "ICR30 setting,Any edge"
|
|
bitfld.long 0x04 29. " [29] ,Edge select bit 29" "ICR29 setting,Any edge"
|
|
bitfld.long 0x04 28. " [28] ,Edge select bit 28" "ICR28 setting,Any edge"
|
|
bitfld.long 0x04 27. " [27] ,Edge select bit 27" "ICR27 setting,Any edge"
|
|
bitfld.long 0x04 26. " [26] ,Edge select bit 26" "ICR26 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 25. " [25] ,Edge select bit 25" "ICR25 setting,Any edge"
|
|
bitfld.long 0x04 24. " [24] ,Edge select bit 24" "ICR24 setting,Any edge"
|
|
bitfld.long 0x04 23. " [23] ,Edge select bit 23" "ICR23 setting,Any edge"
|
|
bitfld.long 0x04 22. " [22] ,Edge select bit 22" "ICR22 setting,Any edge"
|
|
bitfld.long 0x04 21. " [21] ,Edge select bit 21" "ICR21 setting,Any edge"
|
|
bitfld.long 0x04 20. " [20] ,Edge select bit 20" "ICR20 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [19] ,Edge select bit 19" "ICR19 setting,Any edge"
|
|
bitfld.long 0x04 18. " [18] ,Edge select bit 18" "ICR18 setting,Any edge"
|
|
bitfld.long 0x04 17. " [17] ,Edge select bit 17" "ICR17 setting,Any edge"
|
|
bitfld.long 0x04 16. " [16] ,Edge select bit 16" "ICR16 setting,Any edge"
|
|
bitfld.long 0x04 15. " [15] ,Edge select bit 15" "ICR15 setting,Any edge"
|
|
bitfld.long 0x04 14. " [14] ,Edge select bit 14" "ICR14 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 13. " [13] ,Edge select bit 13" "ICR13 setting,Any edge"
|
|
bitfld.long 0x04 12. " [12] ,Edge select bit 12" "ICR12 setting,Any edge"
|
|
bitfld.long 0x04 11. " [11] ,Edge select bit 11" "ICR11 setting,Any edge"
|
|
bitfld.long 0x04 10. " [10] ,Edge select bit 10" "ICR10 setting,Any edge"
|
|
bitfld.long 0x04 9. " [9] ,Edge select bit 9" "ICR9 setting,Any edge"
|
|
bitfld.long 0x04 8. " [8] ,Edge select bit 8" "ICR8 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 7. " [7] ,Edge select bit 7" "ICR7 setting,Any edge"
|
|
bitfld.long 0x04 6. " [6] ,Edge select bit 6" "ICR6 setting,Any edge"
|
|
bitfld.long 0x04 5. " [5] ,Edge select bit 5" "ICR5 setting,Any edge"
|
|
bitfld.long 0x04 4. " [4] ,Edge select bit 4" "ICR4 setting,Any edge"
|
|
bitfld.long 0x04 3. " [3] ,Edge select bit 3" "ICR3 setting,Any edge"
|
|
bitfld.long 0x04 2. " [2] ,Edge select bit 2" "ICR2 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 1. " [1] ,Edge select bit 1" "ICR1 setting,Any edge"
|
|
bitfld.long 0x04 0. " [0] ,Edge select bit 0" "ICR0 setting,Any edge"
|
|
sif cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
wgroup.long 0x84++0x0B
|
|
line.long 0x00 "DR_SET,GPIO Data Register SET Register"
|
|
line.long 0x04 "DR_CLEAR,GPIO Data Register CLEAR Register"
|
|
line.long 0x08 "DR_TOGGLE,GPIO Data Register TOGGLE Register"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPIO 3"
|
|
base ad:0x401C0000
|
|
width 11.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DR,GPIO Data Register"
|
|
bitfld.long 0x00 31. " DR[31] ,Data bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,Data bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " [29] ,Data bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,Data bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " [27] ,Data bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,Data bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Data bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,Data bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " [23] ,Data bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,Data bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,Data bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,Data bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Data bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,Data bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,Data bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,Data bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,Data bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,Data bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Data bit 13" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,Data bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,Data bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Data bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,Data bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,Data bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,Data bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " [3] ,Data bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,Data bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Data bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,Data bit 0" "Low,High"
|
|
line.long 0x04 "GDIR,GPIO Direction Register"
|
|
bitfld.long 0x04 31. " GDIR[31] ,GPIO direction 31 bit" "Input,Output"
|
|
bitfld.long 0x04 30. " [30] ,GPIO direction 30 bit" "Input,Output"
|
|
bitfld.long 0x04 29. " [29] ,GPIO direction 29 bit" "Input,Output"
|
|
bitfld.long 0x04 28. " [28] ,GPIO direction 28 bit" "Input,Output"
|
|
bitfld.long 0x04 27. " [27] ,GPIO direction 27 bit" "Input,Output"
|
|
bitfld.long 0x04 26. " [26] ,GPIO direction 26 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 25. " [25] ,GPIO direction 25 bit" "Input,Output"
|
|
bitfld.long 0x04 24. " [24] ,GPIO direction 24 bit" "Input,Output"
|
|
bitfld.long 0x04 23. " [23] ,GPIO direction 23 bit" "Input,Output"
|
|
bitfld.long 0x04 22. " [22] ,GPIO direction 22 bit" "Input,Output"
|
|
bitfld.long 0x04 21. " [21] ,GPIO direction 21 bit" "Input,Output"
|
|
bitfld.long 0x04 20. " [20] ,GPIO direction 20 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [19] ,GPIO direction 19 bit" "Input,Output"
|
|
bitfld.long 0x04 18. " [18] ,GPIO direction 18 bit" "Input,Output"
|
|
bitfld.long 0x04 17. " [17] ,GPIO direction 17 bit" "Input,Output"
|
|
bitfld.long 0x04 16. " [16] ,GPIO direction 16 bit" "Input,Output"
|
|
bitfld.long 0x04 15. " [15] ,GPIO direction 15 bit" "Input,Output"
|
|
bitfld.long 0x04 14. " [14] ,GPIO direction 14 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 13. " [13] ,GPIO direction 13 bit" "Input,Output"
|
|
bitfld.long 0x04 9. " [9] ,GPIO direction 9 bit" "Input,Output"
|
|
bitfld.long 0x04 8. " [8] ,GPIO direction 8 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " [7] ,GPIO direction 7 bit" "Input,Output"
|
|
bitfld.long 0x04 6. " [6] ,GPIO direction 6 bit" "Input,Output"
|
|
bitfld.long 0x04 5. " [5] ,GPIO direction 5 bit" "Input,Output"
|
|
bitfld.long 0x04 4. " [4] ,GPIO direction 4 bit" "Input,Output"
|
|
bitfld.long 0x04 3. " [3] ,GPIO direction 3 bit" "Input,Output"
|
|
bitfld.long 0x04 2. " [2] ,GPIO direction 2 bit" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " [1] ,GPIO direction 1 bit" "Input,Output"
|
|
bitfld.long 0x04 0. " [0] ,GPIO direction 0 bit" "Input,Output"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "PSR,GPIO Pad Status Register"
|
|
bitfld.long 0x00 31. " PSR[31] ,GPIO pad status bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " [30] ,GPIO pad status bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " [29] ,GPIO pad status bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " [28] ,GPIO pad status bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " [27] ,GPIO pad status bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " [26] ,GPIO pad status bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,GPIO pad status bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " [24] ,GPIO pad status bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " [23] ,GPIO pad status bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " [22] ,GPIO pad status bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " [21] ,GPIO pad status bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " [20] ,GPIO pad status bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,GPIO pad status bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " [18] ,GPIO pad status bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " [17] ,GPIO pad status bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " [16] ,GPIO pad status bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " [15] ,GPIO pad status bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " [14] ,GPIO pad status bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,GPIO pad status bit 13" "Low,High"
|
|
bitfld.long 0x00 9. " [9] ,GPIO pad status bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " [8] ,GPIO pad status bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,GPIO pad status bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " [6] ,GPIO pad status bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " [5] ,GPIO pad status bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " [4] ,GPIO pad status bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " [3] ,GPIO pad status bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " [2] ,GPIO pad status bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,GPIO pad status bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,GPIO pad status bit 0" "Low,High"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 30.--31. " ICR[15] ,Active condition of the interrupt function for GPIO interrupt 15" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 28.--29. " [14] ,Active condition of the interrupt function for GPIO interrupt 14" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 26.--27. " [13] ,Active condition of the interrupt function for GPIO interrupt 13" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " [9] ,Active condition of the interrupt function for GPIO interrupt 9" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 16.--17. " [8] ,Active condition of the interrupt function for GPIO interrupt 8" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 14.--15. " [7] ,Active condition of the interrupt function for GPIO interrupt 7" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 12.--13. " [6] ,Active condition of the interrupt function for GPIO interrupt 6" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 10.--11. " [5] ,Active condition of the interrupt function for GPIO interrupt 5" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 8.--9. " [4] ,Active condition of the interrupt function for GPIO interrupt 4" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " [3] ,Active condition of the interrupt function for GPIO interrupt 3" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 4.--5. " [2] ,Active condition of the interrupt function for GPIO interrupt 2" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 2.--3. " [1] ,Active condition of the interrupt function for GPIO interrupt 1" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 0.--1. " [0] ,Active condition of the interrupt function for GPIO interrupt 0" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "ICR2,GPIO Interrupt Configuration Register 2"
|
|
bitfld.long 0x00 30.--31. " ICR31 ,Active condition of the interrupt function for GPIO interrupt 31" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 28.--29. " [30] ,Active condition of the interrupt function for GPIO interrupt 30" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 26.--27. " [29] ,Active condition of the interrupt function for GPIO interrupt 29" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 24.--25. " [28] ,Active condition of the interrupt function for GPIO interrupt 28" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 22.--23. " [27] ,Active condition of the interrupt function for GPIO interrupt 27" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 20.--21. " [26] ,Active condition of the interrupt function for GPIO interrupt 26" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " [25] ,Active condition of the interrupt function for GPIO interrupt 25" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 16.--17. " [24] ,Active condition of the interrupt function for GPIO interrupt 24" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 14.--15. " [23] ,Active condition of the interrupt function for GPIO interrupt 23" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 12.--13. " [22] ,Active condition of the interrupt function for GPIO interrupt 22" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 10.--11. " [21] ,Active condition of the interrupt function for GPIO interrupt 21" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 8.--9. " [20] ,Active condition of the interrupt function for GPIO interrupt 20" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " [19] ,Active condition of the interrupt function for GPIO interrupt 19" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 4.--5. " [18] ,Active condition of the interrupt function for GPIO interrupt 18" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 2.--3. " [17] ,Active condition of the interrupt function for GPIO interrupt 17" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 0.--1. " [16] ,Active condition of the interrupt function for GPIO interrupt 16" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
sif cpuis("IMXRT1021")
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " IMR[31] ,Interrupt 31 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " [30] ,Interrupt 30 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " [29] ,Interrupt 29 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " [28] ,Interrupt 28 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " [27] ,Interrupt 27 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " [26] ,Interrupt 26 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Interrupt 25 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " [24] ,Interrupt 24 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " [23] ,Interrupt 23 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 22. " [22] ,Interrupt 22 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " [21] ,Interrupt 21 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " [20] ,Interrupt 20 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Interrupt 19 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " [18] ,Interrupt 18 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " [17] ,Interrupt 17 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 16. " [16] ,Interrupt 16 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " [15] ,Interrupt 15 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " [14] ,Interrupt 14 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Interrupt 13 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " [9] ,Interrupt 9 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " [8] ,Interrupt 8 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Interrupt 7 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " [6] ,Interrupt 6 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " [5] ,Interrupt 5 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " [4] ,Interrupt 4 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " [3] ,Interrupt 3 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " [2] ,Interrupt 2 mask bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Interrupt 1 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " [0] ,Interrupt 0 mask bit" "Masked,Not masked"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " IMR[31] ,Interrupt 31 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " [30] ,Interrupt 30 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " [29] ,Interrupt 29 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " [28] ,Interrupt 28 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " [27] ,Interrupt 27 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " [26] ,Interrupt 26 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " [25] ,Interrupt 25 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " [24] ,Interrupt 24 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " [23] ,Interrupt 23 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " [22] ,Interrupt 22 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " [21] ,Interrupt 21 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " [20] ,Interrupt 20 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " [19] ,Interrupt 19 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " [18] ,Interrupt 18 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " [17] ,Interrupt 17 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " [16] ,Interrupt 16 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " [15] ,Interrupt 15 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " [14] ,Interrupt 14 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " [13] ,Interrupt 13 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " [9] ,Interrupt 9 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " [8] ,Interrupt 8 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " [7] ,Interrupt 7 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " [6] ,Interrupt 6 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " [5] ,Interrupt 5 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " [4] ,Interrupt 4 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " [3] ,Interrupt 3 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " [2] ,Interrupt 2 mask bit" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " [1] ,Interrupt 1 mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " [0] ,Interrupt 0 mask bit" "Not masked,Masked"
|
|
endif
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "ISR,GPIO Interrupt Status Register"
|
|
eventfld.long 0x00 31. " ISR[31] ,Interrupt 31 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " [30] ,Interrupt 30 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 29. " [29] ,Interrupt 29 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 28. " [28] ,Interrupt 28 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 27. " [27] ,Interrupt 27 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 26. " [26] ,Interrupt 26 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 25. " [25] ,Interrupt 25 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " [24] ,Interrupt 24 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 23. " [23] ,Interrupt 23 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 22. " [22] ,Interrupt 22 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 21. " [21] ,Interrupt 21 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " [20] ,Interrupt 20 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " [19] ,Interrupt 19 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " [18] ,Interrupt 18 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " [17] ,Interrupt 17 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " [16] ,Interrupt 16 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 15. " [15] ,Interrupt 15 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " [14] ,Interrupt 14 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 13. " [13] ,Interrupt 13 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " [9] ,Interrupt 9 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " [8] ,Interrupt 8 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " [7] ,Interrupt 7 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " [6] ,Interrupt 6 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " [5] ,Interrupt 5 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " [4] ,Interrupt 4 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 3. " [3] ,Interrupt 3 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " [2] ,Interrupt 2 status bit" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " [1] ,Interrupt 1 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " [0] ,Interrupt 0 status bit" "No interrupt,Interrupt"
|
|
line.long 0x04 "EDGE_SEL,GPIO Edge Select Register"
|
|
bitfld.long 0x04 31. " GPIO_EDGE_SEL[31] ,Edge select bit 31" "ICR31 setting,Any edge"
|
|
bitfld.long 0x04 30. " [30] ,Edge select bit 30" "ICR30 setting,Any edge"
|
|
bitfld.long 0x04 29. " [29] ,Edge select bit 29" "ICR29 setting,Any edge"
|
|
bitfld.long 0x04 28. " [28] ,Edge select bit 28" "ICR28 setting,Any edge"
|
|
bitfld.long 0x04 27. " [27] ,Edge select bit 27" "ICR27 setting,Any edge"
|
|
bitfld.long 0x04 26. " [26] ,Edge select bit 26" "ICR26 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 25. " [25] ,Edge select bit 25" "ICR25 setting,Any edge"
|
|
bitfld.long 0x04 24. " [24] ,Edge select bit 24" "ICR24 setting,Any edge"
|
|
bitfld.long 0x04 23. " [23] ,Edge select bit 23" "ICR23 setting,Any edge"
|
|
bitfld.long 0x04 22. " [22] ,Edge select bit 22" "ICR22 setting,Any edge"
|
|
bitfld.long 0x04 21. " [21] ,Edge select bit 21" "ICR21 setting,Any edge"
|
|
bitfld.long 0x04 20. " [20] ,Edge select bit 20" "ICR20 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [19] ,Edge select bit 19" "ICR19 setting,Any edge"
|
|
bitfld.long 0x04 18. " [18] ,Edge select bit 18" "ICR18 setting,Any edge"
|
|
bitfld.long 0x04 17. " [17] ,Edge select bit 17" "ICR17 setting,Any edge"
|
|
bitfld.long 0x04 16. " [16] ,Edge select bit 16" "ICR16 setting,Any edge"
|
|
bitfld.long 0x04 15. " [15] ,Edge select bit 15" "ICR15 setting,Any edge"
|
|
bitfld.long 0x04 14. " [14] ,Edge select bit 14" "ICR14 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 13. " [13] ,Edge select bit 13" "ICR13 setting,Any edge"
|
|
bitfld.long 0x04 9. " [9] ,Edge select bit 9" "ICR9 setting,Any edge"
|
|
bitfld.long 0x04 8. " [8] ,Edge select bit 8" "ICR8 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 7. " [7] ,Edge select bit 7" "ICR7 setting,Any edge"
|
|
bitfld.long 0x04 6. " [6] ,Edge select bit 6" "ICR6 setting,Any edge"
|
|
bitfld.long 0x04 5. " [5] ,Edge select bit 5" "ICR5 setting,Any edge"
|
|
bitfld.long 0x04 4. " [4] ,Edge select bit 4" "ICR4 setting,Any edge"
|
|
bitfld.long 0x04 3. " [3] ,Edge select bit 3" "ICR3 setting,Any edge"
|
|
bitfld.long 0x04 2. " [2] ,Edge select bit 2" "ICR2 setting,Any edge"
|
|
textline " "
|
|
bitfld.long 0x04 1. " [1] ,Edge select bit 1" "ICR1 setting,Any edge"
|
|
bitfld.long 0x04 0. " [0] ,Edge select bit 0" "ICR0 setting,Any edge"
|
|
sif cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")
|
|
wgroup.long 0x84++0x0B
|
|
line.long 0x00 "DR_SET,GPIO Data Register SET Register"
|
|
line.long 0x04 "DR_CLEAR,GPIO Data Register CLEAR Register"
|
|
line.long 0x08 "DR_TOGGLE,GPIO Data Register TOGGLE Register"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPIO 5"
|
|
base ad:0x400C0000
|
|
width 11.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "DR,GPIO Data Register"
|
|
bitfld.long 0x00 2. " DR[2] ,Data bit 2" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,Data bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,Data bit 0" "Low,High"
|
|
line.long 0x04 "GDIR,GPIO Direction Register"
|
|
bitfld.long 0x04 2. " GDIR[2] ,GPIO direction 2 bit" "Input,Output"
|
|
bitfld.long 0x04 1. " [1] ,GPIO direction 1 bit" "Input,Output"
|
|
bitfld.long 0x04 0. " [0] ,GPIO direction 0 bit" "Input,Output"
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "PSR,GPIO Pad Status Register"
|
|
bitfld.long 0x00 2. " PSR[2] ,GPIO pad status bit 2" "Low,High"
|
|
bitfld.long 0x00 1. " [1] ,GPIO pad status bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " [0] ,GPIO pad status bit 0" "Low,High"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "ICR1,GPIO Interrupt Configuration Register 1"
|
|
bitfld.long 0x00 4.--5. " ICR[2] ,Active condition of the interrupt function for GPIO interrupt 2" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 2.--3. " [1] ,Active condition of the interrupt function for GPIO interrupt 1" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
bitfld.long 0x00 0.--1. " [0] ,Active condition of the interrupt function for GPIO interrupt 0" "Low-level,High-level,Rising-edge,Falling-edge"
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "ICR2,GPIO Interrupt Configuration Register 2"
|
|
group.long 0x14++0x0B
|
|
line.long 0x00 "IMR,GPIO Interrupt Mask Register"
|
|
bitfld.long 0x00 2. " IMR[2] ,Interrupt 2 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " [1] ,Interrupt 1 mask bit" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " [0] ,Interrupt 0 mask bit" "Masked,Not masked"
|
|
line.long 0x04 "ISR,GPIO Interrupt Status Register"
|
|
eventfld.long 0x04 2. " ISR[2] ,Interrupt 2 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 1. " [1] ,Interrupt 1 status bit" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 0. " [0] ,Interrupt 0 status bit" "No interrupt,Interrupt"
|
|
line.long 0x08 "EDGE_SEL,GPIO Edge Select Register"
|
|
bitfld.long 0x08 2. " GPIO_EDGE_SEL[2] ,Edge select bit 2" "ICR2 setting,Any edge"
|
|
bitfld.long 0x08 1. " [1] ,Edge select bit 1" "ICR1 setting,Any edge"
|
|
bitfld.long 0x08 0. " [0] ,Edge select bit 0" "ICR0 setting,Any edge"
|
|
wgroup.long 0x84++0x0B
|
|
line.long 0x00 "DR_SET,GPIO Data Register SET Register"
|
|
line.long 0x04 "DR_CLEAR,GPIO Data Register CLEAR Register"
|
|
line.long 0x08 "DR_TOGGLE,GPIO Data Register TOGGLE Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "GPT (General Purpose Timer)"
|
|
tree "GPT 1"
|
|
base ad:0x401EC000
|
|
width 8.
|
|
if (((per.l(ad:0x401EC000+0x00))&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPT1_CR,GPT Control Register"
|
|
bitfld.long 0x00 31. " FO3 ,Force output compare channel 3" "No effect,Compare"
|
|
bitfld.long 0x00 30. " F02 ,Force output compare channel 2" "No effect,Compare"
|
|
bitfld.long 0x00 29. " FO1 ,Force output compare channel 1" "No effect,Compare"
|
|
bitfld.long 0x00 26.--28. " OM3 ,Output compare channel 3 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
textline " "
|
|
bitfld.long 0x00 23.--25. " OM2 ,Output compare channel 2 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 20.--22. " OM1 ,Output compare channel 1 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 18.--19. " IM2 ,Input capture channel 2 operating mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.long 0x00 16.--17. " IM1 ,Input capture channel 1 operating mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWR ,Software reset" "Not reset,Reset"
|
|
bitfld.long 0x00 10. " EN_24M ,Enable 24MHz clock input from crystal" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FRR ,Free-Run or Restart mode" "Restart,Free-run"
|
|
bitfld.long 0x00 6.--8. " CLKSRC ,Clock source select" "No clock,ipg_clk,ipg_clk_highfreq,External clock,ipg_clk_32k,ipg_clk_24M,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPEN ,GPT stop mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DOZEEN ,GPT doze mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WAITEN ,GPT wait mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DBGEN ,GPT debug mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENMOD ,GPT enable mode" "Retain value,Reset to 0"
|
|
bitfld.long 0x00 0. " EN ,GPT enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPT1_CR,GPT Control Register"
|
|
bitfld.long 0x00 31. " FO3 ,Force output compare channel 3" "No effect,Compare"
|
|
bitfld.long 0x00 30. " F02 ,Force output compare channel 2" "No effect,Compare"
|
|
bitfld.long 0x00 29. " FO1 ,Force output compare channel 1" "No effect,Compare"
|
|
bitfld.long 0x00 26.--28. " OM3 ,Output compare channel 3 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
textline " "
|
|
bitfld.long 0x00 23.--25. " OM2 ,Output compare channel 2 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 20.--22. " OM1 ,Output compare channel 1 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 18.--19. " IM2 ,Input capture channel 2 operating mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.long 0x00 16.--17. " IM1 ,Input capture channel 1 operating mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWR ,Software reset" "Not reset,Reset"
|
|
bitfld.long 0x00 10. " EN_24M ,Enable 24MHz clock input from crystal" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FRR ,Free-Run or Restart Mode" "Restart,Free-run"
|
|
rbitfld.long 0x00 6.--8. " CLKSRC ,Clock source select" "No clock,ipg_clk,ipg_clk_highfreq,External clock,ipg_clk_32k,ipg_clk_24M,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPEN ,GPT stop mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DOZEEN ,GPT doze mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WAITEN ,GPT wait mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DBGEN ,GPT debug mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENMOD ,GPT enable mode" "Retain value,Reset to 0"
|
|
bitfld.long 0x00 0. " EN ,GPT enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "PR,GPT Prescaler Register"
|
|
bitfld.long 0x00 12.--15. " PRESCALER24M ,Prescaler bits" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRESCALER ,Prescaler bits"
|
|
textline " "
|
|
line.long 0x04 "SR,GPT Status Register"
|
|
eventfld.long 0x04 5. " ROV ,Rollover flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 4. " IF2 ,IF2 input capture 2 flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 3. " IF1 ,IF1 input capture 1 flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 2. " OF3 ,OF3 output compare 3 flag" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x04 1. " OF2 ,OF2 output compare 2 flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 0. " OF1 ,OF1 output compare 1 flag" "Not occurred,Occurred"
|
|
line.long 0x08 "IR,GPT Interrupt Register"
|
|
bitfld.long 0x08 5. " ROVIE ,Rollover interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " IF2IE ,IF2IE input capture 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " IF1IE ,IF1IE input capture 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " OF3IE ,OF3IE output compare 3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " OF2IE ,OF2IE output compare 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " OF1IE ,OF1IE output compare 1 interrupt enable" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "OCR1,GPT Output Compare Register 1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "OCR2,GPT Output Compare Register 2"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "OCR3,GPT Output Compare Register 3"
|
|
rgroup.long 0x1C++0x0B
|
|
line.long 0x00 "ICR1,GPT Input Capture Register 1"
|
|
line.long 0x04 "ICR2,GPT Input Capture Register 2"
|
|
line.long 0x08 "CNT,GPT Counter Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "GPT 2"
|
|
base ad:0x401F0000
|
|
width 8.
|
|
if (((per.l(ad:0x401F0000+0x00))&0x01)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPT2_CR,GPT Control Register"
|
|
bitfld.long 0x00 31. " FO3 ,Force output compare channel 3" "No effect,Compare"
|
|
bitfld.long 0x00 30. " F02 ,Force output compare channel 2" "No effect,Compare"
|
|
bitfld.long 0x00 29. " FO1 ,Force output compare channel 1" "No effect,Compare"
|
|
bitfld.long 0x00 26.--28. " OM3 ,Output compare channel 3 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
textline " "
|
|
bitfld.long 0x00 23.--25. " OM2 ,Output compare channel 2 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 20.--22. " OM1 ,Output compare channel 1 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 18.--19. " IM2 ,Input capture channel 2 operating mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.long 0x00 16.--17. " IM1 ,Input capture channel 1 operating mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWR ,Software reset" "Not reset,Reset"
|
|
bitfld.long 0x00 10. " EN_24M ,Enable 24MHz clock input from crystal" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FRR ,Free-Run or Restart mode" "Restart,Free-run"
|
|
bitfld.long 0x00 6.--8. " CLKSRC ,Clock source select" "No clock,ipg_clk,ipg_clk_highfreq,External clock,ipg_clk_32k,ipg_clk_24M,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPEN ,GPT stop mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DOZEEN ,GPT doze mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WAITEN ,GPT wait mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DBGEN ,GPT debug mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENMOD ,GPT enable mode" "Retain value,Reset to 0"
|
|
bitfld.long 0x00 0. " EN ,GPT enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPT2_CR,GPT Control Register"
|
|
bitfld.long 0x00 31. " FO3 ,Force output compare channel 3" "No effect,Compare"
|
|
bitfld.long 0x00 30. " F02 ,Force output compare channel 2" "No effect,Compare"
|
|
bitfld.long 0x00 29. " FO1 ,Force output compare channel 1" "No effect,Compare"
|
|
bitfld.long 0x00 26.--28. " OM3 ,Output compare channel 3 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
textline " "
|
|
bitfld.long 0x00 23.--25. " OM2 ,Output compare channel 2 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 20.--22. " OM1 ,Output compare channel 1 operating mode" "Disconnected,Toggle,Clear,Set,Pulse,Pulse,Pulse,Pulse"
|
|
bitfld.long 0x00 18.--19. " IM2 ,Input capture channel 2 operating mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.long 0x00 16.--17. " IM1 ,Input capture channel 1 operating mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWR ,Software reset" "Not reset,Reset"
|
|
bitfld.long 0x00 10. " EN_24M ,Enable 24MHz clock input from crystal" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FRR ,Free-Run or Restart Mode" "Restart,Free-run"
|
|
rbitfld.long 0x00 6.--8. " CLKSRC ,Clock source select" "No clock,ipg_clk,ipg_clk_highfreq,External clock,ipg_clk_32k,ipg_clk_24M,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5. " STOPEN ,GPT stop mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DOZEEN ,GPT doze mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WAITEN ,GPT wait mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DBGEN ,GPT debug mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENMOD ,GPT enable mode" "Retain value,Reset to 0"
|
|
bitfld.long 0x00 0. " EN ,GPT enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "PR,GPT Prescaler Register"
|
|
bitfld.long 0x00 12.--15. " PRESCALER24M ,Prescaler bits" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRESCALER ,Prescaler bits"
|
|
textline " "
|
|
line.long 0x04 "SR,GPT Status Register"
|
|
eventfld.long 0x04 5. " ROV ,Rollover flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 4. " IF2 ,IF2 input capture 2 flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 3. " IF1 ,IF1 input capture 1 flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 2. " OF3 ,OF3 output compare 3 flag" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x04 1. " OF2 ,OF2 output compare 2 flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 0. " OF1 ,OF1 output compare 1 flag" "Not occurred,Occurred"
|
|
line.long 0x08 "IR,GPT Interrupt Register"
|
|
bitfld.long 0x08 5. " ROVIE ,Rollover interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " IF2IE ,IF2IE input capture 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " IF1IE ,IF1IE input capture 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " OF3IE ,OF3IE output compare 3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " OF2IE ,OF2IE output compare 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " OF1IE ,OF1IE output compare 1 interrupt enable" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "OCR1,GPT Output Compare Register 1"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "OCR2,GPT Output Compare Register 2"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "OCR3,GPT Output Compare Register 3"
|
|
rgroup.long 0x1C++0x0B
|
|
line.long 0x00 "ICR1,GPT Input Capture Register 1"
|
|
line.long 0x04 "ICR2,GPT Input Capture Register 2"
|
|
line.long 0x08 "CNT,GPT Counter Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "IOMUXC (IOMUX Controller)"
|
|
tree "IOMUXC_GPR (IOMUXC GPR Memory Map/Register Definition)"
|
|
base ad:0x400AC000
|
|
width 7.
|
|
group.long 0x00++0x67
|
|
line.long 0x00 "GPR0,GPR0 General Purpose Register"
|
|
line.long 0x04 "GPR1,GPR1 General Purpose Register"
|
|
line.long 0x08 "GPR2,GPR2 General Purpose Register"
|
|
line.long 0x0C "GPR3,GPR3 General Purpose Register"
|
|
hexmask.long.word 0x0C 16.--31. 1. " FIELD_1 ,General purpose bits"
|
|
hexmask.long.word 0x0C 0.--15. 1. " FIELD_0 ,General purpose bits"
|
|
line.long 0x10 "GPR4,GPR4 General Purpose Register"
|
|
hexmask.long.word 0x10 16.--31. 1. " FIELD_1 ,General purpose bits"
|
|
hexmask.long.word 0x10 0.--15. 1. " FIELD_0 ,General purpose bits"
|
|
line.long 0x14 "GPR5,GPR5 General Purpose Register"
|
|
line.long 0x18 "GPR6,GPR6 General Purpose Register"
|
|
line.long 0x1C "GPR7,GPR7 General Purpose Register"
|
|
hexmask.long.word 0x1C 16.--31. 1. " FIELD_1 ,General purpose bits"
|
|
hexmask.long.word 0x1C 0.--15. 1. " FIELD_0 ,General purpose bits"
|
|
line.long 0x20 "GPR8,GPR8 General Purpose Register"
|
|
line.long 0x24 "GPR9,GPR9 General Purpose Register"
|
|
line.long 0x28 "GPR10,GPR10 General Purpose Register"
|
|
line.long 0x2C "GPR11,GPR11 General Purpose Register"
|
|
line.long 0x30 "GPR12,GPR12 General Purpose Register"
|
|
line.long 0x34 "GPR13,GPR13 General Purpose Register"
|
|
hexmask.long.word 0x34 16.--31. 1. " FIELD_1 ,General purpose bits"
|
|
hexmask.long.word 0x34 0.--15. 1. " FIELD_0 ,General purpose bits"
|
|
line.long 0x38 "GPR14,GPR14 General Purpose Register"
|
|
line.long 0x3C "GPR15,GPR15 General Purpose Register"
|
|
line.long 0x40 "GPR16,GPR16 General Purpose Register"
|
|
line.long 0x44 "GPR17,GPR17 General Purpose Register"
|
|
line.long 0x48 "GPR18,GPR18 General Purpose Register"
|
|
line.long 0x4C "GPR19,GPR19 General Purpose Register"
|
|
line.long 0x50 "GPR20,GPR20 General Purpose Register"
|
|
line.long 0x54 "GPR21,GPR21 General Purpose Register"
|
|
line.long 0x58 "GPR22,GPR22 General Purpose Register"
|
|
line.long 0x5C "GPR23,GPR23 General Purpose Register"
|
|
line.long 0x60 "GPR24,GPR24 General Purpose Register"
|
|
line.long 0x64 "GPR25,GPR25 General Purpose Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "IOMUXC_SNVS (IOMUXC SNVS Memory Map/Register Definition)"
|
|
base ad:0x400A8000
|
|
width 30.
|
|
group.long 0x00++0x23
|
|
line.long 0x00 "SW_MUX_CTL_PAD_WAKEUP,SW MUX CTL PAD WAKEUP SW MUX Control Register"
|
|
bitfld.long 0x00 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " MUX_MODE ,MUX mode select field." ",,,,,GPIO5_IO00,,NMI_GLUE_NMI"
|
|
line.long 0x04 "SW_MUX_CTL_PAD_PMIC_ON_REQ,SW MUX CTL PAD PMIC ON REQ SW MUX Control Register"
|
|
bitfld.long 0x04 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--2. " MUX_MODE ,MUX mode select field." "SNVS_LP_PMIC_ON_REQ,,,,,GPIO5_IO01,?..."
|
|
line.long 0x08 "SW_MUX_CTL_PAD_PMIC_STBY_REQ,SW MUX CTL PAD PMIC STBY REQ SW MUX Control Register"
|
|
bitfld.long 0x08 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--2. " MUX_MODE ,MUX mode select field." "CCM_PMIC_VSTBY_REQ,,,,,GPIO5_IO02,?..."
|
|
line.long 0x0C "SW_PAD_CTL_PAD_TEST_MODE,SW PAD CTL PAD TEST MODE SW PAD Control Register"
|
|
bitfld.long 0x0C 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14.--15. " PUS ,Pull up/down config" "100KOhm PullDown,47KOhm PullUp,100KOhm PullUp,22KOhm PullUp"
|
|
bitfld.long 0x0C 13. " PUE ,Pull/Keep select" "Keeper,Pull"
|
|
textline " "
|
|
bitfld.long 0x0C 12. " PKE ,Pull/Keep enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
rbitfld.long 0x0C 6.--7. " SPEED ,Speed" ",,100MHz,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x0C 0. " SRE ,Slew rate" "Slow,Fast"
|
|
line.long 0x10 "SW_PAD_CTL_PAD_POR_B,SW_PAD_CTL_PAD_POR_B SW PAD Control Register"
|
|
bitfld.long 0x10 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 14.--15. " PUS ,Pull up/down config" "100KOhm PullDown,47KOhm PullUp,100KOhm PullUp,22KOhm PullUp"
|
|
bitfld.long 0x10 13. " PUE ,Pull/Keep select" "Keeper,Pull"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PKE ,Pull/Keep enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
rbitfld.long 0x10 6.--7. " SPEED ,Speed Field" ",,100MHz,?..."
|
|
textline " "
|
|
bitfld.long 0x10 3.--5. " DSE ,Drive strength field" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x10 0. " SRE ,Slew rate field" "Slow,Fast"
|
|
line.long 0x14 "SW_PAD_CTL_PAD_ONOFF,SW PAD CTL PAD ONOFF SW PAD Control Register"
|
|
bitfld.long 0x14 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 14.--15. " PUS ,Pull up/down config" "100KOhm PullDown,47KOhm PullUp,100KOhm PullUp,22KOhm PullUp"
|
|
bitfld.long 0x14 13. " PUE ,Pull/Keep select" "Keeper,Pull"
|
|
textline " "
|
|
bitfld.long 0x14 12. " PKE ,Pull/Keep enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
rbitfld.long 0x14 6.--7. " SPEED ,Speed Field" ",,100MHz,?..."
|
|
textline " "
|
|
bitfld.long 0x14 3.--5. " DSE ,Drive strength field" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x14 0. " SRE ,Slew rate field" "Slow,Fast"
|
|
line.long 0x18 "SW_PAD_CTL_PAD_WAKEUP,SW PAD CTL PAD_WAKEUP SW PAD Control Register"
|
|
bitfld.long 0x18 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 14.--15. " PUS ,Pull up/down config" "100KOhm PullDown,47KOhm PullUp,100KOhm PullUp,22KOhm PullUp"
|
|
bitfld.long 0x18 13. " PUE ,Pull/Keep select" "Keeper,Pull"
|
|
textline " "
|
|
bitfld.long 0x18 12. " PKE ,Pull/Keep enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
rbitfld.long 0x18 6.--7. " SPEED ,Speed Field" ",,100MHz,?..."
|
|
textline " "
|
|
bitfld.long 0x18 3.--5. " DSE ,Drive strength field" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x18 0. " SRE ,Slew rate field" "Slow,Fast"
|
|
line.long 0x1C "SW_PAD_CTL_PAD_PMIC_ON_REQ,SW PAD CTL PAD PMIC ON REQ SW PAD Control Register"
|
|
bitfld.long 0x1C 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 14.--15. " PUS ,Pull up/down config" "100KOhm PullDown,47KOhm PullUp,100KOhm PullUp,22KOhm PullUp"
|
|
bitfld.long 0x1C 13. " PUE ,Pull/Keep select" "Keeper,Pull"
|
|
textline " "
|
|
bitfld.long 0x1C 12. " PKE ,Pull/Keep enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
rbitfld.long 0x1C 6.--7. " SPEED ,Speed Field" ",,100MHz,?..."
|
|
textline " "
|
|
bitfld.long 0x1C 3.--5. " DSE ,Drive strength field" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x1C 0. " SRE ,Slew rate field" "Slow,Fast"
|
|
line.long 0x20 "SW_PAD_CTL_PAD_PMIC_STBY_REQ,SW PAD CTL PAD PMIC STBY REQ SW PAD Control Register"
|
|
bitfld.long 0x20 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 14.--15. " PUS ,Pull up/down config" "100KOhm PullDown,47KOhm PullUp,100KOhm PullUp,22KOhm PullUp"
|
|
bitfld.long 0x20 13. " PUE ,Pull/Keep select" "Keeper,Pull"
|
|
textline " "
|
|
bitfld.long 0x20 12. " PKE ,Pull/Keep enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
rbitfld.long 0x20 6.--7. " SPEED ,Speed Field" ",,100MHz,?..."
|
|
textline " "
|
|
bitfld.long 0x20 3.--5. " DSE ,Drive strength field" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x20 0. " SRE ,Slew rate field" "Slow,Fast"
|
|
width 0x0B
|
|
tree.end
|
|
tree "IOMUXC_SNVS_GPR (IOMUXC SNVS GPR Memory Map/Register Definition)"
|
|
base ad:0x400A4000
|
|
width 6.
|
|
group.long 0xC++0x3
|
|
line.long 0x00 "GPR3,GPR3 General Purpose Register"
|
|
rbitfld.long 0x00 19. " DCDC_STS_DC_OK ,DCDC status OK" "Not ok,Ok"
|
|
rbitfld.long 0x00 18. " DCDC_OVER_VOL ,DCDC over voltage alert" "Not alerted,Alerted"
|
|
rbitfld.long 0x00 17. " DCDC_OVER_CUR ,DCDC over current alert" "Not alerted,Alerted"
|
|
sif (cpu()=="IMXRT1021")
|
|
rbitfld.long 0x00 16. " DCDC_IN_LOW_VOL ,DCDC_IN low voltage detect" "Not detected,Detected"
|
|
else
|
|
rbitfld.long 0x00 16. " DCDC_LOW_BAT ,DCDC low battery detect" "Not detected,Detected"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " POR_PULL_TYPE ,POR_B pad control" "0,1,2,3"
|
|
bitfld.long 0x00 1. " DCDC_STATUS_CAPT_CLR ,DCDC captured status clear" "Not cleared,Cleared"
|
|
bitfld.long 0x00 0. " LPSR_MODE_ENABLE ,Enable LPSR mode." "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "IOMUXC (IOMUXC SNVS GPR Memory Map/Register Definition)"
|
|
base ad:0x401F8000
|
|
width 35.
|
|
group.long 0x14++0x173
|
|
line.long 0x00 "SW_MUX_CTL_PAD_GPIO_EMC_00,SW MUX Control Register"
|
|
bitfld.long 0x00 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA00,QTIMER_TIMER0,LPUART4_CTS_B,SPDIF_SR_CLK,LPSPI2_SCK,GPIO2_IO00,FLEXCAN1_TX,PIT_TRIGGER02"
|
|
line.long 0x04 "SW_MUX_CTL_PAD_GPIO_EMC_01,SW MUX Control Register"
|
|
bitfld.long 0x04 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA01,QTIMER2_TIMER1,LPUART4_RTS_B,SPDIF_OUT,LPSPI2_PCS0,GPIO2_IO01,FLEXCAN1_RX,PIT_TRIGGER03"
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line.long 0x08 "SW_MUX_CTL_PAD_GPIO_EMC_02,SW MUX Control Register"
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bitfld.long 0x08 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x08 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA02,QTIMER2_TIMER2,LPUART4_TX,SPDIF_LOCK,LPSPI2_SDO,GPIO2_IO02,LPI2C1_SCL,JTAG_DONE"
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line.long 0x0C "SW_MUX_CTL_PAD_GPIO_EMC_03,SW MUX Control Register"
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bitfld.long 0x0C 4. " SION ,Software input on" "Disabled,Enabled"
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|
bitfld.long 0x0C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA03,QTIMER2_TIMER3,LPUART4_RX,SPDIF_EXT_CLK,LPSPI2_SDI,GPIO2_IO03,LPI2C1_SDA,JTAG_FAIL"
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line.long 0x10 "SW_MUX_CTL_PAD_GPIO_EMC_04,SW MUX Control Register"
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bitfld.long 0x10 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x10 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA04,XBAR1_INOUT04,SPDIF_OUT,SAI2_TX_BCLK,FLEXIO1_FLEXIO16,GPIO2_IO04,,JTAG_JTAG_ACT"
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|
line.long 0x14 "SW_MUX_CTL_PAD_GPIO_EMC_05,SW MUX Control Register"
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|
bitfld.long 0x14 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x14 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA05,XBAR1_INOUT05,SPDIF_IN,SAI2_TX_SYNC,FLEXIO1_FLEXIO17,,GPIO2_IO05,JTAG_DE_B"
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line.long 0x18 "SW_MUX_CTL_PAD_GPIO_EMC_06,SW MUX Control Register"
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bitfld.long 0x18 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x18 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA06,XBAR1_INOUT06,LPUART3_TX,SAI2_TX_DATA,FLEXIO1_FLEXIO18,GPIO2_IO06,?..."
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line.long 0x1C "SW_MUX_CTL_PAD_GPIO_EMC_07,SW MUX Control Register"
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bitfld.long 0x1C 4. " SION ,Software input on" "Disabled,Enabled"
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|
bitfld.long 0x1C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA07,XBAR1_INOUT07,LPUART3_RX,SAI2_RX_SYNC,FLEXIO1_FLEXIO19,GPIO2_IO07,?..."
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line.long 0x20 "SW_MUX_CTL_PAD_GPIO_EMC_08,SW MUX Control Register"
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bitfld.long 0x20 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x20 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DM00,XBAR1_INOUT08,FLEXCAN2_TX,SAI2_RX_DATA,FLEXIO1_FLEXIO20,GPIO2_IO08,?..."
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line.long 0x24 "SW_MUX_CTL_PAD_GPIO_EMC_09,SW MUX Control Register"
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bitfld.long 0x24 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x24 0.--2. " MUX_MODE ,MUX mode select" "SEMC_WE,XBAR1_INOUT09,FLEXCAN2_RX,SAI2_RX_BCLK,FLEXIO1_FLEXIO21,GPIO2_IO09,?..."
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line.long 0x28 "SW_MUX_CTL_PAD_GPIO_EMC_10,SW MUX Control Register"
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bitfld.long 0x28 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x28 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CAS,XBAR1_INOUT10,LPI2C4_SDA,SAI1_TX_SYNC,LPSPI2_SCK,GPIO2_IO10,FLEXPWM2_PWMX00,?..."
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line.long 0x2C "SW_MUX_CTL_PAD_GPIO_EMC_11,SW MUX Control Register"
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bitfld.long 0x2C 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x2C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_RAS,XBAR1_INOUT11,LPI2C4_SCL,SAI1_TX_BCLK,LPSPI2_PCS0,GPIO2_IO11,FLEXPWM2_PWMX01,?..."
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line.long 0x30 "SW_MUX_CTL_PAD_GPIO_EMC_12,SW MUX Control Register"
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bitfld.long 0x30 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x30 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CS0,XBAR1_INOUT12,LPUART6_TX,SAI1_TX_DATA00,LPSPI2_SDO,GPIO2_IO12,FLEXPWM2_PWMX02,?..."
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line.long 0x34 "SW_MUX_CTL_PAD_GPIO_EMC_13,SW MUX Control Register"
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bitfld.long 0x34 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x34 0.--2. " MUX_MODE ,MUX mode select" "SEMC_BA0,XBAR1_INOUT13,LPUART6_RX,SAI1_RX_DATA00,LPSPI2_SDI,GPIO2_IO13,FLEXPWM2_PWMX03,CCM_PMIC_RDY"
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line.long 0x38 "SW_MUX_CTL_PAD_GPIO_EMC_14,SW MUX Control Register"
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bitfld.long 0x38 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x38 0.--2. " MUX_MODE ,MUX mode select" "SEMC_BA1,XBAR1_INOUT14,LPUART6_CTS_B,SAI1_RX_BCLK,LPSPI2_PCS1,GPIO2_IO14,FLEXCAN1_TX,?..."
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line.long 0x3C "SW_MUX_CTL_PAD_GPIO_EMC_15,SW MUX Control Register"
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bitfld.long 0x3C 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x3C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR10,XBAR1_INOUT15,LPUART6_RTS_B,SAI1_RX_SYNC,WDOG1_WDOG_B,GPIO2_IO15,FLEXCAN1_RX,?..."
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line.long 0x40 "SW_MUX_CTL_PAD_GPIO_EMC_16,SW MUX Control Register"
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bitfld.long 0x40 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x40 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR00,,MQS_RIGHT,SAI2_MCLK,,GPIO2_IO16,SRC_BOOT_MODE00,?..."
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line.long 0x44 "SW_MUX_CTL_PAD_GPIO_EMC_17,SW MUX Control Register"
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bitfld.long 0x44 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x44 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR01,,MQS_LEFT,SAI3_MCLK,,GPIO2_IO17,SRC_BOOT_MODE01,?..."
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line.long 0x48 "SW_MUX_CTL_PAD_GPIO_EMC_18,SW MUX Control Register"
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bitfld.long 0x48 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x48 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR02,XBAR1_INOUT16,LPI2C2_SDA,SAI1_RX_SYNC,FLEXIO1_FLEXIO22,GPIO2_IO18,SRC_BT_CFG00,?..."
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line.long 0x4C "SW_MUX_CTL_PAD_GPIO_EMC_19,SW MUX Control Register"
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bitfld.long 0x4C 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x4C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR03,XBAR1_INOUT17,LPI2C2_SCL,SAI1_RX_BCLK,FLEXIO1_FLEXIO23,GPIO2_IO19,SRC_BT_CFG01,?..."
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line.long 0x50 "SW_MUX_CTL_PAD_GPIO_EMC_20,SW MUX Control Register"
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bitfld.long 0x50 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x50 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR04,FLEXPWM1_PWMA03,LPUART2_CTS_B,SAI1_MCLK,FLEXIO1_FLEXIO24,GPIO2_IO20,SRC_BT_CFG02,?..."
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line.long 0x54 "SW_MUX_CTL_PAD_GPIO_EMC_21,SW MUX Control Register"
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bitfld.long 0x54 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x54 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR05,FLEXPWM1_PWMB03,LPUART2_RTS_B,SAI1_RX_DATA00,FLEXIO1_FLEXIO25,GPIO2_IO21,SRC_BT_CFG03,?..."
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line.long 0x58 "SW_MUX_CTL_PAD_GPIO_EMC_22,SW MUX Control Register"
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bitfld.long 0x58 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x58 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR06,FLEXPWM1_PWMA02,LPUART2_TX,SAI1_TX_DATA03,FLEXIO1_FLEXIO26,GPIO2_IO22,SRC_BT_CFG04,?..."
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line.long 0x5C "SW_MUX_CTL_PAD_GPIO_EMC_23,SW MUX Control Register"
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bitfld.long 0x5C 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x5C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR07,FLEXPWM1_PWMB02,LPUART2_RX,SAI1_TX_DATA02,FLEXIO1_FLEXIO27,GPIO2_IO23,SRC_BT_CFG05,?..."
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line.long 0x60 "SW_MUX_CTL_PAD_GPIO_EMC_24,SW MUX Control Register"
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bitfld.long 0x60 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x60 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR08,FLEXPWM1_PWMA01,LPUART8_CTS_B,SAI1_TX_DATA01,FLEXIO1_FLEXIO28,GPIO2_IO24,SRC_BT_CFG06,?..."
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line.long 0x64 "SW_MUX_CTL_PAD_GPIO_EMC_25,SW MUX Control Register"
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bitfld.long 0x64 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x64 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR09,FLEXPWM1_PWMB01,LPUART8_RTS_B,SAI1_TX_DATA00,FLEXIO1_FLEXIO29,GPIO2_IO25,SRC_BT_CFG07,?..."
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line.long 0x68 "SW_MUX_CTL_PAD_GPIO_EMC_26,SW MUX Control Register"
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bitfld.long 0x68 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x68 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR11,FLEXPWM1_PWMA00,LPUART8_TX,SAI1_TX_BCLK,FLEXIO1_FLEXIO30,GPIO2_IO26,SRC_BT_CFG08,?..."
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line.long 0x6C "SW_MUX_CTL_PAD_GPIO_EMC_27,SW MUX Control Register"
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bitfld.long 0x6C 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x6C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_ADDR12,FLEXPWM1_PWMB00,LPUART8_RX,SAI1_TX_SYNC,FLEXIO1_FLEXIO31,GPIO2_IO27,SRC_BT_CFG09,?..."
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line.long 0x70 "SW_MUX_CTL_PAD_GPIO_EMC_28,SW MUX Control Register"
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bitfld.long 0x70 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x70 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DQS,FLEXPWM2_PWMA03,XBAR1_INOUT18,SAI3_MCLK,EWM_OUT_B,GPIO2_IO28,GPT2_CAPTURE2,FLEXPWM1_PWMX00"
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line.long 0x74 "SW_MUX_CTL_PAD_GPIO_EMC_29,SW MUX Control Register"
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bitfld.long 0x74 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x74 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CKE,FLEXPWM2_PWMB03,XBAR1_INOUT19,SAI3_RX_BCLK,WDOG2_WDOG_RST_B_DEB,GPIO2_IO29,GPT2_COMPARE2,FLEXPWM1_PWMX01"
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line.long 0x78 "SW_MUX_CTL_PAD_GPIO_EMC_30,SW MUX Control Register"
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bitfld.long 0x78 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x78 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CLK,FLEXPWM2_PWMA02,LPUART4_CTS_B,SAI3_RX_SYNC,WDOG1_WDOG_RST_B_DEB,GPIO2_IO30,GPT2_COMPARE3,FLEXPWM1_PWMX02"
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line.long 0x7C "SW_MUX_CTL_PAD_GPIO_EMC_31,SW MUX Control Register"
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bitfld.long 0x7C 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x7C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DM01,FLEXPWM2_PWMB02,LPUART4_RTS_B,SAI3_RX_DATA,WDOG2_WDOG_B,GPIO2_IO31,GPT2_CLK,FLEXPWM1_PWMX03"
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line.long 0x80 "SW_MUX_CTL_PAD_GPIO_EMC_32,SW MUX Control Register"
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bitfld.long 0x80 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x80 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA08,QTIMER1_TIMER0,LPUART4_TX,SAI3_TX_DATA,LPSPI4_SCK,GPIO3_IO00,?..."
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line.long 0x84 "SW_MUX_CTL_PAD_GPIO_EMC_33,SW MUX Control Register"
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bitfld.long 0x84 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x84 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA09,QTIMER1_TIMER1,LPUART4_RX,SAI3_TX_BCLK,LPSPI4_PCS0,GPIO3_IO01,,SRC_TESTER_ACK"
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line.long 0x88 "SW_MUX_CTL_PAD_GPIO_EMC_34,SW MUX Control Register"
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bitfld.long 0x88 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x88 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA10,QTIMER1_TIMER2,LPUART7_TX,SAI3_TX_SYNC,LPSPI4_SDO,GPIO3_IO02,ENET_CRS,?..."
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line.long 0x8C "SW_MUX_CTL_PAD_GPIO_EMC_35,SW MUX Control Register"
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bitfld.long 0x8C 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x8C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA11,QTIMER1_TIMER3,LPUART7_RX,USDHC2_WP,LPSPI4_SDI,GPIO3_IO03,ENET_COL,?..."
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line.long 0x90 "SW_MUX_CTL_PAD_GPIO_EMC_36,SW MUX Control Register"
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bitfld.long 0x90 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x90 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA12,FLEXPWM2_PWMA01,LPUART5_CTS_B,CCM_PMIC_RDY,LPSPI4_PCS1,GPIO3_IO04,ENET_RX_CLK,USDHC1_WP"
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line.long 0x94 "SW_MUX_CTL_PAD_GPIO_EMC_37,SW MUX Control Register"
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bitfld.long 0x94 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x94 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA13,FLEXPWM2_PWMB01,LPUART5_RTS_B,MQS_RIGHT,LPSPI4_PCS2,GPIO3_IO05,ENET_RDATA03,USDHC1_VSELECT"
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line.long 0x98 "SW_MUX_CTL_PAD_GPIO_EMC_38,SW MUX Control Register"
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bitfld.long 0x98 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x98 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA14,FLEXPWM2_PWMA00,LPUART5_TX,MQS_LEFT,LPSPI4_PCS3,GPIO3_IO06,ENET_RDATA02,USDHC1_CD_B"
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line.long 0x9C "SW_MUX_CTL_PAD_GPIO_EMC_39,SW MUX Control Register"
|
|
bitfld.long 0x9C 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0x9C 0.--2. " MUX_MODE ,MUX mode select" "SEMC_DATA15,FLEXPWM2_PWMB00,LPUART5_RX,USB_OTG1_OC,WDOG1_WDOG_B,GPIO3_IO07,ENET_TX_ER,GPT1_CLK"
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|
line.long 0xA0 "SW_MUX_CTL_PAD_GPIO_EMC_40,SW MUX Control Register"
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bitfld.long 0xA0 4. " SION ,Software input on" "Disabled,Enabled"
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|
bitfld.long 0xA0 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CSX00,XBAR1_INOUT18,SPDIF_OUT,ANATOP_OTG1_ID,ENET_MDIO,GPIO3_IO08,ENET_TDATA03,GPT1_COMPARE3"
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line.long 0xA4 "SW_MUX_CTL_PAD_GPIO_EMC_41,SW MUX Control Register"
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bitfld.long 0xA4 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0xA4 0.--2. " MUX_MODE ,MUX mode select" "SEMC_READY,XBAR1_INOUT19,SPDIF_IN,USB_OTG1_PWR,ENET_MDC,GPIO3_IO09,ENET_TDATA02,GPT1_COMPARE2"
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|
line.long 0xA8 "SW_MUX_CTL_PAD_GPIO_AD_B0_00,SW MUX Control Register"
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bitfld.long 0xA8 4. " SION ,Software input on" "Disabled,Enabled"
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bitfld.long 0xA8 0.--2. " MUX_MODE ,MUX mode select" "JTAG_MUX_TMS,,,,,GPIO1_IO00,ANATOP_USBPHY1_TSTI_TX_EN,GPT1_COMPARE1"
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|
line.long 0xAC "SW_MUX_CTL_PAD_GPIO_AD_B0_01,SW MUX Control Register"
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|
bitfld.long 0xAC 4. " SION ,Software input on" "Disabled,Enabled"
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|
bitfld.long 0xAC 0.--2. " MUX_MODE ,MUX mode select" "JTAG_MUX_TCK,,,,,GPIO1_IO01,,GPT1_CAPTURE2"
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|
line.long 0xB0 "SW_MUX_CTL_PAD_GPIO_AD_B0_02,SW MUX Control Register"
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bitfld.long 0xB0 4. " SION ,Software input on" "Disabled,Enabled"
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|
bitfld.long 0xB0 0.--2. " MUX_MODE ,MUX mode select" "JTAG_MUX_MOD,,,,,GPIO1_IO02,,GPT1_CAPTURE1"
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|
line.long 0xB4 "SW_MUX_CTL_PAD_GPIO_AD_B0_03,SW MUX Control Register"
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bitfld.long 0xB4 4. " SION ,Software input on" "Disabled,Enabled"
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|
bitfld.long 0xB4 0.--2. " MUX_MODE ,MUX mode select" "JTAG_MUX_TDI,USDHC2_CD_B,WDOG1_WDOG_B,SAI1_MCLK,USDHC1_WP,GPIO1_IO03,USB_OTG1_OC,CCM_PMIC_RDY"
|
|
line.long 0xB8 "SW_MUX_CTL_PAD_GPIO_AD_B0_04,SW MUX Control Register"
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bitfld.long 0xB8 4. " SION ,Software input on" "Disabled,Enabled"
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|
bitfld.long 0xB8 0.--2. " MUX_MODE ,MUX mode select" "JTAG_MUX_TDO,FLEXCAN1_TX,USDHC1_WP,QTIMER2_TIMER0,ENET_MDIO,GPIO1_IO04,USB_OTG1_PWR,EWM_OUT_B"
|
|
line.long 0xBC "SW_MUX_CTL_PAD_GPIO_AD_B0_05,SW MUX Control Register"
|
|
bitfld.long 0xBC 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xBC 0.--2. " MUX_MODE ,MUX mode select" "JTAG_MUX_TRSTB,FLEXCAN1_RX,USDHC1_CD_B,QTIMER2_TIMER1,ENET_MDC,GPIO1_IO05,ANATOP_OTG1_ID,NMI_GLUE_NMI"
|
|
line.long 0xC0 "SW_MUX_CTL_PAD_GPIO_AD_B0_06,SW MUX Control Register"
|
|
bitfld.long 0xC0 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xC0 0.--2. " MUX_MODE ,MUX mode select" "PIT_TRIGGER00,MQS_RIGHT,LPUART1_TX,QTIMER2_TIMER2,FLEXPWM2_PWMA03,GPIO1_IO06,?..."
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|
line.long 0xC4 "SW_MUX_CTL_PAD_GPIO_AD_B0_07,SW MUX Control Register"
|
|
bitfld.long 0xC4 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xC4 0.--2. " MUX_MODE ,MUX mode select" "PIT_TRIGGER01,MQS_LEFT,LPUART1_RX,QTIMER2_TIMER3,,GPIO1_IO07,?..."
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|
line.long 0xC8 "SW_MUX_CTL_PAD_GPIO_AD_B0_08,SW MUX Control Register"
|
|
bitfld.long 0xC8 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xC8 0.--2. " MUX_MODE ,MUX mode select" "ENET_TX_CLK,LPI2C3_SCL,LPUART1_CTS_B,KPP_COL00,ENET_REF_CLK1,GPIO1_IO08,?..."
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|
line.long 0xCC "SW_MUX_CTL_PAD_GPIO_AD_B0_09,SW MUX Control Register"
|
|
bitfld.long 0xCC 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xCC 0.--2. " MUX_MODE ,MUX mode select" "ENET_RDATA01,LPI2C3_SDA,LPUART1_RTS_B,KPP_ROW00,CSU_CSU_INT_DEB,GPIO1_IO09,?..."
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|
line.long 0xD0 "SW_MUX_CTL_PAD_GPIO_AD_B0_10,SW MUX Control Register"
|
|
bitfld.long 0xD0 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xD0 0.--2. " MUX_MODE ,MUX mode select" "ENET_RDATA00,LPSPI1_SCK,LPUART5_TX,KPP_COL01,,GPIO1_IO10,?..."
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|
line.long 0xD4 "SW_MUX_CTL_PAD_GPIO_AD_B0_11,SW MUX Control Register"
|
|
bitfld.long 0xD4 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xD4 0.--2. " MUX_MODE ,MUX mode select" "ENET_RX_EN,LPSPI1_PCS0,LPUART5_RX,KPP_ROW01,FLEXPWM2_PWMB02,GPIO1_IO11,?..."
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line.long 0xD8 "SW_MUX_CTL_PAD_GPIO_AD_B0_12,SW MUX Control Register"
|
|
bitfld.long 0xD8 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xD8 0.--2. " MUX_MODE ,MUX mode select" "ENET_RX_ER,LPSPI1_SDO,LPUART3_CTS_B,KPP_COL02,FLEXPWM2_PWMA01,GPIO1_IO12,,SNVS_HP_VIO_5_CTL"
|
|
line.long 0xDC "SW_MUX_CTL_PAD_GPIO_AD_B0_13,SW MUX Control Register"
|
|
bitfld.long 0xDC 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xDC 0.--2. " MUX_MODE ,MUX mode select" "ENET_TX_EN,LPSPI1_SDI,LPUART3_RTS_B,KPP_ROW02,FLEXPWM2_PWMB01,GPIO1_IO13,,SNVS_HP_VIO_5_B"
|
|
line.long 0xE0 "SW_MUX_CTL_PAD_GPIO_AD_B0_14,SW MUX Control Register"
|
|
bitfld.long 0xE0 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xE0 0.--2. " MUX_MODE ,MUX mode select" "ENET_TDATA00,FLEXCAN2_TX,LPUART3_TX,KPP_COL03,FLEXPWM2_PWMA00,GPIO1_IO14,,WDOG1_WDOG_ANY"
|
|
line.long 0xE4 "SW_MUX_CTL_PAD_GPIO_AD_B0_15,SW MUX Control Register"
|
|
bitfld.long 0xE4 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xE4 0.--2. " MUX_MODE ,MUX mode select" "ENET_TDATA01,FLEXCAN2_RX,LPUART3_RX,KPP_ROW03,,GPIO1_IO15,?..."
|
|
line.long 0xE8 "SW_MUX_CTL_PAD_GPIO_AD_B1_00,SW MUX Control Register"
|
|
bitfld.long 0xE8 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xE8 0.--2. " MUX_MODE ,MUX mode select" "SEMC_READY,FLEXSPI_A_DATA03,FLEXCAN2_TX,SAI1_MCLK,FLEXIO1_FLEXIO15,GPIO1_IO16,ENET_1588_EVENT2_OUT,KPP_COL04"
|
|
line.long 0xEC "SW_MUX_CTL_PAD_GPIO_AD_B1_01,SW MUX Control Register"
|
|
bitfld.long 0xEC 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xEC 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CSX00,FLEXSPI_A_SCLK,FLEXCAN2_RX,SAI1_TX_BCLK,FLEXIO1_FLEXIO14,GPIO1_IO17,ENET_1588_EVENT2_IN,KPP_ROW04"
|
|
line.long 0xF0 "SW_MUX_CTL_PAD_GPIO_AD_B1_02,SW MUX Control Register"
|
|
bitfld.long 0xF0 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xF0 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CSX01,FLEXSPI_A_DATA00,LPSPI4_SCK,SAI1_TX_SYNC,FLEXIO1_FLEXIO13,GPIO1_IO18,ENET_1588_EVENT3_OUT,KPP_COL05"
|
|
line.long 0xF4 "SW_MUX_CTL_PAD_GPIO_AD_B1_03,SW MUX Control Register"
|
|
bitfld.long 0xF4 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xF4 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CSX02,FLEXSPI_A_DATA02,LPSPI4_PCS0,SAI1_TX_DATA00,FLEXIO1_FLEXIO12,GPIO1_IO19,ENET_1588_EVENT3_IN,KPP_ROW05"
|
|
line.long 0xF8 "SW_MUX_CTL_PAD_GPIO_AD_B1_04,SW MUX Control Register"
|
|
bitfld.long 0xF8 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xF8 0.--2. " MUX_MODE ,MUX mode select" "SEMC_CSX03,FLEXSPI_A_DATA01,LPSPI4_SDO,SAI1_RX_SYNC,FLEXIO1_FLEXIO11,GPIO1_IO20,LPSPI1_PCS1,KPP_COL06"
|
|
line.long 0xFC "SW_MUX_CTL_PAD_GPIO_AD_B1_05,SW MUX Control Register"
|
|
bitfld.long 0xFC 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0xFC 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_WP,FLEXSPI_A_SS0_B,LPSPI4_SDI,SAI1_RX_DATA00,FLEXIO1_FLEXIO10,GPIO1_IO21,LPSPI1_PCS2,KPP_ROW06"
|
|
line.long 0x100 "SW_MUX_CTL_PAD_GPIO_AD_B1_06,SW MUX Control Register"
|
|
bitfld.long 0x100 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x100 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_RESET_B,FLEXPWM1_PWMA00,LPUART2_CTS_B,SAI1_RX_BCLK,FLEXIO1_FLEXIO09,GPIO1_IO22,LPSPI1_PCS3,KPP_COL07"
|
|
line.long 0x104 "SW_MUX_CTL_PAD_GPIO_AD_B1_07,SW MUX Control Register"
|
|
bitfld.long 0x104 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x104 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_VSELECT,FLEXPWM1_PWMB00,LPUART2_RTS_B,SAI1_TX_DATA01,FLEXIO1_FLEXIO08,GPIO1_IO23,LPSPI3_PCS3,KPP_ROW07"
|
|
line.long 0x108 "SW_MUX_CTL_PAD_GPIO_AD_B1_08,SW MUX Control Register"
|
|
bitfld.long 0x108 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x108 0.--2. " MUX_MODE ,MUX mode select" "LPI2C2_SCL,FLEXPWM1_PWMA01,LPUART2_TX,SAI1_TX_DATA02,FLEXIO1_FLEXIO07,GPIO1_IO24,LPSPI3_PCS2,XBAR1_INOUT12"
|
|
line.long 0x10C "SW_MUX_CTL_PAD_GPIO_AD_B1_09,SW MUX Control Register"
|
|
bitfld.long 0x10C 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x10C 0.--2. " MUX_MODE ,MUX mode select" "LPI2C2_SDA,FLEXPWM1_PWMB01,LPUART2_RX,SAI1_TX_DATA03,FLEXIO1_FLEXIO06,GPIO1_IO25,LPSPI3_PCS1,XBAR1_INOUT13"
|
|
line.long 0x110 "SW_MUX_CTL_PAD_GPIO_AD_B1_10,SW MUX Control Register"
|
|
bitfld.long 0x110 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x110 0.--2. " MUX_MODE ,MUX mode select" "USB_OTG1_PWR,FLEXPWM1_PWMA02,LPUART4_TX,USDHC1_CD_B,FLEXIO1_FLEXIO05,GPIO1_IO26,GPT2_CAPTURE1,?..."
|
|
line.long 0x114 "SW_MUX_CTL_PAD_GPIO_AD_B1_11,SW MUX Control Register"
|
|
bitfld.long 0x114 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x114 0.--2. " MUX_MODE ,MUX mode select" "ANATOP_OTG1_ID,FLEXPWM1_PWMB02,LPUART4_RX,USDHC1_WP,FLEXIO1_FLEXIO04,GPIO1_IO27,GPT2_COMPARE1,?..."
|
|
line.long 0x118 "SW_MUX_CTL_PAD_GPIO_AD_B1_12,SW MUX Control Register"
|
|
bitfld.long 0x118 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x118 0.--2. " MUX_MODE ,MUX mode select" "USB_OTG1_OC,ACMP_OUT00,LPSPI3_SCK,USDHC2_CD_B,FLEXIO1_FLEXIO03,GPIO1_IO28,FLEXPWM1_PWMA03,?..."
|
|
line.long 0x11C "SW_MUX_CTL_PAD_GPIO_AD_B1_13,SW MUX Control Register"
|
|
bitfld.long 0x11C 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x11C 0.--2. " MUX_MODE ,MUX mode select" "LPI2C1_HREQ,ACMP_OUT01,LPSPI3_PCS0,USDHC2_WP,FLEXIO1_FLEXIO02,GPIO1_IO29,FLEXPWM1_PWMB03,?..."
|
|
line.long 0x120 "SW_MUX_CTL_PAD_GPIO_AD_B1_14,SW MUX Control Register"
|
|
bitfld.long 0x120 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x120 0.--2. " MUX_MODE ,MUX mode select" "LPI2C1_SCL,ACMP_OUT02,LPSPI3_SDO,ENET_1588_EVENT0_OUT,FLEXIO1_FLEXIO01,GPIO1_IO30,?..."
|
|
line.long 0x124 "SW_MUX_CTL_PAD_GPIO_AD_B1_15,SW MUX Control Register"
|
|
bitfld.long 0x124 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x124 0.--2. " MUX_MODE ,MUX mode select" "LPI2C1_SDA,ACMP_OUT03,LPSPI3_SDI,ENET_1588_EVENT0_IN,FLEXIO1_FLEXIO00,GPIO1_IO31,CCM_DI0_EXT_CLK,?..."
|
|
line.long 0x128 "SW_MUX_CTL_PAD_GPIO_SD_B0_00,SW MUX Control Register"
|
|
bitfld.long 0x128 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x128 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_DATA2,QTIMER1_TIMER0,SAI1_MCLK,SAI2_MCLK,LPI2C3_SCL,GPIO3_IO13,FLEXSPI_A_SS1_B,XBAR1_INOUT14"
|
|
line.long 0x12C "SW_MUX_CTL_PAD_GPIO_SD_B0_01,SW MUX Control Register"
|
|
bitfld.long 0x12C 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x12C 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_DATA3,QTIMER1_TIMER1,,SAI2_RX_SYNC,LPI2C3_SDA,GPIO3_IO14,FLEXSPI_B_SS1_B,XBAR1_INOUT15"
|
|
line.long 0x130 "SW_MUX_CTL_PAD_GPIO_SD_B0_02,SW MUX Control Register"
|
|
bitfld.long 0x130 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x130 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_CMD,QTIMER1_TIMER2,LPUART7_CTS_B,SAI2_RX_BCLK,LPSPI1_SCK,GPIO3_IO15,ENET_MDIO,XBAR1_INOUT16"
|
|
line.long 0x134 "SW_MUX_CTL_PAD_GPIO_SD_B0_03,SW MUX Control Register"
|
|
bitfld.long 0x134 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x134 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_CLK,QTIMER1_TIMER3,LPUART7_RTS_B,SAI2_RX_DATA,LPSPI1_PCS0,GPIO3_IO16,ENET_MDC,?..."
|
|
line.long 0x138 "SW_MUX_CTL_PAD_GPIO_SD_B0_04,SW MUX Control Register"
|
|
bitfld.long 0x138 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x138 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_DATA0,FLEXCAN2_TX,LPUART7_TX,SAI2_TX_DATA,LPSPI1_SDO,GPIO3_IO17,FLEXSPI_B_SS0_B,?..."
|
|
line.long 0x13C "SW_MUX_CTL_PAD_GPIO_SD_B0_05,SW MUX Control Register"
|
|
bitfld.long 0x13C 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x13C 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_DATA1,FLEXCAN2_RX,LPUART7_RX,SAI2_TX_BCLK,LPSPI1_SDI,GPIO3_IO18,FLEXSPI_B_DQS,?..."
|
|
line.long 0x140 "SW_MUX_CTL_PAD_GPIO_SD_B0_06,SW MUX Control Register"
|
|
bitfld.long 0x140 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x140 0.--2. " MUX_MODE ,MUX mode select" "USDHC1_CD_B,USDHC1_RESET_B,,SAI2_TX_SYNC,WDOG1_WDOG_B,GPIO3_IO19,XBAR1_INOUT17,?..."
|
|
line.long 0x144 "SW_MUX_CTL_PAD_GPIO_SD_B1_00,SW MUX Control Register"
|
|
bitfld.long 0x144 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x144 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_DATA2,FLEXSPI_B_DATA03,LPUART6_TX,XBAR1_INOUT10,FLEXCAN1_TX,GPIO3_IO20,?..."
|
|
line.long 0x148 "SW_MUX_CTL_PAD_GPIO_SD_B1_01,SW MUX Control Register"
|
|
bitfld.long 0x148 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x148 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_DATA3,FLEXSPI_B_SCLK,LPUART6_RX,FLEXSPI_A_SS1_B,FLEXCAN1_RX,GPIO3_IO21,?..."
|
|
line.long 0x14C "SW_MUX_CTL_PAD_GPIO_SD_B1_02,SW MUX Control Register"
|
|
bitfld.long 0x14C 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x14C 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_CMD,FLEXSPI_B_DATA00,LPUART8_TX,LPI2C4_SCL,ENET_1588_EVENT1_OUT,GPIO3_IO22,CCM_CLKO1,?..."
|
|
line.long 0x150 "SW_MUX_CTL_PAD_GPIO_SD_B1_03,SW MUX Control Register"
|
|
bitfld.long 0x150 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x150 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_CLK,FLEXSPI_B_DATA02,LPUART8_RX,LPI2C4_SDA,ENET_1588_EVENT1_IN,GPIO3_IO23,CCM_CLKO2,?..."
|
|
line.long 0x154 "SW_MUX_CTL_PAD_GPIO_SD_B1_04,SW MUX Control Register"
|
|
bitfld.long 0x154 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x154 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_DATA0,FLEXSPI_B_DATA01,ENET_TX_CLK,ENET_REF_CLK1,EWM_OUT_B,GPIO3_IO24,CCM_WAIT,?..."
|
|
line.long 0x158 "SW_MUX_CTL_PAD_GPIO_SD_B1_05,SW MUX Control Register"
|
|
bitfld.long 0x158 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x158 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_DATA1,FLEXSPI_A_DQS,ENET_RDATA01,SAI3_MCLK,FLEXSPI_B_SS0_B,GPIO3_IO25,CCM_PMIC_RDY,?..."
|
|
line.long 0x15C "SW_MUX_CTL_PAD_GPIO_SD_B1_06,SW MUX Control Register"
|
|
bitfld.long 0x15C 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x15C 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_CD_B,FLEXSPI_A_DATA03,ENET_RDATA00,SAI3_TX_BCLK,LPSPI2_PCS0,GPIO3_IO26,CCM_STOP,?..."
|
|
line.long 0x160 "SW_MUX_CTL_PAD_GPIO_SD_B1_07,SW MUX Control Register"
|
|
bitfld.long 0x160 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x160 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_RESET_B,FLEXSPI_A_SCLK,ENET_RX_EN,SAI3_TX_SYNC,LPSPI2_SCK,GPIO3_IO27,?..."
|
|
line.long 0x164 "SW_MUX_CTL_PAD_GPIO_SD_B1_08,SW MUX Control Register"
|
|
bitfld.long 0x164 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x164 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_DATA4,FLEXSPI_A_DATA00,ENET_RX_ER,SAI3_TX_DATA,LPSPI2_SDO,GPIO3_IO28,?..."
|
|
line.long 0x168 "SW_MUX_CTL_PAD_GPIO_SD_B1_09,SW MUX Control Register"
|
|
bitfld.long 0x168 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x168 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_DATA5,FLEXSPI_A_DATA02,ENET_TX_EN,SAI3_RX_BCLK,LPSPI2_SDI,GPIO3_IO29,CCM_REF_EN_B,?..."
|
|
line.long 0x16C "SW_MUX_CTL_PAD_GPIO_SD_B1_10,SW MUX Control Register"
|
|
bitfld.long 0x16C 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x16C 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_DATA6,FLEXSPI_A_DATA01,ENET_TDATA00,SAI3_RX_SYNC,LPSPI2_PCS2,GPIO3_IO30,SRC_SYSTEM_RESET,?..."
|
|
line.long 0x170 "SW_MUX_CTL_PAD_GPIO_SD_B1_11,SW MUX Control Register"
|
|
bitfld.long 0x170 4. " SION ,Software input on" "Disabled,Enabled"
|
|
bitfld.long 0x170 0.--2. " MUX_MODE ,MUX mode select" "USDHC2_DATA7,FLEXSPI_A_SS0_B,ENET_TDATA01,SAI3_RX_DATA,LPSPI2_PCS3,GPIO3_IO31,SRC_EARLY_RESET,?..."
|
|
textline " "
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_00,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_01,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_02,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_03,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_04,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_05,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_06,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_07,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_08,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_09,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hysteresis enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22K pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,R0,R0/2,R0/3,R0/4,R0/5,R0/6,R0/7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_10,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_11,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_12,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_13,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_14,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_15,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_16,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_17,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_18,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1D4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_19,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1D8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_20,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1DC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_21,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_22,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1E4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_23,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1E8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_24,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1EC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_25,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1F0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_26,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1F4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_27,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1F8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_28,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x1FC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_29,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_30,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_31,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x208++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_32,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x20C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_33,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x210++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_34,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x214++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_35,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x218++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_36,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x21C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_37,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_38,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x224++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_39,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_40,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x22C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_EMC_41,SW PAD Control"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x230++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_00,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x234++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_01,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x238++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_02,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x23C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_03,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_04,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x244++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_05,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x248++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_06,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x24C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_07,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x250++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_08,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x254++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_09,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x258++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_10,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x25C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_11,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_12,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x264++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_13,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x268++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_14,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x26C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B0_15,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x270++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_00,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x274++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_01,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x278++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_02,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x27C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_03,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_04,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x284++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_05,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x288++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_06,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x28C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_07,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x290++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_08,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x294++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_09,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x298++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_10,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x29C++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_11,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2A0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_12,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2A4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_13,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2A8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_14,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2AC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_AD_B1_15,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2B0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B0_00,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2B4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B0_01,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2B8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B0_02,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2BC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B0_03,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B0_04,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2C4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B0_05,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2C8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B0_06,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2CC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_0,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2D0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_1,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2D4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_2,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2D8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_3,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2DC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_4,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2E0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_5,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2E4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_6,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2E8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_7,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2EC++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_8,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2F0++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_9,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2F4++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_00,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
group.long 0x2F8++0x03
|
|
line.long 0x00 "SW_PAD_CTL_PAD_GPIO_SD_B1_01,SW PAD Control Register"
|
|
bitfld.long 0x00 16. " HYS ,Hyst. enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " PUS ,Hyst. enable" "100KOhm pull down,47KOhm pull up,100KOhm pull up,22KOhm pull up"
|
|
bitfld.long 0x00 13. " PUE ,Pull / keep select" "Keeper,Pull"
|
|
bitfld.long 0x00 12. " PKE ,Pull / keep enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " ODE ,Open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " SPEED ,Speed" "50MHz,100MHz,100MHz,200MHz"
|
|
bitfld.long 0x00 3.--5. " DSE ,Drive strength" "Disabled,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " SRE ,Slew rate" "Slow,Fast"
|
|
textline " "
|
|
group.long 0x2FC++0x1C7
|
|
line.long 0x00 "ANATOP_USB_OTG_ID_SELECT_INPUT,ANATOP_USB_OTG_ID_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x00 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_05_ALT6,GPIO_AD_B1_11_ALT0,GPIO_EMC_40_ALT3,?..."
|
|
line.long 0x04 "CCM_PMIC_READY_SELECT_INPUT,CCM_PMIC_READY_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x04 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_13_ALT7,GPIO_SD_B1_05_ALT6,GPIO_AD_B0_03_ALT7,GPIO_EMC_36_ALT3"
|
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line.long 0x08 "ENET_RMII_SELECT_INPUT,ENET_RMII_SELECT_INPUT DAISY Register"
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bitfld.long 0x08 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_04_ALT3,GPIO_AD_B0_08_ALT4"
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line.long 0x0C "ENET_MDIO_SELECT_INPUT,ENET_MDIO_SELECT_INPUT DAISY Register"
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bitfld.long 0x0C 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_02_ALT6,GPIO_AD_B0_04_ALT4,GPIO_EMC_40_ALT4,?..."
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line.long 0x10 "ENET_RX_DATA0_SELECT_INPUT,ENET_RX_DATA0_SELECT_INPUT DAISY Register"
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bitfld.long 0x10 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_06_ALT2,GPIO_AD_B0_10_ALT0"
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line.long 0x14 "ENET_RX_DATA1_SELECT_INPUT,ENET_RX_DATA1_SELECT_INPUT DAISY Register"
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bitfld.long 0x14 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_05_ALT2,GPIO_AD_B0_09_ALT0"
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line.long 0x18 "ENET_RX_EN_SELECT_INPUT,ENET_RX_EN_SELECT_INPUT DAISY Register"
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bitfld.long 0x18 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_07_ALT2,GPIO_AD_B0_11_ALT0"
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line.long 0x1C "ENET_RX_ERR_SELECT_INPUT,ENET_RX_ERR_SELECT_INPUT DAISY Register"
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bitfld.long 0x1C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_08_ALT2,GPIO_AD_B0_12_ALT0"
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line.long 0x20 "ENET_TX_CLK_SELECT_INPUT,ENET_TX_CLK_SELECT_INPUT DAISY Register"
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bitfld.long 0x20 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_04_ALT2,GPIO_AD_B0_08_ALT0"
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line.long 0x24 "FLEXCAN1_RX_SELECT_INPUT,FLEXCAN1_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0x24 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_01_ALT6,GPIO_SD_B1_01_ALT4,GPIO_AD_B0_05_ALT1,GPIO_EMC_15_ALT6"
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line.long 0x28 "FLEXCAN2_RX_SELECT_INPUT,FLEXCAN2_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0x28 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_05_ALT1,GPIO_EMC_09_ALT2,GPIO_AD_B0_15_ALT1,GPIO_AD_B1_01_ALT2"
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line.long 0x2C "FLEXPWM1_PWMA0_SELECT_INPUT,FLEXPWM1_PWMA0_SELECT_INPUT DAISY Register"
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bitfld.long 0x2C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_06_ALT1,GPIO_EMC_26_ALT1"
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line.long 0x30 "FLEXPWM1_PWMA1_SELECT_INPUT,FLEXPWM1_PWMA1_SELECT_INPUT DAISY Register"
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bitfld.long 0x30 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_08_ALT1,GPIO_EMC_24_ALT1"
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line.long 0x34 "FLEXPWM1_PWMA2_SELECT_INPUT,FLEXPWM1_PWMA2_SELECT_INPUT DAISY Register"
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bitfld.long 0x34 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_10_ALT1,GPIO_EMC_22_ALT1"
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line.long 0x38 "FLEXPWM1_PWMA3_SELECT_INPUT,FLEXPWM1_PWMA3_SELECT_INPUT DAISY Register"
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bitfld.long 0x38 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_12_ALT6,GPIO_EMC_20_ALT1"
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line.long 0x3C "FLEXPWM1_PWMB0_SELECT_INPUT,FLEXPWM1_PWMB0_SELECT_INPUT DAISY Register"
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bitfld.long 0x3C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_07_ALT1,GPIO_EMC_27_ALT1"
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line.long 0x40 "FLEXPWM1_PWMB1_SELECT_INPUT,FLEXPWM1_PWMB1_SELECT_INPUT DAISY Register"
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bitfld.long 0x40 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_09_ALT1,GPIO_EMC_25_ALT1"
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line.long 0x44 "FLEXPWM1_PWMB2_SELECT_INPUT,FLEXPWM1_PWMB2_SELECT_INPUT DAISY Register"
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bitfld.long 0x44 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_11_ALT1,GPIO_EMC_23_ALT1"
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line.long 0x48 "FLEXPWM1_PWMB3_SELECT_INPUT,FLEXPWM1_PWMB3_SELECT_INPUT DAISY Register"
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bitfld.long 0x48 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_13_ALT6,GPIO_EMC_21_ALT1"
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line.long 0x4C "FLEXPWM2_PWMA0_SELECT_INPUT,FLEXPWM2_PWMA0_SELECT_INPUT DAISY Register"
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bitfld.long 0x4C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_14_ALT4,GPIO_EMC_38_ALT1"
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line.long 0x50 "FLEXPWM2_PWMA1_SELECT_INPUT,FLEXPWM2_PWMA1_SELECT_INPUT DAISY Register"
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bitfld.long 0x50 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_12_ALT4,GPIO_EMC_36_ALT1"
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line.long 0x54 "FLEXPWM2_PWMA2_SELECT_INPUT,FLEXPWM2_PWMA2_SELECT_INPUT DAISY Register"
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bitfld.long 0x54 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_10_ALT4,GPIO_EMC_30_ALT1"
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line.long 0x58 "FLEXPWM2_PWMA3_SELECT_INPUT,FLEXPWM2_PWMA3_SELECT_INPUT DAISY Register"
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bitfld.long 0x58 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_06_ALT4,GPIO_EMC_28_ALT1"
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line.long 0x5C "FLEXPWM2_PWMB0_SELECT_INPUT,FLEXPWM2_PWMB0_SELECT_INPUT DAISY Register"
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bitfld.long 0x5C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_15_ALT4,GPIO_EMC_39_ALT1"
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line.long 0x60 "FLEXPWM2_PWMB1_SELECT_INPUT,FLEXPWM2_PWMB1_SELECT_INPUT DAISY Register"
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bitfld.long 0x60 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_13_ALT4,GPIO_EMC_37_ALT1"
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line.long 0x64 "FLEXPWM2_PWMB2_SELECT_INPUT,FLEXPWM2_PWMB2_SELECT_INPUT DAISY Register"
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bitfld.long 0x64 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_11_ALT4,GPIO_EMC_31_ALT1"
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line.long 0x68 "FLEXPWM2_PWMB3_SELECT_INPUT,FLEXPWM2_PWMB3_SELECT_INPUT DAISY Register"
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bitfld.long 0x68 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_07_ALT4,GPIO_EMC_29_ALT1"
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line.long 0x6C "FLEXSPI_A_DATA0_SELECT_INPUT,FLEXSPI_A_DATA0_SELECT_INPUT DAISY Register"
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bitfld.long 0x6C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_08_ALT1,GPIO_AD_B1_02_ALT1"
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line.long 0x70 "FLEXSPI_A_DATA1_SELECT_INPUT,FLEXSPI_A_DATA1_SELECT_INPUT DAISY Register"
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bitfld.long 0x70 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_10_ALT1,GPIO_AD_B1_04_ALT1"
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line.long 0x74 "FLEXSPI_A_DATA2_SELECT_INPUT,FLEXSPI_A_DATA2_SELECT_INPUT DAISY Register"
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bitfld.long 0x74 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_09_ALT1,GPIO_AD_B1_03_ALT1"
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line.long 0x78 "FLEXSPI_A_DATA3_SELECT_INPUT,FLEXSPI_A_DATA3_SELECT_INPUT DAISY Register"
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bitfld.long 0x78 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_06_ALT1,GPIO_AD_B1_00_ALT1"
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line.long 0x7C "FLEXSPI_A_SCLK_SELECT_INPUT,FLEXSPI_A_SCLK_SELECT_INPUT DAISY Register"
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bitfld.long 0x7C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_07_ALT1,GPIO_AD_B1_01_ALT1"
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line.long 0x80 "LPI2C1_SCL_SELECT_INPUT,LPI2C1_SCL_SELECT_INPUT DAISY Register"
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bitfld.long 0x80 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_02_ALT6,GPIO_AD_B1_14_ALT0"
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line.long 0x84 "LPI2C1_SDA_SELECT_INPUT,LPI2C1_SDA_SELECT_INPUT DAISY Register"
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bitfld.long 0x84 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_03_ALT6,GPIO_AD_B1_15_ALT0"
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line.long 0x88 "LPI2C2_SCL_SELECT_INPUT,LPI2C2_SCL_SELECT_INPUT DAISY Register"
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bitfld.long 0x88 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_08_ALT0,GPIO_EMC_19_ALT2"
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line.long 0x8C "LPI2C2_SDA_SELECT_INPUT,LPI2C2_SDA_SELECT_INPUT DAISY Register"
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bitfld.long 0x8C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_09_ALT0,GPIO_EMC_18_ALT2"
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line.long 0x90 "LPI2C3_SCL_SELECT_INPUT,LPI2C3_SCL_SELECT_INPUT DAISY Register"
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bitfld.long 0x90 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_00_ALT4,GPIO_AD_B0_08_ALT1"
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line.long 0x94 "LPI2C3_SDA_SELECT_INPUT,LPI2C3_SDA_SELECT_INPUT DAISY Register"
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bitfld.long 0x94 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_01_ALT4,GPIO_AD_B0_09_ALT1"
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line.long 0x98 "LPI2C4_SCL_SELECT_INPUT,LPI2C4_SCL_SELECT_INPUT DAISY Register"
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bitfld.long 0x98 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_11_ALT2,GPIO_SD_B1_02_ALT3"
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line.long 0x9C "LPI2C4_SDA_SELECT_INPUT,LPI2C4_SDA_SELECT_INPUT DAISY Register"
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bitfld.long 0x9C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_10_ALT2,GPIO_SD_B1_03_ALT3"
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line.long 0xA0 "LPSPI1_PCS0_SELECT_INPUT,LPSPI1_PCS0_SELECT_INPUT DAISY Register"
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bitfld.long 0xA0 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_03_ALT4,GPIO_AD_B0_11_ALT1"
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line.long 0xA4 "LPSPI1_SCK_SELECT_INPUT,LPSPI1_SCK_SELECT_INPUT DAISY Register"
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bitfld.long 0xA4 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_02_ALT4,GPIO_AD_B0_10_ALT1"
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line.long 0xA8 "LPSPI1_SDI_SELECT_INPUT,LPSPI1_SDI_SELECT_INPUT DAISY Register"
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bitfld.long 0xA8 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_05_ALT4,GPIO_AD_B0_13_ALT1"
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line.long 0xAC "LPSPI1_SDO_SELECT_INPUT,LPSPI1_SDO_SELECT_INPUT DAISY Register"
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bitfld.long 0xAC 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_04_ALT4,GPIO_AD_B0_12_ALT1"
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line.long 0xB0 "LPSPI2_PCS0_SELECT_INPUT,LPSPI2_PCS0_SELECT_INPUT DAISY Register"
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bitfld.long 0xB0 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_01_ALT4,GPIO_EMC_11_ALT4,GPIO_SD_B1_06_ALT4,?..."
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line.long 0xB4 "LPSPI2_SCK_SELECT_INPUT,LPSPI2_PCS0_SELECT_INPUT DAISY Register"
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bitfld.long 0xB4 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_00_ALT4,GPIO_EMC_10_ALT4,GPIO_SD_B1_07_ALT4,?..."
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line.long 0xB8 "LPSPI2_SDI_SELECT_INPUT,LPSPI2_SDI_SELECT_INPUT DAISY Register"
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bitfld.long 0xB8 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_03_ALT4,GPIO_EMC_13_ALT4,GPIO_SD_B1_09_ALT4,?..."
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line.long 0xBC "LPSPI2_SDO_SELECT_INPUT,LPSPI2_SDO_SELECT_INPUT DAISY Register"
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bitfld.long 0xBC 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_02_ALT4,GPIO_EMC_12_ALT4,GPIO_SD_B1_08_ALT4,?..."
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line.long 0xC0 "LPSPI4_PCS0_SELECT_INPUT,LPSPI4_PCS0_SELECT_INPUT DAISY Register"
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bitfld.long 0xC0 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_03_ALT2,GPIO_EMC_33_ALT4"
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line.long 0xC4 "LPSPI4_SCK_SELECT_INPUT,LPSPI4_SCK_SELECT_INPUT DAISY Register"
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bitfld.long 0xC4 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_02_ALT2,GPIO_EMC_32_ALT4"
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line.long 0xC8 "LPSPI4_SDI_SELECT_INPUT,LPSPI4_SDI_SELECT_INPUT DAISY Register"
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bitfld.long 0xC8 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_05_ALT2,GPIO_EMC_35_ALT4"
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line.long 0xCC "LPSPI4_SDO_SELECT_INPUT,LPSPI4_SDO_SELECT_INPUT DAISY Register"
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bitfld.long 0xCC 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_04_ALT2,GPIO_EMC_34_ALT4"
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line.long 0xD0 "LPUART2_CTS_B_SELECT_INPUT,LPUART2_CTS_B_SELECT_INPUT DAISY Register"
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bitfld.long 0xD0 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_06_ALT2,GPIO_EMC_20_ALT2"
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line.long 0xD4 "LPUART2_RX_SELECT_INPUT,LPUART2_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0xD4 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_09_ALT2,GPIO_EMC_23_ALT2"
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line.long 0xD8 "LPUART2_TX_SELECT_INPUT,LPUART2_TX_SELECT_INPUT DAISY Register"
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bitfld.long 0xD8 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_08_ALT2,GPIO_EMC_22_ALT2"
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line.long 0xDC "LPUART3_RX_SELECT_INPUT,LPUART3_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0xDC 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_07_ALT2,GPIO_AD_B0_15_ALT2"
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line.long 0xE0 "LPUART3_TX_SELECT_INPUT,LPUART3_TX_SELECT_INPUT DAISY Register"
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bitfld.long 0xE0 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_06_ALT2,GPIO_AD_B0_14_ALT2"
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line.long 0xE4 "LPUART4_CTS_B_SELECT_INPUT,LPUART4_CTS_B_SELECT_INPUT DAISY Register"
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bitfld.long 0xE4 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_00_ALT2,GPIO_EMC_30_ALT2"
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line.long 0xE8 "LPUART4_RX_SELECT_INPUT,LPUART4_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0xE8 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_03_ALT2,GPIO_AD_B1_11_ALT2,GPIO_EMC_33_ALT2,?..."
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line.long 0xEC "LPUART4_TX_SELECT_INPUT,LPUART4_TX_SELECT_INPUT DAISY Register"
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bitfld.long 0xEC 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_02_ALT2,GPIO_AD_B1_10_ALT2,GPIO_EMC_32_ALT2,?..."
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line.long 0xF0 "LPUART5_RX_SELECT_INPUT,LPUART5_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0xF0 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_11_ALT2,GPIO_EMC_39_ALT2"
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line.long 0xF4 "LPUART5_TX_SELECT_INPUT,LPUART5_TX_SELECT_INPUT DAISY Register"
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bitfld.long 0xF4 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_10_ALT2,GPIO_EMC_38_ALT2"
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line.long 0xF8 "LPUART6_RX_SELECT_INPUT,LPUART6_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0xF8 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_13_ALT2,GPIO_SD_B1_01_ALT2"
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line.long 0xFC "LPUART6_TX_SELECT_INPUT,LPUART6_TX_SELECT_INPUT DAISY Register"
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bitfld.long 0xFC 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_12_ALT2,GPIO_SD_B1_00_ALT2"
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line.long 0x100 "LPUART7_RX_SELECT_INPUT,LPUART7_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0x100 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_05_ALT2,GPIO_EMC_35_ALT2"
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line.long 0x104 "LPUART7_TX_SELECT_INPUT,LPUART7_TX_SELECT_INPUT DAISY Register"
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bitfld.long 0x104 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_04_ALT2,GPIO_EMC_34_ALT2"
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line.long 0x108 "LPUART8_RX_SELECT_INPUT,LPUART8_RX_SELECT_INPUT DAISY Register"
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bitfld.long 0x108 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_03_ALT2,GPIO_EMC_27_ALT2"
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line.long 0x10C "LPUART8_TX_SELECT_INPUT,LPUART8_TX_SELECT_INPUT DAISY Register"
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bitfld.long 0x10C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_02_ALT2,GPIO_EMC_26_ALT2"
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line.long 0x110 "NMI_SELECT_INPUT,NMI_SELECT_INPUT DAISY Register"
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bitfld.long 0x110 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_05_ALT7,WAKEUP_ALT7"
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line.long 0x114 "QTIMER1_TIMER0_INPUT_SELECT_INPUT,QTIMER1_TIMER0_INPUT_SELECT_INPUT DAISY Register"
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bitfld.long 0x114 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_00_ALT1,GPIO_EMC_32_ALT1"
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line.long 0x118 "QTIMER1_TIMER1_INPUT_SELECT_INPUT,QTIMER1_TIMER1_INPUT_SELECT_INPUT DAISY Register"
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bitfld.long 0x118 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_01_ALT1,GPIO_EMC_33_ALT1"
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line.long 0x11C "QTIMER1_TIMER2_INPUT_SELECT_INPUT,QTIMER1_TIMER2_INPUT_SELECT_INPUT DAISY Register"
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bitfld.long 0x11C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_02_ALT1,GPIO_EMC_34_ALT1"
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line.long 0x120 "QTIMER1_TIMER3_INPUT_SELECT_INPUT,QTIMER1_TIMER3_INPUT_SELECT_INPUT DAISY Register"
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bitfld.long 0x120 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_03_ALT1,GPIO_EMC_35_ALT1"
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line.long 0x124 "QTIMER2_TIMER0_INPUT_SELECT_INPUT,QTIMER2_TIMER0_INPUT_SELECT_INPUT DAISY Register"
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bitfld.long 0x124 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_00_ALT1,GPIO_AD_B0_04_ALT3"
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line.long 0x128 "QTIMER2_TIMER1_INPUT_SELECT_INPUT,QTIMER2_TIMER1_INPUT_SELECT_INPUT DAISY Register"
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bitfld.long 0x128 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_01_ALT1,GPIO_AD_B0_05_ALT3"
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line.long 0x12C "QTIMER2_TIMER2_INPUT_SELECT_INPUT,QTIMER2_TIMER2_INPUT_SELECT_INPUT DAISY Register"
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bitfld.long 0x12C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_02_ALT1,GPIO_AD_B0_06_ALT3"
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line.long 0x130 "QTIMER2_TIMER3_INPUT_SELECT_INPUT,QTIMER2_TIMER3_INPUT_SELECT_INPUT DAISY Register"
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bitfld.long 0x130 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_03_ALT1,GPIO_AD_B0_07_ALT3"
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line.long 0x134 "SAI1_MCLK_SELECT_INPUT,SAI1_MCLK_SELECT_INPUT DAISY Register"
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bitfld.long 0x134 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_00_ALT2,GPIO_AD_B0_03_ALT3,GPIO_AD_B1_00_ALT3,GPIO_EMC_20_ALT3"
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line.long 0x138 "SAI1_RX_BCLK_SELECT_INPUT,SAI1_RX_BCLK_SELECT_INPUT DAISY Register"
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bitfld.long 0x138 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_06_ALT3,GPIO_EMC_14_ALT3,GPIO_EMC_19_ALT3,?..."
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line.long 0x13C "SAI1_RX_DATA0_SELECT_INPUT,SAI1_RX_DATA0_SELECT_INPUT DAISY Register"
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bitfld.long 0x13C 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_13_ALT3,GPIO_AD_B1_05_ALT3,GPIO_EMC_21_ALT3,?..."
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line.long 0x140 "SAI1_RX_DATA1_SELECT_INPUT,SAI1_RX_DATA1_SELECT_INPUT DAISY Register"
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bitfld.long 0x140 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_09_ALT3,GPIO_EMC_22_ALT3"
|
|
line.long 0x144 "SAI1_RX_DATA2_SELECT_INPUT,SAI1_RX_DATA2_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x144 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_08_ALT3,GPIO_EMC_23_ALT3"
|
|
line.long 0x148 "SAI1_RX_DATA3_SELECT_INPUT,SAI1_RX_DATA3_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x148 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_07_ALT3,GPIO_EMC_24_ALT3"
|
|
line.long 0x14C "SAI1_RX_SYNC_SELECT_INPUT,SAI1_RX_SYNC_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x14C 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_04_ALT3,GPIO_EMC_15_ALT3,GPIO_EMC_18_ALT3,?..."
|
|
line.long 0x150 "SAI1_TX_BCLK_SELECT_INPUT,SAI1_TX_BCLK_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x150 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_11_ALT3,GPIO_AD_B1_01_ALT3,GPIO_EMC_26_ALT3,?..."
|
|
line.long 0x154 "SAI1_TX_SYNC_SELECT_INPUT,SAI1_TX_SYNC_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x154 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_10_ALT3,GPIO_AD_B1_02_ALT3,GPIO_EMC_27_ALT3,?..."
|
|
line.long 0x158 "SAI2_MCLK_SELECT_INPUT,SAI2_MCLK_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x158 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_00_ALT3,GPIO_EMC_16_ALT3"
|
|
line.long 0x15C "SAI2_RX_BCLK_SELECT_INPUT,SAI2_RX_BCLK_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x15C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_02_ALT3,GPIO_EMC_09_ALT3"
|
|
line.long 0x160 "SAI2_RX_DATA0_SELECT_INPUT,SAI2_RX_DATA0_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x160 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_03_ALT3,GPIO_EMC_08_ALT3"
|
|
line.long 0x164 "SAI2_RX_SYNC_SELECT_INPUT,SAI2_RX_SYNC_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x164 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_01_ALT3,GPIO_EMC_07_ALT3"
|
|
line.long 0x168 "SAI2_TX_BCLK_SELECT_INPUT,SAI2_TX_BCLK_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x168 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_05_ALT3,GPIO_EMC_04_ALT3"
|
|
line.long 0x16C "SAI2_TX_SYNC_SELECT_INPUT,SAI2_TX_SYNC_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x16C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_06_ALT3,GPIO_EMC_05_ALT3"
|
|
line.long 0x170 "SAI3_MCLK_SELECT_INPUT,SAI3_MCLK_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x170 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_05_ALT3,GPIO_EMC_17_ALT3,GPIO_EMC_28_ALT3,?..."
|
|
line.long 0x174 "SAI3_RX_BCLK_SELECT_INPUT,SAI3_RX_BCLK_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x174 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_09_ALT3,GPIO_EMC_29_ALT3"
|
|
line.long 0x178 "SAI3_RX_DATA0_SELECT_INPUT,SAI3_RX_DATA0_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x178 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_11_ALT3,GPIO_EMC_31_ALT3"
|
|
line.long 0x17C "SAI3_RX_SYNC_SELECT_INPUT,SAI3_RX_SYNC_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x17C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_10_ALT3,GPIO_EMC_30_ALT3"
|
|
line.long 0x180 "SAI3_TX_BCLK_SELECT_INPUT,SAI3_TX_BCLK_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x180 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_06_ALT3,GPIO_EMC_33_ALT3"
|
|
line.long 0x184 "SAI3_TX_SYNC_SELECT_INPUT,SAI3_TX_SYNC_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x184 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_07_ALT3,GPIO_EMC_34_ALT3"
|
|
line.long 0x188 "SEMC_READY_SELECT_INPUT,SEMC_READY_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x188 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_00_ALT0,GPIO_EMC_41_ALT0"
|
|
line.long 0x18C "SPDIF_IN_SELECT_INPUT,SPDIF_IN_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x18C 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_05_ALT2,GPIO_EMC_41_ALT2"
|
|
line.long 0x190 "USB_OTG_OC_SELECT_INPUT,USB_OTG_OC_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x190 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_03_ALT6,GPIO_AD_B1_12_ALT0,GPIO_EMC_39_ALT3,?..."
|
|
line.long 0x194 "USDHC1_CD_B_SELECT_INPUT,USDHC1_CD_B_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x194 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_06_ALT0,GPIO_AD_B0_05_ALT2,GPIO_AD_B1_10_ALT3,GPIO_EMC_38_ALT7"
|
|
line.long 0x198 "USDHC1_WP_SELECT_INPUT,USDHC1_WP_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x198 0.--2. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B0_03_ALT4,GPIO_AD_B0_04_ALT2,GPIO_AD_B1_05_ALT0,GPIO_AD_B1_11_ALT3,GPIO_EMC_36_ALT7,?..."
|
|
line.long 0x19C "USDHC2_CD_B_SELECT_INPUT,USDHC2_CD_B_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x19C 0.--1. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B1_06_ALT0,GPIO_AD_B0_03_ALT1,GPIO_AD_B1_12_ALT3,?..."
|
|
line.long 0x1A0 "USDHC2_WP_SELECT_INPUT,USDHC2_WP_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1A0 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_AD_B1_13_ALT3,GPIO_EMC_35_ALT3"
|
|
line.long 0x1A4 "XBAR1_IN14_SELECT_INPUT,XBAR1_IN14_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1A4 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_00_ALT7,GPIO_EMC_14_ALT1"
|
|
line.long 0x1A8 "XBAR1_IN15_SELECT_INPUT,XBAR1_IN15_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1A8 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_01_ALT7,GPIO_EMC_15_ALT1"
|
|
line.long 0x1AC "XBAR1_IN16_SELECT_INPUT,XBAR1_IN16_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1AC 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_02_ALT7,GPIO_EMC_18_ALT1"
|
|
line.long 0x1B0 "XBAR1_IN17_SELECT_INPUT,XBAR1_IN17_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1B0 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_SD_B0_06_ALT6,GPIO_EMC_19_ALT1"
|
|
line.long 0x1B4 "XBAR1_IN10_SELECT_INPUT,XBAR1_IN10_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1B4 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_10_ALT1,GPIO_SD_B1_00_ALT3"
|
|
line.long 0x1B8 "XBAR1_IN12_SELECT_INPUT,XBAR1_IN12_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1B8 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_12_ALT1,GPIO_AD_B1_08_ALT7"
|
|
line.long 0x1BC "XBAR1_IN13_SELECT_INPUT,XBAR1_IN13_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1BC 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_13_ALT1,GPIO_AD_B1_09_ALT7"
|
|
line.long 0x1C0 "XBAR1_IN18_SELECT_INPUT,XBAR1_IN18_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1C0 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_28_ALT2,GPIO_EMC_40_ALT1"
|
|
line.long 0x1C4 "XBAR1_IN19_SELECT_INPUT,XBAR1_IN19_SELECT_INPUT DAISY Register"
|
|
bitfld.long 0x1C4 0. " DAISY ,Selecting pads involved in daisy chain" "GPIO_EMC_29_ALT2,GPIO_EMC_41_ALT1"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "KPP (Keypad Port)"
|
|
base ad:0x401FC000
|
|
width 6.
|
|
group.word 0x00++0x07
|
|
line.word 0x00 "KPCR,Keypad Control Register"
|
|
bitfld.word 0x00 15. " KCO[7] ,Keypad column strobe open-drain pin 7 enable" "Totem-pole,Open-drain"
|
|
bitfld.word 0x00 14. " [6] ,Keypad column strobe open-drain pin 6 enable" "Totem-pole,Open-drain"
|
|
bitfld.word 0x00 13. " [5] ,Keypad column strobe open-drain pin 5 enable" "Totem-pole,Open-drain"
|
|
bitfld.word 0x00 12. " [4] ,Keypad column strobe open-drain pin 4 enable" "Totem-pole,Open-drain"
|
|
textline " "
|
|
bitfld.word 0x00 11. " [3] ,Keypad column strobe open-drain pin 3 enable" "Totem-pole,Open-drain"
|
|
bitfld.word 0x00 10. " [2] ,Keypad column strobe open-drain pin 2 enable" "Totem-pole,Open-drain"
|
|
bitfld.word 0x00 9. " [1] ,Keypad column strobe open-drain pin 1 enable" "Totem-pole,Open-drain"
|
|
bitfld.word 0x00 8. " [0] ,Keypad column strobe open-drain pin 0 enable" "Totem-pole,Open-drain"
|
|
textline " "
|
|
bitfld.word 0x00 7. " KRE[7] ,Keypad row pin 7 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " [6] ,Keypad row pin 6 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " [5] ,Keypad row pin 5 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " [4] ,Keypad row pin 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " [3] ,Keypad row pin 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " [2] ,Keypad row pin 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " [1] ,Keypad row pin 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " [0] ,Keypad row pin 0 enable" "Disabled,Enabled"
|
|
line.word 0x02 "KPSR,Keypad Status Register"
|
|
bitfld.word 0x02 9. " KRIE ,Keypad release interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " KDIE ,Keypad key depress interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x02 3. " KRSS ,Key release synchronizer set" "No effect,Set"
|
|
textline " "
|
|
bitfld.word 0x02 2. " KDSC ,Key depress synchronizer clear" "No effect,Clear"
|
|
eventfld.word 0x02 1. " KPKR ,Keypad key release" "Not released,Released"
|
|
eventfld.word 0x02 0. " KPKD ,Keypad key depress" "Not detected,Detected"
|
|
line.word 0x04 "KDDR,Keypad Data Direction Register"
|
|
bitfld.word 0x04 15. " KCDD[7] ,Keypad column 7 data direction register" "Input,Output"
|
|
bitfld.word 0x04 14. " [6] ,Keypad column 6 data direction register" "Input,Output"
|
|
bitfld.word 0x04 13. " [5] ,Keypad column 5 data direction register" "Input,Output"
|
|
bitfld.word 0x04 12. " [4] ,Keypad column 4 data direction register" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 11. " [3] ,Keypad column 3 data direction register" "Input,Output"
|
|
bitfld.word 0x04 10. " [2] ,Keypad column 2 data direction register" "Input,Output"
|
|
bitfld.word 0x04 9. " [1] ,Keypad column 1 data direction register" "Input,Output"
|
|
bitfld.word 0x04 8. " [0] ,Keypad column 0 data direction register" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 7. " KRDD[7] ,Keypad row 7 data direction" "Input,Output"
|
|
bitfld.word 0x04 6. " [6] ,Keypad row 6 data direction" "Input,Output"
|
|
bitfld.word 0x04 5. " [5] ,Keypad row 5 data direction" "Input,Output"
|
|
bitfld.word 0x04 4. " [4] ,Keypad row 4 data direction" "Input,Output"
|
|
textline " "
|
|
bitfld.word 0x04 3. " [3] ,Keypad row 3 data direction" "Input,Output"
|
|
bitfld.word 0x04 2. " [2] ,Keypad row 2 data direction" "Input,Output"
|
|
bitfld.word 0x04 1. " [1] ,Keypad row 1 data direction" "Input,Output"
|
|
bitfld.word 0x04 0. " [0] ,Keypad row 0 data direction" "Input,Output"
|
|
line.word 0x06 "KPDR,Keypad Data Register"
|
|
bitfld.word 0x06 15. " KCD[7] ,Keypad column 7 data" "0,1"
|
|
bitfld.word 0x06 14. " [6] ,Keypad column 6 data" "0,1"
|
|
bitfld.word 0x06 13. " [5] ,Keypad column 5 data" "0,1"
|
|
bitfld.word 0x06 12. " [4] ,Keypad column 4 data" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 11. " [3] ,Keypad column 3 data" "0,1"
|
|
bitfld.word 0x06 10. " [2] ,Keypad column 2 data" "0,1"
|
|
bitfld.word 0x06 9. " [1] ,Keypad column 1 data" "0,1"
|
|
bitfld.word 0x06 8. " [0] ,Keypad column 0 data" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 7. " KRD[7] ,Keypad row 7 data" "0,1"
|
|
bitfld.word 0x06 6. " [6] ,Keypad row 6 data" "0,1"
|
|
bitfld.word 0x06 5. " [5] ,Keypad row 5 data" "0,1"
|
|
bitfld.word 0x06 4. " [4] ,Keypad row 4 data" "0,1"
|
|
textline " "
|
|
bitfld.word 0x06 3. " [3] ,Keypad row 3 data" "0,1"
|
|
bitfld.word 0x06 2. " [2] ,Keypad row 2 data" "0,1"
|
|
bitfld.word 0x06 1. " [1] ,Keypad row 1 data" "0,1"
|
|
bitfld.word 0x06 0. " [0] ,Keypad row 0 data" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "LPI2C (Low Power Inter-Integrated Circuit)"
|
|
tree "LPI2C 1"
|
|
base ad:0x403F0000
|
|
width 8.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature specification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
bitfld.long 0x04 8.--11. " MRXFIFO ,Master receive FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 0.--3. " MTXFIFO ,Master transmit FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x10++0x13
|
|
line.long 0x00 "MCR,Master Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,Doze mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Master enable" "Disabled,Enabled"
|
|
line.long 0x04 "MSR,Master Status Register"
|
|
rbitfld.long 0x04 25. " BBF ,Bus busy flag" "Idle,Busy"
|
|
rbitfld.long 0x04 24. " MBF ,Master busy flag" "Idle,Busy"
|
|
eventfld.long 0x04 14. " DMF ,Data match flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 13. " PLTF ,Pin low timeout flag" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x04 12. " FEF ,FIFO error flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 11. " ALF ,Arbitration lost flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 10. " NDF ,NACK detect flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 9. " SDF ,STOP detect flag" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x04 8. " EPF ,End packet flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
rbitfld.long 0x04 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x08 "MIER,Master Interrupt Enable Register"
|
|
bitfld.long 0x08 14. " DMIE ,Data match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " PLTIE ,Pin low timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " FEIE ,FIFO error interrupt enable" "No,Yes"
|
|
bitfld.long 0x08 11. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 10. " NDIE ,NACK detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SDIE ,STOP detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " EPIE ,End packet interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
line.long 0x0C "MDER,Master DMA Enable Register"
|
|
bitfld.long 0x0C 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
line.long 0x10 "MCFGR0,Master Configuration Register 0"
|
|
bitfld.long 0x10 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
newline
|
|
bitfld.long 0x10 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " HRSEL ,Host request select" "LPI2C_HREQ pin,Input trigger"
|
|
bitfld.long 0x10 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x10 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(ad:0x403F0000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x24++0x0B
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. " PINCFG ,Pin configuration" "2-pin open drain,2-pin output only,2-pin push-pull,4-pin push-pull,2-pin open drain/separate slave,2-pin output only/separate slave,2-pin push-pull/separate slave,4-pin push-pull/inverted outs"
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 10. " TIMECFG ,Timeout configuration" "On SCL low too long,On SCL or SDA low too long"
|
|
bitfld.long 0x00 9. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
bitfld.long 0x00 8. " AUTOSTOP ,Automatic STOP generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " PRESCALE ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x04 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--11. 1. " BUSIDLE ,Bus idle timeout"
|
|
line.long 0x08 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x08 8.--19. 1. " PINLOW ,Pin low timeout"
|
|
else
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. " PINCFG ,Pin configuration" "2-pin open drain,2-pin output only,2-pin push-pull,4-pin push-pull,2-pin open drain/separate slave,2-pin output only/separate slave,2-pin push-pull/separate slave,4-pin push-pull/inverted outs"
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 10. " TIMECFG ,Timeout configuration" "On SCL low too long,On SCL or SDA low too long"
|
|
bitfld.long 0x00 9. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
bitfld.long 0x00 8. " AUTOSTOP ,Automatic STOP generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " PRESCALE ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x04 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--11. 1. " BUSIDLE ,Bus idle timeout"
|
|
line.long 0x08 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x08 8.--19. 1. " PINLOW ,Pin low timeout"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32K2*")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052"))
|
|
if (((per.l(ad:0x403F0000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
elif (cpu()=="IMXRT1021")
|
|
if ((((per.l(ad:0x403F0000+0x10))&0x01)==0x01)||(((per.l(ad:0x403F0000+0x14))&0x1000000)==0x1000000))
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
if (((per.l(ad:0x403F0000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "MCCR0,Master Clock Configuration Register 0"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "MCCR1,Master Clock Configuration Register 1"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MCCR0,Master Clock Configuration Register 0"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MCCR1,Master Clock Configuration Register 1"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32K2*")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("S32MTV"))
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive FIFO watermark" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit FIFO watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MFSR,Master FIFO Status Register"
|
|
bitfld.long 0x00 16.--18. " RXCOUNT ,Receive FIFO count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " TXCOUNT ,Transmit FIFO count" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive FIFO watermark"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit FIFO watermark"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MFSR,Master FIFO Status Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXCOUNT ,Transmit FIFO count"
|
|
endif
|
|
newline
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "MTDR,Master Transmit Data Register"
|
|
bitfld.long 0x00 8.--10. " CMD ,Command data" "Transmit,Receive,Generate STOP,Receive and discard,Generate START and transmit,Generate START and transmit (NACK returned),Generate START and transmit using high speed mode,Generate START and transmit using high speed mode (NACK returned)"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Transmit data"
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "MRDR,Master Receive Data Register"
|
|
in
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32MTV")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F0000+0x110))&0x01)==0x01)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
newline
|
|
rbitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
newline
|
|
bitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
sif (cpuis("IMX8DX*")||cpuis("IMX8QXP*")||cpuis("S32K2*"))
|
|
bitfld.long 0x00 9. " RRF ,Reset Receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset Transmit FIFO" "No effect,Reset"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x114++0x0B
|
|
line.long 0x00 "SSR,Slave Status Register"
|
|
rbitfld.long 0x00 25. " BBF ,Bus busy flag" "Idle,Busy"
|
|
rbitfld.long 0x00 24. " SBF ,Slave busy flag" "Idle,Busy"
|
|
rbitfld.long 0x00 15. " SARF ,SMBus alert response flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 14. " GCF ,General call flag" "Not detected,Detected"
|
|
newline
|
|
rbitfld.long 0x00 13. " AM1F ,Address match 1 flag" "No match,Match"
|
|
rbitfld.long 0x00 12. " AM0F ,Address match 0 flag" "No matched,Matched"
|
|
eventfld.long 0x00 11. " FEF ,FIFO error flag" "No error,Error"
|
|
eventfld.long 0x00 10. " BEF ,Bit error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 9. " SDF ,STOP detect flag" "Not detected,Detected"
|
|
eventfld.long 0x00 8. " RSF ,Repeated start flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 3. " TAF ,Transmit ACK flag" "Not required,Required"
|
|
rbitfld.long 0x00 2. " AVF ,Address valid flag" "Invalid,Valid"
|
|
newline
|
|
rbitfld.long 0x00 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
rbitfld.long 0x00 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x04 "SIER,Slave Interrupt Enable Register"
|
|
bitfld.long 0x04 15. " SARIE ,SMBus alert response interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " GCIE ,General call interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " AM1F ,Address match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " AM0IE ,Address match 0 interrupt enable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x04 11. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " BEIE ,Bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SDIE ,STOP detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RSIE ,Repeated start interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " TAIE ,Transmit ACK interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " AVIE ,Address valid interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
line.long 0x08 "SDER,Slave DMA Enable Register"
|
|
sif (cpuis("S32K2*"))
|
|
bitfld.long 0x08 9. " SDDE ,Stop detect DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RSDE ,Repeated start DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x08 2. " AVDE ,Address valid DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(ad:0x403F0000+0x110))&0x01)==0x01)
|
|
rgroup.long 0x124++0x07
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. " ADDRCFG ,Address configuration" "Address match 0 (7-bit),Address match 0 (10-bit),Address match 0 (7-bit) or address match 1 (7-bit),Address match 0 (10-bit) or address match 1 (10-bit),Address match 0 (7-bit) or address match 1 (10-bit),Address match 0 (10-bit) or address match 1 (7-bit),From address match 0 (7-bit) to address match 1 (7-bit),From address match 0 (10-bit) to address match 1 (10-bit)"
|
|
newline
|
|
bitfld.long 0x00 13. " HSMEN ,High speed mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.long 0x00 11. " RXCFG ,Receive data configuration" "Return receive data and clear RDF,Return address status register and clear AVF when AVF set"
|
|
newline
|
|
bitfld.long 0x00 10. " TXCFG ,Transmit flag configuration" "On slave-transmit transfer when TDR empty,On TDR empty"
|
|
newline
|
|
bitfld.long 0x00 9. " SAEN ,SMBus alert enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GCEN ,General call enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKSTALL ,ACK SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXDSTALL ,TX data SCL stall" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RXSTALL ,RX SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADRSTALL ,Address SCL stall" "Disabled,Enabled"
|
|
line.long 0x04 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--13. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--3. " CLKHOLD ,Clock hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x124++0x07
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. " ADDRCFG ,Address configuration" "Address match 0 (7-bit),Address match 0 (10-bit),Address match 0 (7-bit) or address match 1 (7-bit),Address match 0 (10-bit) or address match 1 (10-bit),Address match 0 (7-bit) or address match 1 (10-bit),Address match 0 (10-bit) or address match 1 (7-bit),From address match 0 (7-bit) to address match 1 (7-bit),From address match 0 (10-bit) to address match 1 (10-bit)"
|
|
newline
|
|
bitfld.long 0x00 13. " HSMEN ,High speed mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.long 0x00 11. " RXCFG ,Receive data configuration" "Return receive data and clear RDF,Return address status register and clear AVF when AVF set"
|
|
newline
|
|
bitfld.long 0x00 10. " TXCFG ,Transmit flag configuration" "On slave-transmit transfer when TDR empty,On TDR empty"
|
|
newline
|
|
bitfld.long 0x00 9. " SAEN ,SMBus alert enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GCEN ,General call enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKSTALL ,ACK SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXDSTALL ,TX data SCL stall" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RXSTALL ,RX SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADRSTALL ,Address SCL stall" "Disabled,Enabled"
|
|
line.long 0x04 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--13. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--3. " CLKHOLD ,Clock hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
sif !cpuis("IMX8DX*")&&!cpuis("IMX8QXP*")
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8*")||cpuis("S32K2*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F0000+0x110))&0x01)==0x01)
|
|
rgroup.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8*")||cpuis("OMX8DX-CM4")||cpuis("S32K2*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
hgroup.long 0x150++0x03
|
|
hide.long 0x00 "SASR,Slave Address Status Register"
|
|
in
|
|
else
|
|
rgroup.long 0x150++0x03
|
|
line.long 0x00 "SASR,Slave Address Status Register"
|
|
bitfld.long 0x00 14. " ANV ,Address not valid" "Valid,Invalid"
|
|
hexmask.long.word 0x00 0.--10. 0x01 " RADDR ,Received address"
|
|
endif
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpuis("S32MTV")||cpuis("S32K2*")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F0000+0x124))&0x08)==0x08)
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "ACK,NACK"
|
|
else
|
|
rgroup.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "ACK,NACK"
|
|
endif
|
|
else
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "No,Yes"
|
|
endif
|
|
wgroup.long 0x160++0x03
|
|
line.long 0x00 "STDR,Slave Transmit Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Transmit data"
|
|
sif (cpuis("S32MTV"))
|
|
rgroup.long 0x170++0x03
|
|
line.long 0x00 "SRDR,Slave Receive Data Register"
|
|
bitfld.long 0x00 15. " SOF ,Start Of Frame" "Not the first data word,First data word"
|
|
bitfld.long 0x00 14. " RXEMPTY ,RX Empty" "Not empty,Empty"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive Data"
|
|
else
|
|
hgroup.long 0x170++0x03
|
|
hide.long 0x00 "SRDR,Slave Receive Data Register"
|
|
in
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPI2C 2"
|
|
base ad:0x403F4000
|
|
width 8.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature specification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
bitfld.long 0x04 8.--11. " MRXFIFO ,Master receive FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 0.--3. " MTXFIFO ,Master transmit FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x10++0x13
|
|
line.long 0x00 "MCR,Master Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,Doze mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Master enable" "Disabled,Enabled"
|
|
line.long 0x04 "MSR,Master Status Register"
|
|
rbitfld.long 0x04 25. " BBF ,Bus busy flag" "Idle,Busy"
|
|
rbitfld.long 0x04 24. " MBF ,Master busy flag" "Idle,Busy"
|
|
eventfld.long 0x04 14. " DMF ,Data match flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 13. " PLTF ,Pin low timeout flag" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x04 12. " FEF ,FIFO error flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 11. " ALF ,Arbitration lost flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 10. " NDF ,NACK detect flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 9. " SDF ,STOP detect flag" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x04 8. " EPF ,End packet flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
rbitfld.long 0x04 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x08 "MIER,Master Interrupt Enable Register"
|
|
bitfld.long 0x08 14. " DMIE ,Data match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " PLTIE ,Pin low timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " FEIE ,FIFO error interrupt enable" "No,Yes"
|
|
bitfld.long 0x08 11. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 10. " NDIE ,NACK detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SDIE ,STOP detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " EPIE ,End packet interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
line.long 0x0C "MDER,Master DMA Enable Register"
|
|
bitfld.long 0x0C 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
line.long 0x10 "MCFGR0,Master Configuration Register 0"
|
|
bitfld.long 0x10 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
newline
|
|
bitfld.long 0x10 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " HRSEL ,Host request select" "LPI2C_HREQ pin,Input trigger"
|
|
bitfld.long 0x10 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x10 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(ad:0x403F4000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x24++0x0B
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. " PINCFG ,Pin configuration" "2-pin open drain,2-pin output only,2-pin push-pull,4-pin push-pull,2-pin open drain/separate slave,2-pin output only/separate slave,2-pin push-pull/separate slave,4-pin push-pull/inverted outs"
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 10. " TIMECFG ,Timeout configuration" "On SCL low too long,On SCL or SDA low too long"
|
|
bitfld.long 0x00 9. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
bitfld.long 0x00 8. " AUTOSTOP ,Automatic STOP generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " PRESCALE ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x04 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--11. 1. " BUSIDLE ,Bus idle timeout"
|
|
line.long 0x08 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x08 8.--19. 1. " PINLOW ,Pin low timeout"
|
|
else
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. " PINCFG ,Pin configuration" "2-pin open drain,2-pin output only,2-pin push-pull,4-pin push-pull,2-pin open drain/separate slave,2-pin output only/separate slave,2-pin push-pull/separate slave,4-pin push-pull/inverted outs"
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 10. " TIMECFG ,Timeout configuration" "On SCL low too long,On SCL or SDA low too long"
|
|
bitfld.long 0x00 9. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
bitfld.long 0x00 8. " AUTOSTOP ,Automatic STOP generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " PRESCALE ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x04 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--11. 1. " BUSIDLE ,Bus idle timeout"
|
|
line.long 0x08 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x08 8.--19. 1. " PINLOW ,Pin low timeout"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32K2*")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052"))
|
|
if (((per.l(ad:0x403F4000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
elif (cpu()=="IMXRT1021")
|
|
if ((((per.l(ad:0x403F4000+0x10))&0x01)==0x01)||(((per.l(ad:0x403F4000+0x14))&0x1000000)==0x1000000))
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
if (((per.l(ad:0x403F4000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "MCCR0,Master Clock Configuration Register 0"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "MCCR1,Master Clock Configuration Register 1"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MCCR0,Master Clock Configuration Register 0"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MCCR1,Master Clock Configuration Register 1"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32K2*")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("S32MTV"))
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive FIFO watermark" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit FIFO watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MFSR,Master FIFO Status Register"
|
|
bitfld.long 0x00 16.--18. " RXCOUNT ,Receive FIFO count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " TXCOUNT ,Transmit FIFO count" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive FIFO watermark"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit FIFO watermark"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MFSR,Master FIFO Status Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXCOUNT ,Transmit FIFO count"
|
|
endif
|
|
newline
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "MTDR,Master Transmit Data Register"
|
|
bitfld.long 0x00 8.--10. " CMD ,Command data" "Transmit,Receive,Generate STOP,Receive and discard,Generate START and transmit,Generate START and transmit (NACK returned),Generate START and transmit using high speed mode,Generate START and transmit using high speed mode (NACK returned)"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Transmit data"
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "MRDR,Master Receive Data Register"
|
|
in
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32MTV")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F4000+0x110))&0x01)==0x01)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
newline
|
|
rbitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
newline
|
|
bitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
sif (cpuis("IMX8DX*")||cpuis("IMX8QXP*")||cpuis("S32K2*"))
|
|
bitfld.long 0x00 9. " RRF ,Reset Receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset Transmit FIFO" "No effect,Reset"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x114++0x0B
|
|
line.long 0x00 "SSR,Slave Status Register"
|
|
rbitfld.long 0x00 25. " BBF ,Bus busy flag" "Idle,Busy"
|
|
rbitfld.long 0x00 24. " SBF ,Slave busy flag" "Idle,Busy"
|
|
rbitfld.long 0x00 15. " SARF ,SMBus alert response flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 14. " GCF ,General call flag" "Not detected,Detected"
|
|
newline
|
|
rbitfld.long 0x00 13. " AM1F ,Address match 1 flag" "No match,Match"
|
|
rbitfld.long 0x00 12. " AM0F ,Address match 0 flag" "No matched,Matched"
|
|
eventfld.long 0x00 11. " FEF ,FIFO error flag" "No error,Error"
|
|
eventfld.long 0x00 10. " BEF ,Bit error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 9. " SDF ,STOP detect flag" "Not detected,Detected"
|
|
eventfld.long 0x00 8. " RSF ,Repeated start flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 3. " TAF ,Transmit ACK flag" "Not required,Required"
|
|
rbitfld.long 0x00 2. " AVF ,Address valid flag" "Invalid,Valid"
|
|
newline
|
|
rbitfld.long 0x00 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
rbitfld.long 0x00 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x04 "SIER,Slave Interrupt Enable Register"
|
|
bitfld.long 0x04 15. " SARIE ,SMBus alert response interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " GCIE ,General call interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " AM1F ,Address match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " AM0IE ,Address match 0 interrupt enable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x04 11. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " BEIE ,Bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SDIE ,STOP detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RSIE ,Repeated start interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " TAIE ,Transmit ACK interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " AVIE ,Address valid interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
line.long 0x08 "SDER,Slave DMA Enable Register"
|
|
sif (cpuis("S32K2*"))
|
|
bitfld.long 0x08 9. " SDDE ,Stop detect DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RSDE ,Repeated start DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x08 2. " AVDE ,Address valid DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(ad:0x403F4000+0x110))&0x01)==0x01)
|
|
rgroup.long 0x124++0x07
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. " ADDRCFG ,Address configuration" "Address match 0 (7-bit),Address match 0 (10-bit),Address match 0 (7-bit) or address match 1 (7-bit),Address match 0 (10-bit) or address match 1 (10-bit),Address match 0 (7-bit) or address match 1 (10-bit),Address match 0 (10-bit) or address match 1 (7-bit),From address match 0 (7-bit) to address match 1 (7-bit),From address match 0 (10-bit) to address match 1 (10-bit)"
|
|
newline
|
|
bitfld.long 0x00 13. " HSMEN ,High speed mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.long 0x00 11. " RXCFG ,Receive data configuration" "Return receive data and clear RDF,Return address status register and clear AVF when AVF set"
|
|
newline
|
|
bitfld.long 0x00 10. " TXCFG ,Transmit flag configuration" "On slave-transmit transfer when TDR empty,On TDR empty"
|
|
newline
|
|
bitfld.long 0x00 9. " SAEN ,SMBus alert enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GCEN ,General call enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKSTALL ,ACK SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXDSTALL ,TX data SCL stall" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RXSTALL ,RX SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADRSTALL ,Address SCL stall" "Disabled,Enabled"
|
|
line.long 0x04 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--13. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--3. " CLKHOLD ,Clock hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x124++0x07
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. " ADDRCFG ,Address configuration" "Address match 0 (7-bit),Address match 0 (10-bit),Address match 0 (7-bit) or address match 1 (7-bit),Address match 0 (10-bit) or address match 1 (10-bit),Address match 0 (7-bit) or address match 1 (10-bit),Address match 0 (10-bit) or address match 1 (7-bit),From address match 0 (7-bit) to address match 1 (7-bit),From address match 0 (10-bit) to address match 1 (10-bit)"
|
|
newline
|
|
bitfld.long 0x00 13. " HSMEN ,High speed mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.long 0x00 11. " RXCFG ,Receive data configuration" "Return receive data and clear RDF,Return address status register and clear AVF when AVF set"
|
|
newline
|
|
bitfld.long 0x00 10. " TXCFG ,Transmit flag configuration" "On slave-transmit transfer when TDR empty,On TDR empty"
|
|
newline
|
|
bitfld.long 0x00 9. " SAEN ,SMBus alert enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GCEN ,General call enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKSTALL ,ACK SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXDSTALL ,TX data SCL stall" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RXSTALL ,RX SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADRSTALL ,Address SCL stall" "Disabled,Enabled"
|
|
line.long 0x04 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--13. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--3. " CLKHOLD ,Clock hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
sif !cpuis("IMX8DX*")&&!cpuis("IMX8QXP*")
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8*")||cpuis("S32K2*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F4000+0x110))&0x01)==0x01)
|
|
rgroup.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8*")||cpuis("OMX8DX-CM4")||cpuis("S32K2*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
hgroup.long 0x150++0x03
|
|
hide.long 0x00 "SASR,Slave Address Status Register"
|
|
in
|
|
else
|
|
rgroup.long 0x150++0x03
|
|
line.long 0x00 "SASR,Slave Address Status Register"
|
|
bitfld.long 0x00 14. " ANV ,Address not valid" "Valid,Invalid"
|
|
hexmask.long.word 0x00 0.--10. 0x01 " RADDR ,Received address"
|
|
endif
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpuis("S32MTV")||cpuis("S32K2*")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F4000+0x124))&0x08)==0x08)
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "ACK,NACK"
|
|
else
|
|
rgroup.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "ACK,NACK"
|
|
endif
|
|
else
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "No,Yes"
|
|
endif
|
|
wgroup.long 0x160++0x03
|
|
line.long 0x00 "STDR,Slave Transmit Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Transmit data"
|
|
sif (cpuis("S32MTV"))
|
|
rgroup.long 0x170++0x03
|
|
line.long 0x00 "SRDR,Slave Receive Data Register"
|
|
bitfld.long 0x00 15. " SOF ,Start Of Frame" "Not the first data word,First data word"
|
|
bitfld.long 0x00 14. " RXEMPTY ,RX Empty" "Not empty,Empty"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive Data"
|
|
else
|
|
hgroup.long 0x170++0x03
|
|
hide.long 0x00 "SRDR,Slave Receive Data Register"
|
|
in
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPI2C 3"
|
|
base ad:0x403F8000
|
|
width 8.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature specification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
bitfld.long 0x04 8.--11. " MRXFIFO ,Master receive FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 0.--3. " MTXFIFO ,Master transmit FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x10++0x13
|
|
line.long 0x00 "MCR,Master Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,Doze mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Master enable" "Disabled,Enabled"
|
|
line.long 0x04 "MSR,Master Status Register"
|
|
rbitfld.long 0x04 25. " BBF ,Bus busy flag" "Idle,Busy"
|
|
rbitfld.long 0x04 24. " MBF ,Master busy flag" "Idle,Busy"
|
|
eventfld.long 0x04 14. " DMF ,Data match flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 13. " PLTF ,Pin low timeout flag" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x04 12. " FEF ,FIFO error flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 11. " ALF ,Arbitration lost flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 10. " NDF ,NACK detect flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 9. " SDF ,STOP detect flag" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x04 8. " EPF ,End packet flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
rbitfld.long 0x04 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x08 "MIER,Master Interrupt Enable Register"
|
|
bitfld.long 0x08 14. " DMIE ,Data match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " PLTIE ,Pin low timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " FEIE ,FIFO error interrupt enable" "No,Yes"
|
|
bitfld.long 0x08 11. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 10. " NDIE ,NACK detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SDIE ,STOP detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " EPIE ,End packet interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
line.long 0x0C "MDER,Master DMA Enable Register"
|
|
bitfld.long 0x0C 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
line.long 0x10 "MCFGR0,Master Configuration Register 0"
|
|
bitfld.long 0x10 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
newline
|
|
bitfld.long 0x10 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " HRSEL ,Host request select" "LPI2C_HREQ pin,Input trigger"
|
|
bitfld.long 0x10 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x10 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(ad:0x403F8000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x24++0x0B
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. " PINCFG ,Pin configuration" "2-pin open drain,2-pin output only,2-pin push-pull,4-pin push-pull,2-pin open drain/separate slave,2-pin output only/separate slave,2-pin push-pull/separate slave,4-pin push-pull/inverted outs"
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 10. " TIMECFG ,Timeout configuration" "On SCL low too long,On SCL or SDA low too long"
|
|
bitfld.long 0x00 9. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
bitfld.long 0x00 8. " AUTOSTOP ,Automatic STOP generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " PRESCALE ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x04 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--11. 1. " BUSIDLE ,Bus idle timeout"
|
|
line.long 0x08 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x08 8.--19. 1. " PINLOW ,Pin low timeout"
|
|
else
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. " PINCFG ,Pin configuration" "2-pin open drain,2-pin output only,2-pin push-pull,4-pin push-pull,2-pin open drain/separate slave,2-pin output only/separate slave,2-pin push-pull/separate slave,4-pin push-pull/inverted outs"
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 10. " TIMECFG ,Timeout configuration" "On SCL low too long,On SCL or SDA low too long"
|
|
bitfld.long 0x00 9. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
bitfld.long 0x00 8. " AUTOSTOP ,Automatic STOP generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " PRESCALE ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x04 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--11. 1. " BUSIDLE ,Bus idle timeout"
|
|
line.long 0x08 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x08 8.--19. 1. " PINLOW ,Pin low timeout"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32K2*")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052"))
|
|
if (((per.l(ad:0x403F8000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
elif (cpu()=="IMXRT1021")
|
|
if ((((per.l(ad:0x403F8000+0x10))&0x01)==0x01)||(((per.l(ad:0x403F8000+0x14))&0x1000000)==0x1000000))
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
if (((per.l(ad:0x403F8000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "MCCR0,Master Clock Configuration Register 0"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "MCCR1,Master Clock Configuration Register 1"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MCCR0,Master Clock Configuration Register 0"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MCCR1,Master Clock Configuration Register 1"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32K2*")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("S32MTV"))
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive FIFO watermark" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit FIFO watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MFSR,Master FIFO Status Register"
|
|
bitfld.long 0x00 16.--18. " RXCOUNT ,Receive FIFO count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " TXCOUNT ,Transmit FIFO count" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive FIFO watermark"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit FIFO watermark"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MFSR,Master FIFO Status Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXCOUNT ,Transmit FIFO count"
|
|
endif
|
|
newline
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "MTDR,Master Transmit Data Register"
|
|
bitfld.long 0x00 8.--10. " CMD ,Command data" "Transmit,Receive,Generate STOP,Receive and discard,Generate START and transmit,Generate START and transmit (NACK returned),Generate START and transmit using high speed mode,Generate START and transmit using high speed mode (NACK returned)"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Transmit data"
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "MRDR,Master Receive Data Register"
|
|
in
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32MTV")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F8000+0x110))&0x01)==0x01)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
newline
|
|
rbitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
newline
|
|
bitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
sif (cpuis("IMX8DX*")||cpuis("IMX8QXP*")||cpuis("S32K2*"))
|
|
bitfld.long 0x00 9. " RRF ,Reset Receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset Transmit FIFO" "No effect,Reset"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x114++0x0B
|
|
line.long 0x00 "SSR,Slave Status Register"
|
|
rbitfld.long 0x00 25. " BBF ,Bus busy flag" "Idle,Busy"
|
|
rbitfld.long 0x00 24. " SBF ,Slave busy flag" "Idle,Busy"
|
|
rbitfld.long 0x00 15. " SARF ,SMBus alert response flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 14. " GCF ,General call flag" "Not detected,Detected"
|
|
newline
|
|
rbitfld.long 0x00 13. " AM1F ,Address match 1 flag" "No match,Match"
|
|
rbitfld.long 0x00 12. " AM0F ,Address match 0 flag" "No matched,Matched"
|
|
eventfld.long 0x00 11. " FEF ,FIFO error flag" "No error,Error"
|
|
eventfld.long 0x00 10. " BEF ,Bit error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 9. " SDF ,STOP detect flag" "Not detected,Detected"
|
|
eventfld.long 0x00 8. " RSF ,Repeated start flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 3. " TAF ,Transmit ACK flag" "Not required,Required"
|
|
rbitfld.long 0x00 2. " AVF ,Address valid flag" "Invalid,Valid"
|
|
newline
|
|
rbitfld.long 0x00 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
rbitfld.long 0x00 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x04 "SIER,Slave Interrupt Enable Register"
|
|
bitfld.long 0x04 15. " SARIE ,SMBus alert response interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " GCIE ,General call interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " AM1F ,Address match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " AM0IE ,Address match 0 interrupt enable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x04 11. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " BEIE ,Bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SDIE ,STOP detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RSIE ,Repeated start interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " TAIE ,Transmit ACK interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " AVIE ,Address valid interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
line.long 0x08 "SDER,Slave DMA Enable Register"
|
|
sif (cpuis("S32K2*"))
|
|
bitfld.long 0x08 9. " SDDE ,Stop detect DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RSDE ,Repeated start DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x08 2. " AVDE ,Address valid DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(ad:0x403F8000+0x110))&0x01)==0x01)
|
|
rgroup.long 0x124++0x07
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. " ADDRCFG ,Address configuration" "Address match 0 (7-bit),Address match 0 (10-bit),Address match 0 (7-bit) or address match 1 (7-bit),Address match 0 (10-bit) or address match 1 (10-bit),Address match 0 (7-bit) or address match 1 (10-bit),Address match 0 (10-bit) or address match 1 (7-bit),From address match 0 (7-bit) to address match 1 (7-bit),From address match 0 (10-bit) to address match 1 (10-bit)"
|
|
newline
|
|
bitfld.long 0x00 13. " HSMEN ,High speed mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.long 0x00 11. " RXCFG ,Receive data configuration" "Return receive data and clear RDF,Return address status register and clear AVF when AVF set"
|
|
newline
|
|
bitfld.long 0x00 10. " TXCFG ,Transmit flag configuration" "On slave-transmit transfer when TDR empty,On TDR empty"
|
|
newline
|
|
bitfld.long 0x00 9. " SAEN ,SMBus alert enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GCEN ,General call enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKSTALL ,ACK SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXDSTALL ,TX data SCL stall" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RXSTALL ,RX SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADRSTALL ,Address SCL stall" "Disabled,Enabled"
|
|
line.long 0x04 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--13. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--3. " CLKHOLD ,Clock hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x124++0x07
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. " ADDRCFG ,Address configuration" "Address match 0 (7-bit),Address match 0 (10-bit),Address match 0 (7-bit) or address match 1 (7-bit),Address match 0 (10-bit) or address match 1 (10-bit),Address match 0 (7-bit) or address match 1 (10-bit),Address match 0 (10-bit) or address match 1 (7-bit),From address match 0 (7-bit) to address match 1 (7-bit),From address match 0 (10-bit) to address match 1 (10-bit)"
|
|
newline
|
|
bitfld.long 0x00 13. " HSMEN ,High speed mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.long 0x00 11. " RXCFG ,Receive data configuration" "Return receive data and clear RDF,Return address status register and clear AVF when AVF set"
|
|
newline
|
|
bitfld.long 0x00 10. " TXCFG ,Transmit flag configuration" "On slave-transmit transfer when TDR empty,On TDR empty"
|
|
newline
|
|
bitfld.long 0x00 9. " SAEN ,SMBus alert enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GCEN ,General call enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKSTALL ,ACK SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXDSTALL ,TX data SCL stall" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RXSTALL ,RX SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADRSTALL ,Address SCL stall" "Disabled,Enabled"
|
|
line.long 0x04 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--13. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--3. " CLKHOLD ,Clock hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
sif !cpuis("IMX8DX*")&&!cpuis("IMX8QXP*")
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8*")||cpuis("S32K2*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F8000+0x110))&0x01)==0x01)
|
|
rgroup.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8*")||cpuis("OMX8DX-CM4")||cpuis("S32K2*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
hgroup.long 0x150++0x03
|
|
hide.long 0x00 "SASR,Slave Address Status Register"
|
|
in
|
|
else
|
|
rgroup.long 0x150++0x03
|
|
line.long 0x00 "SASR,Slave Address Status Register"
|
|
bitfld.long 0x00 14. " ANV ,Address not valid" "Valid,Invalid"
|
|
hexmask.long.word 0x00 0.--10. 0x01 " RADDR ,Received address"
|
|
endif
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpuis("S32MTV")||cpuis("S32K2*")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403F8000+0x124))&0x08)==0x08)
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "ACK,NACK"
|
|
else
|
|
rgroup.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "ACK,NACK"
|
|
endif
|
|
else
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "No,Yes"
|
|
endif
|
|
wgroup.long 0x160++0x03
|
|
line.long 0x00 "STDR,Slave Transmit Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Transmit data"
|
|
sif (cpuis("S32MTV"))
|
|
rgroup.long 0x170++0x03
|
|
line.long 0x00 "SRDR,Slave Receive Data Register"
|
|
bitfld.long 0x00 15. " SOF ,Start Of Frame" "Not the first data word,First data word"
|
|
bitfld.long 0x00 14. " RXEMPTY ,RX Empty" "Not empty,Empty"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive Data"
|
|
else
|
|
hgroup.long 0x170++0x03
|
|
hide.long 0x00 "SRDR,Slave Receive Data Register"
|
|
in
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPI2C 4"
|
|
base ad:0x403FC000
|
|
width 8.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature specification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
bitfld.long 0x04 8.--11. " MRXFIFO ,Master receive FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 0.--3. " MTXFIFO ,Master transmit FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x10++0x13
|
|
line.long 0x00 "MCR,Master Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,Doze mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Master enable" "Disabled,Enabled"
|
|
line.long 0x04 "MSR,Master Status Register"
|
|
rbitfld.long 0x04 25. " BBF ,Bus busy flag" "Idle,Busy"
|
|
rbitfld.long 0x04 24. " MBF ,Master busy flag" "Idle,Busy"
|
|
eventfld.long 0x04 14. " DMF ,Data match flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 13. " PLTF ,Pin low timeout flag" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x04 12. " FEF ,FIFO error flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 11. " ALF ,Arbitration lost flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 10. " NDF ,NACK detect flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 9. " SDF ,STOP detect flag" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x04 8. " EPF ,End packet flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
rbitfld.long 0x04 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x08 "MIER,Master Interrupt Enable Register"
|
|
bitfld.long 0x08 14. " DMIE ,Data match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 13. " PLTIE ,Pin low timeout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " FEIE ,FIFO error interrupt enable" "No,Yes"
|
|
bitfld.long 0x08 11. " ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 10. " NDIE ,NACK detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " SDIE ,STOP detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " EPIE ,End packet interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
line.long 0x0C "MDER,Master DMA Enable Register"
|
|
bitfld.long 0x0C 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
line.long 0x10 "MCFGR0,Master Configuration Register 0"
|
|
bitfld.long 0x10 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
newline
|
|
bitfld.long 0x10 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " HRSEL ,Host request select" "LPI2C_HREQ pin,Input trigger"
|
|
bitfld.long 0x10 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x10 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(ad:0x403FC000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x24++0x0B
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. " PINCFG ,Pin configuration" "2-pin open drain,2-pin output only,2-pin push-pull,4-pin push-pull,2-pin open drain/separate slave,2-pin output only/separate slave,2-pin push-pull/separate slave,4-pin push-pull/inverted outs"
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 10. " TIMECFG ,Timeout configuration" "On SCL low too long,On SCL or SDA low too long"
|
|
bitfld.long 0x00 9. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
bitfld.long 0x00 8. " AUTOSTOP ,Automatic STOP generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " PRESCALE ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x04 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--11. 1. " BUSIDLE ,Bus idle timeout"
|
|
line.long 0x08 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x08 8.--19. 1. " PINLOW ,Pin low timeout"
|
|
else
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x00 24.--26. " PINCFG ,Pin configuration" "2-pin open drain,2-pin output only,2-pin push-pull,4-pin push-pull,2-pin open drain/separate slave,2-pin output only/separate slave,2-pin push-pull/separate slave,4-pin push-pull/inverted outs"
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 10. " TIMECFG ,Timeout configuration" "On SCL low too long,On SCL or SDA low too long"
|
|
bitfld.long 0x00 9. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
bitfld.long 0x00 8. " AUTOSTOP ,Automatic STOP generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " PRESCALE ,Prescaler" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
line.long 0x04 "MCFGR2,Master Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x04 0.--11. 1. " BUSIDLE ,Bus idle timeout"
|
|
line.long 0x08 "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x08 8.--19. 1. " PINLOW ,Pin low timeout"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32K2*")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052"))
|
|
if (((per.l(ad:0x403FC000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
elif (cpu()=="IMXRT1021")
|
|
if ((((per.l(ad:0x403FC000+0x10))&0x01)==0x01)||(((per.l(ad:0x403FC000+0x14))&0x1000000)==0x1000000))
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MATCH1 ,Match 1 value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MATCH0 ,Match 0 value"
|
|
endif
|
|
if (((per.l(ad:0x403FC000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "MCCR0,Master Clock Configuration Register 0"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x50++0x03
|
|
line.long 0x00 "MCCR1,Master Clock Configuration Register 1"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "MCCR0,Master Clock Configuration Register 0"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "MCCR1,Master Clock Configuration Register 1"
|
|
bitfld.long 0x00 24.--29. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--21. " SETHOLD ,Setup hold delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--13. " CLKHI ,Clock high period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " CLKLO ,Clock low period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32K2*")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("S32MTV"))
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive FIFO watermark" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit FIFO watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MFSR,Master FIFO Status Register"
|
|
bitfld.long 0x00 16.--18. " RXCOUNT ,Receive FIFO count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " TXCOUNT ,Transmit FIFO count" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "MFCR,Master FIFO Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive FIFO watermark"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit FIFO watermark"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "MFSR,Master FIFO Status Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXCOUNT ,Transmit FIFO count"
|
|
endif
|
|
newline
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "MTDR,Master Transmit Data Register"
|
|
bitfld.long 0x00 8.--10. " CMD ,Command data" "Transmit,Receive,Generate STOP,Receive and discard,Generate START and transmit,Generate START and transmit (NACK returned),Generate START and transmit using high speed mode,Generate START and transmit using high speed mode (NACK returned)"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Transmit data"
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "MRDR,Master Receive Data Register"
|
|
in
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("S32MTV")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403FC000+0x110))&0x01)==0x01)
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
newline
|
|
rbitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
newline
|
|
bitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "SCR,Slave Control Register"
|
|
sif (cpuis("IMX8DX*")||cpuis("IMX8QXP*")||cpuis("S32K2*"))
|
|
bitfld.long 0x00 9. " RRF ,Reset Receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset Transmit FIFO" "No effect,Reset"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 5. " FILTDZ ,Filter doze enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " FILTEN ,Filter enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " SEN ,Slave enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x114++0x0B
|
|
line.long 0x00 "SSR,Slave Status Register"
|
|
rbitfld.long 0x00 25. " BBF ,Bus busy flag" "Idle,Busy"
|
|
rbitfld.long 0x00 24. " SBF ,Slave busy flag" "Idle,Busy"
|
|
rbitfld.long 0x00 15. " SARF ,SMBus alert response flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 14. " GCF ,General call flag" "Not detected,Detected"
|
|
newline
|
|
rbitfld.long 0x00 13. " AM1F ,Address match 1 flag" "No match,Match"
|
|
rbitfld.long 0x00 12. " AM0F ,Address match 0 flag" "No matched,Matched"
|
|
eventfld.long 0x00 11. " FEF ,FIFO error flag" "No error,Error"
|
|
eventfld.long 0x00 10. " BEF ,Bit error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 9. " SDF ,STOP detect flag" "Not detected,Detected"
|
|
eventfld.long 0x00 8. " RSF ,Repeated start flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 3. " TAF ,Transmit ACK flag" "Not required,Required"
|
|
rbitfld.long 0x00 2. " AVF ,Address valid flag" "Invalid,Valid"
|
|
newline
|
|
rbitfld.long 0x00 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
rbitfld.long 0x00 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x04 "SIER,Slave Interrupt Enable Register"
|
|
bitfld.long 0x04 15. " SARIE ,SMBus alert response interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " GCIE ,General call interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " AM1F ,Address match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " AM0IE ,Address match 0 interrupt enable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x04 11. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " BEIE ,Bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " SDIE ,STOP detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RSIE ,Repeated start interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " TAIE ,Transmit ACK interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " AVIE ,Address valid interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
line.long 0x08 "SDER,Slave DMA Enable Register"
|
|
sif (cpuis("S32K2*"))
|
|
bitfld.long 0x08 9. " SDDE ,Stop detect DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RSDE ,Repeated start DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x08 2. " AVDE ,Address valid DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(ad:0x403FC000+0x110))&0x01)==0x01)
|
|
rgroup.long 0x124++0x07
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. " ADDRCFG ,Address configuration" "Address match 0 (7-bit),Address match 0 (10-bit),Address match 0 (7-bit) or address match 1 (7-bit),Address match 0 (10-bit) or address match 1 (10-bit),Address match 0 (7-bit) or address match 1 (10-bit),Address match 0 (10-bit) or address match 1 (7-bit),From address match 0 (7-bit) to address match 1 (7-bit),From address match 0 (10-bit) to address match 1 (10-bit)"
|
|
newline
|
|
bitfld.long 0x00 13. " HSMEN ,High speed mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.long 0x00 11. " RXCFG ,Receive data configuration" "Return receive data and clear RDF,Return address status register and clear AVF when AVF set"
|
|
newline
|
|
bitfld.long 0x00 10. " TXCFG ,Transmit flag configuration" "On slave-transmit transfer when TDR empty,On TDR empty"
|
|
newline
|
|
bitfld.long 0x00 9. " SAEN ,SMBus alert enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GCEN ,General call enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKSTALL ,ACK SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXDSTALL ,TX data SCL stall" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RXSTALL ,RX SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADRSTALL ,Address SCL stall" "Disabled,Enabled"
|
|
line.long 0x04 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--13. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--3. " CLKHOLD ,Clock hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x124++0x07
|
|
line.long 0x00 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x00 16.--18. " ADDRCFG ,Address configuration" "Address match 0 (7-bit),Address match 0 (10-bit),Address match 0 (7-bit) or address match 1 (7-bit),Address match 0 (10-bit) or address match 1 (10-bit),Address match 0 (7-bit) or address match 1 (10-bit),Address match 0 (10-bit) or address match 1 (7-bit),From address match 0 (7-bit) to address match 1 (7-bit),From address match 0 (10-bit) to address match 1 (10-bit)"
|
|
newline
|
|
bitfld.long 0x00 13. " HSMEN ,High speed mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IGNACK ,Ignore NACK" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.long 0x00 11. " RXCFG ,Receive data configuration" "Return receive data and clear RDF,Return address status register and clear AVF when AVF set"
|
|
newline
|
|
bitfld.long 0x00 10. " TXCFG ,Transmit flag configuration" "On slave-transmit transfer when TDR empty,On TDR empty"
|
|
newline
|
|
bitfld.long 0x00 9. " SAEN ,SMBus alert enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " GCEN ,General call enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ACKSTALL ,ACK SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXDSTALL ,TX data SCL stall" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RXSTALL ,RX SCL stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADRSTALL ,Address SCL stall" "Disabled,Enabled"
|
|
line.long 0x04 "SCFGR2,Slave Configuration Register 2"
|
|
bitfld.long 0x04 24.--27. " FILTSDA ,Glitch filter SDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " FILTSCL ,Glitch filter SCL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--13. " DATAVD ,Data valid delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 0.--3. " CLKHOLD ,Clock hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
newline
|
|
sif !cpuis("IMX8DX*")&&!cpuis("IMX8QXP*")
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8*")||cpuis("S32K2*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403FC000+0x110))&0x01)==0x01)
|
|
rgroup.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x00 17.--26. 1. " ADDR1 ,Address 1 value"
|
|
hexmask.long.word 0x00 1.--10. 1. " ADDR0 ,Address 0 value"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8*")||cpuis("OMX8DX-CM4")||cpuis("S32K2*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpu()=="IMXRT1021")
|
|
hgroup.long 0x150++0x03
|
|
hide.long 0x00 "SASR,Slave Address Status Register"
|
|
in
|
|
else
|
|
rgroup.long 0x150++0x03
|
|
line.long 0x00 "SASR,Slave Address Status Register"
|
|
bitfld.long 0x00 14. " ANV ,Address not valid" "Valid,Invalid"
|
|
hexmask.long.word 0x00 0.--10. 0x01 " RADDR ,Received address"
|
|
endif
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpuis("S32MTV")||cpuis("S32K2*")||cpu()=="IMXRT1021")
|
|
if (((per.l(ad:0x403FC000+0x124))&0x08)==0x08)
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "ACK,NACK"
|
|
else
|
|
rgroup.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "ACK,NACK"
|
|
endif
|
|
else
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x00 0. " TXNACK ,Transmit NACK" "No,Yes"
|
|
endif
|
|
wgroup.long 0x160++0x03
|
|
line.long 0x00 "STDR,Slave Transmit Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Transmit data"
|
|
sif (cpuis("S32MTV"))
|
|
rgroup.long 0x170++0x03
|
|
line.long 0x00 "SRDR,Slave Receive Data Register"
|
|
bitfld.long 0x00 15. " SOF ,Start Of Frame" "Not the first data word,First data word"
|
|
bitfld.long 0x00 14. " RXEMPTY ,RX Empty" "Not empty,Empty"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive Data"
|
|
else
|
|
hgroup.long 0x170++0x03
|
|
hide.long 0x00 "SRDR,Slave Receive Data Register"
|
|
in
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "LPSPI (Low Power Serial Peripheral Interface)"
|
|
tree "LPSPI 1"
|
|
base ad:0x40394000
|
|
width 7.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Module identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
sif (cpu()=="IMXRT1051"||cpu()=="IMXRT1052"||cpu()=="IMXRT1021")||cpuis("IMXRT106*")||cpuis("S32K2*")
|
|
hexmask.long.byte 0x04 16.--23. 1. " PCSNUM ,PCS Number"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7"))
|
|
if ((per.l(ad:0x40394000+0x10)&0x01)==0x01)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
rbitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " DOZEN ,LPSPI in Doze mode enable" "LSPI enabled,LSPI disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,LPSPI in Doze mode enable" "LSPI enabled,LSPI disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,Doze mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "SR,Status Register"
|
|
rbitfld.long 0x00 24. " MBF ,Module busy flag" "Idle,Busy"
|
|
eventfld.long 0x00 13. " DMF ,Data match flag" "Not matched,Matched"
|
|
eventfld.long 0x00 12. " REF ,Receive error flag" "No error,Error"
|
|
eventfld.long 0x00 11. " TEF ,Transmit error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 10. " TCF ,Transfer complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 9. " FCF ,Frame complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 8. " WCF ,Word complete flag" "Not completed,Completed"
|
|
rbitfld.long 0x00 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
newline
|
|
rbitfld.long 0x00 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x04 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x04 13. " DMIE ,Data match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TEIE ,Transmit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 9. " FCIE ,Frame complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " WCIE ,Word complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
sif cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 9. " FCDE ,Frame complete DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
sif (cpu()=="IMXRT1021")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
else
|
|
if (((per.l(ad:0x40394000+0x14)&0x100000)==0x100000)||((per.l(ad:0x40394000+0x14)&0x2000)==0x2000))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
rbitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
else
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
sif cpuis("S32K2*")
|
|
bitfld.long 0x00 9. " FCDE ,Frame complete DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x04 9. " RDMO ,Receive data match only" "All data,Match only"
|
|
bitfld.long 0x04 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x04 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x04 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("S32K2*")
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " PCSPOL ,Peripheral chip select polarity" "Low,High,?..."
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
if (((per.l(ad:0x40394000+0x10))&0x01)==0x01)
|
|
if ((per.l(ad:0x40394000+0x24)&0x01)==0x01)
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " AUTOPCS ,Automatic PCS" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
endif
|
|
else
|
|
if ((per.l(ad:0x40394000+0x24)&0x01)==0x01)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word=MATCH1,Any word=MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word=MATCH0 AND 2nd word = MATCH1,Any word=MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " AUTOPCS ,Automatic PCS" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
endif
|
|
endif
|
|
endif
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "DMR0,Data Match Register 0"
|
|
line.long 0x04 "DMR1,Data Match Register 1"
|
|
if ((per.l(ad:0x40394000+0x24)&0x01)==0x01)
|
|
if (((per.l(ad:0x40394000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SCKPCS ,SCK to PCS delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PCSSCK ,PCS to SCK delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DBT ,Delay between transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDIV ,SCK divider"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SCKPCS ,SCK to PCS delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PCSSCK ,PCS to SCK delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DBT ,Delay between transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDIV ,SCK divider"
|
|
endif
|
|
else
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "CCR,Clock Configuration Register"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 16.--19. " RXWATER ,Receive FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " TXWATER ,Transmit FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FSR,FIFO Status Register"
|
|
bitfld.long 0x00 16.--20. " RXCOUNT ,Receive FIFO count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " TXCOUNT ,Transmit FIFO count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif cpuis("IMXRT1021")
|
|
if ((((per.l(ad:0x40394000+0x24))&0x01)==0x01)||((((per.l(ad:0x40394000+0x24))&0x01)==0x00)&&(((per.l(ad:0x40394000+0x14))&0x1000000)==0x0000000)))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
else
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
endif
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
endif
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "TDR,Transmit Data Register"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "RSR,Receive Status Register"
|
|
bitfld.long 0x00 1. " RXEMPTY ,RX FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " SOF ,Start of frame" "Not start,Start of frame"
|
|
hgroup.long 0x74++0x03
|
|
hide.long 0x00 "RDR,Receive Data Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPSPI 2"
|
|
base ad:0x40398000
|
|
width 7.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Module identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
sif (cpu()=="IMXRT1051"||cpu()=="IMXRT1052"||cpu()=="IMXRT1021")||cpuis("IMXRT106*")||cpuis("S32K2*")
|
|
hexmask.long.byte 0x04 16.--23. 1. " PCSNUM ,PCS Number"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7"))
|
|
if ((per.l(ad:0x40398000+0x10)&0x01)==0x01)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
rbitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " DOZEN ,LPSPI in Doze mode enable" "LSPI enabled,LSPI disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,LPSPI in Doze mode enable" "LSPI enabled,LSPI disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,Doze mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "SR,Status Register"
|
|
rbitfld.long 0x00 24. " MBF ,Module busy flag" "Idle,Busy"
|
|
eventfld.long 0x00 13. " DMF ,Data match flag" "Not matched,Matched"
|
|
eventfld.long 0x00 12. " REF ,Receive error flag" "No error,Error"
|
|
eventfld.long 0x00 11. " TEF ,Transmit error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 10. " TCF ,Transfer complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 9. " FCF ,Frame complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 8. " WCF ,Word complete flag" "Not completed,Completed"
|
|
rbitfld.long 0x00 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
newline
|
|
rbitfld.long 0x00 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x04 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x04 13. " DMIE ,Data match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TEIE ,Transmit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 9. " FCIE ,Frame complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " WCIE ,Word complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
sif cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 9. " FCDE ,Frame complete DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
sif (cpu()=="IMXRT1021")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
else
|
|
if (((per.l(ad:0x40398000+0x14)&0x100000)==0x100000)||((per.l(ad:0x40398000+0x14)&0x2000)==0x2000))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
rbitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
else
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
sif cpuis("S32K2*")
|
|
bitfld.long 0x00 9. " FCDE ,Frame complete DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x04 9. " RDMO ,Receive data match only" "All data,Match only"
|
|
bitfld.long 0x04 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x04 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x04 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("S32K2*")
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " PCSPOL ,Peripheral chip select polarity" "Low,High,?..."
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
if (((per.l(ad:0x40398000+0x10))&0x01)==0x01)
|
|
if ((per.l(ad:0x40398000+0x24)&0x01)==0x01)
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " AUTOPCS ,Automatic PCS" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
endif
|
|
else
|
|
if ((per.l(ad:0x40398000+0x24)&0x01)==0x01)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word=MATCH1,Any word=MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word=MATCH0 AND 2nd word = MATCH1,Any word=MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " AUTOPCS ,Automatic PCS" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
endif
|
|
endif
|
|
endif
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "DMR0,Data Match Register 0"
|
|
line.long 0x04 "DMR1,Data Match Register 1"
|
|
if ((per.l(ad:0x40398000+0x24)&0x01)==0x01)
|
|
if (((per.l(ad:0x40398000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SCKPCS ,SCK to PCS delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PCSSCK ,PCS to SCK delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DBT ,Delay between transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDIV ,SCK divider"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SCKPCS ,SCK to PCS delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PCSSCK ,PCS to SCK delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DBT ,Delay between transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDIV ,SCK divider"
|
|
endif
|
|
else
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "CCR,Clock Configuration Register"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 16.--19. " RXWATER ,Receive FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " TXWATER ,Transmit FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FSR,FIFO Status Register"
|
|
bitfld.long 0x00 16.--20. " RXCOUNT ,Receive FIFO count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " TXCOUNT ,Transmit FIFO count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif cpuis("IMXRT1021")
|
|
if ((((per.l(ad:0x40398000+0x24))&0x01)==0x01)||((((per.l(ad:0x40398000+0x24))&0x01)==0x00)&&(((per.l(ad:0x40398000+0x14))&0x1000000)==0x0000000)))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
else
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
endif
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
endif
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "TDR,Transmit Data Register"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "RSR,Receive Status Register"
|
|
bitfld.long 0x00 1. " RXEMPTY ,RX FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " SOF ,Start of frame" "Not start,Start of frame"
|
|
hgroup.long 0x74++0x03
|
|
hide.long 0x00 "RDR,Receive Data Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPSPI 3"
|
|
base ad:0x4039C000
|
|
width 7.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Module identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
sif (cpu()=="IMXRT1051"||cpu()=="IMXRT1052"||cpu()=="IMXRT1021")||cpuis("IMXRT106*")||cpuis("S32K2*")
|
|
hexmask.long.byte 0x04 16.--23. 1. " PCSNUM ,PCS Number"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7"))
|
|
if ((per.l(ad:0x4039C000+0x10)&0x01)==0x01)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
rbitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " DOZEN ,LPSPI in Doze mode enable" "LSPI enabled,LSPI disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,LPSPI in Doze mode enable" "LSPI enabled,LSPI disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,Doze mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "SR,Status Register"
|
|
rbitfld.long 0x00 24. " MBF ,Module busy flag" "Idle,Busy"
|
|
eventfld.long 0x00 13. " DMF ,Data match flag" "Not matched,Matched"
|
|
eventfld.long 0x00 12. " REF ,Receive error flag" "No error,Error"
|
|
eventfld.long 0x00 11. " TEF ,Transmit error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 10. " TCF ,Transfer complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 9. " FCF ,Frame complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 8. " WCF ,Word complete flag" "Not completed,Completed"
|
|
rbitfld.long 0x00 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
newline
|
|
rbitfld.long 0x00 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x04 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x04 13. " DMIE ,Data match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TEIE ,Transmit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 9. " FCIE ,Frame complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " WCIE ,Word complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
sif cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 9. " FCDE ,Frame complete DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
sif (cpu()=="IMXRT1021")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
else
|
|
if (((per.l(ad:0x4039C000+0x14)&0x100000)==0x100000)||((per.l(ad:0x4039C000+0x14)&0x2000)==0x2000))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
rbitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
else
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
sif cpuis("S32K2*")
|
|
bitfld.long 0x00 9. " FCDE ,Frame complete DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x04 9. " RDMO ,Receive data match only" "All data,Match only"
|
|
bitfld.long 0x04 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x04 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x04 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("S32K2*")
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " PCSPOL ,Peripheral chip select polarity" "Low,High,?..."
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
if (((per.l(ad:0x4039C000+0x10))&0x01)==0x01)
|
|
if ((per.l(ad:0x4039C000+0x24)&0x01)==0x01)
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " AUTOPCS ,Automatic PCS" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
endif
|
|
else
|
|
if ((per.l(ad:0x4039C000+0x24)&0x01)==0x01)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word=MATCH1,Any word=MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word=MATCH0 AND 2nd word = MATCH1,Any word=MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " AUTOPCS ,Automatic PCS" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
endif
|
|
endif
|
|
endif
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "DMR0,Data Match Register 0"
|
|
line.long 0x04 "DMR1,Data Match Register 1"
|
|
if ((per.l(ad:0x4039C000+0x24)&0x01)==0x01)
|
|
if (((per.l(ad:0x4039C000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SCKPCS ,SCK to PCS delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PCSSCK ,PCS to SCK delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DBT ,Delay between transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDIV ,SCK divider"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SCKPCS ,SCK to PCS delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PCSSCK ,PCS to SCK delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DBT ,Delay between transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDIV ,SCK divider"
|
|
endif
|
|
else
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "CCR,Clock Configuration Register"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 16.--19. " RXWATER ,Receive FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " TXWATER ,Transmit FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FSR,FIFO Status Register"
|
|
bitfld.long 0x00 16.--20. " RXCOUNT ,Receive FIFO count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " TXCOUNT ,Transmit FIFO count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif cpuis("IMXRT1021")
|
|
if ((((per.l(ad:0x4039C000+0x24))&0x01)==0x01)||((((per.l(ad:0x4039C000+0x24))&0x01)==0x00)&&(((per.l(ad:0x4039C000+0x14))&0x1000000)==0x0000000)))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
else
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
endif
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
endif
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "TDR,Transmit Data Register"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "RSR,Receive Status Register"
|
|
bitfld.long 0x00 1. " RXEMPTY ,RX FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " SOF ,Start of frame" "Not start,Start of frame"
|
|
hgroup.long 0x74++0x03
|
|
hide.long 0x00 "RDR,Receive Data Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPSPI 4"
|
|
base ad:0x403A0000
|
|
width 7.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Module identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
sif (cpu()=="IMXRT1051"||cpu()=="IMXRT1052"||cpu()=="IMXRT1021")||cpuis("IMXRT106*")||cpuis("S32K2*")
|
|
hexmask.long.byte 0x04 16.--23. 1. " PCSNUM ,PCS Number"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7"))
|
|
if ((per.l(ad:0x403A0000+0x10)&0x01)==0x01)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
rbitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " DOZEN ,LPSPI in Doze mode enable" "LSPI enabled,LSPI disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,LPSPI in Doze mode enable" "LSPI enabled,LSPI disabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "CR,Control Register"
|
|
bitfld.long 0x00 9. " RRF ,Reset receive FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 8. " RTF ,Reset transmit FIFO" "No effect,Reset"
|
|
bitfld.long 0x00 3. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DOZEN ,Doze mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " MEN ,Module enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "SR,Status Register"
|
|
rbitfld.long 0x00 24. " MBF ,Module busy flag" "Idle,Busy"
|
|
eventfld.long 0x00 13. " DMF ,Data match flag" "Not matched,Matched"
|
|
eventfld.long 0x00 12. " REF ,Receive error flag" "No error,Error"
|
|
eventfld.long 0x00 11. " TEF ,Transmit error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 10. " TCF ,Transfer complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 9. " FCF ,Frame complete flag" "Not completed,Completed"
|
|
eventfld.long 0x00 8. " WCF ,Word complete flag" "Not completed,Completed"
|
|
rbitfld.long 0x00 1. " RDF ,Receive data flag" "Not ready,Ready"
|
|
newline
|
|
rbitfld.long 0x00 0. " TDF ,Transmit data flag" "Not requested,Requested"
|
|
line.long 0x04 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x04 13. " DMIE ,Data match interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " REIE ,Receive error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TEIE ,Transmit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " TCIE ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 9. " FCIE ,Frame complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " WCIE ,Word complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RDIE ,Receive data interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TDIE ,Transmit data interrupt enable" "Disabled,Enabled"
|
|
sif cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 9. " FCDE ,Frame complete DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
sif (cpu()=="IMXRT1021")
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
else
|
|
if (((per.l(ad:0x403A0000+0x14)&0x100000)==0x100000)||((per.l(ad:0x403A0000+0x14)&0x2000)==0x2000))
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
rbitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x00 9. " RDMO ,Receive data match only" "Stored,Discarded"
|
|
bitfld.long 0x00 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x00 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x00 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
else
|
|
group.long 0x1C++0x07
|
|
line.long 0x00 "DER,DMA Enable Register"
|
|
sif cpuis("S32K2*")
|
|
bitfld.long 0x00 9. " FCDE ,Frame complete DMA enable" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 1. " RDDE ,Receive data DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TDDE ,Transmit data DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x04 9. " RDMO ,Receive data match only" "All data,Match only"
|
|
bitfld.long 0x04 8. " CIRFIFO ,Circular FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " HRSEL ,Host request select" "LPSPI_HREQ pin,Input trigger"
|
|
newline
|
|
bitfld.long 0x04 1. " HRPOL ,Host request polarity" "Active low,Active high"
|
|
bitfld.long 0x04 0. " HREN ,Host request enable" "Disabled,Enabled"
|
|
endif
|
|
sif cpuis("S32K2*")
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " PCSPOL ,Peripheral chip select polarity" "Low,High,?..."
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
if (((per.l(ad:0x403A0000+0x10))&0x01)==0x01)
|
|
if ((per.l(ad:0x403A0000+0x24)&0x01)==0x01)
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = MATCH0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word = MATCH1,Any word = MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " AUTOPCS ,Automatic PCS" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
endif
|
|
else
|
|
if ((per.l(ad:0x403A0000+0x24)&0x01)==0x01)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word = MATCH0 AND 2nd word=MATCH1,Any word=MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SAMPLE ,Sample point" "SCK edge,Delayed SCK edge"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x00 27. " PCSCFG ,Peripheral chip select configuration" "PCS enabled,PCS disabled"
|
|
bitfld.long 0x00 26. " OUTCFG ,Output config" "Retained,Tristated"
|
|
bitfld.long 0x00 24.--25. " PINCFG ,Pin configuration" "SIN for input/SOUT for output,SIN for both,SOUT for both,SOUT for input/SIN for output"
|
|
newline
|
|
bitfld.long 0x00 16.--18. " MATCFG ,Match configuration" "Match disabled,,1st word = match0 OR MATCH1,Any word = MATCH0 OR MATCH1,1st word=MATCH0 AND 2nd word = MATCH1,Any word=MATCH0 AND next word = MATCH1,1st word AND MATCH1 = MATCH0 AND MATCH1,Any word AND MATCH1 = MATCH0 AND MATCH1"
|
|
newline
|
|
bitfld.long 0x00 11. " PCSPOL[3] ,Peripheral chip select 3 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 10. " [2] ,Peripheral chip select 2 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 9. " [1] ,Peripheral chip select 1 polarity" "Active low,Active high"
|
|
bitfld.long 0x00 8. " [0] ,Peripheral chip select 0 polarity" "Active low,Active high"
|
|
newline
|
|
bitfld.long 0x00 3. " NOSTALL ,No stall" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " AUTOPCS ,Automatic PCS" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MASTER ,Master mode" "Slave mode,Master mode"
|
|
endif
|
|
endif
|
|
endif
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "DMR0,Data Match Register 0"
|
|
line.long 0x04 "DMR1,Data Match Register 1"
|
|
if ((per.l(ad:0x403A0000+0x24)&0x01)==0x01)
|
|
if (((per.l(ad:0x403A0000+0x10))&0x01)==0x01)
|
|
rgroup.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SCKPCS ,SCK to PCS delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PCSSCK ,PCS to SCK delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DBT ,Delay between transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDIV ,SCK divider"
|
|
else
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SCKPCS ,SCK to PCS delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PCSSCK ,PCS to SCK delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DBT ,Delay between transfers"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SCKDIV ,SCK divider"
|
|
endif
|
|
else
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "CCR,Clock Configuration Register"
|
|
endif
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 16.--19. " RXWATER ,Receive FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " TXWATER ,Transmit FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "FSR,FIFO Status Register"
|
|
bitfld.long 0x00 16.--20. " RXCOUNT ,Receive FIFO count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0.--4. " TXCOUNT ,Transmit FIFO count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif cpuis("IMXRT1021")
|
|
if ((((per.l(ad:0x403A0000+0x24))&0x01)==0x01)||((((per.l(ad:0x403A0000+0x24))&0x01)==0x00)&&(((per.l(ad:0x403A0000+0x14))&0x1000000)==0x0000000)))
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
else
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
endif
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TCR,Transmit Command Register"
|
|
bitfld.long 0x00 31. " CPOL ,Clock polarity" "Inactive low,Inactive high"
|
|
bitfld.long 0x00 30. " CPHA ,Clock phase" "Capture/change,Change/capture"
|
|
bitfld.long 0x00 27.--29. " PRESCALE ,Prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.long 0x00 24.--25. " PCS ,Peripheral chip select" "LPSPI_PCS[0],LPSPI_PCS[1],LPSPI_PCS[2],LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x00 23. " LSBF ,LSB first" "MSB first,LSB first"
|
|
bitfld.long 0x00 22. " BYSW ,Byte swap" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " CONT ,Continuous transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " CONTC ,Continuing command" "New transfer,Continuing transfer"
|
|
newline
|
|
bitfld.long 0x00 19. " RXMSK ,Receive data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " TXMSK ,Transmit data mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16.--17. " WIDTH ,Transfer width" "Single bit,Two bit,Four bit,?..."
|
|
hexmask.long.word 0x00 0.--11. 1. " FRAMESZ ,Frame size"
|
|
endif
|
|
wgroup.long 0x64++0x03
|
|
line.long 0x00 "TDR,Transmit Data Register"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "RSR,Receive Status Register"
|
|
bitfld.long 0x00 1. " RXEMPTY ,RX FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " SOF ,Start of frame" "Not start,Start of frame"
|
|
hgroup.long 0x74++0x03
|
|
hide.long 0x00 "RDR,Receive Data Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "LPUART (Low Power Universal Asynchronous Receiver/Transmitter)"
|
|
tree "LPUART 1"
|
|
base ad:0x40184000
|
|
width 9.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,Global Register"
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
sif (cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
bitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
bitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
if ((per.b(ad:0x40184000+0x18)&0x8)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
rbitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
rbitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
rbitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
rbitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
rbitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
rbitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
rbitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
rbitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
rbitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
rbitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
rbitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
rbitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
newline
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "DATA,Data Register"
|
|
in
|
|
newline
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MA2 ,Match address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " MA1 ,Match address 1"
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " RTSWATER ,Receive RTS configuration"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)&&(((per.l(ad:0x40184000+0x28))&0x800000)==0x800000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
rbitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
eventfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
bitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021"))
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPUART 2"
|
|
base ad:0x40188000
|
|
width 9.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,Global Register"
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
sif (cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
bitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
bitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
if ((per.b(ad:0x40184000+0x18)&0x8)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
rbitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
rbitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
rbitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
rbitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
rbitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
rbitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
rbitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
rbitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
rbitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
rbitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
rbitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
rbitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
newline
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "DATA,Data Register"
|
|
in
|
|
newline
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MA2 ,Match address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " MA1 ,Match address 1"
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " RTSWATER ,Receive RTS configuration"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)&&(((per.l(ad:0x40184000+0x28))&0x800000)==0x800000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
rbitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
eventfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
bitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021"))
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPUART 3"
|
|
base ad:0x4018C000
|
|
width 9.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,Global Register"
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
sif (cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
bitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
bitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
if ((per.b(ad:0x40184000+0x18)&0x8)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
rbitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
rbitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
rbitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
rbitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
rbitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
rbitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
rbitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
rbitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
rbitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
rbitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
rbitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
rbitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
newline
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "DATA,Data Register"
|
|
in
|
|
newline
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MA2 ,Match address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " MA1 ,Match address 1"
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " RTSWATER ,Receive RTS configuration"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)&&(((per.l(ad:0x40184000+0x28))&0x800000)==0x800000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
rbitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
eventfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
bitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021"))
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPUART 4"
|
|
base ad:0x40190000
|
|
width 9.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,Global Register"
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
sif (cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
bitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
bitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
if ((per.b(ad:0x40184000+0x18)&0x8)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
rbitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
rbitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
rbitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
rbitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
rbitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
rbitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
rbitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
rbitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
rbitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
rbitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
rbitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
rbitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
newline
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "DATA,Data Register"
|
|
in
|
|
newline
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MA2 ,Match address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " MA1 ,Match address 1"
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " RTSWATER ,Receive RTS configuration"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)&&(((per.l(ad:0x40184000+0x28))&0x800000)==0x800000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
rbitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
eventfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
bitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021"))
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPUART 5"
|
|
base ad:0x40194000
|
|
width 9.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,Global Register"
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
sif (cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
bitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
bitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
if ((per.b(ad:0x40184000+0x18)&0x8)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
rbitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
rbitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
rbitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
rbitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
rbitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
rbitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
rbitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
rbitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
rbitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
rbitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
rbitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
rbitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
newline
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "DATA,Data Register"
|
|
in
|
|
newline
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MA2 ,Match address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " MA1 ,Match address 1"
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " RTSWATER ,Receive RTS configuration"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)&&(((per.l(ad:0x40184000+0x28))&0x800000)==0x800000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
rbitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
eventfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
bitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021"))
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPUART 6"
|
|
base ad:0x40198000
|
|
width 9.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,Global Register"
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
sif (cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
bitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
bitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
if ((per.b(ad:0x40184000+0x18)&0x8)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
rbitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
rbitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
rbitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
rbitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
rbitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
rbitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
rbitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
rbitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
rbitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
rbitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
rbitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
rbitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
newline
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "DATA,Data Register"
|
|
in
|
|
newline
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MA2 ,Match address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " MA1 ,Match address 1"
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " RTSWATER ,Receive RTS configuration"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)&&(((per.l(ad:0x40184000+0x28))&0x800000)==0x800000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
rbitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
eventfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
bitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021"))
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPUART 7"
|
|
base ad:0x4019C000
|
|
width 9.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,Global Register"
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
sif (cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
bitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
bitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
if ((per.b(ad:0x40184000+0x18)&0x8)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
rbitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
rbitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
rbitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
rbitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
rbitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
rbitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
rbitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
rbitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
rbitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
rbitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
rbitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
rbitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
newline
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "DATA,Data Register"
|
|
in
|
|
newline
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MA2 ,Match address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " MA1 ,Match address 1"
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " RTSWATER ,Receive RTS configuration"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)&&(((per.l(ad:0x40184000+0x28))&0x800000)==0x800000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
rbitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
eventfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
bitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021"))
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "LPUART 8"
|
|
base ad:0x401A0000
|
|
width 9.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature identification number"
|
|
line.long 0x04 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXFIFO ,Receive FIFO size"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TXFIFO ,Transmit FIFO size"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "GLOBAL,Global Register"
|
|
bitfld.long 0x00 1. " RST ,Software reset" "No reset,Reset"
|
|
sif (cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
else
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "PINCFG,Pin Configuration Register"
|
|
bitfld.long 0x00 0.--1. " TRGSEL ,Trigger select" "Disabled,Instead RXD in,Instead CTS in,TXD out modulation"
|
|
endif
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
bitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
bitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1,2"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
bitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
bitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
else
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "BAUD,Baud Rate Register"
|
|
bitfld.long 0x00 31. " MAEN1 ,Match address mode enable 1" "Normal,Automatic"
|
|
bitfld.long 0x00 30. " MAEN2 ,Match address mode enable 2" "Normal,Automatic"
|
|
rbitfld.long 0x00 29. " M10 ,10-bit mode select" "7/8/9 bit,10 bit"
|
|
newline
|
|
rbitfld.long 0x00 24.--28. " OSR ,Over sampling ratio" "16x,,,4x,5x,6x,7x,8x,9x,10x,11x,12x,13x,14x,15x,16x,17x,18x,19x,20x,21x,22x,23x,24x,25x,26x,27x,28x,29x,30x,31x,32x"
|
|
bitfld.long 0x00 23. " TDMAE ,Transmitter DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RDMAE ,Receiver full DMA enable" "Disabled,Enabled"
|
|
sif (cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*")||cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
elif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 20. " RIDMAE ,Receiver idle DMA enable" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
else
|
|
bitfld.long 0x00 18.--19. " MATCFG ,Match configuration" "Address Match,Idle Match,Match On/Off,RWU Enabled"
|
|
endif
|
|
rbitfld.long 0x00 17. " BOTHEDGE ,Both edge sampling" "Rising,Both"
|
|
rbitfld.long 0x00 16. " RESYNCDIS ,Resynchronization disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 15. " LBKDIE ,LIN break detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RXEDGIE ,RX input active edge interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " SBNS ,Stop bit number select" "1 stop bit,2 stop bits"
|
|
newline
|
|
hexmask.long.word 0x00 0.--12. 1. " SBR ,Baud rate modulo divisor"
|
|
line.long 0x04 "STAT,Status Register"
|
|
eventfld.long 0x04 31. " LBKDIF ,LIN break detect interrupt flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 30. " RXEDGIF ,LPUART_RX pin active edge interrupt flag" "Not occurred,Occurred"
|
|
rbitfld.long 0x04 29. " MSBF ,MSB first" "LSB first,MSB first"
|
|
newline
|
|
sif (cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
rbitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
else
|
|
bitfld.long 0x04 28. " RXINV ,Receive data inversion" "Not inverted,Inverted"
|
|
endif
|
|
rbitfld.long 0x04 27. " RWUID ,Receive wake up idle detect" "Not detected,Detected"
|
|
rbitfld.long 0x04 26. " BRK13 ,Break character generation length" "9-13 bit,12-15 bit"
|
|
newline
|
|
bitfld.long 0x04 25. " LBKDE ,LIN break detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x04 24. " RAF ,Receiver active flag" "Idle,Active"
|
|
rbitfld.long 0x04 23. " TDRE ,Transmit data register empty flag" "Full,Empty"
|
|
newline
|
|
rbitfld.long 0x04 22. " TC ,Transmission complete flag" "Active,Idle"
|
|
rbitfld.long 0x04 21. " RDRF ,Receive data register full flag" "Empty,Full"
|
|
eventfld.long 0x04 20. " IDLE ,Idle line flag" "Not detected,Detected"
|
|
newline
|
|
eventfld.long 0x04 19. " OR ,Receiver overrun flag" "No overrun,Overrun"
|
|
eventfld.long 0x04 18. " NF ,Noise flag" "Not detected,Detected"
|
|
eventfld.long 0x04 17. " FE ,Framing error flag" "No error,Error"
|
|
newline
|
|
eventfld.long 0x04 16. " PF ,Parity error flag" "No error,Error"
|
|
eventfld.long 0x04 15. " MA1F ,Match 1 flag" "Not equal,Equal"
|
|
eventfld.long 0x04 14. " MA2F ,Match 2 flag" "Not equal,Equal"
|
|
endif
|
|
newline
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
if ((per.b(ad:0x40184000+0x18)&0x8)==0x08)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
bitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
bitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
bitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
bitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
bitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
bitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
bitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
bitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
bitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
bitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
bitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
bitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
bitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
bitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
bitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CTRL,Control Register"
|
|
rbitfld.long 0x00 31. " R8T9 ,Receive bit 8 / transmit bit 9" "Low,High"
|
|
rbitfld.long 0x00 30. " R9T8 ,Receive bit 9 / transmit bit 8" "Low,High"
|
|
rbitfld.long 0x00 29. " TXDIR ,LPUART_TX pin direction in Single-Wire mode" "Input,Output"
|
|
newline
|
|
rbitfld.long 0x00 28. " TXINV ,Transmit data inversion" "Not inverted,Inverted"
|
|
rbitfld.long 0x00 27. " ORIE ,Overrun interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 26. " NEIE ,Noise error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 25. " FEIE ,Framing error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 24. " PEIE ,Parity error interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " TIE ,Transmit interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 22. " TCIE ,Transmission complete interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. " RIE ,Receiver interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 20. " ILIE ,Idle line interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RE ,Receiver enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 17. " RWU ,Receiver wakeup control" "Normal,Standby"
|
|
newline
|
|
rbitfld.long 0x00 16. " SBK ,Send break" "Normal,Send break"
|
|
rbitfld.long 0x00 15. " MA1IE ,Match 1 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 14. " MA2IE ,Match 2 interrupt enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 11. " M7 ,7-Bit Mode Select" "8/9/10 bit,7 bit"
|
|
newline
|
|
rbitfld.long 0x00 8.--10. " IDLECFG ,Idle configuration" "1 char,2 chars,4 chars,8 chars,16 chars,32 chars,64 chars,128 chars"
|
|
rbitfld.long 0x00 7. " LOOPS ,Loop mode select" "Normal,Loop"
|
|
rbitfld.long 0x00 6. " DOZEEN ,LPUART in Doze mode enabled" "LPUART enabled,LPUART disabled"
|
|
newline
|
|
rbitfld.long 0x00 5. " RSRC ,Receiver source select" "Disconnected,Connected"
|
|
rbitfld.long 0x00 4. " M ,9-bit or 8-bit mode select" "8 bit,9 bit"
|
|
rbitfld.long 0x00 3. " WAKE ,Receiver wakeup method select" "Idle-line,Address-mark"
|
|
newline
|
|
rbitfld.long 0x00 2. " ILT ,Idle line type select" "Start bit,Stop bit"
|
|
rbitfld.long 0x00 1. " PE ,Parity enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 0. " PT ,Parity type" "Even,Odd"
|
|
endif
|
|
newline
|
|
hgroup.long 0x1C++0x03
|
|
hide.long 0x00 "DATA,Data Register"
|
|
in
|
|
newline
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MATCH,Match Address Register"
|
|
hexmask.long.word 0x00 16.--25. 1. " MA2 ,Match address 2"
|
|
hexmask.long.word 0x00 0.--9. 1. " MA1 ,Match address 1"
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021")||cpuis("IMX8Q")||cpuis("IMX8Q-*")||cpuis("IMX8QM*")||cpuis("IMX8QP*"))
|
|
if (((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x40000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
elif (((per.l(ad:0x40184000+0x18))&0xC0000)==0x80000)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
rbitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
rbitfld.long 0x00 8.--9. " RTSWATER ,Receive RTS configuration" "0,1,2,3"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
rbitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "MODIR,Modem IrDA Register"
|
|
bitfld.long 0x00 18. " IREN ,Infrared enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " TNP ,Transmitter narrow pulse" "1/OSR,2/OSR,3/OSR,4/OSR"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " RTSWATER ,Receive RTS configuration"
|
|
bitfld.long 0x00 5. " TXCTSSRC ,Transmit CTS source" "CTS_B pin,Inverted Receiver Match"
|
|
newline
|
|
bitfld.long 0x00 4. " TXCTSC ,Transmit CTS configuration" "At start,At idle"
|
|
bitfld.long 0x00 3. " RXRTSE ,Receiver request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TXRTSPOL ,Transmitter request-to-send polarity" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. " TXRTSE ,Transmitter request-to-send enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TXCTSE ,Transmitter clear-to-send enable" "Disabled,Enabled"
|
|
endif
|
|
if ((((per.l(ad:0x40184000+0x18))&0xC0000)==0x00)&&(((per.l(ad:0x40184000+0x28))&0x800000)==0x800000))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
rbitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
rbitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
eventfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
else
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "FIFO,FIFO Register"
|
|
bitfld.long 0x00 23. " TXEMPT ,Transmit Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 22. " RXEMPT ,Receive Buffer/FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " TXOF ,Transmitter buffer overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x00 16. " RXUF ,Receiver buffer underflow flag" "No underflow,Underflow"
|
|
newline
|
|
bitfld.long 0x00 15. " TXFLUSH ,Transmit FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 14. " RXFLUSH ,Receive FIFO/Buffer flush" "No effect,Flush"
|
|
bitfld.long 0x00 10.--12. " RXIDEN ,Receiver idle empty enable" "Disabled,1,2,4,8,16,32,64"
|
|
bitfld.long 0x00 9. " TXOFE ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. " RXUFE ,Receive FIFO underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " TXFIFOSIZE ,Transmit FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 3. " RXFE ,Receive FIFO enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--2. " RXFIFOSIZE ,Receive FIFO buffer depth (datawords)" "1,4,8,16,32,64,128,256"
|
|
endif
|
|
sif (cpuis("S32MTV")||cpuis("IMX7ULP-CM4")||cpuis("IMX7ULP-CA7")||cpuis("IMXRT1021"))
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
bitfld.long 0x00 24.--26. " RXCOUNT ,Receive counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--17. " RXWATER ,Receive watermark" "0,1,2,3"
|
|
bitfld.long 0x00 8.--10. " TXCOUNT ,Transmit counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " TXWATER ,Transmit watermark" "0,1,2,3"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40184000+0x18))&0x80000)==0x80000)
|
|
rgroup.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "WATER,Watermark Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXCOUNT ,Receive counter"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXWATER ,Receive watermark"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXCOUNT ,Transmit counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXWATER ,Transmit watermark"
|
|
endif
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "OCOTP (On-Chip OTP Controller)"
|
|
base ad:0x401F4000
|
|
width 20.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "CTRL,OTP Controller Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " WR_UNLOCK ,Write 0x3E77 to enable OTP write accesses"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " RELOAD_SHADOWS_SET/CLR ,Force re-loading the shadow registers" "Not forced,Forced"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ERROR_SET/CLR ,Access to a locked region request" "Not requested,Requested"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " BUSY ,OTP controller status" "Not busy,Busy"
|
|
bitfld.long 0x00 0.--5. " ADDR ,OTP write and read access address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "CTRL_SET,OTP Controller Control Set Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " WR_UNLOCK ,Write 0x3E77 to enable OTP write accesses"
|
|
rbitfld.long 0x00 8. " BUSY ,OTP controller status" "Not busy,Busy"
|
|
bitfld.long 0x04 0.--5. " ADDR ,OTP write and read access address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x08 "CTRL_CLR,OTP Controller Control Clear Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " WR_UNLOCK ,Write 0x3E77 to enable OTP write accesses"
|
|
rbitfld.long 0x00 8. " BUSY ,OTP controller status" "Not busy,Busy"
|
|
bitfld.long 0x08 0.--5. " ADDR ,OTP write and read access address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x0C "CTRL_TOG,OTP Controller Control Toggle Register"
|
|
hexmask.long.word 0x0C 16.--31. 1. " WR_UNLOCK ,Write 0x3E77 to enable OTP write accesses"
|
|
bitfld.long 0x0C 10. " RELOAD_SHADOWS ,Force re-loading the shadow registers" "Not forced,Forced"
|
|
bitfld.long 0x0C 9. " ERROR ,Access to a locked region request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0C 8. " BUSY ,OTP controller status" "Not busy,Busy"
|
|
bitfld.long 0x0C 0.--5. " ADDR ,OTP write and read access address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x10 "TIMING,OTP Controller Timing Register"
|
|
bitfld.long 0x10 22.--27. " WAIT ,Time interval between auto read and write access in one time program" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x10 16.--21. " STROBE_READ ,Strobe period in one time read OTP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x10 12.--15. " RELAX ,Time to add to all default timing parameters other than the Tpgm and Trd" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--11. 1. " STROBE_PROG ,Strobe period in one time write OTP"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DATA,OTP Controller Write Data Register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "READ_CTRL,OTP Controller Write Data Register"
|
|
bitfld.long 0x00 0. " READ_FUSE ,Used to initiate a read to OTP" "No read,Read"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "READ_FUSE_DATA,OTP Controller Read Data Register"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "SW_STICKY,Sticky Bit Register"
|
|
bitfld.long 0x00 4. " JTAG_BLOCK_RELEASE ,JTAG block release" "Blocked,Not blocked"
|
|
bitfld.long 0x00 3. " BLOCK_ROM_PART ,Hide secret part of boot ROM" "Not hidden,Hidden"
|
|
bitfld.long 0x00 2. " FIELD_RETURN_LOCK ,Shadow register write and OTP write lock for FIELD_RETURN region" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SRK_REVOKE_LOCK ,Shadow register write and OTP write lock for SRK_REVOKE region" "Unlocked,Locked"
|
|
bitfld.long 0x00 0. " BLOCK_DTCP_KEY ,Shadow register read and OTP read lock for DTCP_KEY region" "Unlocked,Locked"
|
|
group.long 0x60++0x0F
|
|
line.long 0x00 "SCS,Software Controllable Signals Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " LOCK_SET/CLR ,All of the bits in this register are locked and can not be changed through SW programming" "Unlocked,Locked"
|
|
hexmask.long 0x00 1.--30. 1. " SPARE ,Unallocated read/write bits for implementation specific software use"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HAB_JDE_SET/CLR ,HAB JTAG debug enable" "Disabled,Enabled"
|
|
line.long 0x04 "SCS_SET,Software Controllable Signals Set Register"
|
|
hexmask.long 0x04 1.--30. 1. " SPARE ,Unallocated read/write bits for implementation specific software use"
|
|
line.long 0x08 "SCS_CLR,Software Controllable Signals Clear Register"
|
|
hexmask.long 0x08 1.--30. 1. " SPARE ,Unallocated read/write bits for implementation specific software use"
|
|
line.long 0x0C "SCS_TOG,Software Controllable Signals Toggle Register"
|
|
bitfld.long 0x0C 31. " LOCK ,All of the bits in this register are locked and can not be changed through SW programming" "Unlocked,Locked"
|
|
hexmask.long 0x0C 1.--30. 1. " SPARE ,Unallocated read/write bits for implementation specific software use"
|
|
bitfld.long 0x0C 0. " HAB_JDE ,HAB JTAG debug enable" "Disabled,Enabled"
|
|
sif cpuis("IMXRT106*")
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "CRC_ADDR,OTP Controller CRC test address"
|
|
bitfld.long 0x00 24. " OTPMK_CRC ,OTPMK_CRC" "0,1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CRC_ADDR ,CRC_ADDR"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA_END_ADDR ,DATA_END_ADDR"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA_START_ADDR ,DATA_START_ADDR"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "CRC_VALUE,OTP Controller CRC Value Register"
|
|
endif
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "VERSION,OTP Controller Version Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Fixed read-only value reflecting the MAJOR field of the RTL version"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Fixed read-only value reflecting the MINOR field of the RTL version"
|
|
hexmask.long.word 0x00 0.--15. 1. " STEP ,Fixed read-only value reflecting the stepping of the RTL version"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "TIMING2,OTP Controller Timing Register 2"
|
|
sif !cpuis("IMXRT106*")
|
|
hexmask.long.byte 0x00 22.--28. 1. " RELAX1 ,Time interval between auto read and write access in one time program"
|
|
endif
|
|
bitfld.long 0x00 16.--21. " RELAX_READ ,Strobe period in one time read OTP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 0.--11. 1. " RELAX_PROG ,Strobe period in one time write OTP"
|
|
textline " "
|
|
rgroup.long 0x400++0x03
|
|
line.long 0x00 "LOCK,Value Of OTP Bank0 Word0"
|
|
bitfld.long 0x00 26.--27. " GP3 ,Status of shadow register and OTP write lock for gp3 region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
textline " "
|
|
sif cpuis("IMXRT106*")
|
|
bitfld.long 0x00 24.--25. " GP4 ,Status of shadow register and OTP write lock for gp4 region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 23. " SW_GP2_RLOCK ,Status of shadow register and OTP read lock for sw_gp2 region" "Not blocked,Blocked"
|
|
bitfld.long 0x00 22. " MISC_CONF ,Status of shadow register and OTP write lock for misc_conf region" "Not blocked,Blocked"
|
|
bitfld.long 0x00 21. " SW_GP2_LOCK ,Status of shadow register and OTP write lock for sw_gp2 region" "Not blocked,Blocked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " OTPMK_CRC ,Status of shadow register and OTP write lock for otpmk_crc region" "Not blocked,Blocked"
|
|
bitfld.long 0x00 18.--19. " ANALOG ,Status of shadow register and OTP write lock for analog region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
textline " "
|
|
bitfld.long 0x00 17. " OTPMK_LSB ,Status of shadow register read and write, OTP read and write lock for otpmk region" "Not blocked,Blocked"
|
|
bitfld.long 0x00 16. " SW_GP1 ,Status of shadow register and OTP write lock for sw_gp1 region" "Not blocked,Blocked"
|
|
bitfld.long 0x00 15. " OTPMK_MSB ,Status of shadow register read and write, OTP read and write lock for otpmk region (MSB)" "Not blocked,Blocked"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GP2 ,Status of shadow register and OTP write lock for gp2 region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " GP1 ,Status of shadow register and OTP write lock for gp1 region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " MAC_ADDR ,Status of shadow register and OTP write lock for mac_addr region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
textline " "
|
|
sif cpuis("IMXRT106*")
|
|
bitfld.long 0x00 7. " GP4_RLOCK ,GP4_RLOCK" "0,1"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 6. " SJC_RESP ,Status of shadow register read and write, OTP read and write lock for sjc_resp region" "Not blocked,Blocked"
|
|
bitfld.long 0x00 4.--5. " MEM_TRIM ,Status of shadow register and OTP write lock for mem_trim region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " BOOT_CFG ,Status of shadow register and OTP write lock for boot_cfg region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " TESTER ,Status of shadow register and OTP write lock for tester region" ",OTP fuse word blocked,Shadow reg blocked,?..."
|
|
textline " "
|
|
if (((per.l(ad:0x401F4000+0x400))&0x2)==0x0)
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG0,Value of OTP Bank0 Word 1 (Configuration and Manufacturing Info.)"
|
|
else
|
|
rgroup.long 0x410++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG0,Value of OTP Bank0 Word 1 (Configuration and Manufacturing Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x2)==0x0)
|
|
group.long 0x420++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG1,Value of OTP Bank0 Word 2 (Configuration and Manufacturing Info.)"
|
|
else
|
|
rgroup.long 0x420++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG1,Value of OTP Bank0 Word 2 (Configuration and Manufacturing Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x2)==0x0)
|
|
group.long 0x430++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG2,Value of OTP Bank0 Word 3 (Configuration and Manufacturing Info.)"
|
|
else
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG2,Value of OTP Bank0 Word 3 (Configuration and Manufacturing Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x2)==0x0)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG3,Value of OTP Bank0 Word 4 (Configuration and Manufacturing Info.)"
|
|
else
|
|
rgroup.long 0x440++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG3,Value of OTP Bank0 Word 4 (Configuration and Manufacturing Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x2)==0x0)
|
|
group.long 0x450++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG4,Value of OTP Bank0 Word 5 (Configuration and Manufacturing Info.)"
|
|
else
|
|
rgroup.long 0x450++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG4,Value of OTP Bank0 Word 5 (Configuration and Manufacturing Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x2)==0x0)
|
|
group.long 0x460++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG5,Value of OTP Bank0 Word 6 (Configuration and Manufacturing Info.)"
|
|
else
|
|
rgroup.long 0x460++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG5,Value of OTP Bank0 Word 6 (Configuration and Manufacturing Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x2)==0x0)
|
|
group.long 0x470++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG6,Value of OTP Bank0 Word 7 (Configuration and Manufacturing Info.)"
|
|
else
|
|
rgroup.long 0x470++0x03
|
|
line.long 0x00 "HW_OCOTP_CFG6,Value of OTP Bank0 Word 7 (Configuration and Manufacturing Info.)"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x401F4000+0x400))&0x20)==0x0)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM0,Value of OTP Bank1 Word 0 (Memory Related Info.)"
|
|
else
|
|
rgroup.long 0x480++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM0,Value of OTP Bank1 Word 0 (Memory Related Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x20)==0x0)
|
|
group.long 0x490++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM1,Value of OTP Bank1 Word 1 (Memory Related Info.)"
|
|
else
|
|
rgroup.long 0x490++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM1,Value of OTP Bank1 Word 1 (Memory Related Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x20)==0x0)
|
|
group.long 0x4A0++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM2,Value of OTP Bank1 Word 2 (Memory Related Info.)"
|
|
else
|
|
rgroup.long 0x4A0++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM2,Value of OTP Bank1 Word 2 (Memory Related Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x20)==0x0)
|
|
group.long 0x4B0++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM3,Value of OTP Bank1 Word 3 (Memory Related Info.)"
|
|
else
|
|
rgroup.long 0x4B0++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM3,Value of OTP Bank1 Word 3 (Memory Related Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x20)==0x0)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM4,Value of OTP Bank1 Word 4 (Memory Related Info.)"
|
|
else
|
|
rgroup.long 0x4C0++0x03
|
|
line.long 0x00 "HW_OCOTP_MEM4,Value of OTP Bank1 Word 4 (Memory Related Info.)"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x401F4000+0x400))&0x80000)==0x0)
|
|
group.long 0x4D0++0x3
|
|
line.long 0x00 "HW_OCOTP_ANA0,Value of OTP Bank1 Word 5 (Analog Info.)"
|
|
else
|
|
rgroup.long 0x4D0++0x3
|
|
line.long 0x00 "HW_OCOTP_ANA0,Value of OTP Bank1 Word 5 (Analog Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x80000)==0x0)
|
|
group.long 0x4E0++0x3
|
|
line.long 0x00 "HW_OCOTP_ANA1,Value of OTP Bank1 Word 6 (Analog Info.)"
|
|
else
|
|
rgroup.long 0x4E0++0x3
|
|
line.long 0x00 "HW_OCOTP_ANA1,Value of OTP Bank1 Word 6 (Analog Info.)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x80000)==0x0)
|
|
group.long 0x4F0++0x3
|
|
line.long 0x00 "HW_OCOTP_ANA2,Value of OTP Bank1 Word 7 (Analog Info.)"
|
|
else
|
|
rgroup.long 0x4F0++0x3
|
|
line.long 0x00 "HW_OCOTP_ANA2,Value of OTP Bank1 Word 7 (Analog Info.)"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x401F4000+0x400))&0x4000)==0x0)
|
|
group.long 0x580++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK0,Shadow Register for OTP Bank3 Word 0 (SRK Hash)"
|
|
else
|
|
rgroup.long 0x580++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK0,Shadow Register for OTP Bank3 Word 0 (SRK Hash)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x4000)==0x0)
|
|
group.long 0x590++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK1,Shadow Register for OTP Bank3 Word 1 (SRK Hash)"
|
|
else
|
|
rgroup.long 0x590++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK1,Shadow Register for OTP Bank3 Word 1 (SRK Hash)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x4000)==0x0)
|
|
group.long 0x5A0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK2,Shadow Register for OTP Bank3 Word 2 (SRK Hash)"
|
|
else
|
|
rgroup.long 0x5A0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK2,Shadow Register for OTP Bank3 Word 2 (SRK Hash)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x4000)==0x0)
|
|
group.long 0x5B0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK3,Shadow Register for OTP Bank3 Word 3 (SRK Hash)"
|
|
else
|
|
rgroup.long 0x5B0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK3,Shadow Register for OTP Bank3 Word 3 (SRK Hash)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x4000)==0x0)
|
|
group.long 0x5C0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK4,Shadow Register for OTP Bank3 Word 4 (SRK Hash)"
|
|
else
|
|
rgroup.long 0x5C0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK4,Shadow Register for OTP Bank3 Word 4 (SRK Hash)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x4000)==0x0)
|
|
group.long 0x5D0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK5,Shadow Register for OTP Bank3 Word 5 (SRK Hash)"
|
|
else
|
|
rgroup.long 0x5D0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK5,Shadow Register for OTP Bank3 Word 5 (SRK Hash)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x4000)==0x0)
|
|
group.long 0x5E0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK6,Shadow Register for OTP Bank3 Word 6 (SRK Hash)"
|
|
else
|
|
rgroup.long 0x5E0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK6,Shadow Register for OTP Bank3 Word 6 (SRK Hash)"
|
|
endif
|
|
if (((per.l(ad:0x401F4000+0x400))&0x4000)==0x0)
|
|
group.long 0x5F0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK7,Shadow Register for OTP Bank3 Word 7 (SRK Hash)"
|
|
else
|
|
rgroup.long 0x5F0++0x3
|
|
line.long 0x00 "HW_OCOTP_SRK7,Shadow Register for OTP Bank3 Word 7 (SRK Hash)"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x401F4000+0x400))&0x40)==0x0)
|
|
group.long 0x600++0x3
|
|
line.long 0x00 "HW_OCOTP_SJC_RESP0,Value of OTP Bank4 Word 0 (Secure JTAG Response Field)"
|
|
group.long 0x610++0x3
|
|
line.long 0x00 "HW_OCOTP_SJC_RESP1,Value of OTP Bank4 Word 1 (Secure JTAG Response Field)"
|
|
else
|
|
hgroup.long 0x600++0x3
|
|
hide.long 0x00 "HW_OCOTP_SJC_RESP0,Value of OTP Bank4 Word 0 (Secure JTAG Response Field)"
|
|
in
|
|
hgroup.long 0x610++0x3
|
|
hide.long 0x00 "HW_OCOTP_SJC_RESP1,Value of OTP Bank4 Word 1 (Secure JTAG Response Field)"
|
|
in
|
|
endif
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "MAC0,Value Of OTP Bank4 Word 2 (MAC Address)"
|
|
group.long 0x630++0x03
|
|
line.long 0x00 "MAC1,Value Of OTP Bank4 Word 3 (MAC Address)"
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "GP3,Value Of OTP Bank4 Word 4 (MAC Address)"
|
|
group.long 0x660++0x03
|
|
line.long 0x00 "GP1,Value Of OTP Bank4 Word 6 (General Purpose Customer Defined Info)"
|
|
group.long 0x670++0x03
|
|
line.long 0x00 "GP2,Value Of OTP Bank4 Word 7 (General Purpose Customer Defined Info)"
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "SW_GP1,Value Of OTP Bank5 Word 0 (SW GP1)"
|
|
group.long 0x690++0x03
|
|
line.long 0x00 "SW_GP20,Value Of OTP Bank5 Word 1 (SW GP2)"
|
|
group.long 0x6A0++0x03
|
|
line.long 0x00 "SW_GP21,Value Of OTP Bank5 Word 2 (SW GP2)"
|
|
group.long 0x6B0++0x03
|
|
line.long 0x00 "SW_GP22,Value Of OTP Bank5 Word 3 (SW GP2)"
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "SW_GP23,Value Of OTP Bank5 Word 4 (SW GP2)"
|
|
group.long 0x6D0++0x03
|
|
line.long 0x00 "MISC_CONF0,Value Of OTP Bank5 Word 5 (Misc Conf)"
|
|
group.long 0x6E0++0x03
|
|
line.long 0x00 "MISC_CONF1,Value Of OTP Bank5 Word 6 (Misc Conf)"
|
|
group.long 0x6F0++0x03
|
|
line.long 0x00 "SRK_REVOKE,Value Of OTP Bank5 Word 7 (SRK Revoke)"
|
|
sif cpuis("IMXRT106*")
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "ROM_PATCH0,Value of OTP Bank6 Word0 (ROM Patch)"
|
|
group.long 0x810++0x03
|
|
line.long 0x00 "ROM_PATCH1,Value of OTP Bank6 Word1 (ROM Patch)"
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "ROM_PATCH2,Value of OTP Bank6 Word2 (ROM Patch)"
|
|
group.long 0x830++0x03
|
|
line.long 0x00 "ROM_PATCH3,Value of OTP Bank6 Word3 (ROM Patch)"
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "ROM_PATCH4,Value of OTP Bank6 Word4 (ROM Patch)"
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "ROM_PATCH5,Value of OTP Bank6 Word5 (ROM Patch)"
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "ROM_PATCH6,Value of OTP Bank6 Word6 (ROM Patch)"
|
|
group.long 0x870++0x03
|
|
line.long 0x00 "ROM_PATCH7,Value of OTP Bank6 Word7 (ROM Patch)"
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "GP30,Value of OTP Bank7 Word0 (GP3)"
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "GP31,Value of OTP Bank7 Word1 (GP3)"
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "GP32,Value of OTP Bank7 Word2 (GP3)"
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "GP33,Value of OTP Bank7 Word3 (GP3)"
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "GP40,Value of OTP Bank7 Word4 (GP4)"
|
|
group.long 0x8D0++0x03
|
|
line.long 0x00 "GP41,Value of OTP Bank7 Word5 (GP4)"
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "GP42,Value of OTP Bank7 Word6 (GP4)"
|
|
group.long 0x8F0++0x03
|
|
line.long 0x00 "GP43,Value of OTP Bank7 Word7 (GP4)"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PIT (Periodic Interrupt Timer)"
|
|
base ad:0x40084000
|
|
width 9.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MCR,PIT Module Control Register"
|
|
bitfld.long 0x00 1. " MDIS ,Module disable - (PIT section)" "No,Yes"
|
|
bitfld.long 0x00 0. " FRZ ,Freeze" "Disabled,Enabled"
|
|
rgroup.long 0xE0++0x07
|
|
line.long 0x00 "LTMR64H,PIT Upper Lifetime Timer Register"
|
|
line.long 0x04 "LTMR64L,PIT Lower Lifetime Timer Register"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "LDVAL0,Timer Load Value Register 0"
|
|
rgroup.long (0x100+0x04)++0x03
|
|
line.long 0x00 "CVAL0,Current Timer Value Register 0"
|
|
group.long (0x100+0x08)++0x07
|
|
line.long 0x00 "TCTRL0,Timer Control Register 0"
|
|
sif !cpuis("IMXRT106*")
|
|
bitfld.long 0x00 2. " CHN ,Chain mode" "Not chained,Chained"
|
|
bitfld.long 0x00 1. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "TFLG0,Timer Flag Register 0"
|
|
sif !cpuis("IMXRT106*")
|
|
eventfld.long 0x04 0. " TIF ,Timer interrupt flag" "Not occurred,Occurred"
|
|
endif
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "LDVAL1,Timer Load Value Register 1"
|
|
rgroup.long (0x110+0x04)++0x03
|
|
line.long 0x00 "CVAL1,Current Timer Value Register 1"
|
|
group.long (0x110+0x08)++0x07
|
|
line.long 0x00 "TCTRL1,Timer Control Register 1"
|
|
sif !cpuis("IMXRT106*")
|
|
bitfld.long 0x00 2. " CHN ,Chain mode" "Not chained,Chained"
|
|
bitfld.long 0x00 1. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "TFLG1,Timer Flag Register 1"
|
|
sif !cpuis("IMXRT106*")
|
|
eventfld.long 0x04 0. " TIF ,Timer interrupt flag" "Not occurred,Occurred"
|
|
endif
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "LDVAL2,Timer Load Value Register 2"
|
|
rgroup.long (0x120+0x04)++0x03
|
|
line.long 0x00 "CVAL2,Current Timer Value Register 2"
|
|
group.long (0x120+0x08)++0x07
|
|
line.long 0x00 "TCTRL2,Timer Control Register 2"
|
|
sif !cpuis("IMXRT106*")
|
|
bitfld.long 0x00 2. " CHN ,Chain mode" "Not chained,Chained"
|
|
bitfld.long 0x00 1. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "TFLG2,Timer Flag Register 2"
|
|
sif !cpuis("IMXRT106*")
|
|
eventfld.long 0x04 0. " TIF ,Timer interrupt flag" "Not occurred,Occurred"
|
|
endif
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "LDVAL3,Timer Load Value Register 3"
|
|
rgroup.long (0x130+0x04)++0x03
|
|
line.long 0x00 "CVAL3,Current Timer Value Register 3"
|
|
group.long (0x130+0x08)++0x07
|
|
line.long 0x00 "TCTRL3,Timer Control Register 3"
|
|
sif !cpuis("IMXRT106*")
|
|
bitfld.long 0x00 2. " CHN ,Chain mode" "Not chained,Chained"
|
|
bitfld.long 0x00 1. " TIE ,Timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TEN ,Timer enable" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "TFLG3,Timer Flag Register 3"
|
|
sif !cpuis("IMXRT106*")
|
|
eventfld.long 0x04 0. " TIF ,Timer interrupt flag" "Not occurred,Occurred"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "PMU (Power Management Unit)"
|
|
base ad:0x400D8000
|
|
width 14.
|
|
group.long 0x110++0x6F
|
|
line.long 0x00 "REG_1P1,Regulator 1P1 Register"
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SELREF_WEAK_LINREG_SET/CLR ,Selects the source for the reference voltage of the weak 1p1 regulator" "Low power bandgap,VDD_SOC_CAP"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " ENABLE_WEAK_LINREG_SET/CLR ,Enables the weak 1p1 regulator" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " OK_VDD1P1_SET/CLR ,Status bit that signals when the regulator output is ok" "Not ok,Ok"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " BO_VDD1P1_SET/CLR ,Status bit that signals when a brownout is detected on the regulator output" "Not detected,Detected"
|
|
bitfld.long 0x00 8.--12. " OUTPUT_TRG ,Control bits to adjust the regulator output voltage" ",,,,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225V,1.250V,1.1275V,1.3V,1.325V,1.350V,1.375V,?..."
|
|
bitfld.long 0x00 4.--6. " BO_OFFSET ,Control bits to adjust the regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " ENABLE_PULLDOWN_SET/CLR ,Control bit to enable the pull-down circuitry in the regulator" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " ENABLE_ILIMIT_SET/CLR ,Control bit to enable the current-limit circuitry in the regulator" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " ENABLE_BO_SET/CLR ,Control bit to enable the brownout circuitry in the regulator" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " ENABLE_LINREG_SET/CLR ,Control bit to enable the regulator output" "Disabled,Enabled"
|
|
line.long 0x04 "REG_1P1_SET,Regulator 1P1 Register"
|
|
bitfld.long 0x04 8.--12. " OUTPUT_TRG ,Control bits to adjust the regulator output voltage" ",,,,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225V,1.250V,1.1275V,1.3V,1.325V,1.350V,1.375V,?..."
|
|
bitfld.long 0x04 4.--6. " BO_OFFSET ,Control bits to adjust the regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
line.long 0x08 "REG_1P1_CLR,Regulator 1P1 Register"
|
|
bitfld.long 0x08 8.--12. " OUTPUT_TRG ,Control bits to adjust the regulator output voltage" ",,,,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225V,1.250V,1.1275V,1.3V,1.325V,1.350V,1.375V,?..."
|
|
bitfld.long 0x08 4.--6. " BO_OFFSET ,Control bits to adjust the regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
line.long 0x0C "REG_1P1_TOG,Regulator 1P1 Register"
|
|
bitfld.long 0x0C 19. " SELREF_WEAK_LINREG ,Selects the source for the reference voltage of the weak 1p1 regulator" "Low power bandgap,VDD_SOC_CAP"
|
|
bitfld.long 0x0C 18. " ENABLE_WEAK_LINREG ,Enables the weak 1p1 regulator" "Disabled,Enabled"
|
|
rbitfld.long 0x0C 17. " OK_VDD1P1 ,Status bit that signals when the regulator output is ok" "Not ok,Ok"
|
|
textline " "
|
|
rbitfld.long 0x0C 16. " BO_VDD1P1 ,Status bit that signals when a brownout is detected on the regulator output" "Not detected,Detected"
|
|
bitfld.long 0x0C 8.--12. " OUTPUT_TRG ,Control bits to adjust the regulator output voltage" ",,,,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225V,1.250V,1.1275V,1.3V,1.325V,1.350V,1.375V,?..."
|
|
bitfld.long 0x0C 4.--6. " BO_OFFSET ,Control bits to adjust the regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " ENABLE_PULLDOWN ,Control bit to enable the pull-down circuitry in the regulator" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " ENABLE_ILIMIT ,Control bit to enable the current-limit circuitry in the regulator" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " ENABLE_BO ,Control bit to enable the brownout circuitry in the regulator" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " ENABLE_LINREG ,Control bit to enable the regulator output" "Disabled,Enabled"
|
|
line.long 0x10 "REG_3P0,Regulator 3P0 Register"
|
|
setclrfld.long 0x10 17. 0x14 17. 0x18 17. " OK_VDD3P0_SET/CLR ,Regulator output is ok" "Not ok,Ok"
|
|
setclrfld.long 0x10 16. 0x14 16. 0x18 16. " BO_VDD3P0_SET/CLR ,Brownout detected on the regulator output" "Not detected,Detected"
|
|
bitfld.long 0x10 8.--12. " OUTPUT_TRG ,Regulator output voltage" "2.625V,2.650V,2.675V,2.7V,2.725V,2.750V,2.775V,2.8V,2.825V,2.850V,2.875V,2.9V,2.925V,2.950V,2.975V,3.000V,3.025V,3.050V,3.075V,3.1V,3.125V,3.150V,3.175V,3.2V,3.225V,3.250V,3.275V,3.3V,3.325V,3.350V,3.375V,3.400V"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x14 7. 0x18 7. " VBUS_SEL_SET/CLR ,Input voltage source for LDO_3P0" "USB_OTG2_VBUS,USB_OTG1_VBUS"
|
|
bitfld.long 0x10 4.--6. " BO_OFFSET ,Regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
setclrfld.long 0x10 2. 0x14 2. 0x18 2. " ENABLE_ILIMIT_SET/CLR ,Enable current-limit circuitry in the regulator" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x14 1. 0x18 1. " ENABLE_BO_SET/CLR ,Enable the brownout circuitry in the regulator" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x14 0. 0x18 0. " ENABLE_LINREG_SET/CLR ,Enable the regulator output to be set by the programmed target voltage setting and internal bandgap reference" "Disabled,Enabled"
|
|
line.long 0x14 "REG_3P0_SET,Regulator 3P0 Register"
|
|
bitfld.long 0x14 8.--12. " OUTPUT_TRG ,Regulator output voltage" "2.625V,2.650V,2.675V,2.7V,2.725V,2.750V,2.775V,2.8V,2.825V,2.850V,2.875V,2.9V,2.925V,2.950V,2.975V,3.000V,3.025V,3.050V,3.075V,3.1V,3.125V,3.150V,3.175V,3.2V,3.225V,3.250V,3.275V,3.3V,3.325V,3.350V,3.375V,3.400V"
|
|
bitfld.long 0x14 4.--6. " BO_OFFSET ,Regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
line.long 0x18 "REG_3P0_CLR,Regulator 3P0 Register"
|
|
bitfld.long 0x18 8.--12. " OUTPUT_TRG ,Regulator output voltage" "2.625V,2.650V,2.675V,2.7V,2.725V,2.750V,2.775V,2.8V,2.825V,2.850V,2.875V,2.9V,2.925V,2.950V,2.975V,3.000V,3.025V,3.050V,3.075V,3.1V,3.125V,3.150V,3.175V,3.2V,3.225V,3.250V,3.275V,3.3V,3.325V,3.350V,3.375V,3.400V"
|
|
bitfld.long 0x18 4.--6. " BO_OFFSET ,Regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
line.long 0x1C "REG_3P0_TOG,Regulator 3P0 Register"
|
|
rbitfld.long 0x1C 17. " OK_VDD3P0 ,Regulator output is ok" "Not ok,Ok"
|
|
rbitfld.long 0x1C 16. " BO_VDD3P0 ,Brownout detected on the regulator output" "Not detected,Detected"
|
|
bitfld.long 0x1C 8.--12. " OUTPUT_TRG ,Regulator output voltage" "2.625V,2.650V,2.675V,2.7V,2.725V,2.750V,2.775V,2.8V,2.825V,2.850V,2.875V,2.9V,2.925V,2.950V,2.975V,3.000V,3.025V,3.050V,3.075V,3.1V,3.125V,3.150V,3.175V,3.2V,3.225V,3.250V,3.275V,3.3V,3.325V,3.350V,3.375V,3.400V"
|
|
textline " "
|
|
bitfld.long 0x1C 7. " VBUS_SEL ,Input voltage source for LDO_3P0" "USB_OTG2_VBUS,USB_OTG1_VBUS"
|
|
bitfld.long 0x1C 4.--6. " BO_OFFSET ,Regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
bitfld.long 0x1C 2. " ENABLE_ILIMIT ,Enable current-limit circuitry in the regulator" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1C 1. " ENABLE_BO ,Enable the brownout circuitry in the regulator" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0. " ENABLE_LINREG ,Enable the regulator output to be set by the programmed target voltage setting and internal bandgap reference" "Disabled,Enabled"
|
|
line.long 0x20 "REG_2P5,Regulator 2P5 Register"
|
|
setclrfld.long 0x20 18. 0x24 18. 0x28 18. " ENABLE_WEAK_LINREG_SET/CLR ,Enables the weak 2p5 regulator" "Disabled,Enabled"
|
|
setclrfld.long 0x20 17. 0x24 17. 0x28 17. " OK_VDD2P5_SET/CLR ,Regulator output is ok" "No ok,Ok"
|
|
setclrfld.long 0x20 16. 0x24 16. 0x28 16. " BO_VDD2P5_SET/CLR ,Brownout is detected on the regulator output" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x20 8.--12. " OUTPUT_TRG ,Regulator output voltage" "2.1V,2.125V,2.150V,2.175V,2.2V,2.225V,2.250V,2.275V,2.3V,2.325V,2.350V,2.375V,2.4V,2.425V,2.450V,2.475V,2.5V,2.525V,2.550V,2.575V,2.6V,2.625V,2.650V,2.675V,2.7V,2.725V,2.750V,2.775V,2.8V,2.825V,2.850V,2.875V"
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|
bitfld.long 0x20 4.--6. " BO_OFFSET ,Regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
setclrfld.long 0x20 3. 0x24 3. 0x28 3. " ENABLE_PULLDOWN_SET/CLR ,Enable the pull-down circuitry in the regulator" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x20 2. 0x24 2. 0x28 2. " ENABLE_ILIMIT_SET/CLR ,Enable the current-limit circuitry in the regulator" "Disabled,Enabled"
|
|
setclrfld.long 0x20 1. 0x24 1. 0x28 1. " ENABLE_BO_SET/CLR ,Enable the brownout circuitry in the regulator" "Disabled,Enabled"
|
|
setclrfld.long 0x20 0. 0x24 0. 0x28 0. " ENABLE_LINREG_SET/CLR ,Enable the regulator output" "Disabled,Enabled"
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|
line.long 0x24 "REG_2P5_SET,Regulator 2P5 Register"
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|
bitfld.long 0x24 8.--12. " OUTPUT_TRG ,Regulator output voltage" "2.1V,2.125V,2.150V,2.175V,2.2V,2.225V,2.250V,2.275V,2.3V,2.325V,2.350V,2.375V,2.4V,2.425V,2.450V,2.475V,2.5V,2.525V,2.550V,2.575V,2.6V,2.625V,2.650V,2.675V,2.7V,2.725V,2.750V,2.775V,2.8V,2.825V,2.850V,2.875V"
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|
bitfld.long 0x24 4.--6. " BO_OFFSET ,Regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
line.long 0x28 "REG_2P5_CLR,Regulator 2P5 Register"
|
|
bitfld.long 0x28 8.--12. " OUTPUT_TRG ,Regulator output voltage" "2.1V,2.125V,2.150V,2.175V,2.2V,2.225V,2.250V,2.275V,2.3V,2.325V,2.350V,2.375V,2.4V,2.425V,2.450V,2.475V,2.5V,2.525V,2.550V,2.575V,2.6V,2.625V,2.650V,2.675V,2.7V,2.725V,2.750V,2.775V,2.8V,2.825V,2.850V,2.875V"
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|
bitfld.long 0x28 4.--6. " BO_OFFSET ,Regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
line.long 0x2C "REG_2P5_TOG,Regulator 2P5 Register"
|
|
bitfld.long 0x2C 18. " ENABLE_WEAK_LINREG ,Enables the weak 2p5 regulator" "Disabled,Enabled"
|
|
rbitfld.long 0x2C 17. " OK_VDD2P5 ,Regulator output is ok" "No ok,Ok"
|
|
rbitfld.long 0x2C 16. " BO_VDD2P5 ,Brownout is detected on the regulator output" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x2C 8.--12. " OUTPUT_TRG ,Regulator output voltage" "2.1V,2.125V,2.150V,2.175V,2.2V,2.225V,2.250V,2.275V,2.3V,2.325V,2.350V,2.375V,2.4V,2.425V,2.450V,2.475V,2.5V,2.525V,2.550V,2.575V,2.6V,2.625V,2.650V,2.675V,2.7V,2.725V,2.750V,2.775V,2.8V,2.825V,2.850V,2.875V"
|
|
bitfld.long 0x2C 4.--6. " BO_OFFSET ,Regulator brownout offset voltage in 25mV steps" "0mV,25mV,50mV,75mV,100mV,125mV,150mV,175mV"
|
|
bitfld.long 0x2C 3. " ENABLE_PULLDOWN ,Enable the pull-down circuitry in the regulator" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x2C 2. " ENABLE_ILIMIT ,Enable the current-limit circuitry in the regulator" "Disabled,Enabled"
|
|
bitfld.long 0x2C 1. " ENABLE_BO ,Enable the brownout circuitry in the regulator" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0. " ENABLE_LINREG ,Enable the regulator output" "Disabled,Enabled"
|
|
line.long 0x30 "REG_CORE,Digital Regulator Core Register"
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
setclrfld.long 0x30 29. 0x34 29. 0x38 29. " FET_ODRIVE_SET/CLR ,Increase the gate drive on power gating FETs to reduce leakage in the off state" "Disabled,Enabled"
|
|
bitfld.long 0x30 27.--28. " RAMP_RATE ,Regulator voltage ramp rate" "Fast,Medium fast,Medium slow,Slow"
|
|
textline " "
|
|
bitfld.long 0x30 23.--26. " REG2_ADJ ,Calibrate the target value of Reg2" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x30 18.--22. " REG2_TARG ,Target voltage for the SOC power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x30 14.--17. " REG1_ADJ ,Calibrate the target value of Reg1" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x30 9.--13. " REG1_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x30 5.--8. " REG0_ADJ ,Calibrate the target value of Reg2" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x30 0.--4. " REG0_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
else
|
|
setclrfld.long 0x30 29. 0x34 29. 0x38 29. " FET_ODRIVE_SET/CLR ,Increase the gate drive on power gating FETs to reduce leakage in the off state" "Disabled,Enabled"
|
|
bitfld.long 0x30 27.--28. " RAMP_RATE ,Regulator voltage ramp rate" "Fast,Medium fast,Medium slow,Slow"
|
|
bitfld.long 0x30 18.--22. " REG2_TARG ,Target voltage for the SOC power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x30 0.--4. " REG0_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
endif
|
|
line.long 0x34 "REG_CORE_SET,Digital Regulator Core Register"
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
bitfld.long 0x34 27.--28. " RAMP_RATE ,Regulator voltage ramp rate" "Fast,Medium fast,Medium slow,Slow"
|
|
textline " "
|
|
bitfld.long 0x34 23.--26. " REG2_ADJ ,Calibrate the target value of Reg2" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x34 18.--22. " REG2_TARG ,Target voltage for the SOC power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x34 14.--17. " REG1_ADJ ,Calibrate the target value of Reg1" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x34 9.--13. " REG1_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x34 5.--8. " REG0_ADJ ,Calibrate the target value of Reg2" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x34 0.--4. " REG0_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
else
|
|
bitfld.long 0x34 27.--28. " RAMP_RATE ,Regulator voltage ramp rate" "Fast,Medium fast,Medium slow,Slow"
|
|
bitfld.long 0x34 18.--22. " REG2_TARG ,Target voltage for the SOC power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
bitfld.long 0x34 0.--4. " REG0_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
endif
|
|
line.long 0x38 "REG_CORE_CLR,Digital Regulator Core Register"
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
bitfld.long 0x38 27.--28. " RAMP_RATE ,Regulator voltage ramp rate" "Fast,Medium fast,Medium slow,Slow"
|
|
textline " "
|
|
bitfld.long 0x38 23.--26. " REG2_ADJ ,Calibrate the target value of Reg2" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x38 18.--22. " REG2_TARG ,Target voltage for the SOC power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x38 14.--17. " REG1_ADJ ,Calibrate the target value of Reg1" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x38 9.--13. " REG1_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x38 5.--8. " REG0_ADJ ,Calibrate the target value of Reg2" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x38 0.--4. " REG0_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
else
|
|
bitfld.long 0x38 27.--28. " RAMP_RATE ,Regulator voltage ramp rate" "Fast,Medium fast,Medium slow,Slow"
|
|
bitfld.long 0x38 18.--22. " REG2_TARG ,Target voltage for the SOC power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
bitfld.long 0x38 0.--4. " REG0_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
endif
|
|
line.long 0x3C "REG_CORE_TOG,Digital Regulator Core Register"
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
bitfld.long 0x3C 29. " FET_ODRIVE ,Increase the gate drive on power gating FETs to reduce leakage in the off state" "Disabled,Enabled"
|
|
bitfld.long 0x3C 27.--28. " RAMP_RATE ,Regulator voltage ramp rate" "Fast,Medium fast,Medium slow,Slow"
|
|
textline " "
|
|
bitfld.long 0x3C 23.--26. " REG2_ADJ ,Calibrate the target value of Reg2" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x3C 18.--22. " REG2_TARG ,Target voltage for the SOC power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x3C 14.--17. " REG1_ADJ ,Calibrate the target value of Reg1" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x3C 9.--13. " REG1_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x3C 5.--8. " REG0_ADJ ,Calibrate the target value of Reg2" "Disabled,+0.25%,+0.50%,+0.75%,+1.00%,+1.25%,+1.50%,+1.75%,-0.25%,-0.50%,-0.75%,-1.00%,-1.25%,-1.50%,-1.75%,-2.00%"
|
|
bitfld.long 0x3C 0.--4. " REG0_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
else
|
|
bitfld.long 0x3C 29. " FET_ODRIVE ,Increase the gate drive on power gating FETs to reduce leakage in the off state" "Disabled,Enabled"
|
|
bitfld.long 0x3C 27.--28. " RAMP_RATE ,Regulator voltage ramp rate" "Fast,Medium fast,Medium slow,Slow"
|
|
bitfld.long 0x3C 18.--22. " REG2_TARG ,Target voltage for the SOC power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
textline " "
|
|
bitfld.long 0x3C 0.--4. " REG0_TARG ,Target voltage for the ARM core power domain" "Power gated off,0.725V,0.750V,0.775V,0.8V,0.825V,0.850V,0.875V,0.9V,0.925V,0.950V,0.975V,1V,1.025V,1.050V,1.075V,1.1V,1.125V,1.150V,1.175V,1.2V,1.225,1.250V,1.275V,1.3V,1.325V,1.350V,1.375V,1.4V,1.425V,1.450V,Full on"
|
|
endif
|
|
line.long 0x40 "MISC0,Miscellaneous Register 0"
|
|
setclrfld.long 0x40 31. 0x44 31. 0x48 31. " VID_PLL_PREDIV_SET/CLR ,Predivider for the source clock of the PLL's." "/1,/2"
|
|
setclrfld.long 0x40 30. 0x44 30. 0x48 30. " XTAL_24M_PWD_SET/CLR ,This field powers down the 24M crystal oscillator if set true" "Powered up,Powered down"
|
|
setclrfld.long 0x40 29. 0x44 29. 0x48 29. " RTC_XTAL_SOURCE_SET/CLR ,Chip source which is being used for the rtc clock" "Internal ring oscillator,RTC_XTAL"
|
|
textline " "
|
|
bitfld.long 0x40 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms"
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setclrfld.long 0x40 25. 0x44 25. 0x48 25. " CLKGATE_CTRL_SET/CLR ,Diasble the clock gate for the xtal 24MHz clock that clocks the digital logic in the analog block" "No,Yes"
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|
setclrfld.long 0x40 16. 0x44 16. 0x48 16. " OSC_XTALOK_EN_SET/CLR ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x40 15. 0x44 15. 0x48 15. " OSC_XTALOK_SET/CLR ,Output of the 24-MHz crystal oscillator is stable" "Not stable,Stable"
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|
bitfld.long 0x40 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,-12.5%,-25.0%,-37.5%"
|
|
setclrfld.long 0x40 12. 0x44 12. 0x48 12. " DISCON_HIGH_SNVS_SET/CLR ,Switch from VDD_HIGH_IN to VDD_SNVS_IN" "Turned on,Turned off"
|
|
textline " "
|
|
bitfld.long 0x40 10.--11. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "Suspended,Standby,Stopped(lower power),Stopped(v.lower power)"
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|
setclrfld.long 0x40 7. 0x44 7. 0x48 7. " REFTOP_VBGUP_SET/CLR ,Analog bandgap voltage is up and stable" "Not stable,Stable"
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|
bitfld.long 0x40 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%"
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|
textline " "
|
|
setclrfld.long 0x40 3. 0x44 3. 0x48 3. " REFTOP_SELFBIASOFF_SET/CLR ,Disable the self-bias circuit in the analog bandgap" "No,Yes"
|
|
setclrfld.long 0x40 0. 0x44 0. 0x48 0. " REFTOP_PWD_SET/CLR ,Power-down the analog bandgap reference circuitry" "Powered up,Powered down"
|
|
line.long 0x44 "MISC0_SET,Miscellaneous Register 0"
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bitfld.long 0x44 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms"
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|
bitfld.long 0x44 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,-12.5%,-25.0%,-37.5%"
|
|
bitfld.long 0x44 10.--11. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "Suspended,Standby,Stopped(lower power),Stopped(v.lower power)"
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|
textline " "
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|
bitfld.long 0x44 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%"
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line.long 0x48 "MISC0_CLR,Miscellaneous Register 0"
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bitfld.long 0x48 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms"
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bitfld.long 0x48 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,-12.5%,-25.0%,-37.5%"
|
|
bitfld.long 0x48 10.--11. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "Suspended,Standby,Stopped(lower power),Stopped(v.lower power)"
|
|
textline " "
|
|
bitfld.long 0x48 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%"
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|
line.long 0x4C "MISC0_TOG,Miscellaneous Register 0"
|
|
bitfld.long 0x4C 31. " VID_PLL_PREDIV ,Predivider for the source clock of the PLL's." "/1,/2"
|
|
bitfld.long 0x4C 30. " XTAL_24M_PWD ,This field powers down the 24M crystal oscillator if set true" "Powered up,Powered down"
|
|
rbitfld.long 0x4C 29. " RTC_XTAL_SOURCE ,Chip source which is being used for the rtc clock" "Internal ring oscillator,RTC_XTAL"
|
|
textline " "
|
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bitfld.long 0x4C 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms"
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bitfld.long 0x4C 25. " CLKGATE_CTRL ,Diasble the clock gate for the xtal 24MHz clock that clocks the digital logic in the analog block" "No,Yes"
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|
bitfld.long 0x4C 16. " OSC_XTALOK_EN ,Enables the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x4C 15. " OSC_XTALOK ,Output of the 24-MHz crystal oscillator is stable" "Not stable,Stable"
|
|
bitfld.long 0x4C 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,-12.5%,-25.0%,-37.5%"
|
|
bitfld.long 0x4C 12. " DISCON_HIGH_SNVS ,Switch from VDD_HIGH_IN to VDD_SNVS_IN" "Turned on,Turned off"
|
|
textline " "
|
|
bitfld.long 0x4C 10.--11. " STOP_MODE_CONFIG ,Configure the analog behavior in stop mode" "Suspended,Standby,Stopped(lower power),Stopped(v.lower power)"
|
|
bitfld.long 0x4C 7. " REFTOP_VBGUP ,Analog bandgap voltage is up and stable" "Not stable,Stable"
|
|
bitfld.long 0x4C 4.--6. " REFTOP_VBGADJ ,REFTOP_VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%"
|
|
textline " "
|
|
bitfld.long 0x4C 3. " REFTOP_SELFBIASOFF ,Disable the self-bias circuit in the analog bandgap" "No,Yes"
|
|
bitfld.long 0x4C 0. " REFTOP_PWD ,Power-down the analog bandgap reference circuitry" "Powered up,Powered down"
|
|
line.long 0x50 "MISC1,Miscellaneous Register 1"
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
setclrfld.long 0x50 31. 0x54 31. 0x58 31. " IRQ_DIG_BO_SET/CLR ,Digital regulator brownout interrupts asserted" "Not asserted,Asserted"
|
|
setclrfld.long 0x50 30. 0x54 30. 0x58 30. " IRQ_ANA_BO_SET/CLR ,Analog regulator brownout interrupts assert" "Not asserted,Asserted"
|
|
setclrfld.long 0x50 29. 0x54 29. 0x58 29. " IRQ_TEMPHIGH_SET/CLR ,Temperature sensor high interrupt asserts for high temperature" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x50 28. 0x54 28. 0x58 28. " IRQ_TEMPLOW_SET/CLR ,Temperature sensor low interrupt asserts for low temperature" "Not asserted,Asserted"
|
|
setclrfld.long 0x50 27. 0x54 27. 0x58 27. " IRQ_TEMPPANIC_SET/CLR ,Temperature sensor panic interrupt asserts for a panic high temperature" "Not asserted,Asserted"
|
|
setclrfld.long 0x50 17. 0x54 17. 0x58 17. " PFD_528_AUTOGATE_EN_SET/CLR ,Clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off" "No reset,Reset"
|
|
textline " "
|
|
setclrfld.long 0x50 16. 0x54 16. 0x58 16. " PFD_480_AUTOGATE_EN_SET/CLR ,Clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off" "No reset,Reset"
|
|
setclrfld.long 0x50 13. 0x54 13. 0x58 13. " LVDSCLK2_IBEN_SET/CLR ,Enable LVDS input buffer for anaclk2/2b" "Disabled,Enabled"
|
|
setclrfld.long 0x50 12. 0x54 12. 0x58 12. " LVDSCLK1_IBEN_SET/CLR ,Enable LVDS input buffer for anaclk1/1b" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x50 11. 0x54 11. 0x58 11. " LVDSCLK2_OBEN_SET/CLR ,Enable LVDS output buffer for anaclk2/2b" "Disabled,Enabled"
|
|
setclrfld.long 0x50 10. 0x54 10. 0x58 10. " LVDSCLK1_OBEN_SET/CLR ,Enable LVDS output buffer for anaclk1/1b" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x50 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
bitfld.long 0x50 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk1/1b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
else
|
|
setclrfld.long 0x50 31. 0x54 31. 0x58 31. " IRQ_DIG_BO_SET/CLR ,Digital regulator brownout interrupts asserted" "Not asserted,Asserted"
|
|
setclrfld.long 0x50 30. 0x54 30. 0x58 30. " IRQ_ANA_BO_SET/CLR ,Analog regulator brownout interrupts assert" "Not asserted,Asserted"
|
|
setclrfld.long 0x50 29. 0x54 29. 0x58 29. " IRQ_TEMPHIGH_SET/CLR ,Temperature sensor high interrupt asserts for high temperature" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x50 28. 0x54 28. 0x58 28. " IRQ_TEMPLOW_SET/CLR ,Temperature sensor low interrupt asserts for low temperature" "Not asserted,Asserted"
|
|
setclrfld.long 0x50 27. 0x54 27. 0x58 27. " IRQ_TEMPPANIC_SET/CLR ,Temperature sensor panic interrupt asserts for a panic high temperature" "Not asserted,Asserted"
|
|
setclrfld.long 0x50 17. 0x54 17. 0x58 17. " PFD_528_AUTOGATE_EN_SET/CLR ,Clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off" "No reset,Reset"
|
|
textline " "
|
|
setclrfld.long 0x50 16. 0x54 16. 0x58 16. " PFD_480_AUTOGATE_EN_SET/CLR ,Clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off" "No reset,Reset"
|
|
setclrfld.long 0x50 12. 0x54 12. 0x58 12. " LVDSCLK1_IBEN_SET/CLR ,Enable LVDS input buffer for anaclk1/1b" "Disabled,Enabled"
|
|
setclrfld.long 0x50 10. 0x54 10. 0x58 10. " LVDSCLK1_OBEN_SET/CLR ,Enable LVDS output buffer for anaclk1/1b" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x50 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk1/1b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
endif
|
|
line.long 0x54 "MISC1_SET,Miscellaneous Register 1"
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
bitfld.long 0x54 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x54 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk1/1b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
line.long 0x58 "MISC1_CLR,Miscellaneous Register 1"
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
bitfld.long 0x58 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x58 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk1/1b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
line.long 0x5C "MISC1_TOG,Miscellaneous Register 1"
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
bitfld.long 0x5C 31. " IRQ_DIG_BO ,Digital regulator brownout interrupts asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x5C 30. " IRQ_ANA_BO ,Analog regulator brownout interrupts assert" "Not asserted,Asserted"
|
|
bitfld.long 0x5C 29. " IRQ_TEMPHIGH ,Temperature sensor high interrupt asserts for high temperature" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x5C 28. " IRQ_TEMPLOW ,Temperature sensor low interrupt asserts for low temperature" "Not asserted,Asserted"
|
|
bitfld.long 0x5C 27. " IRQ_TEMPPANIC ,Temperature sensor panic interrupt asserts for a panic high temperature" "Not asserted,Asserted"
|
|
bitfld.long 0x5C 17. " PFD_528_AUTOGATE_EN ,Clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x5C 16. " PFD_480_AUTOGATE_EN ,Clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x5C 13. " LVDSCLK2_IBEN ,Enable LVDS input buffer for anaclk2/2b" "Disabled,Enabled"
|
|
bitfld.long 0x5C 12. " LVDSCLK1_IBEN ,Enable LVDS input buffer for anaclk1/1b" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x5C 11. " LVDSCLK2_OBEN ,Enable LVDS output buffer for anaclk2/2b" "Disabled,Enabled"
|
|
bitfld.long 0x5C 10. " LVDSCLK1_OBEN ,Enable LVDS output buffer for anaclk1/1b" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x5C 5.--9. " LVDS2_CLK_SEL ,Selects the clk to be routed to anaclk2/2b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
bitfld.long 0x5C 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk1/1b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
else
|
|
bitfld.long 0x5C 31. " IRQ_DIG_BO ,Digital regulator brownout interrupts asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x5C 30. " IRQ_ANA_BO ,Analog regulator brownout interrupts assert" "Not asserted,Asserted"
|
|
bitfld.long 0x5C 29. " IRQ_TEMPHIGH ,Temperature sensor high interrupt asserts for high temperature" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.long 0x5C 28. " IRQ_TEMPLOW ,Temperature sensor low interrupt asserts for low temperature" "Not asserted,Asserted"
|
|
bitfld.long 0x5C 27. " IRQ_TEMPPANIC ,Temperature sensor panic interrupt asserts for a panic high temperature" "Not asserted,Asserted"
|
|
bitfld.long 0x5C 17. " PFD_528_AUTOGATE_EN ,Clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x5C 16. " PFD_480_AUTOGATE_EN ,Clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off" "No reset,Reset"
|
|
bitfld.long 0x5C 12. " LVDSCLK1_IBEN ,Enable LVDS input buffer for anaclk1/1b" "Disabled,Enabled"
|
|
bitfld.long 0x5C 10. " LVDSCLK1_OBEN ,Enable LVDS output buffer for anaclk1/1b" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x5C 0.--4. " LVDS1_CLK_SEL ,Selects the clk to be routed to anaclk1/1b" "ARM_PLL,SYS_PLL,PFD4,PFD5,PFD6,PFD7,AUDIO_PLL,VIDEO_PLL,,ETHERNET_REF,,,USB1_PLL,USB2_PLL,PFD0,PFD1,PFD2,PFD3,XTAL,?..."
|
|
endif
|
|
line.long 0x60 "MISC2,Miscellaneous Control Register"
|
|
bitfld.long 0x60 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4"
|
|
bitfld.long 0x60 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512"
|
|
bitfld.long 0x60 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512"
|
|
textline " "
|
|
bitfld.long 0x60 23. 15. " AUDIO_DIV_MSB/LSB ,MSB of post-divider for audio PLL" "/1,/2,/1,/4"
|
|
setclrfld.long 0x60 22. 0x64 22. 0x68 22. " REG2_OK_SET/CLR ,Voltage is above the brownout level for the SOC supply" "Not occurred,Occurred"
|
|
setclrfld.long 0x60 21. 0x64 21. 0x68 21. " REG2_ENABLE_BO_SET/CLR ,Brownout detection enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x60 19. 0x64 19. 0x68 19. " REG2_BO_STATUS_SET/CLR ,Reg2 brownout status bit" "0,1"
|
|
rbitfld.long 0x60 16.--18. " REG2_BO_OFFSET ,Brown out voltage offset for the xPU power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
textline " "
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
setclrfld.long 0x60 13. 0x64 13. 0x68 13. " REG1_ENABLE_BO_SET/CLR ,Brownout detection enable" "Disabled,Enabled"
|
|
setclrfld.long 0x60 11. 0x64 11. 0x68 11. " REG1_BO_STATUS_SET/CLR ,Reg1 brownout status bit" "0,1"
|
|
rbitfld.long 0x60 8.--10. " REG1_BO_OFFSET ,Brown out voltage offset for the xPU power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x60 7. 0x64 7. 0x68 7. " PLL3_DISABLE_SET/CLR ,PLL3 disable" "No,Yes"
|
|
setclrfld.long 0x60 5. 0x64 5. 0x68 5. " REG0_ENABLE_BO_SET/CLR ,Brownout detection enable" "Disabled,Enabled"
|
|
setclrfld.long 0x60 3. 0x64 3. 0x68 3. " REG0_BO_STATUS_SET/CLR ,Reg0 brownout status" "0,Brownout"
|
|
textline " "
|
|
rbitfld.long 0x60 0.--2. " REG0_BO_OFFSET ,Brown out voltage offset for the CORE power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
line.long 0x64 "MISC2_SET,Miscellaneous Control Register"
|
|
bitfld.long 0x64 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4"
|
|
bitfld.long 0x64 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512"
|
|
bitfld.long 0x64 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512"
|
|
textline " "
|
|
bitfld.long 0x64 23. 15. " AUDIO_DIV_MSB/LSB ,MSB of post-divider for audio PLL" "/1,/2,/1,/4"
|
|
rbitfld.long 0x64 16.--18. " REG2_BO_OFFSET ,Brown out voltage offset for the xPU power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
textline " "
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
rbitfld.long 0x64 8.--10. " REG1_BO_OFFSET ,Brown out voltage offset for the xPU power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
textline " "
|
|
endif
|
|
rbitfld.long 0x64 0.--2. " REG0_BO_OFFSET ,Brown out voltage offset for the CORE power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
line.long 0x68 "MISC2_CLR,Miscellaneous Control Register"
|
|
bitfld.long 0x68 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4"
|
|
bitfld.long 0x68 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512"
|
|
bitfld.long 0x68 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512"
|
|
textline " "
|
|
bitfld.long 0x68 23. 15. " AUDIO_DIV_MSB/LSB ,MSB of post-divider for audio PLL" "/1,/2,/1,/4"
|
|
rbitfld.long 0x68 16.--18. " REG2_BO_OFFSET ,Brown out voltage offset for the xPU power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
textline " "
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
rbitfld.long 0x68 8.--10. " REG1_BO_OFFSET ,Brown out voltage offset for the xPU power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
textline " "
|
|
endif
|
|
rbitfld.long 0x68 0.--2. " REG0_BO_OFFSET ,Brown out voltage offset for the CORE power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
line.long 0x6C "MISC2_TOG,Miscellaneous Control Register"
|
|
bitfld.long 0x6C 30.--31. " VIDEO_DIV ,Post-divider for video" "/1,/2,/1,/4"
|
|
bitfld.long 0x6C 28.--29. " REG2_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512"
|
|
bitfld.long 0x6C 24.--25. " REG0_STEP_TIME ,Number of clock periods (24MHz clock)" "64,128,256,512"
|
|
textline " "
|
|
bitfld.long 0x6C 23. 15. " AUDIO_DIV_MSB/LSB ,MSB of post-divider for audio PLL" "/1,/2,/1,/4"
|
|
rbitfld.long 0x6C 22. " REG2_OK ,Voltage is above the brownout level for the SOC supply" "Not occurred,Occurred"
|
|
bitfld.long 0x6C 21. " REG2_ENABLE_BO ,Brownout detection enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x6C 19. " REG2_BO_STATUS ,Reg2 brownout status bit" "0,1"
|
|
rbitfld.long 0x6C 16.--18. " REG2_BO_OFFSET ,Brown out voltage offset for the xPU power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
textline " "
|
|
sif (cpu()=="IMXRT1021")||cpuis("IMXRT106*")
|
|
bitfld.long 0x6C 13. " REG1_ENABLE_BO ,Brownout detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x6C 11. " REG1_BO_STATUS ,Reg1 brownout status bit" "0,1"
|
|
rbitfld.long 0x6C 8.--10. " REG1_BO_OFFSET ,Brown out voltage offset for the xPU power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x6C 7. " PLL3_DISABLE ,PLL3 disable" "No,Yes"
|
|
bitfld.long 0x6C 5. " REG0_ENABLE_BO ,Brownout detection enable" "Disabled,Enabled"
|
|
rbitfld.long 0x6C 3. " REG0_BO_STATUS ,Reg0 brownout status" "0,Brownout"
|
|
textline " "
|
|
rbitfld.long 0x6C 0.--2. " REG0_BO_OFFSET ,Brown out voltage offset for the CORE power domain" "0V,0.025V,0.050V,0.075V,0.100V,0.125V,0.150V,0.175V"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "TMR (Quad Timer)"
|
|
tree "TMR 1"
|
|
base ad:0x401DC000
|
|
width 9.
|
|
group.word 0x0++0x19
|
|
line.word 0x00 "COMP10,Timer Channel Compare Register 10"
|
|
line.word 0x02 "COMP20,Timer Channel Compare Register 20"
|
|
line.word 0x04 "CAPT0,Timer Channel Capture Register 0"
|
|
line.word 0x06 "LOAD0,Timer Channel Load Register 0"
|
|
line.word 0x08 "HOLD0,Timer Channel Hold Register 0"
|
|
line.word 0x0A "CNTR0,Timer Channel Counter Register 0"
|
|
line.word 0x0C "CTRL0,Timer Channel Control Register 0"
|
|
bitfld.word 0x0C 13.--15. " CM ,Count mode" "No operation,Count rising edges of primary src,Count rising and falling edges of primary src,Count rising edges of primary src while secondary input high active,Quadrature count mode,Count rising edges of primary src,Edge of secondary src triggers primary count until compare,Cascaded counter mode"
|
|
newline
|
|
bitfld.word 0x0C 9.--12. " PCS ,Primary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input,Counter 0 output,Counter 1 output,Counter 2 output,Counter 3 output,/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.word 0x0C 7.--8. " SCS ,Secondary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input"
|
|
newline
|
|
bitfld.word 0x0C 6. " ONCE ,Continuous or one shot counting mode" "Continuous,One shot"
|
|
bitfld.word 0x0C 5. " LENGTH ,Count length" "Until roll over,Until compare/re-initialize"
|
|
newline
|
|
bitfld.word 0x0C 4. " DIR ,Count direction" "Up,Down"
|
|
bitfld.word 0x0C 3. " COINIT ,Co-channel initialization" "Not initialized,Initialized"
|
|
newline
|
|
bitfld.word 0x0C 0.--2. " OUTMODE ,Output mode" "Asserted while counter is active,Clear OFLAG output on successful compare,Set OFLAG output on successful compare,Toggle OFLAG output on successful compare,Toggle OFLAG output using alternating compare registers,Set on compare cleared on secondary source input edge,Set on compare cleared on counter rollover,Enable gated clock output while counter is active"
|
|
newline
|
|
line.word 0x0E "SCTRL0,Timer Channel Status and Control Register 0"
|
|
bitfld.word 0x0E 15. " TCF ,Timer compare flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 14. " TCFIE ,Timer compare flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 13. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.word 0x0E 12. " TOFIE ,Timer overflow flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 11. " IEF ,Input edge flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 10. " IEFIE ,Input edge flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 9. " IPS ,Input polarity select" "Normal,Inverted"
|
|
rbitfld.word 0x0E 8. " INPUT ,External input signal" "0,1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " CAPTURE_MODE ,Input capture mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.word 0x0E 5. " MSTR ,Master mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x0E 4. " EEOF ,Enable external OFLAG force" "Disabled,Enabled"
|
|
bitfld.word 0x0E 3. " VAL ,Forced OFLAG value" "Not forced,Forced"
|
|
newline
|
|
bitfld.word 0x0E 2. " FORCE ,Force OFLAG output" "Not forced,Forced"
|
|
bitfld.word 0x0E 1. " OPS ,Output polarity select" "True,Inverted"
|
|
newline
|
|
bitfld.word 0x0E 0. " OEN ,Output enable" "Disabled,Enabled"
|
|
line.word 0x10 "CMPLD10,Timer Channel Comparator Load Register 1 0"
|
|
line.word 0x12 "CMPLD20,Timer Channel Comparator Load Register 2 0"
|
|
line.word 0x14 "CSCTRL0,Timer Channel Comparator Status and Control Register 0"
|
|
bitfld.word 0x14 14.--15. " DBG_EN ,Debug actions enable" "Normal operation,Halt TMR counter,Force 0,Halt counter/Force 0"
|
|
bitfld.word 0x14 13. " FAULT ,Fault enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x14 12. " ALT_LOAD ,Alternative load enable" "Disabled,Enabled"
|
|
bitfld.word 0x14 11. " ROC ,Reload on capture" "Not reloaded,Reloaded"
|
|
newline
|
|
bitfld.word 0x14 10. " TCI ,Triggered count initialization control" "Counter stopped,Counter reloaded"
|
|
rbitfld.word 0x14 9. " UP ,Counting direction indicator" "Down,Up"
|
|
newline
|
|
bitfld.word 0x14 7. " TCF2EN ,Timer compare 2 interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 6. " TCF1EN ,Timer compare 1 interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 5. " TCF2 ,Timer compare 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 4. " TCF1 ,Timer compare 1 interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 2.--3. " CL2 ,Compare load control 2" "Never preload,COMP1,COMP2,?..."
|
|
bitfld.word 0x14 0.--1. " CL1 ,Compare load control 1" "Never preload,COMP1,COMP2,?..."
|
|
line.word 0x16 "FILT0,Timer Channel Input Filter Register 0"
|
|
bitfld.word 0x16 8.--10. " FILT_CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x16 0.--7. 1. " FILT_PER ,Input filter sample period"
|
|
line.word 0x18 "DMA0,Timer Channel DMA Enable Register 0"
|
|
bitfld.word 0x18 2. " CMPLD2DE ,Comparator preload register 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " CMPLD1DE ,Comparator preload register 1 DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " IEFDE ,Input edge flag DMA enable" "Disabled,Enabled"
|
|
group.word 0x20++0x19
|
|
line.word 0x00 "COMP11,Timer Channel Compare Register 11"
|
|
line.word 0x02 "COMP21,Timer Channel Compare Register 21"
|
|
line.word 0x04 "CAPT1,Timer Channel Capture Register 1"
|
|
line.word 0x06 "LOAD1,Timer Channel Load Register 1"
|
|
line.word 0x08 "HOLD1,Timer Channel Hold Register 1"
|
|
line.word 0x0A "CNTR1,Timer Channel Counter Register 1"
|
|
line.word 0x0C "CTRL1,Timer Channel Control Register 1"
|
|
bitfld.word 0x0C 13.--15. " CM ,Count mode" "No operation,Count rising edges of primary src,Count rising and falling edges of primary src,Count rising edges of primary src while secondary input high active,Quadrature count mode,Count rising edges of primary src,Edge of secondary src triggers primary count until compare,Cascaded counter mode"
|
|
newline
|
|
bitfld.word 0x0C 9.--12. " PCS ,Primary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input,Counter 0 output,Counter 1 output,Counter 2 output,Counter 3 output,/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.word 0x0C 7.--8. " SCS ,Secondary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input"
|
|
newline
|
|
bitfld.word 0x0C 6. " ONCE ,Continuous or one shot counting mode" "Continuous,One shot"
|
|
bitfld.word 0x0C 5. " LENGTH ,Count length" "Until roll over,Until compare/re-initialize"
|
|
newline
|
|
bitfld.word 0x0C 4. " DIR ,Count direction" "Up,Down"
|
|
bitfld.word 0x0C 3. " COINIT ,Co-channel initialization" "Not initialized,Initialized"
|
|
newline
|
|
bitfld.word 0x0C 0.--2. " OUTMODE ,Output mode" "Asserted while counter is active,Clear OFLAG output on successful compare,Set OFLAG output on successful compare,Toggle OFLAG output on successful compare,Toggle OFLAG output using alternating compare registers,Set on compare cleared on secondary source input edge,Set on compare cleared on counter rollover,Enable gated clock output while counter is active"
|
|
newline
|
|
line.word 0x0E "SCTRL1,Timer Channel Status and Control Register 1"
|
|
bitfld.word 0x0E 15. " TCF ,Timer compare flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 14. " TCFIE ,Timer compare flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 13. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.word 0x0E 12. " TOFIE ,Timer overflow flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 11. " IEF ,Input edge flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 10. " IEFIE ,Input edge flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 9. " IPS ,Input polarity select" "Normal,Inverted"
|
|
rbitfld.word 0x0E 8. " INPUT ,External input signal" "0,1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " CAPTURE_MODE ,Input capture mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.word 0x0E 5. " MSTR ,Master mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x0E 4. " EEOF ,Enable external OFLAG force" "Disabled,Enabled"
|
|
bitfld.word 0x0E 3. " VAL ,Forced OFLAG value" "Not forced,Forced"
|
|
newline
|
|
bitfld.word 0x0E 2. " FORCE ,Force OFLAG output" "Not forced,Forced"
|
|
bitfld.word 0x0E 1. " OPS ,Output polarity select" "True,Inverted"
|
|
newline
|
|
bitfld.word 0x0E 0. " OEN ,Output enable" "Disabled,Enabled"
|
|
line.word 0x10 "CMPLD11,Timer Channel Comparator Load Register 1 1"
|
|
line.word 0x12 "CMPLD21,Timer Channel Comparator Load Register 2 1"
|
|
line.word 0x14 "CSCTRL1,Timer Channel Comparator Status and Control Register 1"
|
|
bitfld.word 0x14 14.--15. " DBG_EN ,Debug actions enable" "Normal operation,Halt TMR counter,Force 0,Halt counter/Force 0"
|
|
bitfld.word 0x14 13. " FAULT ,Fault enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x14 12. " ALT_LOAD ,Alternative load enable" "Disabled,Enabled"
|
|
bitfld.word 0x14 11. " ROC ,Reload on capture" "Not reloaded,Reloaded"
|
|
newline
|
|
bitfld.word 0x14 10. " TCI ,Triggered count initialization control" "Counter stopped,Counter reloaded"
|
|
rbitfld.word 0x14 9. " UP ,Counting direction indicator" "Down,Up"
|
|
newline
|
|
bitfld.word 0x14 7. " TCF2EN ,Timer compare 2 interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 6. " TCF1EN ,Timer compare 1 interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 5. " TCF2 ,Timer compare 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 4. " TCF1 ,Timer compare 1 interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 2.--3. " CL2 ,Compare load control 2" "Never preload,COMP1,COMP2,?..."
|
|
bitfld.word 0x14 0.--1. " CL1 ,Compare load control 1" "Never preload,COMP1,COMP2,?..."
|
|
line.word 0x16 "FILT1,Timer Channel Input Filter Register 1"
|
|
bitfld.word 0x16 8.--10. " FILT_CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x16 0.--7. 1. " FILT_PER ,Input filter sample period"
|
|
line.word 0x18 "DMA1,Timer Channel DMA Enable Register 1"
|
|
bitfld.word 0x18 2. " CMPLD2DE ,Comparator preload register 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " CMPLD1DE ,Comparator preload register 1 DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " IEFDE ,Input edge flag DMA enable" "Disabled,Enabled"
|
|
group.word 0x40++0x19
|
|
line.word 0x00 "COMP12,Timer Channel Compare Register 12"
|
|
line.word 0x02 "COMP22,Timer Channel Compare Register 22"
|
|
line.word 0x04 "CAPT2,Timer Channel Capture Register 2"
|
|
line.word 0x06 "LOAD2,Timer Channel Load Register 2"
|
|
line.word 0x08 "HOLD2,Timer Channel Hold Register 2"
|
|
line.word 0x0A "CNTR2,Timer Channel Counter Register 2"
|
|
line.word 0x0C "CTRL2,Timer Channel Control Register 2"
|
|
bitfld.word 0x0C 13.--15. " CM ,Count mode" "No operation,Count rising edges of primary src,Count rising and falling edges of primary src,Count rising edges of primary src while secondary input high active,Quadrature count mode,Count rising edges of primary src,Edge of secondary src triggers primary count until compare,Cascaded counter mode"
|
|
newline
|
|
bitfld.word 0x0C 9.--12. " PCS ,Primary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input,Counter 0 output,Counter 1 output,Counter 2 output,Counter 3 output,/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.word 0x0C 7.--8. " SCS ,Secondary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input"
|
|
newline
|
|
bitfld.word 0x0C 6. " ONCE ,Continuous or one shot counting mode" "Continuous,One shot"
|
|
bitfld.word 0x0C 5. " LENGTH ,Count length" "Until roll over,Until compare/re-initialize"
|
|
newline
|
|
bitfld.word 0x0C 4. " DIR ,Count direction" "Up,Down"
|
|
bitfld.word 0x0C 3. " COINIT ,Co-channel initialization" "Not initialized,Initialized"
|
|
newline
|
|
bitfld.word 0x0C 0.--2. " OUTMODE ,Output mode" "Asserted while counter is active,Clear OFLAG output on successful compare,Set OFLAG output on successful compare,Toggle OFLAG output on successful compare,Toggle OFLAG output using alternating compare registers,Set on compare cleared on secondary source input edge,Set on compare cleared on counter rollover,Enable gated clock output while counter is active"
|
|
newline
|
|
line.word 0x0E "SCTRL2,Timer Channel Status and Control Register 2"
|
|
bitfld.word 0x0E 15. " TCF ,Timer compare flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 14. " TCFIE ,Timer compare flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 13. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.word 0x0E 12. " TOFIE ,Timer overflow flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 11. " IEF ,Input edge flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 10. " IEFIE ,Input edge flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 9. " IPS ,Input polarity select" "Normal,Inverted"
|
|
rbitfld.word 0x0E 8. " INPUT ,External input signal" "0,1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " CAPTURE_MODE ,Input capture mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.word 0x0E 5. " MSTR ,Master mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x0E 4. " EEOF ,Enable external OFLAG force" "Disabled,Enabled"
|
|
bitfld.word 0x0E 3. " VAL ,Forced OFLAG value" "Not forced,Forced"
|
|
newline
|
|
bitfld.word 0x0E 2. " FORCE ,Force OFLAG output" "Not forced,Forced"
|
|
bitfld.word 0x0E 1. " OPS ,Output polarity select" "True,Inverted"
|
|
newline
|
|
bitfld.word 0x0E 0. " OEN ,Output enable" "Disabled,Enabled"
|
|
line.word 0x10 "CMPLD12,Timer Channel Comparator Load Register 1 2"
|
|
line.word 0x12 "CMPLD22,Timer Channel Comparator Load Register 2 2"
|
|
line.word 0x14 "CSCTRL2,Timer Channel Comparator Status and Control Register 2"
|
|
bitfld.word 0x14 14.--15. " DBG_EN ,Debug actions enable" "Normal operation,Halt TMR counter,Force 0,Halt counter/Force 0"
|
|
bitfld.word 0x14 13. " FAULT ,Fault enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x14 12. " ALT_LOAD ,Alternative load enable" "Disabled,Enabled"
|
|
bitfld.word 0x14 11. " ROC ,Reload on capture" "Not reloaded,Reloaded"
|
|
newline
|
|
bitfld.word 0x14 10. " TCI ,Triggered count initialization control" "Counter stopped,Counter reloaded"
|
|
rbitfld.word 0x14 9. " UP ,Counting direction indicator" "Down,Up"
|
|
newline
|
|
bitfld.word 0x14 7. " TCF2EN ,Timer compare 2 interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 6. " TCF1EN ,Timer compare 1 interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 5. " TCF2 ,Timer compare 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 4. " TCF1 ,Timer compare 1 interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 2.--3. " CL2 ,Compare load control 2" "Never preload,COMP1,COMP2,?..."
|
|
bitfld.word 0x14 0.--1. " CL1 ,Compare load control 1" "Never preload,COMP1,COMP2,?..."
|
|
line.word 0x16 "FILT2,Timer Channel Input Filter Register 2"
|
|
bitfld.word 0x16 8.--10. " FILT_CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x16 0.--7. 1. " FILT_PER ,Input filter sample period"
|
|
line.word 0x18 "DMA2,Timer Channel DMA Enable Register 2"
|
|
bitfld.word 0x18 2. " CMPLD2DE ,Comparator preload register 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " CMPLD1DE ,Comparator preload register 1 DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " IEFDE ,Input edge flag DMA enable" "Disabled,Enabled"
|
|
group.word 0x60++0x19
|
|
line.word 0x00 "COMP13,Timer Channel Compare Register 13"
|
|
line.word 0x02 "COMP23,Timer Channel Compare Register 23"
|
|
line.word 0x04 "CAPT3,Timer Channel Capture Register 3"
|
|
line.word 0x06 "LOAD3,Timer Channel Load Register 3"
|
|
line.word 0x08 "HOLD3,Timer Channel Hold Register 3"
|
|
line.word 0x0A "CNTR3,Timer Channel Counter Register 3"
|
|
line.word 0x0C "CTRL3,Timer Channel Control Register 3"
|
|
bitfld.word 0x0C 13.--15. " CM ,Count mode" "No operation,Count rising edges of primary src,Count rising and falling edges of primary src,Count rising edges of primary src while secondary input high active,Quadrature count mode,Count rising edges of primary src,Edge of secondary src triggers primary count until compare,Cascaded counter mode"
|
|
newline
|
|
bitfld.word 0x0C 9.--12. " PCS ,Primary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input,Counter 0 output,Counter 1 output,Counter 2 output,Counter 3 output,/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.word 0x0C 7.--8. " SCS ,Secondary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input"
|
|
newline
|
|
bitfld.word 0x0C 6. " ONCE ,Continuous or one shot counting mode" "Continuous,One shot"
|
|
bitfld.word 0x0C 5. " LENGTH ,Count length" "Until roll over,Until compare/re-initialize"
|
|
newline
|
|
bitfld.word 0x0C 4. " DIR ,Count direction" "Up,Down"
|
|
bitfld.word 0x0C 3. " COINIT ,Co-channel initialization" "Not initialized,Initialized"
|
|
newline
|
|
bitfld.word 0x0C 0.--2. " OUTMODE ,Output mode" "Asserted while counter is active,Clear OFLAG output on successful compare,Set OFLAG output on successful compare,Toggle OFLAG output on successful compare,Toggle OFLAG output using alternating compare registers,Set on compare cleared on secondary source input edge,Set on compare cleared on counter rollover,Enable gated clock output while counter is active"
|
|
newline
|
|
line.word 0x0E "SCTRL3,Timer Channel Status and Control Register 3"
|
|
bitfld.word 0x0E 15. " TCF ,Timer compare flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 14. " TCFIE ,Timer compare flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 13. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.word 0x0E 12. " TOFIE ,Timer overflow flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 11. " IEF ,Input edge flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 10. " IEFIE ,Input edge flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 9. " IPS ,Input polarity select" "Normal,Inverted"
|
|
rbitfld.word 0x0E 8. " INPUT ,External input signal" "0,1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " CAPTURE_MODE ,Input capture mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.word 0x0E 5. " MSTR ,Master mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x0E 4. " EEOF ,Enable external OFLAG force" "Disabled,Enabled"
|
|
bitfld.word 0x0E 3. " VAL ,Forced OFLAG value" "Not forced,Forced"
|
|
newline
|
|
bitfld.word 0x0E 2. " FORCE ,Force OFLAG output" "Not forced,Forced"
|
|
bitfld.word 0x0E 1. " OPS ,Output polarity select" "True,Inverted"
|
|
newline
|
|
bitfld.word 0x0E 0. " OEN ,Output enable" "Disabled,Enabled"
|
|
line.word 0x10 "CMPLD13,Timer Channel Comparator Load Register 1 3"
|
|
line.word 0x12 "CMPLD23,Timer Channel Comparator Load Register 2 3"
|
|
line.word 0x14 "CSCTRL3,Timer Channel Comparator Status and Control Register 3"
|
|
bitfld.word 0x14 14.--15. " DBG_EN ,Debug actions enable" "Normal operation,Halt TMR counter,Force 0,Halt counter/Force 0"
|
|
bitfld.word 0x14 13. " FAULT ,Fault enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x14 12. " ALT_LOAD ,Alternative load enable" "Disabled,Enabled"
|
|
bitfld.word 0x14 11. " ROC ,Reload on capture" "Not reloaded,Reloaded"
|
|
newline
|
|
bitfld.word 0x14 10. " TCI ,Triggered count initialization control" "Counter stopped,Counter reloaded"
|
|
rbitfld.word 0x14 9. " UP ,Counting direction indicator" "Down,Up"
|
|
newline
|
|
bitfld.word 0x14 7. " TCF2EN ,Timer compare 2 interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 6. " TCF1EN ,Timer compare 1 interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 5. " TCF2 ,Timer compare 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 4. " TCF1 ,Timer compare 1 interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 2.--3. " CL2 ,Compare load control 2" "Never preload,COMP1,COMP2,?..."
|
|
bitfld.word 0x14 0.--1. " CL1 ,Compare load control 1" "Never preload,COMP1,COMP2,?..."
|
|
line.word 0x16 "FILT3,Timer Channel Input Filter Register 3"
|
|
bitfld.word 0x16 8.--10. " FILT_CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x16 0.--7. 1. " FILT_PER ,Input filter sample period"
|
|
line.word 0x18 "DMA3,Timer Channel DMA Enable Register 3"
|
|
bitfld.word 0x18 2. " CMPLD2DE ,Comparator preload register 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " CMPLD1DE ,Comparator preload register 1 DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " IEFDE ,Input edge flag DMA enable" "Disabled,Enabled"
|
|
newline
|
|
group.word 0x1E++0x1
|
|
line.word 0x00 "ENBL,Timer Channel Enable Register"
|
|
bitfld.word 0x00 3. " ENBL[3] ,Timer channel 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " [2] ,Timer channel 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " [1] ,Timer channel 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " [0] ,Timer channel 0 enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TMR 2"
|
|
base ad:0x401E0000
|
|
width 9.
|
|
group.word 0x0++0x19
|
|
line.word 0x00 "COMP10,Timer Channel Compare Register 10"
|
|
line.word 0x02 "COMP20,Timer Channel Compare Register 20"
|
|
line.word 0x04 "CAPT0,Timer Channel Capture Register 0"
|
|
line.word 0x06 "LOAD0,Timer Channel Load Register 0"
|
|
line.word 0x08 "HOLD0,Timer Channel Hold Register 0"
|
|
line.word 0x0A "CNTR0,Timer Channel Counter Register 0"
|
|
line.word 0x0C "CTRL0,Timer Channel Control Register 0"
|
|
bitfld.word 0x0C 13.--15. " CM ,Count mode" "No operation,Count rising edges of primary src,Count rising and falling edges of primary src,Count rising edges of primary src while secondary input high active,Quadrature count mode,Count rising edges of primary src,Edge of secondary src triggers primary count until compare,Cascaded counter mode"
|
|
newline
|
|
bitfld.word 0x0C 9.--12. " PCS ,Primary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input,Counter 0 output,Counter 1 output,Counter 2 output,Counter 3 output,/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.word 0x0C 7.--8. " SCS ,Secondary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input"
|
|
newline
|
|
bitfld.word 0x0C 6. " ONCE ,Continuous or one shot counting mode" "Continuous,One shot"
|
|
bitfld.word 0x0C 5. " LENGTH ,Count length" "Until roll over,Until compare/re-initialize"
|
|
newline
|
|
bitfld.word 0x0C 4. " DIR ,Count direction" "Up,Down"
|
|
bitfld.word 0x0C 3. " COINIT ,Co-channel initialization" "Not initialized,Initialized"
|
|
newline
|
|
bitfld.word 0x0C 0.--2. " OUTMODE ,Output mode" "Asserted while counter is active,Clear OFLAG output on successful compare,Set OFLAG output on successful compare,Toggle OFLAG output on successful compare,Toggle OFLAG output using alternating compare registers,Set on compare cleared on secondary source input edge,Set on compare cleared on counter rollover,Enable gated clock output while counter is active"
|
|
newline
|
|
line.word 0x0E "SCTRL0,Timer Channel Status and Control Register 0"
|
|
bitfld.word 0x0E 15. " TCF ,Timer compare flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 14. " TCFIE ,Timer compare flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 13. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.word 0x0E 12. " TOFIE ,Timer overflow flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 11. " IEF ,Input edge flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 10. " IEFIE ,Input edge flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 9. " IPS ,Input polarity select" "Normal,Inverted"
|
|
rbitfld.word 0x0E 8. " INPUT ,External input signal" "0,1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " CAPTURE_MODE ,Input capture mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.word 0x0E 5. " MSTR ,Master mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x0E 4. " EEOF ,Enable external OFLAG force" "Disabled,Enabled"
|
|
bitfld.word 0x0E 3. " VAL ,Forced OFLAG value" "Not forced,Forced"
|
|
newline
|
|
bitfld.word 0x0E 2. " FORCE ,Force OFLAG output" "Not forced,Forced"
|
|
bitfld.word 0x0E 1. " OPS ,Output polarity select" "True,Inverted"
|
|
newline
|
|
bitfld.word 0x0E 0. " OEN ,Output enable" "Disabled,Enabled"
|
|
line.word 0x10 "CMPLD10,Timer Channel Comparator Load Register 1 0"
|
|
line.word 0x12 "CMPLD20,Timer Channel Comparator Load Register 2 0"
|
|
line.word 0x14 "CSCTRL0,Timer Channel Comparator Status and Control Register 0"
|
|
bitfld.word 0x14 14.--15. " DBG_EN ,Debug actions enable" "Normal operation,Halt TMR counter,Force 0,Halt counter/Force 0"
|
|
bitfld.word 0x14 13. " FAULT ,Fault enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x14 12. " ALT_LOAD ,Alternative load enable" "Disabled,Enabled"
|
|
bitfld.word 0x14 11. " ROC ,Reload on capture" "Not reloaded,Reloaded"
|
|
newline
|
|
bitfld.word 0x14 10. " TCI ,Triggered count initialization control" "Counter stopped,Counter reloaded"
|
|
rbitfld.word 0x14 9. " UP ,Counting direction indicator" "Down,Up"
|
|
newline
|
|
bitfld.word 0x14 7. " TCF2EN ,Timer compare 2 interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 6. " TCF1EN ,Timer compare 1 interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 5. " TCF2 ,Timer compare 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 4. " TCF1 ,Timer compare 1 interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 2.--3. " CL2 ,Compare load control 2" "Never preload,COMP1,COMP2,?..."
|
|
bitfld.word 0x14 0.--1. " CL1 ,Compare load control 1" "Never preload,COMP1,COMP2,?..."
|
|
line.word 0x16 "FILT0,Timer Channel Input Filter Register 0"
|
|
bitfld.word 0x16 8.--10. " FILT_CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x16 0.--7. 1. " FILT_PER ,Input filter sample period"
|
|
line.word 0x18 "DMA0,Timer Channel DMA Enable Register 0"
|
|
bitfld.word 0x18 2. " CMPLD2DE ,Comparator preload register 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " CMPLD1DE ,Comparator preload register 1 DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " IEFDE ,Input edge flag DMA enable" "Disabled,Enabled"
|
|
group.word 0x20++0x19
|
|
line.word 0x00 "COMP11,Timer Channel Compare Register 11"
|
|
line.word 0x02 "COMP21,Timer Channel Compare Register 21"
|
|
line.word 0x04 "CAPT1,Timer Channel Capture Register 1"
|
|
line.word 0x06 "LOAD1,Timer Channel Load Register 1"
|
|
line.word 0x08 "HOLD1,Timer Channel Hold Register 1"
|
|
line.word 0x0A "CNTR1,Timer Channel Counter Register 1"
|
|
line.word 0x0C "CTRL1,Timer Channel Control Register 1"
|
|
bitfld.word 0x0C 13.--15. " CM ,Count mode" "No operation,Count rising edges of primary src,Count rising and falling edges of primary src,Count rising edges of primary src while secondary input high active,Quadrature count mode,Count rising edges of primary src,Edge of secondary src triggers primary count until compare,Cascaded counter mode"
|
|
newline
|
|
bitfld.word 0x0C 9.--12. " PCS ,Primary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input,Counter 0 output,Counter 1 output,Counter 2 output,Counter 3 output,/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.word 0x0C 7.--8. " SCS ,Secondary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input"
|
|
newline
|
|
bitfld.word 0x0C 6. " ONCE ,Continuous or one shot counting mode" "Continuous,One shot"
|
|
bitfld.word 0x0C 5. " LENGTH ,Count length" "Until roll over,Until compare/re-initialize"
|
|
newline
|
|
bitfld.word 0x0C 4. " DIR ,Count direction" "Up,Down"
|
|
bitfld.word 0x0C 3. " COINIT ,Co-channel initialization" "Not initialized,Initialized"
|
|
newline
|
|
bitfld.word 0x0C 0.--2. " OUTMODE ,Output mode" "Asserted while counter is active,Clear OFLAG output on successful compare,Set OFLAG output on successful compare,Toggle OFLAG output on successful compare,Toggle OFLAG output using alternating compare registers,Set on compare cleared on secondary source input edge,Set on compare cleared on counter rollover,Enable gated clock output while counter is active"
|
|
newline
|
|
line.word 0x0E "SCTRL1,Timer Channel Status and Control Register 1"
|
|
bitfld.word 0x0E 15. " TCF ,Timer compare flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 14. " TCFIE ,Timer compare flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 13. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.word 0x0E 12. " TOFIE ,Timer overflow flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 11. " IEF ,Input edge flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 10. " IEFIE ,Input edge flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 9. " IPS ,Input polarity select" "Normal,Inverted"
|
|
rbitfld.word 0x0E 8. " INPUT ,External input signal" "0,1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " CAPTURE_MODE ,Input capture mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.word 0x0E 5. " MSTR ,Master mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x0E 4. " EEOF ,Enable external OFLAG force" "Disabled,Enabled"
|
|
bitfld.word 0x0E 3. " VAL ,Forced OFLAG value" "Not forced,Forced"
|
|
newline
|
|
bitfld.word 0x0E 2. " FORCE ,Force OFLAG output" "Not forced,Forced"
|
|
bitfld.word 0x0E 1. " OPS ,Output polarity select" "True,Inverted"
|
|
newline
|
|
bitfld.word 0x0E 0. " OEN ,Output enable" "Disabled,Enabled"
|
|
line.word 0x10 "CMPLD11,Timer Channel Comparator Load Register 1 1"
|
|
line.word 0x12 "CMPLD21,Timer Channel Comparator Load Register 2 1"
|
|
line.word 0x14 "CSCTRL1,Timer Channel Comparator Status and Control Register 1"
|
|
bitfld.word 0x14 14.--15. " DBG_EN ,Debug actions enable" "Normal operation,Halt TMR counter,Force 0,Halt counter/Force 0"
|
|
bitfld.word 0x14 13. " FAULT ,Fault enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x14 12. " ALT_LOAD ,Alternative load enable" "Disabled,Enabled"
|
|
bitfld.word 0x14 11. " ROC ,Reload on capture" "Not reloaded,Reloaded"
|
|
newline
|
|
bitfld.word 0x14 10. " TCI ,Triggered count initialization control" "Counter stopped,Counter reloaded"
|
|
rbitfld.word 0x14 9. " UP ,Counting direction indicator" "Down,Up"
|
|
newline
|
|
bitfld.word 0x14 7. " TCF2EN ,Timer compare 2 interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 6. " TCF1EN ,Timer compare 1 interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 5. " TCF2 ,Timer compare 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 4. " TCF1 ,Timer compare 1 interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 2.--3. " CL2 ,Compare load control 2" "Never preload,COMP1,COMP2,?..."
|
|
bitfld.word 0x14 0.--1. " CL1 ,Compare load control 1" "Never preload,COMP1,COMP2,?..."
|
|
line.word 0x16 "FILT1,Timer Channel Input Filter Register 1"
|
|
bitfld.word 0x16 8.--10. " FILT_CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x16 0.--7. 1. " FILT_PER ,Input filter sample period"
|
|
line.word 0x18 "DMA1,Timer Channel DMA Enable Register 1"
|
|
bitfld.word 0x18 2. " CMPLD2DE ,Comparator preload register 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " CMPLD1DE ,Comparator preload register 1 DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " IEFDE ,Input edge flag DMA enable" "Disabled,Enabled"
|
|
group.word 0x40++0x19
|
|
line.word 0x00 "COMP12,Timer Channel Compare Register 12"
|
|
line.word 0x02 "COMP22,Timer Channel Compare Register 22"
|
|
line.word 0x04 "CAPT2,Timer Channel Capture Register 2"
|
|
line.word 0x06 "LOAD2,Timer Channel Load Register 2"
|
|
line.word 0x08 "HOLD2,Timer Channel Hold Register 2"
|
|
line.word 0x0A "CNTR2,Timer Channel Counter Register 2"
|
|
line.word 0x0C "CTRL2,Timer Channel Control Register 2"
|
|
bitfld.word 0x0C 13.--15. " CM ,Count mode" "No operation,Count rising edges of primary src,Count rising and falling edges of primary src,Count rising edges of primary src while secondary input high active,Quadrature count mode,Count rising edges of primary src,Edge of secondary src triggers primary count until compare,Cascaded counter mode"
|
|
newline
|
|
bitfld.word 0x0C 9.--12. " PCS ,Primary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input,Counter 0 output,Counter 1 output,Counter 2 output,Counter 3 output,/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.word 0x0C 7.--8. " SCS ,Secondary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input"
|
|
newline
|
|
bitfld.word 0x0C 6. " ONCE ,Continuous or one shot counting mode" "Continuous,One shot"
|
|
bitfld.word 0x0C 5. " LENGTH ,Count length" "Until roll over,Until compare/re-initialize"
|
|
newline
|
|
bitfld.word 0x0C 4. " DIR ,Count direction" "Up,Down"
|
|
bitfld.word 0x0C 3. " COINIT ,Co-channel initialization" "Not initialized,Initialized"
|
|
newline
|
|
bitfld.word 0x0C 0.--2. " OUTMODE ,Output mode" "Asserted while counter is active,Clear OFLAG output on successful compare,Set OFLAG output on successful compare,Toggle OFLAG output on successful compare,Toggle OFLAG output using alternating compare registers,Set on compare cleared on secondary source input edge,Set on compare cleared on counter rollover,Enable gated clock output while counter is active"
|
|
newline
|
|
line.word 0x0E "SCTRL2,Timer Channel Status and Control Register 2"
|
|
bitfld.word 0x0E 15. " TCF ,Timer compare flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 14. " TCFIE ,Timer compare flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 13. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.word 0x0E 12. " TOFIE ,Timer overflow flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 11. " IEF ,Input edge flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 10. " IEFIE ,Input edge flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 9. " IPS ,Input polarity select" "Normal,Inverted"
|
|
rbitfld.word 0x0E 8. " INPUT ,External input signal" "0,1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " CAPTURE_MODE ,Input capture mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.word 0x0E 5. " MSTR ,Master mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x0E 4. " EEOF ,Enable external OFLAG force" "Disabled,Enabled"
|
|
bitfld.word 0x0E 3. " VAL ,Forced OFLAG value" "Not forced,Forced"
|
|
newline
|
|
bitfld.word 0x0E 2. " FORCE ,Force OFLAG output" "Not forced,Forced"
|
|
bitfld.word 0x0E 1. " OPS ,Output polarity select" "True,Inverted"
|
|
newline
|
|
bitfld.word 0x0E 0. " OEN ,Output enable" "Disabled,Enabled"
|
|
line.word 0x10 "CMPLD12,Timer Channel Comparator Load Register 1 2"
|
|
line.word 0x12 "CMPLD22,Timer Channel Comparator Load Register 2 2"
|
|
line.word 0x14 "CSCTRL2,Timer Channel Comparator Status and Control Register 2"
|
|
bitfld.word 0x14 14.--15. " DBG_EN ,Debug actions enable" "Normal operation,Halt TMR counter,Force 0,Halt counter/Force 0"
|
|
bitfld.word 0x14 13. " FAULT ,Fault enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x14 12. " ALT_LOAD ,Alternative load enable" "Disabled,Enabled"
|
|
bitfld.word 0x14 11. " ROC ,Reload on capture" "Not reloaded,Reloaded"
|
|
newline
|
|
bitfld.word 0x14 10. " TCI ,Triggered count initialization control" "Counter stopped,Counter reloaded"
|
|
rbitfld.word 0x14 9. " UP ,Counting direction indicator" "Down,Up"
|
|
newline
|
|
bitfld.word 0x14 7. " TCF2EN ,Timer compare 2 interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 6. " TCF1EN ,Timer compare 1 interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 5. " TCF2 ,Timer compare 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 4. " TCF1 ,Timer compare 1 interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 2.--3. " CL2 ,Compare load control 2" "Never preload,COMP1,COMP2,?..."
|
|
bitfld.word 0x14 0.--1. " CL1 ,Compare load control 1" "Never preload,COMP1,COMP2,?..."
|
|
line.word 0x16 "FILT2,Timer Channel Input Filter Register 2"
|
|
bitfld.word 0x16 8.--10. " FILT_CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x16 0.--7. 1. " FILT_PER ,Input filter sample period"
|
|
line.word 0x18 "DMA2,Timer Channel DMA Enable Register 2"
|
|
bitfld.word 0x18 2. " CMPLD2DE ,Comparator preload register 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " CMPLD1DE ,Comparator preload register 1 DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " IEFDE ,Input edge flag DMA enable" "Disabled,Enabled"
|
|
group.word 0x60++0x19
|
|
line.word 0x00 "COMP13,Timer Channel Compare Register 13"
|
|
line.word 0x02 "COMP23,Timer Channel Compare Register 23"
|
|
line.word 0x04 "CAPT3,Timer Channel Capture Register 3"
|
|
line.word 0x06 "LOAD3,Timer Channel Load Register 3"
|
|
line.word 0x08 "HOLD3,Timer Channel Hold Register 3"
|
|
line.word 0x0A "CNTR3,Timer Channel Counter Register 3"
|
|
line.word 0x0C "CTRL3,Timer Channel Control Register 3"
|
|
bitfld.word 0x0C 13.--15. " CM ,Count mode" "No operation,Count rising edges of primary src,Count rising and falling edges of primary src,Count rising edges of primary src while secondary input high active,Quadrature count mode,Count rising edges of primary src,Edge of secondary src triggers primary count until compare,Cascaded counter mode"
|
|
newline
|
|
bitfld.word 0x0C 9.--12. " PCS ,Primary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input,Counter 0 output,Counter 1 output,Counter 2 output,Counter 3 output,/1,/2,/4,/8,/16,/32,/64,/128"
|
|
bitfld.word 0x0C 7.--8. " SCS ,Secondary count source" "Counter 0 input,Counter 1 input,Counter 2 input,Counter 3 input"
|
|
newline
|
|
bitfld.word 0x0C 6. " ONCE ,Continuous or one shot counting mode" "Continuous,One shot"
|
|
bitfld.word 0x0C 5. " LENGTH ,Count length" "Until roll over,Until compare/re-initialize"
|
|
newline
|
|
bitfld.word 0x0C 4. " DIR ,Count direction" "Up,Down"
|
|
bitfld.word 0x0C 3. " COINIT ,Co-channel initialization" "Not initialized,Initialized"
|
|
newline
|
|
bitfld.word 0x0C 0.--2. " OUTMODE ,Output mode" "Asserted while counter is active,Clear OFLAG output on successful compare,Set OFLAG output on successful compare,Toggle OFLAG output on successful compare,Toggle OFLAG output using alternating compare registers,Set on compare cleared on secondary source input edge,Set on compare cleared on counter rollover,Enable gated clock output while counter is active"
|
|
newline
|
|
line.word 0x0E "SCTRL3,Timer Channel Status and Control Register 3"
|
|
bitfld.word 0x0E 15. " TCF ,Timer compare flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 14. " TCFIE ,Timer compare flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 13. " TOF ,Timer overflow flag" "No overflow,Overflow"
|
|
bitfld.word 0x0E 12. " TOFIE ,Timer overflow flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 11. " IEF ,Input edge flag" "Not occurred,Occurred"
|
|
bitfld.word 0x0E 10. " IEFIE ,Input edge flag interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x0E 9. " IPS ,Input polarity select" "Normal,Inverted"
|
|
rbitfld.word 0x0E 8. " INPUT ,External input signal" "0,1"
|
|
newline
|
|
bitfld.word 0x0E 6.--7. " CAPTURE_MODE ,Input capture mode" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.word 0x0E 5. " MSTR ,Master mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x0E 4. " EEOF ,Enable external OFLAG force" "Disabled,Enabled"
|
|
bitfld.word 0x0E 3. " VAL ,Forced OFLAG value" "Not forced,Forced"
|
|
newline
|
|
bitfld.word 0x0E 2. " FORCE ,Force OFLAG output" "Not forced,Forced"
|
|
bitfld.word 0x0E 1. " OPS ,Output polarity select" "True,Inverted"
|
|
newline
|
|
bitfld.word 0x0E 0. " OEN ,Output enable" "Disabled,Enabled"
|
|
line.word 0x10 "CMPLD13,Timer Channel Comparator Load Register 1 3"
|
|
line.word 0x12 "CMPLD23,Timer Channel Comparator Load Register 2 3"
|
|
line.word 0x14 "CSCTRL3,Timer Channel Comparator Status and Control Register 3"
|
|
bitfld.word 0x14 14.--15. " DBG_EN ,Debug actions enable" "Normal operation,Halt TMR counter,Force 0,Halt counter/Force 0"
|
|
bitfld.word 0x14 13. " FAULT ,Fault enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x14 12. " ALT_LOAD ,Alternative load enable" "Disabled,Enabled"
|
|
bitfld.word 0x14 11. " ROC ,Reload on capture" "Not reloaded,Reloaded"
|
|
newline
|
|
bitfld.word 0x14 10. " TCI ,Triggered count initialization control" "Counter stopped,Counter reloaded"
|
|
rbitfld.word 0x14 9. " UP ,Counting direction indicator" "Down,Up"
|
|
newline
|
|
bitfld.word 0x14 7. " TCF2EN ,Timer compare 2 interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 6. " TCF1EN ,Timer compare 1 interrupt enable" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 5. " TCF2 ,Timer compare 2 interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.word 0x14 4. " TCF1 ,Timer compare 1 interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.word 0x14 2.--3. " CL2 ,Compare load control 2" "Never preload,COMP1,COMP2,?..."
|
|
bitfld.word 0x14 0.--1. " CL1 ,Compare load control 1" "Never preload,COMP1,COMP2,?..."
|
|
line.word 0x16 "FILT3,Timer Channel Input Filter Register 3"
|
|
bitfld.word 0x16 8.--10. " FILT_CNT ,Input filter sample count" "3,4,5,6,7,8,9,10"
|
|
hexmask.word.byte 0x16 0.--7. 1. " FILT_PER ,Input filter sample period"
|
|
line.word 0x18 "DMA3,Timer Channel DMA Enable Register 3"
|
|
bitfld.word 0x18 2. " CMPLD2DE ,Comparator preload register 2 DMA enable" "Disabled,Enabled"
|
|
bitfld.word 0x18 1. " CMPLD1DE ,Comparator preload register 1 DMA enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.word 0x18 0. " IEFDE ,Input edge flag DMA enable" "Disabled,Enabled"
|
|
newline
|
|
group.word 0x1E++0x1
|
|
line.word 0x00 "ENBL,Timer Channel Enable Register"
|
|
bitfld.word 0x00 3. " ENBL[3] ,Timer channel 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " [2] ,Timer channel 2 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " [1] ,Timer channel 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " [0] ,Timer channel 0 enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "SAI (Synchronous Audio Interface)"
|
|
tree "SAI 1"
|
|
base ad:0x40384000
|
|
width 7.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature specification number"
|
|
line.long 0x04 "PARAM,Parameter"
|
|
bitfld.long 0x04 16.--19. " FRAME ,Frame size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 8.--11. " FIFO ,FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 0.--3. " DATALINE ,Number of datalines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "TCSR,SAI Transmit Control"
|
|
bitfld.long 0x00 31. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " STOPE ,Stop enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " DBGE ,Debug enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BCE ,Bit clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FR ,FIFO reset" "No reset,Reset"
|
|
bitfld.long 0x00 24. " SR ,Software reset" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 20. " WSF ,Word start flag" "Not detected,Detected"
|
|
eventfld.long 0x00 19. " SEF ,Sync error flag" "Not detected,Detected"
|
|
eventfld.long 0x00 18. " FEF ,FIFO error flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " FWF ,FIFO warning flag" "No enabled transmit,Enabled transmit"
|
|
bitfld.long 0x00 16. " FRF ,FIFO request flag" "Not reached,Reached"
|
|
bitfld.long 0x00 12. " WSIE ,Word start interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SEIE ,Sync error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FWIE ,FIFO warning interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRIE ,FIFO request interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FWDE ,FIFO warning DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FRDE ,FIFO request DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "TCR1,SAI Transmit Configuration 1"
|
|
bitfld.long 0x04 0.--4. " TFW ,Transmit FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x40384000+0x08))&0x80000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TCR2,SAI Transmit Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with receiver,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TCR2,SAI Transmit Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with receiver,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TCR3,SAI Transmit Configuration 3"
|
|
bitfld.long 0x00 27. " CFR[3] ,Channel FIFO reset 3" "No effect,Reset"
|
|
bitfld.long 0x00 26. " [2] ,Channel FIFO reset 2" "No effect,Reset"
|
|
bitfld.long 0x00 25. " [1] ,Channel FIFO reset 1" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [0] ,Channel FIFO reset 0" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCE[3] ,Transmit channel enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [2] ,Transmit channel enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [1] ,Transmit channel enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [0] ,Transmit channel enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " WDFL ,Word flag configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x40384000+0x08))&0x80000000)==0x00)
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "TCR4,SAI Transmit Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Start next frame,Continue from the same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,FIFO reads,FIFO writes,FIFO reads and writes"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " CHMOD ,Channel mode" "TDM mode,Output mode"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MF ,MSB first" "LSB,MSB"
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "Asserts with first bit of the frame,Asserts one bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "TCR5,SAI Transmit Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "TCR4,SAI Transmit Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Start next frame,Continue from the same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,FIFO reads,FIFO writes,FIFO reads and writes"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " CHMOD ,Channel mode" "TDM mode,Output mode"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MF ,MSB first" "LSB,MSB"
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "Asserts with first bit of the frame,Asserts one bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "TCR5,SAI Transmit Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "TDR0,SAI Transmit Data 0"
|
|
rgroup.long (0x20+0x20)++0x03
|
|
line.long 0x00 "TFR0,SAI Transmit FIFO 0"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "TDR1,SAI Transmit Data 1"
|
|
rgroup.long (0x24+0x20)++0x03
|
|
line.long 0x00 "TFR1,SAI Transmit FIFO 1"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TDR2,SAI Transmit Data 2"
|
|
rgroup.long (0x28+0x20)++0x03
|
|
line.long 0x00 "TFR2,SAI Transmit FIFO 2"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TDR3,SAI Transmit Data 3"
|
|
rgroup.long (0x2C+0x20)++0x03
|
|
line.long 0x00 "TFR3,SAI Transmit FIFO 3"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TMR,SAI Transmit Mask"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "RCSR,SAI Receive Control"
|
|
bitfld.long 0x00 31. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " STOPE ,Stop enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " DBGE ,Debug enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BCE ,Bit clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FR ,FIFO reset" "No reset,Reset"
|
|
bitfld.long 0x00 24. " SR ,Software reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WSF ,Word start flag" "Not detected,Detected"
|
|
bitfld.long 0x00 19. " SEF ,Sync error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " FEF ,FIFO error flag" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " FWF ,FIFO error flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 16. " FRF ,FIFO request flag" "Watermark not reached,Watermark reached"
|
|
bitfld.long 0x00 12. " WSIE ,Word start interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SEIE ,Sync error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FWIE ,FIFO warning interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRIE ,FIFO request interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FWDE ,FIFO warning DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FRDE ,FIFO request DMA enable" "Disabled,Enabled"
|
|
group.long 0x8C++0x13
|
|
line.long 0x00 "RCR1,SAI Receive Configuration 1"
|
|
bitfld.long 0x00 0.--4. " RFW ,Receive FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x40384000+0x88))&0x80000000)==0x00)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "RCR2,SAI Receive Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with transmitter,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
else
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "RCR2,SAI Receive Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with transmitter,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Not swapped,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock,MCLK1,MCLK2,MCLK3"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
endif
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "RCR3,SAI Receive Configuration 3"
|
|
bitfld.long 0x00 27. " CFR[3] ,Channel FIFO reset 3" "No reset,Reset"
|
|
bitfld.long 0x00 26. " [2] ,Channel FIFO reset 2" "No reset,Reset"
|
|
bitfld.long 0x00 25. " [1] ,Channel FIFO reset 1" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [0] ,Channel FIFO reset 0" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCE[3] ,Receive channel enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [2] ,Receive channel enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [1] ,Receive channel enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [0] ,Receive channel enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " WDFL ,Word flag configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x40384000+0x88))&0x80000000)==0x00)
|
|
group.long 0x98++0x07
|
|
line.long 0x00 "RCR4,SAI Receive Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Next frame,Same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,Writes,Reads,Both"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4. " MF ,MSB first" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "First bit,Before the first bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "RCR5,SAI Receive Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
else
|
|
rgroup.long 0x98++0x07
|
|
line.long 0x00 "RCR4,SAI Receive Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Next frame,Same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,Writes,Reads,Both"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4. " MF ,MSB first" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "First bit,Before the first bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "RCR5,SAI Receive Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
endif
|
|
hgroup.long 0xA0++0x03
|
|
hide.long 0x00 "RDR0,SAI Receive Data 0"
|
|
in
|
|
rgroup.long (0xA0+0x20)++0x03
|
|
line.long 0x00 "RFR0,SAI Receive FIFO 0"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xA4++0x03
|
|
hide.long 0x00 "RDR1,SAI Receive Data 1"
|
|
in
|
|
rgroup.long (0xA4+0x20)++0x03
|
|
line.long 0x00 "RFR1,SAI Receive FIFO 1"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xA8++0x03
|
|
hide.long 0x00 "RDR2,SAI Receive Data 2"
|
|
in
|
|
rgroup.long (0xA8+0x20)++0x03
|
|
line.long 0x00 "RFR2,SAI Receive FIFO 2"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xAC++0x03
|
|
hide.long 0x00 "RDR3,SAI Receive Data 3"
|
|
in
|
|
rgroup.long (0xAC+0x20)++0x03
|
|
line.long 0x00 "RFR3,SAI Receive FIFO 3"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xE0++0x13
|
|
line.long 0x00 "RMR,SAI Receive Mask"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SAI 2"
|
|
base ad:0x40388000
|
|
width 7.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature specification number"
|
|
line.long 0x04 "PARAM,Parameter"
|
|
bitfld.long 0x04 16.--19. " FRAME ,Frame size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 8.--11. " FIFO ,FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 0.--3. " DATALINE ,Number of datalines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "TCSR,SAI Transmit Control"
|
|
bitfld.long 0x00 31. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " STOPE ,Stop enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " DBGE ,Debug enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BCE ,Bit clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FR ,FIFO reset" "No reset,Reset"
|
|
bitfld.long 0x00 24. " SR ,Software reset" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 20. " WSF ,Word start flag" "Not detected,Detected"
|
|
eventfld.long 0x00 19. " SEF ,Sync error flag" "Not detected,Detected"
|
|
eventfld.long 0x00 18. " FEF ,FIFO error flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " FWF ,FIFO warning flag" "No enabled transmit,Enabled transmit"
|
|
bitfld.long 0x00 16. " FRF ,FIFO request flag" "Not reached,Reached"
|
|
bitfld.long 0x00 12. " WSIE ,Word start interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SEIE ,Sync error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FWIE ,FIFO warning interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRIE ,FIFO request interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FWDE ,FIFO warning DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FRDE ,FIFO request DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "TCR1,SAI Transmit Configuration 1"
|
|
bitfld.long 0x04 0.--4. " TFW ,Transmit FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x40388000+0x08))&0x80000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TCR2,SAI Transmit Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with receiver,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TCR2,SAI Transmit Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with receiver,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TCR3,SAI Transmit Configuration 3"
|
|
bitfld.long 0x00 27. " CFR[3] ,Channel FIFO reset 3" "No effect,Reset"
|
|
bitfld.long 0x00 26. " [2] ,Channel FIFO reset 2" "No effect,Reset"
|
|
bitfld.long 0x00 25. " [1] ,Channel FIFO reset 1" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [0] ,Channel FIFO reset 0" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCE[3] ,Transmit channel enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [2] ,Transmit channel enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [1] ,Transmit channel enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [0] ,Transmit channel enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " WDFL ,Word flag configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x40388000+0x08))&0x80000000)==0x00)
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "TCR4,SAI Transmit Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Start next frame,Continue from the same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,FIFO reads,FIFO writes,FIFO reads and writes"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " CHMOD ,Channel mode" "TDM mode,Output mode"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MF ,MSB first" "LSB,MSB"
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "Asserts with first bit of the frame,Asserts one bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "TCR5,SAI Transmit Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "TCR4,SAI Transmit Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Start next frame,Continue from the same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,FIFO reads,FIFO writes,FIFO reads and writes"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " CHMOD ,Channel mode" "TDM mode,Output mode"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MF ,MSB first" "LSB,MSB"
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "Asserts with first bit of the frame,Asserts one bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "TCR5,SAI Transmit Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "TDR0,SAI Transmit Data 0"
|
|
rgroup.long (0x20+0x20)++0x03
|
|
line.long 0x00 "TFR0,SAI Transmit FIFO 0"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "TDR1,SAI Transmit Data 1"
|
|
rgroup.long (0x24+0x20)++0x03
|
|
line.long 0x00 "TFR1,SAI Transmit FIFO 1"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TDR2,SAI Transmit Data 2"
|
|
rgroup.long (0x28+0x20)++0x03
|
|
line.long 0x00 "TFR2,SAI Transmit FIFO 2"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TDR3,SAI Transmit Data 3"
|
|
rgroup.long (0x2C+0x20)++0x03
|
|
line.long 0x00 "TFR3,SAI Transmit FIFO 3"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TMR,SAI Transmit Mask"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "RCSR,SAI Receive Control"
|
|
bitfld.long 0x00 31. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " STOPE ,Stop enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " DBGE ,Debug enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BCE ,Bit clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FR ,FIFO reset" "No reset,Reset"
|
|
bitfld.long 0x00 24. " SR ,Software reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WSF ,Word start flag" "Not detected,Detected"
|
|
bitfld.long 0x00 19. " SEF ,Sync error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " FEF ,FIFO error flag" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " FWF ,FIFO error flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 16. " FRF ,FIFO request flag" "Watermark not reached,Watermark reached"
|
|
bitfld.long 0x00 12. " WSIE ,Word start interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SEIE ,Sync error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FWIE ,FIFO warning interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRIE ,FIFO request interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FWDE ,FIFO warning DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FRDE ,FIFO request DMA enable" "Disabled,Enabled"
|
|
group.long 0x8C++0x13
|
|
line.long 0x00 "RCR1,SAI Receive Configuration 1"
|
|
bitfld.long 0x00 0.--4. " RFW ,Receive FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x40388000+0x88))&0x80000000)==0x00)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "RCR2,SAI Receive Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with transmitter,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
else
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "RCR2,SAI Receive Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with transmitter,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Not swapped,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock,MCLK1,MCLK2,MCLK3"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
endif
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "RCR3,SAI Receive Configuration 3"
|
|
bitfld.long 0x00 27. " CFR[3] ,Channel FIFO reset 3" "No reset,Reset"
|
|
bitfld.long 0x00 26. " [2] ,Channel FIFO reset 2" "No reset,Reset"
|
|
bitfld.long 0x00 25. " [1] ,Channel FIFO reset 1" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [0] ,Channel FIFO reset 0" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCE[3] ,Receive channel enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [2] ,Receive channel enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [1] ,Receive channel enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [0] ,Receive channel enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " WDFL ,Word flag configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x40388000+0x88))&0x80000000)==0x00)
|
|
group.long 0x98++0x07
|
|
line.long 0x00 "RCR4,SAI Receive Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Next frame,Same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,Writes,Reads,Both"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4. " MF ,MSB first" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "First bit,Before the first bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "RCR5,SAI Receive Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
else
|
|
rgroup.long 0x98++0x07
|
|
line.long 0x00 "RCR4,SAI Receive Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Next frame,Same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,Writes,Reads,Both"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4. " MF ,MSB first" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "First bit,Before the first bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "RCR5,SAI Receive Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
endif
|
|
hgroup.long 0xA0++0x03
|
|
hide.long 0x00 "RDR0,SAI Receive Data 0"
|
|
in
|
|
rgroup.long (0xA0+0x20)++0x03
|
|
line.long 0x00 "RFR0,SAI Receive FIFO 0"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xA4++0x03
|
|
hide.long 0x00 "RDR1,SAI Receive Data 1"
|
|
in
|
|
rgroup.long (0xA4+0x20)++0x03
|
|
line.long 0x00 "RFR1,SAI Receive FIFO 1"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xA8++0x03
|
|
hide.long 0x00 "RDR2,SAI Receive Data 2"
|
|
in
|
|
rgroup.long (0xA8+0x20)++0x03
|
|
line.long 0x00 "RFR2,SAI Receive FIFO 2"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xAC++0x03
|
|
hide.long 0x00 "RDR3,SAI Receive Data 3"
|
|
in
|
|
rgroup.long (0xAC+0x20)++0x03
|
|
line.long 0x00 "RFR3,SAI Receive FIFO 3"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xE0++0x13
|
|
line.long 0x00 "RMR,SAI Receive Mask"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SAI 3"
|
|
base ad:0x4038C000
|
|
width 7.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "VERID,Version ID"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,Major version number"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,Minor version number"
|
|
hexmask.long.word 0x00 0.--15. 1. " FEATURE ,Feature specification number"
|
|
line.long 0x04 "PARAM,Parameter"
|
|
bitfld.long 0x04 16.--19. " FRAME ,Frame size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 8.--11. " FIFO ,FIFO size" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
bitfld.long 0x04 0.--3. " DATALINE ,Number of datalines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "TCSR,SAI Transmit Control"
|
|
bitfld.long 0x00 31. " TE ,Transmitter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " STOPE ,Stop enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " DBGE ,Debug enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BCE ,Bit clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FR ,FIFO reset" "No reset,Reset"
|
|
bitfld.long 0x00 24. " SR ,Software reset" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 20. " WSF ,Word start flag" "Not detected,Detected"
|
|
eventfld.long 0x00 19. " SEF ,Sync error flag" "Not detected,Detected"
|
|
eventfld.long 0x00 18. " FEF ,FIFO error flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " FWF ,FIFO warning flag" "No enabled transmit,Enabled transmit"
|
|
bitfld.long 0x00 16. " FRF ,FIFO request flag" "Not reached,Reached"
|
|
bitfld.long 0x00 12. " WSIE ,Word start interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SEIE ,Sync error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FWIE ,FIFO warning interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRIE ,FIFO request interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FWDE ,FIFO warning DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FRDE ,FIFO request DMA enable" "Disabled,Enabled"
|
|
line.long 0x04 "TCR1,SAI Transmit Configuration 1"
|
|
bitfld.long 0x04 0.--4. " TFW ,Transmit FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x4038C000+0x08))&0x80000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TCR2,SAI Transmit Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with receiver,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
else
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TCR2,SAI Transmit Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with receiver,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TCR3,SAI Transmit Configuration 3"
|
|
bitfld.long 0x00 27. " CFR[3] ,Channel FIFO reset 3" "No effect,Reset"
|
|
bitfld.long 0x00 26. " [2] ,Channel FIFO reset 2" "No effect,Reset"
|
|
bitfld.long 0x00 25. " [1] ,Channel FIFO reset 1" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [0] ,Channel FIFO reset 0" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCE[3] ,Transmit channel enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [2] ,Transmit channel enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [1] ,Transmit channel enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [0] ,Transmit channel enable 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " WDFL ,Word flag configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x4038C000+0x08))&0x80000000)==0x00)
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "TCR4,SAI Transmit Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Start next frame,Continue from the same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,FIFO reads,FIFO writes,FIFO reads and writes"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " CHMOD ,Channel mode" "TDM mode,Output mode"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MF ,MSB first" "LSB,MSB"
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "Asserts with first bit of the frame,Asserts one bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "TCR5,SAI Transmit Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
else
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "TCR4,SAI Transmit Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Start next frame,Continue from the same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,FIFO reads,FIFO writes,FIFO reads and writes"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5. " CHMOD ,Channel mode" "TDM mode,Output mode"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MF ,MSB first" "LSB,MSB"
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "Asserts with first bit of the frame,Asserts one bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "TCR5,SAI Transmit Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "TDR0,SAI Transmit Data 0"
|
|
rgroup.long (0x20+0x20)++0x03
|
|
line.long 0x00 "TFR0,SAI Transmit FIFO 0"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "TDR1,SAI Transmit Data 1"
|
|
rgroup.long (0x24+0x20)++0x03
|
|
line.long 0x00 "TFR1,SAI Transmit FIFO 1"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TDR2,SAI Transmit Data 2"
|
|
rgroup.long (0x28+0x20)++0x03
|
|
line.long 0x00 "TFR2,SAI Transmit FIFO 2"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "TDR3,SAI Transmit Data 3"
|
|
rgroup.long (0x2C+0x20)++0x03
|
|
line.long 0x00 "TFR3,SAI Transmit FIFO 3"
|
|
bitfld.long 0x00 31. " WCP ,Write channel pointer" "No effect,Enabled"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TMR,SAI Transmit Mask"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "RCSR,SAI Receive Control"
|
|
bitfld.long 0x00 31. " RE ,Receiver enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " STOPE ,Stop enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " DBGE ,Debug enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " BCE ,Bit clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " FR ,FIFO reset" "No reset,Reset"
|
|
bitfld.long 0x00 24. " SR ,Software reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WSF ,Word start flag" "Not detected,Detected"
|
|
bitfld.long 0x00 19. " SEF ,Sync error flag" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " FEF ,FIFO error flag" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.long 0x00 17. " FWF ,FIFO error flag" "Not detected,Detected"
|
|
rbitfld.long 0x00 16. " FRF ,FIFO request flag" "Watermark not reached,Watermark reached"
|
|
bitfld.long 0x00 12. " WSIE ,Word start interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SEIE ,Sync error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " FEIE ,FIFO error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " FWIE ,FIFO warning interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FRIE ,FIFO request interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " FWDE ,FIFO warning DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FRDE ,FIFO request DMA enable" "Disabled,Enabled"
|
|
group.long 0x8C++0x13
|
|
line.long 0x00 "RCR1,SAI Receive Configuration 1"
|
|
bitfld.long 0x00 0.--4. " RFW ,Receive FIFO watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x4038C000+0x88))&0x80000000)==0x00)
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "RCR2,SAI Receive Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with transmitter,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Normal,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock selected,Cycle time,Pulse width high,Pulse width low"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
else
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "RCR2,SAI Receive Configuration 2"
|
|
bitfld.long 0x00 30.--31. " SYNC ,Synchronous mode" "Asynchronous mode,Synchronous with transmitter,?..."
|
|
bitfld.long 0x00 29. " BCS ,Bit clock swap" "Not swapped,Swapped"
|
|
bitfld.long 0x00 28. " BCI ,Bit clock input" "No effect,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MSEL ,MCLK select" "Bus clock,MCLK1,MCLK2,MCLK3"
|
|
bitfld.long 0x00 25. " BCP ,Bit clock polarity" "High,Low"
|
|
bitfld.long 0x00 24. " BCD ,Bit clock direction" "Slave mode,Master mode"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DIV ,Bit clock divide"
|
|
endif
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "RCR3,SAI Receive Configuration 3"
|
|
bitfld.long 0x00 27. " CFR[3] ,Channel FIFO reset 3" "No reset,Reset"
|
|
bitfld.long 0x00 26. " [2] ,Channel FIFO reset 2" "No reset,Reset"
|
|
bitfld.long 0x00 25. " [1] ,Channel FIFO reset 1" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 24. " [0] ,Channel FIFO reset 0" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCE[3] ,Receive channel enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [2] ,Receive channel enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " [1] ,Receive channel enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " [0] ,Receive channel enable 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " WDFL ,Word flag configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.l(ad:0x4038C000+0x88))&0x80000000)==0x00)
|
|
group.long 0x98++0x07
|
|
line.long 0x00 "RCR4,SAI Receive Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Next frame,Same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,Writes,Reads,Both"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4. " MF ,MSB first" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "First bit,Before the first bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "RCR5,SAI Receive Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
else
|
|
rgroup.long 0x98++0x07
|
|
line.long 0x00 "RCR4,SAI Receive Configuration 4"
|
|
bitfld.long 0x00 28. " FCONT ,FIFO continue on error" "Next frame,Same word"
|
|
bitfld.long 0x00 26.--27. " FCOMB ,FIFO combine mode" "Disabled,Writes,Reads,Both"
|
|
bitfld.long 0x00 24.--25. " FPACK ,FIFO packing mode" "Disabled,,8-bit,16-bit"
|
|
textline " "
|
|
bitfld.long 0x00 16.--20. " FRSZ ,Frame size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " SYWD ,Sync width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4. " MF ,MSB first" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FSE ,Frame sync early" "First bit,Before the first bit"
|
|
bitfld.long 0x00 2. " ONDEM ,On demand mode" "Generated continuously,Generated when the FIFO warning flag is clear"
|
|
bitfld.long 0x00 1. " FSP ,Frame sync polarity" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FSD ,Frame sync direction" "Slave mode,Master mode"
|
|
line.long 0x04 "RCR5,SAI Receive Configuration 5"
|
|
bitfld.long 0x04 24.--28. " WNW ,Word N width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 16.--20. " W0W ,Word 0 width" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x04 8.--12. " FBT ,First bit shifted" ",,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
endif
|
|
hgroup.long 0xA0++0x03
|
|
hide.long 0x00 "RDR0,SAI Receive Data 0"
|
|
in
|
|
rgroup.long (0xA0+0x20)++0x03
|
|
line.long 0x00 "RFR0,SAI Receive FIFO 0"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xA4++0x03
|
|
hide.long 0x00 "RDR1,SAI Receive Data 1"
|
|
in
|
|
rgroup.long (0xA4+0x20)++0x03
|
|
line.long 0x00 "RFR1,SAI Receive FIFO 1"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xA8++0x03
|
|
hide.long 0x00 "RDR2,SAI Receive Data 2"
|
|
in
|
|
rgroup.long (0xA8+0x20)++0x03
|
|
line.long 0x00 "RFR2,SAI Receive FIFO 2"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hgroup.long 0xAC++0x03
|
|
hide.long 0x00 "RDR3,SAI Receive Data 3"
|
|
in
|
|
rgroup.long (0xAC+0x20)++0x03
|
|
line.long 0x00 "RFR3,SAI Receive FIFO 3"
|
|
bitfld.long 0x00 16.--21. " WFP ,Write FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 15. " RCP ,Receive channel pointer" "No effect,FIFO combine enabled"
|
|
bitfld.long 0x00 0.--5. " RFP ,Read FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xE0++0x13
|
|
line.long 0x00 "RMR,SAI Receive Mask"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "SEMC (Smart External Memory Controller)"
|
|
base ad:0x402F0000
|
|
width 14.
|
|
group.long 0x00++0xF
|
|
line.long 0x00 "MCR,Module Control Register"
|
|
bitfld.long 0x00 24.--28. " BTO ,Bus timeout cycles" "255*1,255*2,255*2^2,255*2^3,255*2^4,255*2^5,255*2^6,255*2^7,255*2^8,255*2^9,255*2^10,255*2^11,255*2^12,255*2^13,255*2^14,255*2^15,255*2^16,255*2^17,255*2^18,255*2^19,255*2^20,255*2^21,255*2^22,255*2^23,255*2^24,255*2^25,255*2^26,255*2^27,255*2^28,255*2^29,255*2^30,255*2^31"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CTO ,Bus timeout cycles"
|
|
bitfld.long 0x00 7. " WPOL1 ,WAIT/RDY# polarity for NAND" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 6. " WPOL0 ,WAIT/RDY# polarity for NOR/PSRAM" "Low,High"
|
|
bitfld.long 0x00 2. " DQSMD ,DQS mode" "Internal,DQS pad"
|
|
bitfld.long 0x00 1. " MDIS ,Module Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No reset,Reset"
|
|
line.long 0x04 "IOCR,IO Mux Control Register"
|
|
bitfld.long 0x04 15.--17. " MUX_RDY ,SEMC_RDY function selection" "NAND Ready/Wait,SDRAM CS1,SDRAM CS2,SDRAM CS3,NOR CE,PSRAM CE,DBI CSX,NOR/PSRAM"
|
|
bitfld.long 0x04 12.--14. " MUX_CSX3 ,SEMC_CSX3 output selection" "NOR/PSRAM,SDRAM CS1,SDRAM CS2,SDRAM CS3,NAND CE,NOR CE,PSRAM CE,DBI CSX"
|
|
bitfld.long 0x04 9.--11. " MUX_CSX2 ,SEMC_CSX2 output selection" "NOR/PSRAM,SDRAM CS1,SDRAM CS2,SDRAM CS3,NAND CE,NOR CE,PSRAM CE,DBI CSX"
|
|
newline
|
|
bitfld.long 0x04 6.--8. " MUX_CSX1 ,SEMC_CSX1 output selection" "NOR/PSRAM,SDRAM CS1,SDRAM CS2,SDRAM CS3,NAND CE,NOR CE,PSRAM CE,DBI CSX"
|
|
bitfld.long 0x04 3.--5. " MUX_CSX0 ,SEMC_CSX0 output selection" "NOR/PSRAM,SDRAM CS1,SDRAM CS2,SDRAM CS3,NAND CE,NOR CE,PSRAM CE,DBI CSX"
|
|
sif (cpu()=="IMXRT1021"||cpu()=="IMXRT1051"||cpu()=="IMXRT1052")
|
|
bitfld.long 0x04 0.--2. " MUX_A8 ,SEMC_A8 output selection" "SDRAM,NAND CE,NOR CE,PSRAM CE,DBI CSX,SDRAM,SDRAM,SDRAM"
|
|
else
|
|
bitfld.long 0x04 0.--2. " MUX_A8 ,SEMC_A8 output selection" "NOR/PSRAM,SDRAM CS1,SDRAM CS2,SDRAM CS3,NAND CE,NOR CE,PSRAM CE,DBI CSX"
|
|
endif
|
|
line.long 0x08 "BMCR0,Master Bus Control Register 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " WRWS ,Weight of Slave Hit"
|
|
hexmask.long.byte 0x08 8.--15. 1. " WSH ,Weight of Slave Hit"
|
|
bitfld.long 0x08 4.--7. " WAGE ,Weight of Aging" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x08 0.--3. " WQOS ,Weight of QoS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0C "BMCR1,Master Bus Control Register 1"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " WBR ,Weight of Bank Rotation"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " WRWS ,Weight of Read/Write switch"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " WPH ,Weight of Page Hit"
|
|
newline
|
|
bitfld.long 0x0C 4.--7. " WAGE ,Weight of Aging" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 0.--3. " WQOS ,Weight of QoS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BR0,Base Register 0 for SDRAM CS0 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BR0,Base Register 1 for SDRAM CS1 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "BR0,Base Register 2 for SDRAM CS2 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "BR0,Base Register 3 for SDRAM CS3 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "BR0,Base Register 4 for SDRAM CS4 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "BR0,Base Register 5 for SDRAM CS5 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "BR0,Base Register 6 for SDRAM CS6 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "BR0,Base Register 7 for SDRAM CS7 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "BR0,Base Register 8 for SDRAM CS8 device"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " BA ,Base Address"
|
|
bitfld.long 0x00 1.--5. " MS ,Memory size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB,4GB"
|
|
bitfld.long 0x00 0. " VLD ,Valid" "Disabled,Enabled"
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "INTEN,Interrupt Enable Register"
|
|
bitfld.long 0x00 5. " NDNOPENDEN ,NDNOPENDEN" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NDPAGEENDEN ,NDPAGEENDEN" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " AXIBUSERREN ,AXI bus error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " AXICMDERREN ,AXI command error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IPCMDERREN ,IP command error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IPCMDDONEEN ,IP command done interrupt enable" "Disabled,Enabled"
|
|
line.long 0x04 "INTR,Interrupt Enable Register"
|
|
eventfld.long 0x04 5. " NDNOPEND ,NDNOPEND" "Disabled,Enabled"
|
|
eventfld.long 0x04 4. " NDPAGEEND ,NDPAGEEND" "Disabled,Enabled"
|
|
eventfld.long 0x04 3. " AXIBUSERR ,AXIBUSERR" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x04 2. " AXICMDERR ,AXICMDERR" "Disabled,Enabled"
|
|
eventfld.long 0x04 1. " IPCMDERR ,IPCMDERR" "Disabled,Enabled"
|
|
eventfld.long 0x04 0. " IPCMDDONE ,IPCMDDONE" "Disabled,Enabled"
|
|
group.long 0x40++0x0F
|
|
line.long 0x00 "SDRAMCR0,SDRAM control register 0"
|
|
bitfld.long 0x00 10.--11. " CL ,CAS Latency" "1,1,2,3"
|
|
bitfld.long 0x00 8.--9. " COL ,Column address bit number" "12 bit,11 bit,10 bit,9 bit"
|
|
bitfld.long 0x00 4.--6. " BL ,Burst Length" "1,2,4,8,8,8,8,8"
|
|
newline
|
|
bitfld.long 0x00 0. " PS ,Port Size" "8 bit,16 bit"
|
|
line.long 0x04 "SDRAMCR1,SDRAM control register 1"
|
|
bitfld.long 0x04 20.--23. " ACT2PRE ,ACT to Precharge minimum time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " CKEOFF ,CKE OFF minimum time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 13.--15. " WRC ,Write recovery time" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x04 8.--12. " RFRC ,Refresh recovery time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 4.--7. " ACT2RW ,ACT to Read/Write wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PRE2ACT ,PRECHARGE to ACT/Refresh wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "SDRAMCR2,SDRAM control register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " ITO ,SDRAM Idle timeout"
|
|
hexmask.long.byte 0x08 16.--23. 1. " ACT2ACT ,ACT to ACT wait time"
|
|
hexmask.long.byte 0x08 8.--15. 1. " REF2REF ,Refresh to Refresh wait time"
|
|
newline
|
|
hexmask.long.byte 0x08 0.--7. 1. " SRRC ,Self Refresh Recovery time"
|
|
line.long 0x0C "SDRAMCR3,SDRAM control register 3"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " UT ,Refresh urgent threshold"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " RT ,Refresh timer period"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " PRESCALE ,Prescaler timer period"
|
|
newline
|
|
bitfld.long 0x0C 1.--3. " REBL ,Refresh burst length" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x0C 0. " REN ,Refresh enable" "Disabled,Enabled"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "NANDCR0,NAND control register 0"
|
|
bitfld.long 0x00 8.--10. " COL ,Column address bit number" "16,15,14,13,12,11,10,9"
|
|
bitfld.long 0x00 7. " EDO ,EDO mode enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " BL ,Burst Length" "1,2,4,8,16,32,64,64"
|
|
newline
|
|
bitfld.long 0x00 0. " PS ,Port Size" "8 bit,16 bit"
|
|
line.long 0x04 "NANDCR1,NAND control register 1"
|
|
bitfld.long 0x04 28.--31. " CEITV ,CE# interval time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 24.--27. " TA ,Turnaround time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " REH ,RE# HIGH time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 16.--19. " REL ,RE# LOW time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 12.--15. " WEH ,WE# HIGH time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " WEL ,WE# LOW time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 4.--7. " CEH ,CE hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " CES ,CE setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "NANDCR2,NAND control register 2"
|
|
bitfld.long 0x08 24.--29. " TWB ,WE# HIGH to busy wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x08 18.--23. " TRR ,Ready to RE# LOW min wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x08 12.--17. " TADL ,ALE to WRITE Data start wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
newline
|
|
bitfld.long 0x08 6.--11. " TRHW ,RE# HIGH to WE# LOW wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x08 0.--5. " TWHR ,WE# HIGH to RE# LOW wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
line.long 0x0C "NANDCR3,NAND control register 3"
|
|
bitfld.long 0x0C 2. " NDOPT3 ,NAND option bit 3" "Not bypassed,Bypassed"
|
|
bitfld.long 0x0C 1. " NDOPT2 ,NAND option bit 2" "Not bypassed,Bypassed"
|
|
bitfld.long 0x0C 0. " NDOPT1 ,NAND option bit 1" "Not bypassed,Bypassed"
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|
group.long 0x60++0x0B
|
|
line.long 0x00 "NORCR0,NOR control register 0"
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|
bitfld.long 0x00 12.--15. " COL ,Column Address bit width" "12 bits,11 bits,10 bits,9 bits,8 bits,7 bits,6 bits,5 bits,4 bits,3 bits,2 bits,12 bits,12 bits,12 bits,12 bits,12 bits"
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|
bitfld.long 0x00 10. " ADVP ,ADV# polarity" "Low,High"
|
|
bitfld.long 0x00 8.--9. " AM ,Address Mode" "Address/Data MUX mode,Advanced Address/Data MUX mode,Address/Data non-MUX mode,Address/Data non-MUX mode"
|
|
newline
|
|
bitfld.long 0x00 4.--6. " BL ,Burst Length" "1,2,4,8,16,32,64,64"
|
|
bitfld.long 0x00 0. " PS ,Port Size" "8 bit,16 bit"
|
|
line.long 0x04 "NORCR1,NOR control register 1"
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|
bitfld.long 0x04 28.--31. " REH ,RE HIGH time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x04 24.--27. " REL ,RE LOW time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " WEH ,WE HIGH time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 16.--19. " WEL ,WE LOW time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 12.--15. " AH ,Address hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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|
bitfld.long 0x04 8.--11. " AS ,Address setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 4.--7. " CEH ,CE hold min time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " CES ,CE setup time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "NORCR2,NOR control register 2"
|
|
bitfld.long 0x08 24.--27. " CEITV ,CE# interval min time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 20.--23. " RD ,Read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " LC ,Latency count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x08 12.--15. " AWDH ,Latency count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 8.--11. " TA ,Turnaround time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " WDH ,Write Data hold time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x08 0.--3. " WDS ,Write Data setup time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x70++0x0B
|
|
line.long 0x00 "SRAMCR0,SRAM control register 0"
|
|
bitfld.long 0x00 12.--15. " COL ,Column Address bit width" "12 bits,11 bits,10 bits,9 bits,8 bits,7 bits,6 bits,5 bits,4 bits,3 bits,2 bits,12 bits,12 bits,12 bits,12 bits,12 bits"
|
|
bitfld.long 0x00 10. " ADVP ,ADV# polarity" "Low,High"
|
|
bitfld.long 0x00 8.--9. " AM ,Address Mode" "Address/Data MUX mode,Advanced Address/Data MUX mode,Address/Data non-MUX mode,Address/Data non-MUX mode"
|
|
newline
|
|
bitfld.long 0x00 4.--6. " BL ,Burst Length" "1,2,4,8,16,32,64,64"
|
|
bitfld.long 0x00 0. " PS ,Port Size" "8 bit,16 bit"
|
|
line.long 0x04 "SRAMCR1,SRAM control register 1"
|
|
bitfld.long 0x04 28.--31. " REH ,RE HIGH time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 24.--27. " REL ,RE LOW time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " WEH ,WE HIGH time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 16.--19. " WEL ,WE LOW time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 12.--15. " AH ,Address hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " AS ,Address setup time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 4.--7. " CEH ,CE hold min time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " CES ,CE setup time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "SRAMCR2,SRAM control register 2"
|
|
bitfld.long 0x08 24.--27. " CEITV ,CE# interval min time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 20.--23. " RD ,Read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 16.--19. " LC ,Latency count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x08 12.--15. " AWDH ,Latency count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 8.--11. " TA ,Turnaround time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 4.--7. " WDH ,Write Data hold time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x08 0.--3. " WDS ,Write Data setup time cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x80++0x07
|
|
line.long 0x00 "DBICR0,DBI-B control register 0"
|
|
bitfld.long 0x00 12.--15. " COL ,Column Address bit width" "12 bits,11 bits,10 bits,9 bits,8 bits,7 bits,6 bits,5 bits,4 bits,3 bits,2 bits,12 bits,12 bits,12 bits,12 bits,12 bits"
|
|
bitfld.long 0x00 4.--6. " BL ,Burst Length" "1,2,4,8,16,32,64,64"
|
|
bitfld.long 0x00 0. " PS ,Port Size" "8 bit,16 bit"
|
|
line.long 0x04 "DBICR1,DBI-B control register 0"
|
|
bitfld.long 0x04 24.--27. " CEITV ,CSX interval min time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 20.--23. " REH ,RDX High Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 16.--19. " REL ,RDX Low Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 12.--15. " WEH ,WRX High Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 8.--11. " WEL ,WRX Low Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 4.--7. " CEH ,CSX Hold Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x04 0.--3. " CES ,CSX Setup Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x90++0x0B
|
|
line.long 0x00 "IPCR0,IP Command control register 0"
|
|
line.long 0x04 "IPCR1,IP Command control register 1"
|
|
bitfld.long 0x04 0.--2. " DATSZ ,Data Size in Byte" "4,1,2,3,4,4,4,4"
|
|
line.long 0x08 "IPCR2,IP Command control register 2"
|
|
bitfld.long 0x08 3. " BM3 ,Byte Mask for Byte 3" "Unmasked,Masked"
|
|
bitfld.long 0x08 2. " BM2 ,Byte Mask for Byte 2" "Unmasked,Masked"
|
|
bitfld.long 0x08 1. " BM1 ,Byte Mask for Byte 1" "Unmasked,Masked"
|
|
newline
|
|
bitfld.long 0x08 0. " BM0 ,Byte Mask for Byte 0" "Unmasked,Masked"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "IPCMD, IP Command register"
|
|
hexmask.long.word 0x00 16.--31. 1. " KEY ,KEY"
|
|
hexmask.long.word 0x00 0.--15. 1. " CMD ,CMD"
|
|
rgroup.long 0xC0++0x03
|
|
line.long 0x00 "STS0,Status register 0"
|
|
bitfld.long 0x00 1. " NARDY ,Indicating NAND device Ready/WAIT# pin level" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " IDLE ,Indicating whether SEMC is in IDLE state" "Not IDLE state,IDLE state"
|
|
rgroup.long 0xC8++0x03
|
|
line.long 0x00 "STS2,Status register 2"
|
|
bitfld.long 0x00 3. " NDWRPEND ,Pending AXI command to NAND device" "No pending,Pending"
|
|
rgroup.long 0xF0++0x03
|
|
line.long 0x00 "STS12,Status register 12"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SNVS (Secure Non-Volatile Storage)"
|
|
base ad:0x400D4000
|
|
width 21.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "HPLR,SNVS_HP Lock Register"
|
|
bitfld.long 0x00 5. " GPR_SL ,General purpose register soft lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 4. " MC_SL ,Monotonic counter soft lock" "Unlocked,Locked"
|
|
line.long 0x04 "HPCOMR,SNVS_HP Command Register"
|
|
bitfld.long 0x04 31. " NPSWA_EN ,Non-privileged software access enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " LP_SWR_DIS ,LP software reset disable" "No,Yes"
|
|
bitfld.long 0x04 4. " LP_SWR ,LP software reset" "No reset,Reset"
|
|
if (((per.l(ad:0x400D4000+0x08)&0x01)==0x01))
|
|
if (((per.l(ad:0x400D4000+0x08))&0x100)==0x100)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "HPCR,SNVS_HP Control Register"
|
|
bitfld.long 0x00 27. " BTN_MASK ,Button interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24.--26. " BTN_CONFIG ,Button configuration" "Low,High,Rising edge,Falling edge,Both edges,?..."
|
|
rbitfld.long 0x00 10.--14. " HPCALB_VAL ,HP calibration value per each 32768 ticks of the counter" "0,+1,+2,,,,,,,,,,,,,+15,-16,-15,,,,,,,,,,,,,-2,-1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HPCALB_EN ,HP real time counter calibration enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--7. " PI_FREQ ,Periodic interrupt frequency" "Bit 0 of HPRTCLR,Bit 1 of HPRTCLR,Bit 2 of HPRTCLR,Bit 3 of HPRTCLR,Bit 4 of HPRTCLR,Bit 5 of HPRTCLR,Bit 6 of HPRTCLR,Bit 7 of HPRTCLR,Bit 8 of HPRTCLR,Bit 9 of HPRTCLR,Bit 10 of HPRTCLR,Bit 11 of HPRTCLR,Bit 12 of HPRTCLR,Bit 13 of HPRTCLR,Bit 14 of HPRTCLR,Bit 15 of HPRTCLR"
|
|
bitfld.long 0x00 3. " PI_EN ,HP periodic interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HPTA_EN ,HP time alarm enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RTC_EN ,HP real time counter enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "HPCR,SNVS_HP Control Register"
|
|
bitfld.long 0x00 27. " BTN_MASK ,Button interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24.--26. " BTN_CONFIG ,Button configuration" "Low,High,Rising edge,Falling edge,Both edges,?..."
|
|
bitfld.long 0x00 10.--14. " HPCALB_VAL ,HP calibration value per each 32768 ticks of the counter" "0,+1,+2,,,,,,,,,,,,,+15,-16,-15,,,,,,,,,,,,,-2,-1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HPCALB_EN ,HP real time counter calibration enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--7. " PI_FREQ ,Periodic interrupt frequency" "Bit 0 of HPRTCLR,Bit 1 of HPRTCLR,Bit 2 of HPRTCLR,Bit 3 of HPRTCLR,Bit 4 of HPRTCLR,Bit 5 of HPRTCLR,Bit 6 of HPRTCLR,Bit 7 of HPRTCLR,Bit 8 of HPRTCLR,Bit 9 of HPRTCLR,Bit 10 of HPRTCLR,Bit 11 of HPRTCLR,Bit 12 of HPRTCLR,Bit 13 of HPRTCLR,Bit 14 of HPRTCLR,Bit 15 of HPRTCLR"
|
|
bitfld.long 0x00 3. " PI_EN ,HP periodic interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HPTA_EN ,HP time alarm enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RTC_EN ,HP real time counter enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x400D4000+0x08))&0x100)==0x100)
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "HPCR,SNVS_HP Control Register"
|
|
bitfld.long 0x00 27. " BTN_MASK ,Button interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24.--26. " BTN_CONFIG ,Button configuration" "Low,High,Rising edge,Falling edge,Both edges,?..."
|
|
rbitfld.long 0x00 10.--14. " HPCALB_VAL ,HP calibration value per each 32768 ticks of the counter" "0,+1,+2,,,,,,,,,,,,,+15,-16,-15,,,,,,,,,,,,,-2,-1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HPCALB_EN ,HP real time counter calibration enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--7. " PI_FREQ ,Periodic interrupt frequency" "Bit 0 of HPRTCLR,Bit 1 of HPRTCLR,Bit 2 of HPRTCLR,Bit 3 of HPRTCLR,Bit 4 of HPRTCLR,Bit 5 of HPRTCLR,Bit 6 of HPRTCLR,Bit 7 of HPRTCLR,Bit 8 of HPRTCLR,Bit 9 of HPRTCLR,Bit 10 of HPRTCLR,Bit 11 of HPRTCLR,Bit 12 of HPRTCLR,Bit 13 of HPRTCLR,Bit 14 of HPRTCLR,Bit 15 of HPRTCLR"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HPTA_EN ,HP time alarm enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RTC_EN ,HP real time counter enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "HPCR,SNVS_HP Control Register"
|
|
bitfld.long 0x00 27. " BTN_MASK ,Button interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24.--26. " BTN_CONFIG ,Button configuration" "Low,High,Rising edge,Falling edge,Both edges,?..."
|
|
bitfld.long 0x00 10.--14. " HPCALB_VAL ,HP calibration value per each 32768 ticks of the counter" "0,+1,+2,,,,,,,,,,,,,+15,-16,-15,,,,,,,,,,,,,-2,-1"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HPCALB_EN ,HP real time counter calibration enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--7. " PI_FREQ ,Periodic interrupt frequency" "Bit 0 of HPRTCLR,Bit 1 of HPRTCLR,Bit 2 of HPRTCLR,Bit 3 of HPRTCLR,Bit 4 of HPRTCLR,Bit 5 of HPRTCLR,Bit 6 of HPRTCLR,Bit 7 of HPRTCLR,Bit 8 of HPRTCLR,Bit 9 of HPRTCLR,Bit 10 of HPRTCLR,Bit 11 of HPRTCLR,Bit 12 of HPRTCLR,Bit 13 of HPRTCLR,Bit 14 of HPRTCLR,Bit 15 of HPRTCLR"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HPTA_EN ,HP time alarm enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RTC_EN ,HP real time counter enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
textline " "
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "HPSR,SNVS_HP Status Register"
|
|
eventfld.long 0x00 7. " BI ,Button interrupt signal" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 6. " BTN ,Button value of the BTN input" "Not pressed,Pressed"
|
|
rbitfld.long 0x00 4. " LPDIS ,Low power disable" "No,Yes"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PI ,Periodic interrupt" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " HPTA ,HP time alarm" "Not occurred,Occurred"
|
|
if (((per.l(ad:0x400D4000+0x08))&0x01)==0x01)
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "HPRTCMR,SNVS_HP Real Time Counter MSB Register"
|
|
hexmask.long.word 0x00 0.--14. 1. " RTC ,HP real time counter"
|
|
line.long 0x04 "HPRTCLR,SNVS_HP Real Time Counter LSB Register"
|
|
else
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "HPRTCMR,SNVS_HP Real Time Counter MSB Register"
|
|
hexmask.long.word 0x00 0.--14. 1. " RTC ,HP real time counter"
|
|
line.long 0x04 "HPRTCLR,SNVS_HP Real Time Counter LSB Register"
|
|
endif
|
|
if (((per.l(ad:0x400D4000+0x08))&0x02)==0x02)
|
|
rgroup.long 0x30++0x07
|
|
line.long 0x00 "HPTAMR,SNVS_HP Time Alarm MSB Register"
|
|
hexmask.long.word 0x00 0.--14. 1. " HPTA_MS ,HP time alarm, most-significant 15 bits"
|
|
line.long 0x04 "HPTALR,SNVS_HP Time Alarm LSB Register"
|
|
else
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "HPTAMR,SNVS_HP Time Alarm MSB Register"
|
|
hexmask.long.word 0x00 0.--14. 1. " HPTA_MS ,HP time alarm, most-significant 15 bits"
|
|
line.long 0x04 "HPTALR,SNVS_HP Time Alarm LSB Register"
|
|
endif
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "LPLR,SNVS_LP Lock Register"
|
|
bitfld.long 0x00 6. " LPSVCR_HL ,LP security violation control register hard lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 5. " GPR_HL ,General purpose register hard lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 4. " MC_HL ,Monotonic counter hard lock" "Unlocked,Locked"
|
|
line.long 0x04 "LPCR,SNVS_LP Control Register"
|
|
bitfld.long 0x04 23. " PK_OVERRIDE ,PMIC on request override" "Not override,Override"
|
|
bitfld.long 0x04 22. " PK_EN ,PMIC on request enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20.--21. " ON_TIME ,Period of time after BTN is asserted before pmic_en_b is asserted to turn on the SoC power" "500ms,50ms,100ms,0ms"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " DEBOUNCE ,Amount of debounce time for the BTN input signal" "50ms,100ms,500ms,0ms"
|
|
bitfld.long 0x04 16.--17. " BTN_PRESS_TIME ,Button press time out values for the PMIC logic" "5s,10s,15s,Disabled"
|
|
bitfld.long 0x04 7. " PWR_GLITCH_EN ,Power glitch enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TOP ,Turn off system power" "Powered on,Powered off"
|
|
bitfld.long 0x04 5. " DP_EN ,Dumb PMIC enabled" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " LPWUI_EN ,LP wake-up interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " MC_ENV ,Monotonic counter enabled and valid" "Disabled,Enabled"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "LPSR,SNVS_LP Status Register"
|
|
eventfld.long 0x00 18. " SPO ,Set power off detected" "Not detected,Detected"
|
|
eventfld.long 0x00 17. " EO ,Emergency off detected" "Not detected,Detected"
|
|
eventfld.long 0x00 2. " MCR ,Monotonic counter rollover" "Not reached,Reached"
|
|
rgroup.long 0x5C++0x07
|
|
line.long 0x00 "LPSMCMR,SNVS_LP Secure Monotonic Counter MSB Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " MC_ERA_BITS ,Monotonic counter era bits"
|
|
hexmask.long.word 0x00 0.--15. 1. " MON_COUNTER ,Monotonic counter most-significant 16 bits"
|
|
line.long 0x04 "LPSMCLR,SNVS_LP Secure Monotonic Counter LSB Register"
|
|
if (((per.l(ad:0x400D4000))&0x20)==0x20)||(((per.l(ad:0x400D4000+0x38))&0x20)==0x20)
|
|
rgroup.long 0x68++0x03
|
|
line.long 0x00 "LPGPR0_LEGACY_ALIAS,SNVS_LP General Purpose Register 0 (legacy alias)"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "LPGPR_ALIAS0,SNVS_LP General Purpose Registers 0 .. 30"
|
|
rgroup.long 0x94++0x03
|
|
line.long 0x00 "LPGPR_ALIAS1,SNVS_LP General Purpose Registers 0 .. 31"
|
|
rgroup.long 0x98++0x03
|
|
line.long 0x00 "LPGPR_ALIAS2,SNVS_LP General Purpose Registers 0 .. 32"
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "LPGPR_ALIAS3,SNVS_LP General Purpose Registers 0 .. 33"
|
|
rgroup.long 0x100++0x03
|
|
line.long 0x00 "LPGPR0,SNVS_LP General Purpose Registers 0 .. 30"
|
|
rgroup.long 0x104++0x03
|
|
line.long 0x00 "LPGPR1,SNVS_LP General Purpose Registers 0 .. 31"
|
|
rgroup.long 0x108++0x03
|
|
line.long 0x00 "LPGPR2,SNVS_LP General Purpose Registers 0 .. 32"
|
|
rgroup.long 0x10C++0x03
|
|
line.long 0x00 "LPGPR3,SNVS_LP General Purpose Registers 0 .. 33"
|
|
else
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "LPGPR0_LEGACY_ALIAS,SNVS_LP General Purpose Register 0 (legacy alias)"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "LPGPR_ALIAS0,SNVS_LP General Purpose Registers 0 .. 30"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "LPGPR_ALIAS1,SNVS_LP General Purpose Registers 0 .. 31"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "LPGPR_ALIAS2,SNVS_LP General Purpose Registers 0 .. 32"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "LPGPR_ALIAS3,SNVS_LP General Purpose Registers 0 .. 33"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "LPGPR0,SNVS_LP General Purpose Registers 0 .. 30"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "LPGPR1,SNVS_LP General Purpose Registers 0 .. 31"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "LPGPR2,SNVS_LP General Purpose Registers 0 .. 32"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "LPGPR3,SNVS_LP General Purpose Registers 0 .. 33"
|
|
endif
|
|
rgroup.long 0xBF8++0x07
|
|
line.long 0x00 "HPVIDR1,SNVS_HP Version ID Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " IP_ID ,SNVS block ID"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MAJOR_REV ,SNVS block major version number"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MINOR_REV ,SNVS block minor version number"
|
|
line.long 0x04 "HPVIDR2,SNVS_HP Version ID Register 2"
|
|
hexmask.long.byte 0x04 24.--31. 1. " IP_ERA ,IP era"
|
|
hexmask.long.byte 0x04 16.--23. 1. " INTG_OPT ,SNVS integration options"
|
|
hexmask.long.byte 0x04 8.--15. 1. " ECO_REV ,SNVS ECO revision"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " CONFIG_OPT ,SNVS configuration options"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SPDIF (Sony/Philips Digital Interface)"
|
|
base ad:0x40380000
|
|
width 8.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "SCR,SPDIF Configuration Register"
|
|
bitfld.long 0x00 23. " RXFIFO_CTRL ,Rx FIFO control" "Normal,Always read zero"
|
|
bitfld.long 0x00 22. " RXFIFO_OFF_ON ,SPDIF Rx FIFO on/off" "On,Off"
|
|
newline
|
|
bitfld.long 0x00 21. " RXFIFO_RST ,Rx FIFO reset" "Normal,Reset"
|
|
bitfld.long 0x00 19.--20. " RXFIFOFULL_SEL ,Rx FIFO full interrupt select" "1,4,8,16"
|
|
newline
|
|
bitfld.long 0x00 18. " RXAUTOSYNC ,Rx auto sync off/on" "Off,On"
|
|
bitfld.long 0x00 17. " TXAUTOSYNC ,Tx auto sync off/on" "Off,On"
|
|
newline
|
|
bitfld.long 0x00 15.--16. " TXFIFOEMPTY_SEL ,Tx FIFO empty interrupt select" "1,4,8,16"
|
|
bitfld.long 0x00 13. " LOW_POWER ,SPDIF low-power mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 12. " SOFT_RESET ,SPDIF software reset" "No reset,Reset"
|
|
bitfld.long 0x00 10.--11. " TXFIFO_CTRL ,Tx FIFO control" "Digital zero,Normal,Reset,?..."
|
|
newline
|
|
bitfld.long 0x00 9. " DMA_RX_EN ,DMA receive request enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DMA_TX_EN ,DMA transmit request enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " VALCTRL ,Outgoing validity set/clear control" "Set,Clear"
|
|
bitfld.long 0x00 2.--4. " TXSEL ,Tx select" "Off,SPDIFIN,,,,Normal,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--1. " USRC_SEL ,USRC select" "No embedded,SPDIF,,Chip transmitter"
|
|
line.long 0x04 "SRCD,Cdtext Control Register"
|
|
bitfld.long 0x04 1. " USYNCMODE ,U sync mode" "Non-CD,CD"
|
|
newline
|
|
width 13.
|
|
sif (cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
if (((per.l(ad:0x40380000+0x08)&0x40)==0x40))
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SRPC,Phaseconfig Register"
|
|
bitfld.long 0x00 7.--10. " CLKSRC_SEL ,Clock source selection" "Spdif_rxclk,Spdif_rxclk,Spdif_rxclk,Spdif_rxclk,Spdif_rxclk,REF_CLK_32K,Tx_clk,ASRC_CLK,SPDIF_EXT_CLK,ESAI_HCKT,Spdif_rxclk,Spdif_rxclk,MLB clock,MLB PHY clock,?..."
|
|
rbitfld.long 0x00 6. " LOCK ,DPLL lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 3.--5. " GAINSEL ,Gain selection" "24*(2**10),16*(2**10),12*(2**10),8*(2**10),6*(2**10),4*(2**10),3*(2**10),?..."
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SRPC,Phaseconfig Register"
|
|
bitfld.long 0x00 7.--10. " CLKSRC_SEL ,Clock source selection" "REF_CLK_32K,Tx_clk,ASRC_EXT_CLK,SPDIF_EXT_CLK,ESAI_HCKT,REF_CLK_32K,Tx_clk,ASRC_CLK,SPDIF_EXT_CLK,ESAI_HCKT,MLB clock,MLB PHY clock,MLB clock,MLB PHY clock,?..."
|
|
rbitfld.long 0x00 6. " LOCK ,DPLL lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 3.--5. " GAINSEL ,Gain selection" "24*(2**10),16*(2**10),12*(2**10),8*(2**10),6*(2**10),4*(2**10),3*(2**10),?..."
|
|
endif
|
|
else
|
|
if (((per.l(ad:0x40380000+0x08)&0x40)==0x40))
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SRPC,Phaseconfig Register"
|
|
bitfld.long 0x00 7.--10. " CLKSRC_SEL ,Clock source selection" "Spdif_rxclk,Spdif_rxclk,,Spdif_rxclk,,REF_CLK_32K,Tx_clk,,SPDIF_EXT_CLK,?..."
|
|
rbitfld.long 0x00 6. " LOCK ,DPLL lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 3.--5. " GAINSEL ,Gain selection" "24*(2**10),16*(2**10),12*(2**10),8*(2**10),6*(2**10),4*(2**10),3*(2**10),?..."
|
|
else
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SRPC,Phaseconfig Register"
|
|
bitfld.long 0x00 7.--10. " CLKSRC_SEL ,Clock source selection" "REF_CLK_32K,Tx_clk,,SPDIF_EXT_CLK,,REF_CLK_32K,Tx_clk,,SPDIF_EXT_CLK,?..."
|
|
rbitfld.long 0x00 6. " LOCK ,DPLL lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 3.--5. " GAINSEL ,Gain selection" "24*(2**10),16*(2**10),12*(2**10),8*(2**10),6*(2**10),4*(2**10),3*(2**10),?..."
|
|
endif
|
|
endif
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SIE,Interrupten Register"
|
|
bitfld.long 0x00 20. " LOCK ,SPDIF receiver's DPLL lock interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " TXUNOV ,SPDIF Tx FIFO under/overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TXRESYN ,SPDIF Tx FIFO resync interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CNEW ,SPDIF receive change in value of control channel interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. " VALNOGOOD ,SPDIF validity flag no good interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SYMERR ,SPDIF receiver found illegal symbol interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " BITERR ,SPDIF receiver found parity bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " URXFUL ,U channel receive register full" "Not full,Full"
|
|
newline
|
|
bitfld.long 0x00 9. " URXOV ,U channel receive register overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " QRXFUL ,Q channel receive register full" "Not full,Full"
|
|
bitfld.long 0x00 7. " QRXOV ,Q channel receive register overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " UQSYNC ,U/Q channel sync found interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " UQERR ,U/Q channel framing error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " RXFIFOUNOV ,Rx FIFO underrun/overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RXFIFORESYN ,Rx FIFO resync interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LOCKLOSS ,SPDIF receiver loss of lock interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " TXEM ,SPDIF Tx FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RXFIFOFUL ,SPDIF Rx FIFO full" "Not full,Full"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SIS,Interruptstat Register"
|
|
bitfld.long 0x00 20. " LOCK ,SPDIF receiver's DPLL lock interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " TXUNOV ,SPDIF Tx FIFO under/overrun interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " TXRESYN ,SPDIF Tx FIFO resync interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " CNEW ,SPDIF receive change in value of control channel interrupt status" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 16. " VALNOGOOD ,SPDIF validity flag no good interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " SYMERR ,SPDIF receiver found illegal symbol interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " BITERR ,SPDIF receiver found parity bit error interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " URXFUL ,U channel receive register full" "Not full,Full"
|
|
newline
|
|
bitfld.long 0x00 9. " URXOV ,U channel receive register overrun interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " QRXFUL ,Q channel receive register full" "Not full,Full"
|
|
bitfld.long 0x00 7. " QRXOV ,Q channel receive register overrun interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " UQSYNC ,U/Q channel sync found interrupt status" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 5. " UQERR ,U/Q channel framing error interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RXFIFOUNOV ,Rx FIFO underrun/overrun interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " RXFIFORESYN ,Rx FIFO resync interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " LOCKLOSS ,SPDIF receiver loss of lock interrupt status" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. " TXEM ,SPDIF Tx FIFO empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RXFIFOFUL ,SPDIF Rx FIFO full" "Not full,Full"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "SIC,Interruptclear Register"
|
|
bitfld.long 0x00 20. " LOCK ,SPDIF receiver's DPLL lock interrupt clear" "No clear,Clear"
|
|
bitfld.long 0x00 19. " TXUNOV ,SPDIF Tx FIFO under/overrun interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 18. " TXRESYN ,SPDIF Tx FIFO resync interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 17. " CNEW ,SPDIF receive change in value of control channel interrupt status" "No clear,Clear"
|
|
newline
|
|
bitfld.long 0x00 16. " VALNOGOOD ,SPDIF validity flag no good interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 15. " SYMERR ,SPDIF receiver found illegal symbol interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 14. " BITERR ,SPDIF receiver found parity bit error interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 9. " URXOV ,U channel receive register overrun interrupt status" "No clear,Clear"
|
|
newline
|
|
bitfld.long 0x00 7. " QRXOV ,Q channel receive register overrun interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 6. " UQSYNC ,U/Q channel sync found interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 5. " UQERR ,U/Q channel framing error interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 4. " RXFIFOUNOV ,Rx FIFO underrun/overrun interrupt status" "No clear,Clear"
|
|
newline
|
|
bitfld.long 0x00 3. " RXFIFORESYN ,Rx FIFO resync interrupt status" "No clear,Clear"
|
|
bitfld.long 0x00 2. " LOCKLOSS ,SPDIF receiver loss of lock interrupt status" "No clear,Clear"
|
|
rgroup.long 0x14++0x17
|
|
line.long 0x00 "SRL,Spdifrxleft Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " RXDATALEFT ,Processor receive SPDIF data left"
|
|
line.long 0x04 "SRR,Spdifrxright Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RXDATARIGHT ,Processor receive SPDIF data right"
|
|
line.long 0x08 "SRCSH,Spdifrxcchannel_h Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " RXCCHANNEL_H ,SPDIF receive C channel register contains first 24 bits of C channel without interpretation"
|
|
line.long 0x0C "SRCSL,Spdifrxcchannel_l Register"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " RXCCHANNEL_L ,SPDIF receive C channel register contains next 24 bits of C channel without interpretation"
|
|
line.long 0x10 "SRU,Uchannelrx Register"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. " RXUCHANNEL ,SPDIF receive U channel register contains next 3 U channel bytes"
|
|
line.long 0x14 "SRQ,Qchannelrx Register"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. " RXQCHANNEL ,SPDIF receive Q channel register contains next 3 Q channel bytes"
|
|
wgroup.long 0x2C++0x07
|
|
line.long 0x00 "STL,Spdiftxleft Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TXDATALEFT ,SPDIF transmit left channel data"
|
|
line.long 0x04 "STR,Spdiftxright Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " TXDATARIGHT ,SPDIF transmit right channel data"
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "STCSCH,Spdiftxcchannelcons_h Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TXCCHANNELCONS_H ,SPDIF transmit cons. C channel data contains first 24 bits without interpretation"
|
|
line.long 0x04 "STCSCL,Spdiftxcchannelcons_l Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " TXCCHANNELCONS_L ,SPDIF transmit cons. C channel data contains next 24 bits without interpretation"
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "SRFM,Freqmeas Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " FREQMEAS ,Frequency measurement data"
|
|
sif (cpuis("IMX8DX*")||cpuis("IMX8QXP*"))
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "STC,Spdiftxclk Register"
|
|
hexmask.long.word 0x00 11.--19. 1. " SYSCLK_DF ,System clock divider factor"
|
|
bitfld.long 0x00 8.--10. " TXCLK_SOURCE ,Tx clock source" "REF_CLK_32K input,Tx_clk input,ASRC_EXT_CLK input,SPDIF_EXT_CLK,ESAI_HCKT input,Ipg_clk input,MLB clock input,MLB PHY clock input"
|
|
bitfld.long 0x00 7. " TX_ALL_CLK_EN ,SPDIF transfer clock enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TXCLK_DF ,Divider factor"
|
|
else
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "STC,Spdiftxclk Register"
|
|
hexmask.long.word 0x00 11.--19. 1. " SYSCLK_DF ,System clock divider factor"
|
|
bitfld.long 0x00 8.--10. " TXCLK_SOURCE ,Tx clock source" "REF_CLK_32K,Tx_clk,,SPDIF_EXT_CLK,,Ipg_clk,?..."
|
|
bitfld.long 0x00 7. " TX_ALL_CLK_EN ,SPDIF transfer clock enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TXCLK_DF ,Divider factor"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "SRC (System Reset Controller)"
|
|
base ad:0x400F8000
|
|
width 7.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SCR,SRC Control Register"
|
|
bitfld.long 0x00 28.--31. " MASK_WDOG3_RST ,Mask wdog3_rst_b source" ",,,,,Masked,,,,,Not masked,?..."
|
|
bitfld.long 0x00 25. " DBG_RST_MSK_PG ,Debug resets mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " CORE0_DBG_RST ,Software reset for core0 debug only" "No reset,Reset"
|
|
bitfld.long 0x00 13. " CORE0_RST ,Software reset for core0 only" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " MASK_WDOG_RST ,Mask wdog_rst_b source" ",,,,,Masked,,,,,Not masked,?..."
|
|
sif !cpuis("IMXRT106*")
|
|
bitfld.long 0x00 4. " LOCKUP_RST ,Lockup reset enable bit" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "SBMR1,SRC Boot Mode Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BOOT_CFG4 ,Boot configuration 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. " BOOT_CFG3 ,Boot configuration 3"
|
|
hexmask.long.byte 0x00 8.--15. 1. " BOOT_CFG2 ,Boot configuration 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " BOOT_CFG1 ,Boot configuration 1"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SRSR,SRC Reset Status Register"
|
|
bitfld.long 0x00 8. " TEMPSENSE_RST_B ,Temper sensor software reset" "No reset,Reset"
|
|
eventfld.long 0x00 7. " WDOG3_RST_B ,IC watchdog3 time-out reset" "No reset,Reset"
|
|
eventfld.long 0x00 6. " JTAG_SW_RST ,JTAG software reset" "No reset,Reset"
|
|
eventfld.long 0x00 5. " JTAG_RST_B ,HIGH - Z JTAG reset" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 4. " WDOG_RST_B ,IC watchdog time-out reset" "No reset,Reset"
|
|
eventfld.long 0x00 3. " IPP_USER_RESET_B ,Indicates whether the reset was the result of the ipp_user_reset_b qualified reset" "No reset,Reset"
|
|
eventfld.long 0x00 2. " CSU_RESET_B ,Indicates whether the reset was the result of the csu_reset_b input" "No reset,Reset"
|
|
eventfld.long 0x00 1. " LOCKUP_SYSRESETREQ ,Indicates a reset has been caused by CPU lockup or software setting of SYSRESETREQ bit in application interrupt and reset control register of the ARM core" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 0. " IPP_RESET_B ,Indicates whether reset was the result of ipp_reset_b pin" "No reset,Reset"
|
|
if (((per.l(ad:0x400F8000+0x1C))&0x3000000)==0x2000000)
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SBMR2,SRC Boot Mode Register 2"
|
|
bitfld.long 0x00 24.--25. " BMOD ,Latched state of the BOOT_MODE1 and BOOT_MODE0 signals on the rising edge of POR_B" "From fuses,Serial downloader,Internal boot,?..."
|
|
bitfld.long 0x00 4. " BT_FUSE_SEL ,Boot settings indicated by a Yes in the GPIO column control mode" "GPIO pins,eFUSE settings"
|
|
bitfld.long 0x00 3. " DIR_BT_DIS ,Disables the NXP reserved modes" "No,Yes"
|
|
bitfld.long 0x00 0.--1. " SEC_CONFIG ,Security configuration" ",Open,Closed,Closed"
|
|
elif (((per.l(ad:0x400F8000+0x1C))&0x3000000)==0x00)
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SBMR2,SRC Boot Mode Register 2"
|
|
bitfld.long 0x00 24.--25. " BMOD ,Latched state of the BOOT_MODE1 and BOOT_MODE0 signals on the rising edge of POR_B" "From fuses,Serial downloader,Internal boot,?..."
|
|
bitfld.long 0x00 4. " BT_FUSE_SEL ,The BOOT configuration eFuses programmed indicator" "Not programmed yet,Programmed"
|
|
bitfld.long 0x00 3. " DIR_BT_DIS ,Disables the NXP reserved modes" "No,Yes"
|
|
bitfld.long 0x00 0.--1. " SEC_CONFIG ,Security configuration" ",Open,Closed,Closed"
|
|
else
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SBMR2,SRC Boot Mode Register 2"
|
|
bitfld.long 0x00 4. " BT_FUSE_SEL ,State of the BT_FUSE_SEL fuse" "0,1"
|
|
bitfld.long 0x00 3. " DIR_BT_DIS ,Disables the NXP reserved modes" "No,Yes"
|
|
bitfld.long 0x00 0.--1. " SEC_CONFIG ,Security configuration" ",Open,Closed,Closed"
|
|
endif
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "GPR1,SRC General Purpose Register 1"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "GPR2,SRC General Purpose Register 2"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "GPR3,SRC General Purpose Register 3"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "GPR4,SRC General Purpose Register 4"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "GPR5,SRC General Purpose Register 5"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "GPR6,SRC General Purpose Register 6"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "GPR7,SRC General Purpose Register 7"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "GPR8,SRC General Purpose Register 8"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "GPR10,SRC General Purpose Register 10"
|
|
bitfld.long 0x00 26.--31. " GPRW[1] ,General purpose read/write bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long 0x00 0.--24. 1. " GPRW[0] ,General purpose read/write bits"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TEMPMON (Temperature Monitor)"
|
|
base ad:0x400D8000
|
|
width 16.
|
|
group.long 0x180++0x1F
|
|
line.long 0x00 "TEMPSENSE0,Tempsensor Control Register 0"
|
|
hexmask.long.word 0x00 20.--31. 1. " ALARM_VALUE ,The temperature count that will generate an alarm interrupt"
|
|
hexmask.long.word 0x00 8.--19. 1. " TEMP_CNT ,The last measured temperature count"
|
|
rbitfld.long 0x00 2. " FINISHED ,The latest temp is valid" "Invalid,Valid"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MEASURE_TEMP_SET/CLR ,Measurement process start" "Stopped,Started"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " POWER_DOWN_SET/CLR ,Temperature sensor power down" "Powered up,Powered down"
|
|
line.long 0x04 "TEMPSENSE0_SET,Tempsensor Control Set Register 0"
|
|
hexmask.long.word 0x04 20.--31. 1. " ALARM_VALUE ,The temperature count that will generate an alarm interrupt"
|
|
hexmask.long.word 0x04 8.--19. 1. " TEMP_CNT ,The last measured temperature count"
|
|
rbitfld.long 0x04 2. " FINISHED ,The latest temp is valid" "Invalid,Valid"
|
|
line.long 0x08 "TEMPSENSE0_CLR,Tempsensor Control Clear Register 0"
|
|
hexmask.long.word 0x08 20.--31. 1. " ALARM_VALUE ,The temperature count that will generate an alarm interrupt"
|
|
hexmask.long.word 0x08 8.--19. 1. " TEMP_CNT ,The last measured temperature count"
|
|
rbitfld.long 0x08 2. " FINISHED ,Indicates that the latest temp is valid" "Invalid,Valid"
|
|
line.long 0x0C "TEMPSENSE0_TOG,Tempsensor Control Toggle Register 0"
|
|
hexmask.long.word 0x0C 20.--31. 1. " ALARM_VALUE ,The temperature count that will generate an alarm interrupt"
|
|
hexmask.long.word 0x0C 8.--19. 1. " TEMP_CNT ,The last measured temperature count"
|
|
rbitfld.long 0x0C 2. " FINISHED ,The latest temp is valid" "Invalid,Valid"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " MEASURE_TEMP ,Measurement process start" "Stopped,Started"
|
|
bitfld.long 0x0C 0. " POWER_DOWN ,Temperature sensor power down" "Powered up,Powered down"
|
|
line.long 0x10 "TEMPSENSE1,Tempsensor Control Register 1"
|
|
hexmask.long.word 0x10 0.--15. 1. " MEASURE_FREQ ,RTC clocks to wait before automatically repeating a temperature measurement"
|
|
line.long 0x14 "TEMPSENSE1_SET,Tempsensor Control Set Register 1"
|
|
hexmask.long.word 0x14 0.--15. 1. " MEASURE_FREQ ,RTC clocks to wait before automatically repeating a temperature measurement"
|
|
line.long 0x18 "TEMPSENSE1_CLR,Tempsensor Control Clear Register 1"
|
|
hexmask.long.word 0x18 0.--15. 1. " MEASURE_FREQ ,RTC clocks to wait before automatically repeating a temperature measurement"
|
|
line.long 0x1C "TEMPSENSE1_TOG,Tempsensor Control Toggle Register 1"
|
|
hexmask.long.word 0x1C 0.--15. 1. " MEASURE_FREQ ,RTC clocks to wait before automatically repeating a temperature measurement"
|
|
group.long 0x290++0x0F
|
|
line.long 0x00 "TEMPSENSE2,Tempsensor Control Register 2"
|
|
hexmask.long.word 0x00 16.--27. 1. " PANIC_ALARM_VALUE ,Temperature that will generate a panic interrupt when exceeded by the temperature measurement"
|
|
hexmask.long.word 0x00 0.--11. 1. " LOW_ALARM_VALUE ,Temperature that will generate a low alarm interrupt when the field is greater than the temperature measurement"
|
|
line.long 0x04 "TEMPSENSE2_SET,Tempsensor Control Set Register 2"
|
|
hexmask.long.word 0x04 16.--27. 1. " PANIC_ALARM_VALUE ,Temperature that will generate a panic interrupt when exceeded by the temperature measurement"
|
|
hexmask.long.word 0x04 0.--11. 1. " LOW_ALARM_VALUE ,Temperature that will generate a low alarm interrupt when the field is greater than the temperature measurement"
|
|
line.long 0x08 "TEMPSENSE2_CLR,Tempsensor Control Clear Register 2"
|
|
hexmask.long.word 0x08 16.--27. 1. " PANIC_ALARM_VALUE ,Temperature that will generate a panic interrupt when exceeded by the temperature measurement"
|
|
hexmask.long.word 0x08 0.--11. 1. " LOW_ALARM_VALUE ,Temperature that will generate a low alarm interrupt when the field is greater than the temperature measurement"
|
|
line.long 0x0C "TEMPSENSE2_TOG,Tempsensor Control Toggle Register 2"
|
|
hexmask.long.word 0x0C 16.--27. 1. " PANIC_ALARM_VALUE ,Temperature that will generate a panic interrupt when exceeded by the temperature measurement"
|
|
hexmask.long.word 0x0C 0.--11. 1. " LOW_ALARM_VALUE ,Temperature that will generate a low alarm interrupt when the field is greater than the temperature measurement"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "USB (Universal Serial Bus Controller)"
|
|
tree "USBNC (USB Non-Core)"
|
|
base ad:0x402E0000
|
|
width 17.
|
|
group.long 0x800++0x03
|
|
line.long 0x00 "OTG1_CTRL,OTG1 Control Register"
|
|
rbitfld.long 0x00 31. " WIR ,Wake-up interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " WKUP_DPDM_EN ,Wake-up on DPDM change enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " WKUP_VBUS_EN ,Wake-up on VBUS change enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " WKUP_ID_EN ,Wake-up on ID change enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WKUP_SW ,Software force wake-up" "Not forced,Forced"
|
|
bitfld.long 0x00 14. " WKUP_SW_EN ,Software wake-up enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WIE ,Wake-up interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PWR_POL ,Power polarity" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " OVER_CUR_POL ,Polarity of overcurrent" "High,Low"
|
|
bitfld.long 0x00 7. " OVER_CUR_DIS ,Disable overcurrent detection" "Enabled,Disabled"
|
|
group.long 0x818++0x03
|
|
line.long 0x00 "OTG1_PHY_CTRL_0,OTG1 UTMI PHY Control 0 Register"
|
|
bitfld.long 0x00 31. " UTMI_CLK_VLD ,Indicating whether UTMI PHY clock is valid" "Invalid,Valid"
|
|
width 0x0B
|
|
tree.end
|
|
tree "USB (USB Core)"
|
|
base ad:0x402E0000
|
|
width 19.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "ID,Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " REVISION ,Revision number of the controller core"
|
|
bitfld.long 0x00 8.--13. " NID ,Complement version of ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " ID ,Configuration number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x04 "HWGENERAL,Hardware General"
|
|
bitfld.long 0x04 9.--10. " SM ,Serial interface mode capability" "No serial engine,Serial engine present,?..."
|
|
bitfld.long 0x04 6.--8. " PHYM ,Transceiver type" "UTMI/UMTI+,ULPI DDR,ULPI,Serial,?..."
|
|
bitfld.long 0x04 4.--5. " PHYW ,Data width of the transceiver connected to the controller core" "8-bit,16-bit,?..."
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x03)
|
|
rgroup.long 0x08++0x03
|
|
line.long 0x00 "HWHOST,Host Hardware Parameters"
|
|
bitfld.long 0x00 1.--3. " NPORT ,The number of downstream ports supported by the host controller" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0. " HC ,Host capable" "Not supported,Supported"
|
|
else
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "HWHOST,Host Hardware Parameters"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "HWDEVICE,Device Hardware Parameters"
|
|
bitfld.long 0x00 1.--5. " DEVEP ,Device endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 0. " DC ,Device capable" "Not supported,Supported"
|
|
else
|
|
hgroup.long 0x0C++0x03
|
|
hide.long 0x00 "HWDEVICE,Device Hardware Parameters"
|
|
endif
|
|
rgroup.long 0x10++0x07
|
|
line.long 0x00 "HWTXBUF,TX Buffer Hardware Parameters"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXCHANADD ,TX FIFO buffer size"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXBURST ,Default burst size for memory to TX buffer transfer"
|
|
line.long 0x04 "HWRXBUF,RX Buffer Hardware Parameters"
|
|
hexmask.long.byte 0x04 8.--15. 1. " RXADD ,Single receive FIFO buffer in the USB controller"
|
|
hexmask.long.byte 0x04 0.--7. 1. " RXBURST ,Default burst size for memory to RX buffer transfer"
|
|
group.long 0x80++0x13
|
|
line.long 0x00 "GPTIMER0LD,General Purpose Timer #0 Load"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " GPTLD ,General purpose timer load value"
|
|
line.long 0x04 "GPTIMER0CTRL,General Purpose Timer #0 Controller"
|
|
bitfld.long 0x04 31. " GPTRUN ,General purpose timer run" "Stopped,Running"
|
|
bitfld.long 0x04 30. " GPTRST ,General purpose timer reset" "No effect,Reset"
|
|
bitfld.long 0x04 24. " GPTMODE ,General purpose timer mode" "One shot,Repeat"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,General purpose timer counter"
|
|
line.long 0x08 "GPTIMER1LD,General Purpose Timer #1 Load"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " GPTLD ,General purpose timer load value"
|
|
line.long 0x0C "GPTIMER1CTRL,General Purpose Timer #1 Controller"
|
|
bitfld.long 0x0C 31. " GPTRUN ,General purpose timer run" "Stopped,Running"
|
|
bitfld.long 0x0C 30. " GPTRST ,General purpose timer reset" "No effect,Reset"
|
|
bitfld.long 0x0C 24. " GPTMODE ,General purpose timer mode" "One shot,Repeat"
|
|
hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,General purpose timer counter"
|
|
line.long 0x10 "SBUSCFG,System Bus Config"
|
|
bitfld.long 0x10 0.--2. " AHBBRST ,AHB master interface burst configuration" "Incremental/unspec.,INCR4/single,INCR8/INCR4/single,INCR16/INCR8/INCR4/single,,INCR4/unspec.,INCR8/INCR4/unspec.,INCR16/INCR8/INCR4/unspec."
|
|
rgroup.byte 0x100++0x00
|
|
line.byte 0x00 "CAPLENGTH,Capability Register Length"
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x03)
|
|
rgroup.word 0x102++0x01
|
|
line.word 0x00 "HCIVERSION,Host Controller Interface Version"
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "HCSPARAMS,Host Controller Structural Parameters"
|
|
bitfld.long 0x00 24.--27. " N_TT ,Indicates the number of embedded transaction translators associated with the USB2.0 host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " N_PTT ,Indicates the number of ports assigned to each transaction translator within the USB2.0 host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16. " PI ,Indicates whether the ports support port indicator control" "Not supported,Supported"
|
|
bitfld.long 0x00 12.--15. " N_CC ,Number of companion controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " N_PCC ,Indicates the number of ports supported per internal companion controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4. " PPC ,Port power control" "Not included,Included"
|
|
bitfld.long 0x00 0.--3. " N_PORTS ,Specifies the number of physical downstream ports implemented on this host controller" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "HCCPARAMS,Host Controller Capability Parameters"
|
|
hexmask.long.byte 0x04 8.--15. 1. " EECP ,EHCI extended capabilities pointer"
|
|
bitfld.long 0x04 4.--7. " IST ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 2. " ASP ,Asynchronous schedule park capability" "Not supported,Supported"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PFL ,Programmable frame list flag" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ADC ,64-bit addressing capability" "Not supported,Supported"
|
|
else
|
|
hgroup.word 0x102++0x01
|
|
hide.word 0x00 "HCIVERSION,Host Controller Interface Version"
|
|
hgroup.long 0x104++0x07
|
|
hide.long 0x00 "HCSPARAMS,Host Controller Structural Parameters"
|
|
hide.long 0x04 "HCCPARAMS,Host Controller Capability Parameters"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
rgroup.word 0x120++0x01
|
|
line.word 0x00 "DCIVERSION,Device Controller Interface Version"
|
|
rgroup.long 0x124++0x03
|
|
line.long 0x00 "DCCPARAMS,Device Controller Capability Parameters"
|
|
bitfld.long 0x00 8. " HC ,EHCI host capable" "Incapable,Capable"
|
|
bitfld.long 0x00 7. " DC ,Device capable" "Incapable,Capable"
|
|
bitfld.long 0x00 0.--4. " DEN ,Device endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
|
|
else
|
|
hgroup.word 0x120++0x01
|
|
hide.word 0x00 "DCIVERSION,Device Controller Interface Version"
|
|
hgroup.long 0x124++0x03
|
|
hide.long 0x00 "DCCPARAMS,Device Controller Capability Parameters"
|
|
endif
|
|
textline " "
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
if (((per.l(ad:0x402E0000+0x108))&0x06)==0x06)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control"
|
|
bitfld.long 0x00 13. " SUTW ,Indicates that the setup data payload of 8 bytes is extracted from a QH by the DCD without being corrupted" "Not corrupted,Corrupted"
|
|
bitfld.long 0x00 12. " ATDTW ,Indicates that the proper addition of a new dtd to an active (Primed) endpoint's linked list has been asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" ",1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/stop" "Stopped,Running"
|
|
elif (((per.l(ad:0x402E0000+0x108))&0x06)==0x02)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control"
|
|
bitfld.long 0x00 13. " SUTW ,Indicates that the setup data payload of 8 bytes is extracted from a QH by the DCD without being corrupted" "Not corrupted,Corrupted"
|
|
bitfld.long 0x00 12. " ATDTW ,Indicates that the proper addition of a new dtd to an active (Primed) endpoint's linked list has been asserted" "Not asserted,Asserted"
|
|
rbitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" ",1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/stop" "Stopped,Running"
|
|
elif (((per.l(ad:0x402E0000+0x108))&0x06)==0x04)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control"
|
|
bitfld.long 0x00 13. " SUTW ,Indicates that the setup data payload of 8 bytes is extracted from a QH by the DCD without being corrupted" "Not corrupted,Corrupted"
|
|
bitfld.long 0x00 12. " ATDTW ,Indicates that the proper addition of a new dtd to an active (Primed) endpoint's linked list has been asserted" "Not asserted,Asserted"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" ",1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/stop" "Stopped,Running"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control"
|
|
bitfld.long 0x00 13. " SUTW ,Indicates that the setup data payload of 8 bytes is extracted from a QH by the DCD without being corrupted" "Not corrupted,Corrupted"
|
|
bitfld.long 0x00 12. " ATDTW ,Indicates that the proper addition of a new dtd to an active (Primed) endpoint's linked list has been asserted" "Not asserted,Asserted"
|
|
rbitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" ",1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/stop" "Stopped,Running"
|
|
endif
|
|
group.long 0x144++0x07
|
|
line.long 0x00 "USBSTS,USB Status Register"
|
|
eventfld.long 0x00 25. " TI1 ,General purpose timer interrupt 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " TI0 ,General purpose timer interrupt 0" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 16. " NAKI ,NAK interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 10. " ULPII ,ULPI interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 8. " SLI ,DC suspend" "Not suspended,Suspended"
|
|
eventfld.long 0x00 7. " SRI ,SOF received" "Not detected,Detected"
|
|
eventfld.long 0x00 6. " URI ,USB reset received" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SEI ,System error" "No error,Error"
|
|
eventfld.long 0x00 2. " PCI ,Port change detect" "Not changed,Changed"
|
|
eventfld.long 0x00 1. " UEI ,USB error interrupt" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt"
|
|
line.long 0x04 "USBINTR,Interrupt Enable Register"
|
|
bitfld.long 0x04 25. " TIE1 ,General purpose timer #1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " TIE0 ,General purpose timer #0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " UPIE ,USB host periodic interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " UAIE ,USB host asynchronous interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " NAKE ,NAK interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " SLE ,Sleep interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " SRE ,SOF received interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " URE ,USB reset interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PCE ,Port change detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " UEE ,USB error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " UE ,USB interrupt enable" "Disabled,Enabled"
|
|
rgroup.long 0x14C++0x03
|
|
line.long 0x00 "FRINDEX,USB Frame Index"
|
|
hexmask.long.word 0x00 0.--13. 1. " FRINDEX ,Frame list current index"
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "DEVICEADDR,Device Address"
|
|
hexmask.long.byte 0x00 25.--31. 0x02 " USBADR ,Device address"
|
|
bitfld.long 0x00 24. " USBADRA ,Device address advance" "0,1"
|
|
line.long 0x04 "ENDPTLISTADDR,Endpoint List Address"
|
|
hexmask.long.tbyte 0x04 11.--31. 0x08 " EPBASE ,Endpoint list Pointer(Low)"
|
|
elif (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x03)
|
|
if (((per.l(ad:0x402E0000+0x108))&0x06)==0x06)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" ",1,2,3"
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. 15. " FS ,Frame list size" "1024,512,256,128,64,32,16,8"
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/stop" "Stopped,Running"
|
|
elif (((per.l(ad:0x402E0000+0x108))&0x06)==0x02)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control"
|
|
rbitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" ",1,2,3"
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. 15. " FS ,Frame list size" "1024,512,256,128,64,32,16,8"
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/stop" "Stopped,Running"
|
|
elif (((per.l(ad:0x402E0000+0x108))&0x06)==0x04)
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control"
|
|
bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" ",1,2,3"
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/stop" "Stopped,Running"
|
|
else
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "USBCMD,USB Command Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control"
|
|
rbitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" ",1,2,3"
|
|
bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " RS ,Run/stop" "Stopped,Running"
|
|
endif
|
|
group.long 0x144++0x07
|
|
line.long 0x00 "USBSTS,USB Status Register"
|
|
eventfld.long 0x00 25. " TI1 ,General purpose timer interrupt 1" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " TI0 ,General purpose timer interrupt 0" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 16. " NAKI ,NAK interrupt" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 15. " AS ,Asynchronous schedule status" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " PS ,Periodic schedule status" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. " RCL ,Reclamation" "Not empty,Empty"
|
|
rbitfld.long 0x00 12. " HCH ,HC halted" "Not halted,Halted"
|
|
eventfld.long 0x00 10. " ULPII ,ULPI interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " SRI ,SOF received" "Not detected,Detected"
|
|
eventfld.long 0x00 5. " AAI ,Interrupt on async advance" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 4. " SEI ,System error" "No error,Error"
|
|
eventfld.long 0x00 3. " FRI ,Frame list rollover" "Not rollover,Rollover"
|
|
eventfld.long 0x00 2. " PCI ,Port change detect" "Not changed,Changed"
|
|
eventfld.long 0x00 1. " UEI ,USB error interrupt" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt"
|
|
line.long 0x04 "USBINTR,Interrupt Enable Register"
|
|
bitfld.long 0x04 25. " TIE1 ,General purpose timer #1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " TIE0 ,General purpose timer #0 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " UPIE ,USB host periodic interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " UAIE ,USB host asynchronous interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " NAKE ,NAK interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " SRE ,SOF received interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " AAE ,Async advance interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " SEE ,System error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " FRE ,Frame list rollover interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " PCE ,Port change detect interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " UEE ,USB error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " UE ,USB interrupt enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x402E0000+0x144))&0x1000)==0x1000)
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "FRINDEX,USB Frame Index"
|
|
hexmask.long.word 0x00 0.--13. 1. " FRINDEX ,Frame list current index"
|
|
else
|
|
rgroup.long 0x14C++0x03
|
|
line.long 0x00 "FRINDEX,USB Frame Index"
|
|
hexmask.long.word 0x00 0.--13. 1. " FRINDEX ,Frame list current index"
|
|
endif
|
|
group.long 0x154++0x07
|
|
line.long 0x00 "PERIODICLISTBASE,Frame List Base Address"
|
|
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Base address (Low)"
|
|
line.long 0x04 "ASYNCLISTADDR,Next Asynch. Address"
|
|
hexmask.long 0x04 5.--31. 0x20 " ASYBASE ,Link pointer low"
|
|
else
|
|
hgroup.long 0x140++0x0F
|
|
hide.long 0x00 "USBCMD,USB Command Register"
|
|
hide.long 0x04 "USBSTS,USB Status Register"
|
|
hide.long 0x08 "USBINTR,Interrupt Enable Register"
|
|
hide.long 0x0C "FRINDEX,USB Frame Index"
|
|
hgroup.long 0x154++0x07
|
|
hide.long 0x00 "DEVICEADDR,Device Address"
|
|
hide.long 0x04 "ENDPTLISTADDR,Endpoint List Address"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x90))&0x07)==0x00)
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "BURSTSIZE,Programmable Burst Size"
|
|
hexmask.long.word 0x00 8.--16. 1. " TXPBURST ,Programmable TX burst size"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXPBURST ,Programmable RX burst size"
|
|
else
|
|
hgroup.long 0x160++0x03
|
|
hide.long 0x00 "BURSTSIZE,Programmable Burst Size"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x03)
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x10)==0x10)
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "TXFILLTUNING,TX FIFO Fill Tuning"
|
|
bitfld.long 0x00 8.--12. " TXSCHHEALTH ,Scheduler health counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXSCHOH ,Scheduler overhead"
|
|
else
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "TXFILLTUNING,TX FIFO Fill Tuning"
|
|
bitfld.long 0x00 16.--21. " TXFIFOTHRES ,FIFO burst threshold" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 8.--12. " TXSCHHEALTH ,Scheduler health counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXSCHOH ,Scheduler overhead"
|
|
endif
|
|
else
|
|
hgroup.long 0x164++0x03
|
|
hide.long 0x00 "TXFILLTUNING,TX FIFO Fill Tuning"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x178++0x07
|
|
line.long 0x00 "ENDPTNAK,Endpoint NAK"
|
|
eventfld.long 0x00 23. " EPTN[7] ,TX endpoint 7 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 22. " [6] ,TX endpoint 6 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 21. " [5] ,TX endpoint 5 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 20. " [4] ,TX endpoint 4 NAK" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 19. " [3] ,TX endpoint 3 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 18. " [2] ,TX endpoint 2 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 17. " [1] ,TX endpoint 1 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 16. " [0] ,TX endpoint 0 NAK" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 7. " EPRN[7] ,RX endpoint 7 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 6. " [6] ,RX endpoint 6 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 5. " [5] ,RX endpoint 5 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 4. " [4] ,RX endpoint 4 NAK" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 3. " [3] ,RX endpoint 3 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 2. " [2] ,RX endpoint 2 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 1. " [1] ,RX endpoint 1 NAK" "Not detected,Detected"
|
|
eventfld.long 0x00 0. " [0] ,RX endpoint 0 NAK" "Not detected,Detected"
|
|
line.long 0x04 "ENDPTNAKEN,Endpoint NAK Enable"
|
|
bitfld.long 0x04 23. " EPTNE[7] ,TX endpoint 7 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " [6] ,TX endpoint 6 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " [5] ,TX endpoint 5 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " [4] ,TX endpoint 4 NAK enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " [3] ,TX endpoint 3 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " [2] ,TX endpoint 2 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " [1] ,TX endpoint 1 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " [0] ,TX endpoint 0 NAK enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " EPRNE[7] ,RX endpoint 7 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " [6] ,RX endpoint 6 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " [5] ,RX endpoint 5 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " [4] ,RX endpoint 4 NAK enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " [3] ,RX endpoint 3 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " [2] ,RX endpoint 2 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " [1] ,RX endpoint 1 NAK enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " [0] ,RX endpoint 0 NAK" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x178++0x07
|
|
hide.long 0x00 "ENDPTNAK,Endpoint NAK"
|
|
hide.long 0x04 "ENDPTNAKEN,Endpoint NAK Enable"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x03)
|
|
rgroup.long 0x180++0x03
|
|
line.long 0x00 "CONFIGFLAG,Configure Flag Register"
|
|
bitfld.long 0x00 0. " CF ,Controls the default port-routing control logic (To which host controller ports are routed)" "Classic,This"
|
|
else
|
|
hgroup.long 0x180++0x03
|
|
hide.long 0x00 "CONFIGFLAG,Configure Flag Register"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x03)&&(((per.l(ad:0x402E0000+0x104))&0x10)==0x10)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "PORTSC1,Port Status & Control"
|
|
rbitfld.long 0x00 25. 30.--31. " PTS ,Parallel transceiver select" "UTMI,?..."
|
|
rbitfld.long 0x00 29. " STS ,Serial transceiver select" "Not selected,Selected"
|
|
rbitfld.long 0x00 28. " PTW ,Parallel transceiver width" "8-bit,16-bit"
|
|
rbitfld.long 0x00 26.--27. " PSPD ,Port speed" "Full speed,Low speed,High speed,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port force full speed connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY low power suspend - clock disable" "No,Yes"
|
|
bitfld.long 0x00 22. " WKOC ,Wake on over-current enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on disconnect enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on connect enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC ,Port test control" "TEST_MODE_DISABLE,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Indicates that an internal companion controller owns and controls the port" "Not owned,Owned"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port power" "Off,On"
|
|
rbitfld.long 0x00 10.--11. " LS ,Line status" "SE0,J-state,K-state,?..."
|
|
rbitfld.long 0x00 9. " HSP ,High-Speed port" "Low-speed mode,High-speed mode"
|
|
bitfld.long 0x00 8. " PR ,Port reset" "Not reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force port resume" "Not forced,Forced"
|
|
eventfld.long 0x00 5. " OCC ,Over-current change" "Not changed,Changed"
|
|
rbitfld.long 0x00 4. " OCA ,Over-current active" "Not active,Active"
|
|
textline " "
|
|
eventfld.long 0x00 3. " PEC ,Port enable/disable change" "Not changed,Changed"
|
|
bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " CSC ,Connect status change" "Not changed,Changed"
|
|
rbitfld.long 0x00 0. " CCS ,Current connect status" "Not attached,Attached"
|
|
elif (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x03)&&(((per.l(ad:0x402E0000+0x104))&0x10)==0x00)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "PORTSC1,Port Status & Control"
|
|
rbitfld.long 0x00 25. 30.--31. " PTS ,Parallel transceiver select" "UTMI,?..."
|
|
rbitfld.long 0x00 29. " STS ,Serial transceiver select" "Not selected,Selected"
|
|
rbitfld.long 0x00 28. " PTW ,Parallel transceiver width" "8-bit,16-bit"
|
|
rbitfld.long 0x00 26.--27. " PSPD ,Port speed" "Full speed,Low speed,High speed,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port force full speed connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY low power suspend - clock disable" "No,Yes"
|
|
bitfld.long 0x00 22. " WKOC ,Wake on over-current enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on disconnect enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on connect enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC ,Port test control" "TEST_MODE_DISABLE,J_STATE,K_STATE,NAK,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Indicates that an internal companion controller owns and controls the port" "Not owned,Owned"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " PP ,Port power" "Off,On"
|
|
rbitfld.long 0x00 10.--11. " LS ,Line status" "SE0,J-state,K-state,?..."
|
|
rbitfld.long 0x00 9. " HSP ,High-Speed port" "Low-speed mode,High-speed mode"
|
|
bitfld.long 0x00 8. " PR ,Port reset" "Not reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force port resume" "Not forced,Forced"
|
|
eventfld.long 0x00 5. " OCC ,Over-current change" "Not changed,Changed"
|
|
rbitfld.long 0x00 4. " OCA ,Over-current active" "Not active,Active"
|
|
textline " "
|
|
eventfld.long 0x00 3. " PEC ,Port enable/disable change" "Not changed,Changed"
|
|
bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. " CSC ,Connect status change" "Not changed,Changed"
|
|
rbitfld.long 0x00 0. " CCS ,Current connect status" "Not attached,Attached"
|
|
elif (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)&&(((per.l(ad:0x402E0000+0x104))&0x10)==0x10)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "PORTSC1,Port Status & Control"
|
|
rbitfld.long 0x00 25. 30.--31. " PTS ,Parallel transceiver select" "UTMI,?..."
|
|
rbitfld.long 0x00 29. " STS ,Serial transceiver select" "Not selected,Selected"
|
|
rbitfld.long 0x00 28. " PTW ,Parallel transceiver width" "8-bit,16-bit"
|
|
rbitfld.long 0x00 26.--27. " PSPD ,Port speed" "Full speed,Low speed,High speed,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port force full speed connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY low power suspend - clock disable" "No,Yes"
|
|
bitfld.long 0x00 22. " WKOC ,Wake on over-current enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on disconnect enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on connect enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC ,Port test control" "TEST_MODE_DISABLE,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Indicates that an internal companion controller owns and controls the port" "Not owned,Owned"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PP ,Port power" "Off,On"
|
|
rbitfld.long 0x00 10.--11. " LS ,Line status" "SE0,J-state,K-state,?..."
|
|
rbitfld.long 0x00 9. " HSP ,High-Speed port" "Low-speed mode,High-speed mode"
|
|
rbitfld.long 0x00 8. " PR ,Port reset" "Not reset,Reset"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force port resume" "Not forced,Forced"
|
|
eventfld.long 0x00 5. " OCC ,Over-current change" "Not changed,Changed"
|
|
rbitfld.long 0x00 4. " OCA ,Over-current active" "Not active,Active"
|
|
textline " "
|
|
eventfld.long 0x00 3. " PEC ,Port enable/disable change" "Not changed,?..."
|
|
bitfld.long 0x00 2. " PE ,Port enabled/disabled" ",Enabled"
|
|
rbitfld.long 0x00 0. " CCS ,Current connect status" "Not present,Present"
|
|
elif (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)&&(((per.l(ad:0x402E0000+0x104))&0x10)==0x00)
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "PORTSC1,Port Status & Control"
|
|
rbitfld.long 0x00 25. 30.--31. " PTS ,Parallel transceiver select" "UTMI,?..."
|
|
rbitfld.long 0x00 29. " STS ,Serial transceiver select" "Not selected,Selected"
|
|
rbitfld.long 0x00 28. " PTW ,Parallel transceiver width" "8-bit,16-bit"
|
|
rbitfld.long 0x00 26.--27. " PSPD ,Port speed" "Full speed,Low speed,High speed,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24. " PFSC ,Port force full speed connect" "Not forced,Forced"
|
|
bitfld.long 0x00 23. " PHCD ,PHY low power suspend - clock disable" "No,Yes"
|
|
bitfld.long 0x00 22. " WKOC ,Wake on over-current enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WKDC ,Wake on disconnect enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " WKCN ,Wake on connect enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " PTC ,Port test control" "TEST_MODE_DISABLE,J_STATE,K_STATE,SE0,Packet,FORCE_ENABLE_HS,FORCE_ENABLE_FS,FORCE_ENABLE_LS,?..."
|
|
bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,?..."
|
|
bitfld.long 0x00 13. " PO ,Indicates that an internal companion controller owns and controls the port" "Not owned,Owned"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " PP ,Port power" "Off,On"
|
|
rbitfld.long 0x00 10.--11. " LS ,Line status" "SE0,J-state,K-state,?..."
|
|
rbitfld.long 0x00 9. " HSP ,High-Speed port" "Low-speed mode,High-speed mode"
|
|
rbitfld.long 0x00 8. " PR ,Port reset" "Not reset,Reset"
|
|
textline " "
|
|
rbitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
bitfld.long 0x00 6. " FPR ,Force port resume" "Not forced,Forced"
|
|
eventfld.long 0x00 5. " OCC ,Over-current change" "Not changed,Changed"
|
|
rbitfld.long 0x00 4. " OCA ,Over-current active" "Not active,Active"
|
|
textline " "
|
|
eventfld.long 0x00 3. " PEC ,Port enable/disable change" "Not changed,?..."
|
|
bitfld.long 0x00 2. " PE ,Port enabled/disabled" ",Enabled"
|
|
rbitfld.long 0x00 0. " CCS ,Current connect status" "Not present,Present"
|
|
else
|
|
hgroup.long 0x184++0x03
|
|
hide.long 0x00 "PORTSC1,Port Status & Control"
|
|
endif
|
|
textline " "
|
|
group.long 0x1A4++0x07
|
|
line.long 0x00 "OTGSC,On-The-Go Status & Control"
|
|
bitfld.long 0x00 30. " DPIE ,Data pulse interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EN_1MS ,1 millisecond timer interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BSEIE ,B session end interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " BSVIE ,B session valid interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ASVIE ,A session valid interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " AVVIE ,A VBUS valid interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IDIE ,USB ID interrupt enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. " DPIS ,Data pulse interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 21. " STATUS_1MS ,1 millisecond timer interrupt status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " BSEIS ,B session end interrupt status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 19. " BSVIS ,B session valid interrupt status" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " ASVIS ,A session valid interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 17. " AVVIS ,A VBUS valid interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IDIS ,USB ID interrupt status" "No interrupt,Interrupt"
|
|
rbitfld.long 0x00 14. " DPS ,Data bus pulsing status" "Not detected,Detected"
|
|
rbitfld.long 0x00 13. " TOG_1MS ,1 millisecond timer toggle" "Not toggled,Toggled"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " BSE ,B session end" "Not ended,Ended"
|
|
rbitfld.long 0x00 11. " BSV ,B session valid" "Invalid,Valid"
|
|
rbitfld.long 0x00 10. " ASV ,A session valid" "Invalid,Valid"
|
|
rbitfld.long 0x00 9. " AVV ,A VBUS valid" "Invalid,Valid"
|
|
textline " "
|
|
rbitfld.long 0x00 8. " ID ,USB ID" "A device,B device"
|
|
bitfld.long 0x00 5. " IDPU ,ID pullup" "Off,On"
|
|
bitfld.long 0x00 4. " DP ,Data pulsing" "Not pulled-up,Pulled-up"
|
|
bitfld.long 0x00 3. " OT ,OTG termination" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VC ,VBUS charge" "Not charged,Charged"
|
|
bitfld.long 0x00 0. " VD ,Vbus_discharge" "Not discharged,Discharged"
|
|
line.long 0x04 "USBMODE,USB Device Mode"
|
|
bitfld.long 0x04 4. " SDIS ,Stream disable mode" "Inactive,Active"
|
|
bitfld.long 0x04 3. " SLOM ,Setup lockout mode" "On,Off"
|
|
bitfld.long 0x04 2. " ES ,Endian select" "Little endian,Big endian"
|
|
bitfld.long 0x04 0.--1. " CM ,Controller mode" "Idle,,Device controller,Host controller"
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "ENDPTSETUPSTAT,Endpoint Setup Status"
|
|
hexmask.long.word 0x00 0.--15. 1. " ENDPTSETUPSTAT ,Setup endpoint status"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "ENDPTSTAT_SET/CLR,Endpoint Set/Clear Status"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " ETBR[7] ,Endpoint transmit buffer ready 7" "Cleared,Set"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " [6] ,Endpoint transmit buffer ready 6" "Cleared,Set"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " [5] ,Endpoint transmit buffer ready 5" "Cleared,Set"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " [4] ,Endpoint transmit buffer ready 4" "Cleared,Set"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " [3] ,Endpoint transmit buffer ready 3" "Cleared,Set"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " [2] ,Endpoint transmit buffer ready 2" "Cleared,Set"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " [1] ,Endpoint transmit buffer ready 1" "Cleared,Set"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " [0] ,Endpoint transmit buffer ready 0" "Cleared,Set"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ERBR[7] ,Endpoint receive buffer ready 7" "Cleared,Set"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " [6] ,Endpoint receive buffer ready 6" "Cleared,Set"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " [5] ,Endpoint receive buffer ready 5" "Cleared,Set"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " [4] ,Endpoint receive buffer ready 4" "Cleared,Set"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " [3] ,Endpoint receive buffer ready 3" "Cleared,Set"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " [2] ,Endpoint receive buffer ready 2" "Cleared,Set"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " [1] ,Endpoint receive buffer ready 1" "Cleared,Set"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " [0] ,Endpoint receive buffer ready 0" "Cleared,Set"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "ENDPTCOMPLETE,Endpoint Complete"
|
|
eventfld.long 0x00 23. " ETCE[7] ,Endpoint 7 transmit complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 22. " [6] ,Endpoint 6 transmit complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 21. " [5] ,Endpoint 5 transmit complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 20. " [4] ,Endpoint 4 transmit complete event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 19. " [3] ,Endpoint 3 transmit complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 18. " [2] ,Endpoint 2 transmit complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 17. " [1] ,Endpoint 1 transmit complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 16. " [0] ,Endpoint 0 transmit complete event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 7. " ERCE[7] ,Endpoint 7 receive complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 6. " [6] ,Endpoint 6 receive complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 5. " [5] ,Endpoint 5 receive complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 4. " [4] ,Endpoint 4 receive complete event" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 3. " [3] ,Endpoint 3 receive complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 2. " [2] ,Endpoint 2 receive complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 1. " [1] ,Endpoint 1 receive complete event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " [0] ,Endpoint 0 receive complete event" "Not occurred,Occurred"
|
|
else
|
|
hgroup.long 0x1AC++0x03
|
|
hide.long 0x00 "ENDPTSETUPSTAT,Endpoint Setup Status"
|
|
hgroup.long 0x1B8++0x03
|
|
hide.long 0x00 "ENDPTSTAT,Endpoint Status"
|
|
hgroup.long 0x1BC++0x03
|
|
hide.long 0x00 "ENDPTCOMPLETE,Endpoint Complete"
|
|
endif
|
|
textline " "
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "ENDPTCTRL0,Endpoint Control0"
|
|
bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX endpoint" "Control,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled"
|
|
textline " "
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "ENDPTCTRL1,Endpoint Control 1"
|
|
bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled"
|
|
bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1C4++0x03
|
|
hide.long 0x00 "ENDPTCTRL1,Endpoint Control 1"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "ENDPTCTRL2,Endpoint Control 2"
|
|
bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled"
|
|
bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1C8++0x03
|
|
hide.long 0x00 "ENDPTCTRL2,Endpoint Control 2"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "ENDPTCTRL3,Endpoint Control 3"
|
|
bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled"
|
|
bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1CC++0x03
|
|
hide.long 0x00 "ENDPTCTRL3,Endpoint Control 3"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "ENDPTCTRL4,Endpoint Control 4"
|
|
bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled"
|
|
bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1D0++0x03
|
|
hide.long 0x00 "ENDPTCTRL4,Endpoint Control 4"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x1D4++0x03
|
|
line.long 0x00 "ENDPTCTRL5,Endpoint Control 5"
|
|
bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled"
|
|
bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1D4++0x03
|
|
hide.long 0x00 "ENDPTCTRL5,Endpoint Control 5"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x1D8++0x03
|
|
line.long 0x00 "ENDPTCTRL6,Endpoint Control 6"
|
|
bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled"
|
|
bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1D8++0x03
|
|
hide.long 0x00 "ENDPTCTRL6,Endpoint Control 6"
|
|
endif
|
|
if (((per.l(ad:0x402E0000+0x1A8))&0x03)==0x02)
|
|
group.long 0x1DC++0x03
|
|
line.long 0x00 "ENDPTCTRL7,Endpoint Control 7"
|
|
bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No effect,Reset"
|
|
bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled"
|
|
bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,?..."
|
|
bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DPM buffer/DMA engine,?..."
|
|
bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled"
|
|
else
|
|
hgroup.long 0x1DC++0x03
|
|
hide.long 0x00 "ENDPTCTRL7,Endpoint Control 7"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "USB-PHY (Universal Serial Bus 2.0 Integrated PHY)"
|
|
tree "USBPHY"
|
|
base ad:0x400D9000
|
|
width 22.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "USBPHY_PWD,USB PHY Power-Down Register"
|
|
bitfld.long 0x00 20. " RXPWDRX ,Receiver block power-down" "Normal,Power-down"
|
|
bitfld.long 0x00 19. " RXPWDDIFF ,High-speed differential receiver power-down" "Normal,Power-down"
|
|
bitfld.long 0x00 18. " RXPWD1PT1 ,Full-speed differential receiver power-down" "Normal,Power-down"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RXPWDENV ,High-speed receiver envelope detector power-down" "Normal,Power-down"
|
|
bitfld.long 0x00 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down" "Normal,Power-down"
|
|
bitfld.long 0x00 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down" "Normal,Power-down"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TXPWDFS ,Full-speed drivers power-down" "Normal,Power-down"
|
|
line.long 0x04 "USBPHY_PWD_SET,USB PHY Power-Down Set Register"
|
|
bitfld.long 0x04 20. " RXPWDRX ,Receiver block power-down set" "No effect,Set"
|
|
bitfld.long 0x04 19. " RXPWDDIFF ,High-speed differential receiver power-down set" "No effect,Set"
|
|
bitfld.long 0x04 18. " RXPWD1PT1 ,Full-speed differential receiver power-down set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 17. " RXPWDENV ,High-speed receiver envelope detector power-down set" "No effect,Set"
|
|
bitfld.long 0x04 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down set" "No effect,Set"
|
|
bitfld.long 0x04 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 10. " TXPWDFS ,Full-speed drivers power-down" "No effect,Set"
|
|
line.long 0x08 "USBPHY_PWD_CLR,USB PHY Power-Down Clear Register"
|
|
bitfld.long 0x08 20. " RXPWDRX ,Receiver block power-down clear" "No effect,Cleared"
|
|
bitfld.long 0x08 19. " RXPWDDIFF ,High-speed differential receiver power-down clear" "No effect,Cleared"
|
|
bitfld.long 0x08 18. " RXPWD1PT1 ,Full-speed differential receiver power-down clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 17. " RXPWDENV ,High-speed receiver envelope detector power-down clear" "No effect,Cleared"
|
|
bitfld.long 0x08 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down clear" "No effect,Cleared"
|
|
bitfld.long 0x08 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 10. " TXPWDFS ,Full-speed drivers power-down clear" "No effect,Cleared"
|
|
line.long 0x0C "USBPHY_PWD_TOG,USB PHY Power-Down Toggle Register"
|
|
bitfld.long 0x0C 20. " RXPWDRX ,Receiver block power-down toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 19. " RXPWDDIFF ,High-speed differential receiver power-down toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 18. " RXPWD1PT1 ,Full-speed differential receiver power-down toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " RXPWDENV ,High-speed receiver envelope detector power-down toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 12. " TXPWDV2I ,Transmit V-to-I converter and the current mirror power-down toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 11. " TXPWDIBIAS ,Current bias block for the transmitter power-down toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " TXPWDFS ,Full-speed drivers power-down toggle" "No effect,Toggled"
|
|
line.long 0x10 "USBPHY_TX,USB PHY Transmitter Control Register"
|
|
sif cpuis("IMXRT1021")
|
|
bitfld.long 0x10 26.--28. " USBPHY_TX_EDGECTRL ,Edge-rate of the current sensing transistors used in HS transmit" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 16.--19. " TXCAL45DP ,Resistance selection to the USB_DP output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)"
|
|
bitfld.long 0x10 8.--11. " TXCAL45DN ,Resistance selection to the USB_DN output pin" "0(maximum),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(minimum)"
|
|
bitfld.long 0x10 0.--3. " D_CAL ,Resistor Trimming Code" "0.16%,,,,,,,Nominal,,,,,,,,+25%"
|
|
group.long 0x20++0x0F
|
|
line.long 0x00 "USBPHY_RX,USB PHY Receiver Control Register"
|
|
bitfld.long 0x00 22. " RXDBYPASS ,Bypass" "Normal,Single-ended"
|
|
bitfld.long 0x00 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..."
|
|
bitfld.long 0x00 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..."
|
|
line.long 0x04 "USBPHY_RX_SET,USB PHY Receiver Set Register"
|
|
bitfld.long 0x04 22. " RXDBYPASS ,Bypass set" "No effect,Set"
|
|
bitfld.long 0x04 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..."
|
|
bitfld.long 0x04 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..."
|
|
line.long 0x08 "USBPHY_RX_CLR,USB PHY Receiver Clear Register"
|
|
bitfld.long 0x08 22. " RXDBYPASS ,Bypass clear" "No effect,Cleared"
|
|
bitfld.long 0x08 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..."
|
|
bitfld.long 0x08 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..."
|
|
line.long 0x0C "USBPHY_RX_TOG,USB PHY Receiver Toggle Register"
|
|
bitfld.long 0x0C 22. " RXDBYPASS ,Bypass toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 4.--6. " DISCONADJ ,Adjusts the trip point for the disconnect detector" "0.57500 V,0.56875 V,0.58125 V,0.58750 V,?..."
|
|
bitfld.long 0x0C 0.--2. " ENVADJ ,Adjusts the trip point for the envelope detector" "0.12500 V,0.10000 V,0.13750 V,0.15000 V,?..."
|
|
group.long 0x30++0x13
|
|
line.long 0x00 "USBPHY_CTRL,USB PHY General Control Register"
|
|
bitfld.long 0x00 31. " SFTRST ,Soft reset" "No reset,Reset"
|
|
bitfld.long 0x00 30. " CLKGATE ,Gate UTMI Clocks" "Running,Gated"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 29. " UTMI_SUSPENDM ,UTMI suspend mode" "Powered-down,Not powered-down"
|
|
else
|
|
bitfld.long 0x00 29. " UTMI_SUSPENDM ,UTMI suspend mode" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 28. " HOST_FORCE_LS_SE0 ,Forces the next FS packet that is transmitted to have a EOP with LS timing" "Not forced,Forced"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x00 27. " OTG_ID_VALUE ,Results of ID pin on MiniAB plug" "Host (A),Device (B)"
|
|
else
|
|
bitfld.long 0x00 27. " OTG_ID_VALUE ,ID value" "False/host(A),True/device(B)"
|
|
bitfld.long 0x00 26. " ENAUTOSET_USBCLKS ,USB clocks autoset enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ENAUTOCLR_USBCLKGATE ,USB clock gate autoclear enable" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 24. " FSDLL_RST_EN ,FSDLL reset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " ENVBUSCHG_WKUP ,Wakeup USB if VBUS is toggled when USB is suspended enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " ENAUTO_PWRON_PLL ,Auto-enable the POWER bit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " WAKEUP_IRQ ,Wake-up event" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ENIRQWAKEUP ,Interrupt for the wakeup events enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " ENUTMILEVEL3 ,UTMI+ Level3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " ENUTMILEVEL2 ,UTMI+ Level2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DEVPLUGIN_IRQ ,Device connection" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RESUME_IRQ ,Sending a wake-up after suspend" "Not sent,Sent"
|
|
bitfld.long 0x00 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit" "During wake-up,Until software clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt" "Plugged in,Unplugged"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ENDEVPLUGINDETECT ,200-KOhm pullups enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HOSTDISCONDETECT_IRQ ,Device has disconnected in high-speed mode" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ enable" "Disabled,Enabled"
|
|
line.long 0x04 "USBPHY_CTRL_SET,USB PHY General Control Set Register"
|
|
bitfld.long 0x04 31. " SFTRST ,Soft reset set" "No effect,Set"
|
|
bitfld.long 0x04 30. " CLKGATE ,Gate UTMI Clocks set" "No effect,Set"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x04 29. " UTMI_SUSPENDM ,UTMI suspend mode" "No effect,Set"
|
|
else
|
|
bitfld.long 0x04 29. " UTMI_SUSPENDM ,UTMI suspend mode set" "No effect,Set"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 28. " HOST_FORCE_LS_SE0 ,Forces the next FS packet that is transmitted to have a EOP with LS timing" "No effect,Set"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x04 27. " OTG_ID_VALUE ,Results of ID pin on MiniAB plug" "No effect,Set"
|
|
else
|
|
bitfld.long 0x04 27. " OTG_ID_VALUE ,ID value" "False/host(A),True/device(B)"
|
|
bitfld.long 0x04 26. " ENAUTOSET_USBCLKS ,USB clocks autoset set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ENAUTOCLR_USBCLKGATE ,USB clock gate autoclear set" "No effect,Set"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 24. " FSDLL_RST_EN ,FSDLL reset set" "No effect,Set"
|
|
bitfld.long 0x04 23. " ENVBUSCHG_WKUP ,Wakeup USB if VBUS is toggled when USB is suspended set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended set" "No effect,Set"
|
|
bitfld.long 0x04 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended set" "No effect,Set"
|
|
bitfld.long 0x04 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit set" "No effect,Set"
|
|
bitfld.long 0x04 18. " ENAUTO_PWRON_PLL ,Auto-enable the POWER bit set" "No effect,Set"
|
|
bitfld.long 0x04 17. " WAKEUP_IRQ ,Wake-up event set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 16. " ENIRQWAKEUP ,Interrupt for the wakeup events set" "No effect,Set"
|
|
bitfld.long 0x04 15. " ENUTMILEVEL3 ,UTMI+ Level3 set" "No effect,Set"
|
|
bitfld.long 0x04 14. " ENUTMILEVEL2 ,UTMI+ Level2 set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM set" "No effect,Set"
|
|
bitfld.long 0x04 12. " DEVPLUGIN_IRQ ,Device connection set" "No effect,Set"
|
|
bitfld.long 0x04 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RESUME_IRQ ,Sending a wake-up after suspend set" "No effect,Set"
|
|
bitfld.long 0x04 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line set" "No effect,Set"
|
|
bitfld.long 0x04 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin set" "No effect,Set"
|
|
bitfld.long 0x04 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt set" "No effect,Set"
|
|
bitfld.long 0x04 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ENDEVPLUGINDETECT ,200-KOhm pullups set" "No effect,Set"
|
|
bitfld.long 0x04 3. " HOSTDISCONDETECT_IRQ ,Device has disconnected in high-speed mode set" "No effect,Set"
|
|
bitfld.long 0x04 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector set" "No effect,Set"
|
|
bitfld.long 0x04 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ set" "No effect,Set"
|
|
line.long 0x08 "USBPHY_CTRL_CLR,USB PHY General Control Clear Register"
|
|
bitfld.long 0x08 31. " SFTRST ,Soft reset clear" "No effect,Cleared"
|
|
bitfld.long 0x08 30. " CLKGATE ,Gate UTMI Clocks clear" "No effect,Cleared"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x08 29. " UTMI_SUSPENDM ,UTMI suspend mode" "No effect,Set"
|
|
else
|
|
bitfld.long 0x08 29. " UTMI_SUSPENDM ,UTMI suspend mode clear" "No effect,Cleared"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x08 28. " HOST_FORCE_LS_SE0 ,EOP with low-speed timing clear" "No effect,Cleared"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x08 27. " OTG_ID_VALUE ,Results of ID pin on MiniAB plug" "No effect,Cleared"
|
|
else
|
|
bitfld.long 0x08 27. " OTG_ID_VALUE ,ID value" "False/host(A),True/device(B)"
|
|
bitfld.long 0x08 26. " ENAUTOclear_USBCLKS ,USB clocks autoclear clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ENAUTOCLR_USBCLKGATE ,USB clock gate autoclear clear" "No effect,Cleared"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x08 24. " FSDLL_RST_EN ,FSDLL reset clear" "No effect,Cleared"
|
|
bitfld.long 0x08 23. " ENVBUSCHG_WKUP ,Wakeup USB f VBUS is toggled when USB is suspended clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended clear" "No effect,Cleared"
|
|
bitfld.long 0x08 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended clear" "No effect,Cleared"
|
|
bitfld.long 0x08 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit clear" "No effect,Cleared"
|
|
bitfld.long 0x08 18. " ENAUTO_PWRON_PLL ,Auto-enable the POWER bit clear" "No effect,Cleared"
|
|
bitfld.long 0x08 17. " WAKEUP_IRQ ,Wake-up event clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 16. " ENIRQWAKEUP ,Interrupt for the wakeup events clear" "No effect,Cleared"
|
|
bitfld.long 0x08 15. " ENUTMILEVEL3 ,UTMI+ Level3 clear" "No effect,Cleared"
|
|
bitfld.long 0x08 14. " ENUTMILEVEL2 ,UTMI+ Level2 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM clear" "No effect,Cleared"
|
|
bitfld.long 0x08 12. " DEVPLUGIN_IRQ ,Device connection clear" "No effect,Cleared"
|
|
bitfld.long 0x08 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 10. " RESUME_IRQ ,Sending a wake-up after suspend clear" "No effect,Cleared"
|
|
bitfld.long 0x08 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line clear" "No effect,Cleared"
|
|
bitfld.long 0x08 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin clear" "No effect,Cleared"
|
|
bitfld.long 0x08 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 4. " ENDEVPLUGINDETECT ,200-KOhm pullups clear" "No effect,Cleared"
|
|
bitfld.long 0x08 3. " HOSTDISCONDETECT_IRQ ,Device has disconnected in high-speed mode clear" "No effect,Cleared"
|
|
bitfld.long 0x08 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector clear" "No effect,Cleared"
|
|
bitfld.long 0x08 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ clear" "No effect,Cleared"
|
|
line.long 0x0C "USBPHY_CTRL_TOG,USB PHY General Control Toggle Register"
|
|
bitfld.long 0x0C 31. " SFTRST ,Soft reset toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 30. " CLKGATE ,Gate UTMI Clocks toggle" "No effect,Toggled"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x0C 29. " UTMI_SUSPENDM ,UTMI suspend mode" "No effect,Set"
|
|
else
|
|
bitfld.long 0x0C 29. " UTMI_SUSPENDM ,UTMI suspend mode toggle" "No effect,Toggled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0C 28. " HOST_FORCE_LS_SE0 ,Forces the next FS packet that is transmitted to have a EOP with LS timing" "No effect,Toggled"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x0C 27. " OTG_ID_VALUE ,Results of ID pin on MiniAB plug" "No effect,Toggled"
|
|
else
|
|
bitfld.long 0x0C 27. " OTG_ID_VALUE ,ID value" "False/host(A),True/device(B)"
|
|
bitfld.long 0x0C 26. " ENAUTOCLEAR_USBCLKS ,USB clocks autotoggle toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " ENAUTOCLR_USBCLKGATE ,USB clock gate autotoggle toggle" "No effect,Toggled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0C 24. " FSDLL_RST_EN ,FSDLL reset clear toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 23. " ENVBUSCHG_WKUP ,Wakeup USB f VBUS is toggled when USB is suspended toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 22. " ENIDCHG_WKUP ,Wakeup USB if ID is toggled when USB is suspended toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 21. " ENDPDMCHG_WKUP ,Wakeup USB if DP/DM is toggled when USB is suspended toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 20. " ENAUTOCLR_PHY_PWD ,Auto-clear the PWD register bits toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " ENAUTOCLR_CLKGATE ,Auto-clear the CLKGATE bit toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 18. " ENAUTO_PWRON_PLL ,Auto-enable the POWER bit toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 17. " WAKEUP_IRQ ,Wake-up event toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 16. " ENIRQWAKEUP ,Interrupt for the wakeup events toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 15. " ENUTMILEVEL3 ,UTMI+ Level3 toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 14. " ENUTMILEVEL2 ,UTMI+ Level2 toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " DATA_ON_LRADC ,LRADC to monitor USB_DP and USB_DM toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 12. " DEVPLUGIN_IRQ ,Device connection toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 11. " ENIRQDEVPLUGIN ,Interrupt for the detection of connectivity to the USB line toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " RESUME_IRQ ,Sending a wake-up after suspend toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 9. " ENIRQRESUMEDETECT ,Interrupt for detection of a non-J state on the USB line toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 8. " RESUMEIRQSTICKY ,Resume_IRQ sticky bit toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " ENOTGIDDETECT ,Circuit to detect resistance of MiniAB ID pin toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 6. " OTG_ID_CHG_IRQ ,OTG ID change interrupt toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 5. " DEVPLUGIN_POLARITY ,Devplugin polarity interrupt toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " ENDEVPLUGINDETECT ,200-KOhm pullups toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 3. " HOSTDISCONDETECT_IRQ ,Disconnected in high-speed mode toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 2. " ENIRQHOSTDISCON ,Detection of disconnection to Device when in high-speed host mode interrupt toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " ENHOSTDISCONDETECT ,High-speed disconnect detector toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 0. " ENOTG_ID_CHG_IRQ ,OTG_ID_CHG_IRQ toggle" "No effect,Toggled"
|
|
line.long 0x10 "USBPHY_STATUS,USB PHY Status Register"
|
|
sif cpuis("IMXRT1021")
|
|
rbitfld.long 0x10 10. " RESUME_STATUS ,Interrupt due to host sending wake-up after suspend" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 8. " OTGID_STATUS ,Results of ID pin on MiniAB plug" "Host (A),Device (B)"
|
|
rbitfld.long 0x10 6. " DEVPLUGIN_STATUS ,Device connection on USP_DP and USB_DM lines" "Not connected,Connected"
|
|
textline " "
|
|
rbitfld.long 0x10 3. " HOSTDISCONDETECT_STATUS ,Device disconnected in high-speed host mode" "Not disconnected,Disconnected"
|
|
else
|
|
bitfld.long 0x10 10. " RESUME_STATUS ,Resume status interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 8. " OTGID_STATUS ,OTGID status" "False/host(A),True/device(B)"
|
|
bitfld.long 0x10 6. " DEVPLUGIN_STATUS ,Device connection on USP_DP and USB_DM lines" "Not connected,Connected"
|
|
textline " "
|
|
bitfld.long 0x10 3. " HOSTDISCONDETECT_STATUS ,Device disconnected in high-speed host mode" "Not disconnected,Disconnected"
|
|
endif
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "USBPHY_DEBUG,USB PHY Debug Register"
|
|
bitfld.long 0x00 30. " CLKGATE ,Gate Test Clocks" "Running,Gated"
|
|
bitfld.long 0x00 29. " HOST_RESUME_DEBUG ,Host resume debug" "HOST_FORCE_LS_SE0,UTMI_SUSPEND"
|
|
bitfld.long 0x00 25.--28. " SQUELCHRESETLENGTH ,Duration of RESET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENSQUELCHRESET ,Squelch high-speed receive reset" "No reset,Reset"
|
|
bitfld.long 0x00 16.--20. " SQUELCHRESETCOUNT ,Squelch reset counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 12. " ENTX2RXCOUNT ,Transition in between TX and RX" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5. " ENHSTPULLDOWN[1] ,USB_DP 15-KOhm pulldown override enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ENHSTPULLDOWN[0] ,USB_DM 15-KOhm pulldown override enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OTGIDPIOLOCK ,OTG ID lock" "Not locked,Locked"
|
|
line.long 0x04 "USBPHY_DEBUG_SET,USB PHY Debug Set Register"
|
|
bitfld.long 0x04 30. " CLKGATE ,Gate Test Clocks Set" "No effect,Set"
|
|
bitfld.long 0x04 29. " HOST_RESUME_DEBUG ,Host resume debug set" "No effect,Set"
|
|
bitfld.long 0x04 25.--28. " SQUELCHRESETLENGTH ,Duration of RESET set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x04 24. " ENSQUELCHRESET ,Squelch high-speed receive reset set" "No effect,Set"
|
|
bitfld.long 0x04 16.--20. " SQUELCHRESETCOUNT ,Squelch reset counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 12. " ENTX2RXCOUNT ,Transition in between TX and RX set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x04 5. " ENHSTPULLDOWN[1] ,USB_DP 15-KOhm pulldown override enable set" "No effect,Set"
|
|
bitfld.long 0x04 4. " ENHSTPULLDOWN[0] ,USB_DM 15-KOhm pulldown override enable set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP set" "No effect,Set"
|
|
bitfld.long 0x04 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM set" "No effect,Set"
|
|
bitfld.long 0x04 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 0. " OTGIDPIOLOCK ,OTG ID lock set" "No effect,Set"
|
|
line.long 0x08 "USBPHY_DEBUG_CLR,USB PHY Debug Clear Register"
|
|
bitfld.long 0x08 30. " CLKGATE ,Gate Test Clocks clear" "No effect,Cleared"
|
|
bitfld.long 0x08 29. " HOST_RESUME_DEBUG ,Host resume debug clear" "No effect,Cleared"
|
|
bitfld.long 0x08 25.--28. " SQUELCHRESETLENGTH ,Duration of REclear clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x08 24. " ENSQUELCHRESET ,Squelch high-speed receive reclear clear" "No effect,Cleared"
|
|
bitfld.long 0x08 16.--20. " SQUELCHRESETCOUNT ,Squelch reclear counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 12. " ENTX2RXCOUNT ,Transition in between TX and RX clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x08 5. " ENHSTPULLDOWN[1] ,USB_DP 15-KOhm pulldown override enable clear" "No effect,Cleared"
|
|
bitfld.long 0x08 4. " ENHSTPULLDOWN[0] ,USB_DM 15-KOhm pulldown override enable clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP clear" "No effect,Cleared"
|
|
bitfld.long 0x08 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM clear" "No effect,Cleared"
|
|
bitfld.long 0x08 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 0. " OTGIDPIOLOCK ,OTG ID lock clear" "No effect,Cleared"
|
|
line.long 0x0C "USBPHY_DEBUG_TOG,USB PHY Debug Toggle Register"
|
|
bitfld.long 0x0C 30. " CLKGATE ,Gate Test Clocks toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 29. " HOST_RESUME_DEBUG ,Host resume debug toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 25.--28. " SQUELCHRESETLENGTH ,Duration of REtoggle toggle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x0C 24. " ENSQUELCHRESET ,Squelch high-speed receive retoggle toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 16.--20. " SQUELCHRESETCOUNT ,Squelch retoggle counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0C 12. " ENTX2RXCOUNT ,Transition in between TX and RX toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 8.--11. " TX2RXCOUNT ,Delay in between the end of transmit to the beginning of receive" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x0C 5. " ENHSTPULLDOWN[1] ,USB_DP 15-KOhm pulldown override enable toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 4. " ENHSTPULLDOWN[0] ,USB_DM 15-KOhm pulldown override enable toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " HSTPULLDOWN[1] ,HST pull down for USB_DP toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 2. " HSTPULLDOWN[0] ,HST pull down for USB_DM toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 1. " DEBUG_INTERFACE_HOLD ,Debug interface hold toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 0. " OTGIDPIOLOCK ,OTG ID lock toggle" "No effect,Toggled"
|
|
sif cpuis("IMXRT1021")
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "USBPHY_DEBUG0_STATUS,UTMI Debug Status Register 0"
|
|
bitfld.long 0x00 26.--31. " SQUELCH_COUNT ,Squelch running count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 16.--25. 1. " UTMI_RXERROR_FAIL_COUNT ,UTMI_RXERROR running count"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOOP_BACK_FAIL_COUNT ,Failed pseudo-random generator loopback running count"
|
|
else
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "USBPHY_DEBUG0_STATUS,UTMI Debug Status Register 0"
|
|
bitfld.long 0x00 26.--31. " SQUELCH_COUNT ,Squelch running count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x00 16.--25. 1. " UTMI_RXERROR_FAIL_COUNT ,UTMI_RXERROR running count"
|
|
hexmask.long.word 0x00 0.--15. 1. " LOOP_BACK_FAIL_COUNT ,Failed pseudo-random generator loopback running count"
|
|
endif
|
|
group.long 0x70++0x0F
|
|
line.long 0x00 "USBPHY_DEBUG1,UTMI Debug Status Register 1"
|
|
bitfld.long 0x00 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%"
|
|
line.long 0x04 "USBPHY_DEBUG1_SET,UTMI Debug Set Register 1"
|
|
bitfld.long 0x04 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%"
|
|
line.long 0x08 "USBPHY_DEBUG1_CLR,UTMI Debug Clear Register 1"
|
|
bitfld.long 0x08 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%"
|
|
line.long 0x0C "USBPHY_DEBUG1_TOG,UTMI Debug Toggle Register 1"
|
|
bitfld.long 0x0C 13.--14. " ENTAILADJVD ,Delay increment of the rise of squelch" "Nominal,+20%,-20%,-40%"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "USBPHY_VERSION,UTMI RTL Version Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MAJOR ,MAJOR field of the RTL version"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MINOR ,MINOR field of the RTL version"
|
|
hexmask.long.word 0x00 0.--15. 1. " STEP ,Stepping of the RTL version"
|
|
sif !cpuis("IMXRT1021")
|
|
group.long 0x90++0x0F
|
|
line.long 0x00 "USBPHY_IP,USB PHY IP Block Register"
|
|
sif (cpu()!="VF7XX-CM4"&&cpu()!="VF6XX-CM4"&&cpu()!="VF7XX-CA5"&&cpu()!="VF6XX-CA5"&&cpu()!="VF5XX-CA5"&&cpu()!="VF4XX-CA5"&&cpu()!="VF3XX-CA5")
|
|
bitfld.long 0x00 18. " TSTI_TX_DP ,Drives value on the DP pad" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TSTI_TX_DM ,Drives value on the DM pad" "Low,High"
|
|
bitfld.long 0x00 16. " ANALOG_TESTMODE ,Analog testmode bit" "Normal,Debug"
|
|
endif
|
|
bitfld.long 0x00 2. " EN_USB_CLKS ,USB clocks" "Powered down,Powered up"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLL_LOCKED ,PLL locked" "Unlocked,Locked"
|
|
bitfld.long 0x00 0. " PLL_POWER ,USB PLL Power On" "Off,On"
|
|
line.long 0x04 "USBPHY_IP_SET,USB PHY IP Block Set Register"
|
|
sif (cpu()!="VF7XX-CM4"&&cpu()!="VF6XX-CM4"&&cpu()!="VF7XX-CA5"&&cpu()!="VF6XX-CA5"&&cpu()!="VF5XX-CA5"&&cpu()!="VF4XX-CA5"&&cpu()!="VF3XX-CA5")
|
|
bitfld.long 0x04 18. " TSTI_TX_DP ,Drives value on the DP pad set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 17. " TSTI_TX_DM ,Drives value on the DM pad set" "No effect,Set"
|
|
bitfld.long 0x04 16. " ANALOG_TESTMODE ,Analog testmode bit set" "No effect,Set"
|
|
endif
|
|
bitfld.long 0x04 2. " EN_USB_CLKS ,USB clocks set" "No effect,Set"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PLL_LOCKED ,PLL locked set" "No effect,Set"
|
|
bitfld.long 0x04 0. " PLL_POWER ,USB PLL Power On set" "No effect,Set"
|
|
line.long 0x08 "USBPHY_IP_CLR,USB PHY IP Block Clear Register"
|
|
sif (cpu()!="VF7XX-CM4"&&cpu()!="VF6XX-CM4"&&cpu()!="VF7XX-CA5"&&cpu()!="VF6XX-CA5"&&cpu()!="VF5XX-CA5"&&cpu()!="VF4XX-CA5"&&cpu()!="VF3XX-CA5")
|
|
bitfld.long 0x08 18. " TSTI_TX_DP ,Drives value on the DP pad clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 17. " TSTI_TX_DM ,Drives value on the DM pad clear" "No effect,Cleared"
|
|
bitfld.long 0x08 16. " ANALOG_TESTMODE ,Analog testmode bit clear" "No effect,Cleared"
|
|
endif
|
|
bitfld.long 0x08 2. " EN_USB_CLKS ,USB clocks clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 1. " PLL_LOCKED ,PLL locked clear" "No effect,Cleared"
|
|
bitfld.long 0x08 0. " PLL_POWER ,USB PLL Power On clear" "No effect,Cleared"
|
|
line.long 0x0C "USBPHY_IP_TOG,USB PHY IP Block Toggle Register"
|
|
sif (cpu()!="VF7XX-CM4"&&cpu()!="VF6XX-CM4"&&cpu()!="VF7XX-CA5"&&cpu()!="VF6XX-CA5"&&cpu()!="VF5XX-CA5"&&cpu()!="VF4XX-CA5"&&cpu()!="VF3XX-CA5")
|
|
bitfld.long 0x0C 18. " TSTI_TX_DP ,Drives value on the DP pad toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " TSTI_TX_DM ,Drives value on the DM pad toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 16. " ANALOG_TESTMODE ,Analog testmode bit toggle" "No effect,Toggled"
|
|
endif
|
|
bitfld.long 0x0C 2. " EN_USB_CLKS ,USB clocks toggle" "No effect,Toggled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " PLL_LOCKED ,PLL locked toggle" "No effect,Toggled"
|
|
bitfld.long 0x0C 0. " PLL_POWER ,USB PLL Power On toggle" "No effect,Toggled"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "USB_ANALOG"
|
|
tree "USB1"
|
|
base ad:0x400D81A0
|
|
width 18.
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "VBUS_DETECT,USB VBUS Detect Register"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " CHARGE_VBUS ,USB OTG charge VBUS" "0,1"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS" "0,1"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector" "Powered down,Powered up"
|
|
bitfld.long 0x00 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V"
|
|
line.long 0x04 "VBUS_DETECT_SET,USB VBUS Detect Set Register"
|
|
bitfld.long 0x04 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V"
|
|
line.long 0x08 "VBUS_DETECT_CLR,USB VBUS Detect Clear Register"
|
|
bitfld.long 0x08 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V"
|
|
line.long 0x0C "VBUS_DETECT_TOG,USB VBUS Detect Toggle Register"
|
|
bitfld.long 0x0C 27. " CHARGE_VBUS ,USB OTG charge VBUS toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V"
|
|
line.long 0x10 "CHRG_DETECT,USB Charger Detect Register"
|
|
setclrfld.long 0x10 20. 0x14 20. 0x18 20. " EN_B ,Control the charger detector" "Enabled,Disabled"
|
|
setclrfld.long 0x10 19. 0x14 19. 0x18 19. " CHK_CHRG_B ,Check the charger connection to USB port" "Checked,Not checked"
|
|
setclrfld.long 0x10 18. 0x14 18. 0x18 18. " CHK_CONTACT ,Check the contact of USB plug" "Not checked,Checked"
|
|
line.long 0x1C "CHRG_DETECT_TOG,USB Charger Detect Toggle Register"
|
|
bitfld.long 0x1C 20. " EN_B ,Control the charger detector" "No effect,Toggle"
|
|
bitfld.long 0x1C 19. " CHK_CHRG_B ,Check the charger connection to USB port" "No effect,Toggle"
|
|
bitfld.long 0x1C 18. " CHK_CONTACT ,Check the contact of USB plug" "No effect,Toggle"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "VBUS_DETECT_STAT,USB VBUS Detect Status Register"
|
|
bitfld.long 0x00 3. " VBUS_VALID ,VBus valid for USB OTG" "Not valid,Valid"
|
|
bitfld.long 0x00 2. " AVALID ,VBus valid for A-peripheral" "Not valid,Valid"
|
|
bitfld.long 0x00 1. " BVALID ,VBus valid for B-peripheral" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " SESSEND ,Session end for USB OTG" "Not ended,Ended"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "CHRG_DETECT_STAT,USB Charger Detect Status Register"
|
|
bitfld.long 0x00 3. " DP_STATE ,DP line state output of the charger detector" "Low,High"
|
|
bitfld.long 0x00 2. " DM_STATE ,DM line state output of the charger detector" "Low,High"
|
|
bitfld.long 0x00 1. " CHRG_DETECTED ,State of charger detection" "Not present,Present"
|
|
bitfld.long 0x00 0. " PLUG_CONTACT ,State of the USB plug contact detector" "No contact,Good contact"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "MISC,USB Misc Register"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter usage" "Not used,Used"
|
|
line.long 0x0C "MISC_TOG,USB Misc Toggle Register"
|
|
bitfld.long 0x0C 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter usage toggle" "No effect,Toggle"
|
|
width 0x0B
|
|
tree.end
|
|
tree "USB2"
|
|
base ad:0x400D8200
|
|
width 18.
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "VBUS_DETECT,USB VBUS Detect Register"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " CHARGE_VBUS ,USB OTG charge VBUS" "0,1"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS" "0,1"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector" "Powered down,Powered up"
|
|
bitfld.long 0x00 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V"
|
|
line.long 0x04 "VBUS_DETECT_SET,USB VBUS Detect Set Register"
|
|
bitfld.long 0x04 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V"
|
|
line.long 0x08 "VBUS_DETECT_CLR,USB VBUS Detect Clear Register"
|
|
bitfld.long 0x08 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V"
|
|
line.long 0x0C "VBUS_DETECT_TOG,USB VBUS Detect Toggle Register"
|
|
bitfld.long 0x0C 27. " CHARGE_VBUS ,USB OTG charge VBUS toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 26. " DISCHARGE_VBUS ,USB OTG discharge VBUS toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 20. " VBUSVALID_PWRUP_CMPS ,Powers up comparators for vbus_valid detector toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 0.--2. " VBUSVALID_THRESH ,Threshold for the VBUSVALID comparator" "4.0V,4.1V,4.2V,4.3V,4.4V,4.5V,4.6V,4.7V"
|
|
line.long 0x10 "CHRG_DETECT,USB Charger Detect Register"
|
|
setclrfld.long 0x10 20. 0x14 20. 0x18 20. " EN_B ,Control the charger detector" "Enabled,Disabled"
|
|
setclrfld.long 0x10 19. 0x14 19. 0x18 19. " CHK_CHRG_B ,Check the charger connection to USB port" "Checked,Not checked"
|
|
setclrfld.long 0x10 18. 0x14 18. 0x18 18. " CHK_CONTACT ,Check the contact of USB plug" "Not checked,Checked"
|
|
line.long 0x1C "CHRG_DETECT_TOG,USB Charger Detect Toggle Register"
|
|
bitfld.long 0x1C 20. " EN_B ,Control the charger detector" "No effect,Toggle"
|
|
bitfld.long 0x1C 19. " CHK_CHRG_B ,Check the charger connection to USB port" "No effect,Toggle"
|
|
bitfld.long 0x1C 18. " CHK_CONTACT ,Check the contact of USB plug" "No effect,Toggle"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "VBUS_DETECT_STAT,USB VBUS Detect Status Register"
|
|
bitfld.long 0x00 3. " VBUS_VALID ,VBus valid for USB OTG" "Not valid,Valid"
|
|
bitfld.long 0x00 2. " AVALID ,VBus valid for A-peripheral" "Not valid,Valid"
|
|
bitfld.long 0x00 1. " BVALID ,VBus valid for B-peripheral" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " SESSEND ,Session end for USB OTG" "Not ended,Ended"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "CHRG_DETECT_STAT,USB Charger Detect Status Register"
|
|
bitfld.long 0x00 3. " DP_STATE ,DP line state output of the charger detector" "Low,High"
|
|
bitfld.long 0x00 2. " DM_STATE ,DM line state output of the charger detector" "Low,High"
|
|
bitfld.long 0x00 1. " CHRG_DETECTED ,State of charger detection" "Not present,Present"
|
|
bitfld.long 0x00 0. " PLUG_CONTACT ,State of the USB plug contact detector" "No contact,Good contact"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "MISC,USB Misc Register"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter usage" "Not used,Used"
|
|
line.long 0x0C "MISC_TOG,USB Misc Toggle Register"
|
|
bitfld.long 0x0C 30. " EN_CLK_UTMI ,Enables the clk to the UTMI block toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 1. " EN_DEGLITCH ,Enable the deglitching circuit of the USB PLL output toggle" "No effect,Toggle"
|
|
bitfld.long 0x0C 0. " HS_USE_EXTERNAL_R ,External resistor to generate the current bias for the high speed transmitter usage toggle" "No effect,Toggle"
|
|
textline " "
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "DIGPROG,Chip Silicon Version Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree.open "uSDHC (Ultra Secured Digital Host Controller)"
|
|
tree "uSDHC 1"
|
|
base ad:0x402C0000
|
|
width 22.
|
|
if ((((per.l(ad:0x402C0000+0xC8))&0x1000)==0x00)&&((((per.l(ad:0x402C0000+0x24))&0x04)==0x00)))
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DS_ADDR,DMA System Address Register"
|
|
hexmask.long 0x00 2.--31. 0x04 " DS_ADDR ,SDMA System Address"
|
|
elif ((((per.l(ad:0x402C0000+0xC8))&0x1000)==0x00)&&((((per.l(ad:0x402C0000+0x24))&0x04)==0x04)))
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "DS_ADDR,DMA System Address Register"
|
|
in
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DS_ADDR,DMA System Address Register (Argument 2)"
|
|
endif
|
|
if ((((per.l(ad:0x402C0000+0x24))&0x04)==0x00)&&(((per.l(ad:0x402C0000+0x48))&0x02)==0x02))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BLK_ATT,Block Attributes Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " BLKCNT ,Blocks count for current transfer"
|
|
hexmask.long.word 0x00 0.--12. 1. " BLKSIZE ,Transfer block size"
|
|
elif ((((per.l(ad:0x402C0000+0x24))&0x04)==0x00)&&(((per.l(ad:0x402C0000+0x48))&0x02)==0x00))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BLK_ATT,Block Attributes Register"
|
|
textfld " "
|
|
hexmask.long.word 0x00 0.--12. 1. " BLKSIZE ,Transfer block size"
|
|
else
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "BLK_ATT,Block Attributes Register"
|
|
in
|
|
endif
|
|
if (((per.l(ad:0x402C0000+0x24))&0x01)==0x00)
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "CMD_ARG,Command Argument Register"
|
|
line.long 0x04 "CMD_XFR_TYP,Command Transfer Type Register"
|
|
bitfld.long 0x04 24.--29. " CMDINX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 22.--23. " CMDTYP ,Command type" "Normal,Suspend,Resume,Abort"
|
|
bitfld.long 0x04 21. " DPSEL ,Data present select" "No data,Data present"
|
|
newline
|
|
bitfld.long 0x04 20. " CICEN ,Command index check enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " CCCEN ,Command CRC check enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--17. " RSPTYP ,Response type select" "No response,Length 136,Length 48,Length 48/busy check"
|
|
else
|
|
rgroup.long 0x08++0x07
|
|
line.long 0x00 "CMD_ARG,Command Argument Register"
|
|
line.long 0x04 "CMD_XFR_TYP,Command Transfer Type Register"
|
|
bitfld.long 0x04 24.--29. " CMDINX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 22.--23. " CMDTYP ,Command type" "Normal,Suspend,Resume,Abort"
|
|
bitfld.long 0x04 21. " DPSEL ,Data present select" "No data,Data present"
|
|
newline
|
|
bitfld.long 0x04 20. " CICEN ,Command index check enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " CCCEN ,Command CRC check enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--17. " RSPTYP ,Response type select" "No response,Length 136,Length 48,Length 48/busy check"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD_RSP0,Command Response Register 0"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "CMD_RSP1,Command Response Register 1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD_RSP2,Command Response Register 2"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "CMD_RSP3,Command Response Register 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DATA_BUFF_ACC_PORT,Data Buffer Access Port Register"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PRES_STATE,Present State Register"
|
|
bitfld.long 0x00 31. " DLSL[7] ,DAT line 7 signal level" "Low,High"
|
|
bitfld.long 0x00 30. " [6] ,DAT line 6 signal level" "Low,High"
|
|
bitfld.long 0x00 29. " [5] ,DAT line 5 signal level" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 28. " [4] ,DAT line 4 signal level" "Low,High"
|
|
bitfld.long 0x00 27. " [3] ,DAT line 3 signal level" "Low,High"
|
|
bitfld.long 0x00 26. " [2] ,DAT line 2 signal level" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 25. " [1] ,DAT line 1 signal level" "Low,High"
|
|
bitfld.long 0x00 24. " [0] ,DAT line 0 signal level" "Low,High"
|
|
bitfld.long 0x00 23. " CLSL ,CMD line signal level" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 19. " WPSPL ,Write protect switch pin level" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " CDPL ,Card detect pin level" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " CINST ,Card inserted" "Reset/not inserted,Inserted"
|
|
newline
|
|
bitfld.long 0x00 15. " TSCD ,Tape select change done" "Not finished,Finished"
|
|
bitfld.long 0x00 12. " RTR ,Re-Tuning request" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " BREN ,Buffer read enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. " BWEN ,Buffer write enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RTA ,Read transfer active" "Inactive,Active"
|
|
bitfld.long 0x00 8. " WTA ,Write transfer active" "Inactive,Active"
|
|
newline
|
|
bitfld.long 0x00 7. " SDOFF ,SD clock gated off internally" "No,Yes"
|
|
bitfld.long 0x00 6. " PEROFF ,IPG_PERCLK gated off internally" "No,Yes"
|
|
bitfld.long 0x00 5. " HCKOFF ,HCLK gated off internally" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 4. " IPGOFF ,IPG_CLK gated off internally" "No,Yes"
|
|
bitfld.long 0x00 3. " SDSTB ,SD clock stable" "Unstable,Stable"
|
|
bitfld.long 0x00 2. " DLA ,Data line active" "Inactive,Active"
|
|
newline
|
|
bitfld.long 0x00 1. " CDIHB ,Command inhibit (DATA)" "Not inhibited,Inhibited"
|
|
bitfld.long 0x00 0. " CIHB ,Command inhibit (CMD)" "Not inhibited,Inhibited"
|
|
if ((((per.l(ad:0x402C0000+0x28))&0x06)==0x02)&&(((per.l(ad:0x402C0000+0x48))&0x01)==0x01))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control Register"
|
|
bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact"
|
|
bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WECRM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WECINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. " WECINT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High"
|
|
bitfld.long 0x00 19. " IABG ,Interrupt at block gap" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart"
|
|
bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Transferred,Stopped"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " DMASEL ,DMA select" "No DMA/Simple DMA,ADMA1,ADMA2,?..."
|
|
bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Normal level,Test level"
|
|
bitfld.long 0x00 6. " CDTL ,Card detect test level (valid while CDSS = 1)" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " EMODE ,Endian mode" "Big endian,Half word big endian,Little endian,?..."
|
|
bitfld.long 0x00 3. " D3CD ,DATA3 as card detection pin" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,8-bit,?..."
|
|
newline
|
|
bitfld.long 0x00 0. " LCTL ,LED control" "Off,On"
|
|
elif ((((per.l(ad:0x402C0000+0x28))&0x06)!=0x02)&&(((per.l(ad:0x402C0000+0x48))&0x01)==0x01))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control Register"
|
|
bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact"
|
|
bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WECRM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WECINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. " WECINT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart"
|
|
bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Transferred,Stopped"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " DMASEL ,DMA select" "No DMA/Simple DMA,ADMA1,ADMA2,?..."
|
|
bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Card Detection Level,Card Detection Test Level"
|
|
bitfld.long 0x00 6. " CDTL ,Card detect test level (valid while CDSS = 1)" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " EMODE ,Endian mode" "Big endian,Half word big endian,Little endian,?..."
|
|
bitfld.long 0x00 3. " D3CD ,DATA3 as card detection pin" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,8-bit,?..."
|
|
newline
|
|
bitfld.long 0x00 0. " LCTL ,LED control" "Off,On"
|
|
elif ((((per.l(ad:0x402C0000+0x28))&0x06)==0x02)&&(((per.l(ad:0x402C0000+0x48))&0x01)==0x00))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control Register"
|
|
bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact"
|
|
bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WECRM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WECINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. " WECINT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High"
|
|
bitfld.long 0x00 19. " IABG ,Interrupt at block gap" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart"
|
|
bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Transferred,Stopped"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Card Detection Level,Card Detection Test Level"
|
|
bitfld.long 0x00 6. " CDTL ,Card detect test level (valid while CDSS = 1)" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " EMODE ,Endian mode" "Big endian,Half word big endian,Little endian,?..."
|
|
bitfld.long 0x00 3. " D3CD ,DATA3 as card detection pin" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,8-bit,?..."
|
|
newline
|
|
bitfld.long 0x00 0. " LCTL ,LED control" "Off,On"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control Register"
|
|
bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact"
|
|
bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WECRM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WECINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. " WECINT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart"
|
|
bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Transferred,Stopped"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Card Detection Level,Card Detection Test Level"
|
|
bitfld.long 0x00 6. " CDTL ,Card detect test level (valid while CDSS = 1)" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " EMODE ,Endian mode" "Big endian,Half word big endian,Little endian,?..."
|
|
bitfld.long 0x00 3. " D3CD ,DATA3 as card detection pin" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,8-bit,?..."
|
|
newline
|
|
bitfld.long 0x00 0. " LCTL ,LED control" "Off,On"
|
|
endif
|
|
if (((per.l(ad:0x402C0000+0x24))&0x03)==0x00)
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SYS_CTRL,System Control Register"
|
|
bitfld.long 0x00 28. " RSTT ,Reset tuning" "Not reset,Reset"
|
|
bitfld.long 0x00 27. " INITA ,Initialization active" "Not active,Active"
|
|
bitfld.long 0x00 26. " RSTD ,Software reset for DATA line" "No reset,Reset"
|
|
newline
|
|
bitfld.long 0x00 25. " RSTC ,Software reset for CMD line" "No reset,Reset"
|
|
bitfld.long 0x00 24. " RSTA ,Software reset for all" "No reset,Reset"
|
|
bitfld.long 0x00 23. " IPP_RST_N ,Value output to CARD for hardware reset" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 16.--19. " DTOCV ,Data timeout counter value" "SDCLK x 2^14,SDCLK x 2^15,,,,,,,,,,,,SDCLK x 2^27,SDCLK x 2^28,SDCLK x 2^29"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDCLKFS ,SDCLK frequency select"
|
|
bitfld.long 0x00 4.--7. " DVS ,Divisor" "/1,/2,,,,,,,,,,,,,/15,/16"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SYS_CTRL,System Control Register"
|
|
bitfld.long 0x00 28. " RSTT ,Reset tuning" "Not reset,Reset"
|
|
rbitfld.long 0x00 27. " INITA ,Initialization active" "Not active,Active"
|
|
bitfld.long 0x00 26. " RSTD ,Software reset for DATA line" "No reset,Reset"
|
|
newline
|
|
bitfld.long 0x00 25. " RSTC ,Software reset for CMD line" "No reset,Reset"
|
|
bitfld.long 0x00 24. " RSTA ,Software reset for all" "No reset,Reset"
|
|
bitfld.long 0x00 23. " IPP_RST_N ,Value output to CARD for hardware reset" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 16.--19. " DTOCV ,Data timeout counter value" "SDCLK x 2^14,SDCLK x 2^15,,,,,,,,,,,,SDCLK x 2^27,SDCLK x 2^28,SDCLK x 2^29"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDCLKFS ,SDCLK frequency select"
|
|
bitfld.long 0x00 4.--7. " DVS ,Divisor" "/1,/2,,,,,,,,,,,,,/15,/16"
|
|
endif
|
|
group.long 0x30++0x0B
|
|
line.long 0x00 "INT_STATUS,Interrupt Status Register"
|
|
eventfld.long 0x00 28. " DMAE ,DMA error" "No error,Error"
|
|
eventfld.long 0x00 26. " TNE ,Tuning error" "No error,Error"
|
|
eventfld.long 0x00 24. " AC12E ,Auto CMD12 error" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 22. " DEBE ,Data end bit error" "No error,Error"
|
|
eventfld.long 0x00 21. " DCE ,Data CRC error" "No error,Error"
|
|
eventfld.long 0x00 20. " DTOE ,Data timeout error" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 19. " CIE ,Command index error" "No error,Error"
|
|
eventfld.long 0x00 18. " CEBE ,Command end bit error" "No error,Error"
|
|
eventfld.long 0x00 17. " CCE ,Command CRC error" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 16. " CTOE ,Command timeout error" "No error,Error"
|
|
eventfld.long 0x00 14. " TP ,Tuning pass" "Not transferred,Transferred"
|
|
eventfld.long 0x00 12. " RTE ,Re-tuning event" "Not requested,Requested"
|
|
newline
|
|
eventfld.long 0x00 8. " CINT ,Card interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " CRM ,Card removal" "Not removed,Removed"
|
|
eventfld.long 0x00 6. " CINS ,Card insertion" "Not inserted,Inserted"
|
|
newline
|
|
eventfld.long 0x00 5. " BRR ,Buffer read ready" "Not ready,Ready"
|
|
eventfld.long 0x00 4. " BWR ,Buffer write ready" "Not ready,Ready"
|
|
eventfld.long 0x00 3. " DINT ,DMA interrupt" "No interrupt,Interrupt"
|
|
newline
|
|
eventfld.long 0x00 2. " BGE ,Block gap event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 1. " TC ,Transfer complete" "Not completed,Completed"
|
|
eventfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed"
|
|
line.long 0x04 "INT_STATUS_EN,Interrupt Status Enable Register"
|
|
bitfld.long 0x04 28. " DMAESEN ,DMA error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " TNESEN ,Tuning error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " AC12ESEN ,Auto CMD12 error status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 22. " DEBESEN ,Data end bit error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " DCESEN ,Data CRC error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " DTOESEN ,Data timeout error status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 19. " CIESEN ,Command index error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " CEBESEN ,Command end bit error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " CCESEN ,Command CRC error status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 16. " CTOESEN ,Command timeout error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " TPSEN ,Tuning pass status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " RTESEN ,Re-tuning event status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " CINTSEN ,Card interrupt status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " CRMSEN ,Card removal status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " CINSSEN ,Card insertion status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 5. " BRRSEN ,Buffer read ready status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BWRSEN ,Buffer write ready status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " DINTSEN ,DMA interrupt status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 2. " BGESEN ,Block gap event status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TCSEN ,Transfer complete status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CCSEN ,Command complete status enable" "Disabled,Enabled"
|
|
line.long 0x08 "INT_SIGNAL_EN,Interrupt Signal Enable Register"
|
|
bitfld.long 0x08 28. " DMAEIEN ,DMA error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " TNEIEN ,Tuning error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " AC12EIEN ,Auto CMD12 error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 22. " DEBEIEN ,Data end bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " DCEIEN ,Data CRC error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " DTOEIEN ,Data timeout error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 19. " CIEIEN ,Command index error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " CEBEIEN ,Command end bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " CCEIEN ,Command CRC error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 16. " CTOEIEN ,Command timeout error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " TPIEN ,Tuning pass interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " RTEIEN ,Re-Tuning event interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 8. " CINTIEN ,Card interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " CRMIEN ,Card removal interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " CINSIEN ,Card insertion interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 5. " BRRIEN ,Buffer read ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " BWRIEN ,Buffer write ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " DINTIEN ,DMA interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 2. " BGEIEN ,Block gap event interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " TCIEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " CCIEN ,Command complete interrupt enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x402C0000+0x30))&0x1000000)==0x00)
|
|
hgroup.long 0x3C++0x03
|
|
hide.long 0x00 "AUTOCMD12_ERR_STATUS,Auto CMD12 Error Status Register"
|
|
else
|
|
if (((per.l(ad:0x402C0000+0xCC))&0x1000000)==0x00)
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "AUTOCMD12_ERR_STATUS,Auto CMD12 Error Status Register"
|
|
textfld " "
|
|
textfld " "
|
|
rbitfld.long 0x00 7. " CNIBAC12E ,Command not issued by Auto CMD12 error" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 4. " AC12IE ,Auto CMD12 / 23 index error" "No error,Error"
|
|
rbitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC error" "No error,Error"
|
|
rbitfld.long 0x00 2. " AC12EBE ,Auto CMD12 end bit error" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 1. " AC12TOE ,Auto CMD12 timeout error" "No error,Error"
|
|
rbitfld.long 0x00 0. " AC12NE ,Auto CMD12 not executed" "Executed,Not executed"
|
|
else
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "AUTOCMD12_ERR_STATUS,Auto CMD12 Error Status Register"
|
|
bitfld.long 0x00 23. " SMP_CLK_SEL ,Sample clock select" "Fixed clock,Tuned clock"
|
|
bitfld.long 0x00 22. " EXECUTE_TUNING ,Execute tuning" "Not started,Started"
|
|
rbitfld.long 0x00 7. " CNIBAC12E ,Command not issued by Auto CMD12 error" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 4. " AC12IE ,Auto CMD12 / 23 index error" "No error,Error"
|
|
rbitfld.long 0x00 3. " AC12CE ,Auto CMD12 / 23 CRC error" "No error,Error"
|
|
rbitfld.long 0x00 2. " AC12EBE ,Auto CMD12 /23 end bit error" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 1. " AC12TOE ,Auto CMD12 / 23 timeout error" "No error,Error"
|
|
rbitfld.long 0x00 0. " AC12NE ,Auto CMD12 not executed" "Executed,Not executed"
|
|
endif
|
|
endif
|
|
group.long 0x40++0x0B
|
|
line.long 0x00 "HOST_CTRL_CAP,Host Controller Capabilities Register"
|
|
rbitfld.long 0x00 26. " VS18 ,Voltage support 1.8V" "Not supported,Supported"
|
|
rbitfld.long 0x00 25. " VS30 ,Voltage support 3.0V" "Not supported,Supported"
|
|
rbitfld.long 0x00 24. " VS33 ,Voltage support 3.3V" "Not supported,Supported"
|
|
newline
|
|
rbitfld.long 0x00 23. " SRS ,Suspend / Resume support" "Not supported,Supported"
|
|
rbitfld.long 0x00 22. " DMAS ,DMA support" "Not supported,Supported"
|
|
rbitfld.long 0x00 21. " HSS ,High speed support" "Not supported,Supported"
|
|
newline
|
|
rbitfld.long 0x00 20. " ADMAS ,ADMA support" "Not supported,Supported"
|
|
rbitfld.long 0x00 16.--18. " MBL ,Max block length" "512 bytes,1024 bytes,2048 bytes,4096 bytes,?..."
|
|
rbitfld.long 0x00 14.--15. " RETUNING_MODE ,Retuning mode" "Mode 1,Mode 2,Mode 3,?..."
|
|
newline
|
|
bitfld.long 0x00 13. " USE_TUNING_SDR50 ,Use tuning for SDR50" "Not required,Required"
|
|
bitfld.long 0x00 8.--11. " TIME_COUNT_RETUNING ,Time counter for retuning" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 2. " DDR50_SUPPORT ,DDR50 support" "Not supported,Supported"
|
|
newline
|
|
rbitfld.long 0x00 1. " SDR104_SUPPORT ,SDR104 support" "Not supported,Supported"
|
|
rbitfld.long 0x00 0. " SDR50_SUPPORT ,SDR50 support" "Not supported,Supported"
|
|
line.long 0x04 "WTMK_LVL,Watermark Level Register"
|
|
bitfld.long 0x04 24.--28. " WR_BRST_LEN ,Write burst length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
hexmask.long.byte 0x04 16.--23. 1. " WR_WML ,Write watermark level"
|
|
bitfld.long 0x04 8.--12. " RD_BRST_LEN ,Read burst length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RD_WML ,Read watermark level"
|
|
line.long 0x08 "MIX_CTRL,Mixer Control Register"
|
|
bitfld.long 0x08 25. " FBCLK_SEL ,Feedback clock source selection" "Loopback CLK,ipp_card_clk_out"
|
|
bitfld.long 0x08 24. " AUTO_TUNE_EN ,Auto tuning enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " SMP_CLK_SEL ,Sample clock selection" "Fixed clock,Tuned clock"
|
|
newline
|
|
bitfld.long 0x08 22. " EXE_TUNE ,Execute tuning" "Not executed,Executed"
|
|
bitfld.long 0x08 7. " AC23EN ,Auto CMD23 enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " NIBBLE_POS ,Nibble position indication in DDR 4-bit mode" "Odd/even H - Odd/even L,Odd H/L - Even H/L"
|
|
newline
|
|
bitfld.long 0x08 5. " MSBSEL ,Multi/single block select" "Single,Multiple"
|
|
bitfld.long 0x08 4. " DTDSEL ,Data transfer direction select" "Write,Read"
|
|
bitfld.long 0x08 3. " DDR_EN ,Dual Data Rate mode selection" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 2. " AC12EN ,Auto CMD12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " BCEN ,Block count enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " DMAEN ,DMA enable" "Disabled,Enabled"
|
|
wgroup.long 0x50++0x03
|
|
line.long 0x00 "FORCE_EVENT,Force Event Register"
|
|
bitfld.long 0x00 31. " FEVTCINT ,Force event card interrupt" "No effect,Force"
|
|
bitfld.long 0x00 28. " FEVTDMAE ,Force event DMA error" "No effect,Force"
|
|
bitfld.long 0x00 26. " FEVTTNE ,Force tuning error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 24. " FEVTAC12E ,Force event auto command 12 error" "No effect,Force"
|
|
bitfld.long 0x00 22. " FEVTDEBE ,Force event data end bit error" "No effect,Force"
|
|
bitfld.long 0x00 21. " FEVTDCE ,Force event data CRC error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 20. " FEVTDTOE ,Force event data time out error" "No effect,Force"
|
|
bitfld.long 0x00 19. " FEVTCIE ,Force event command index error" "No effect,Force"
|
|
bitfld.long 0x00 18. " FEVTCEBE ,Force event command end bit error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 17. " FEVTCCE ,Force event command CRC error" "No effect,Force"
|
|
bitfld.long 0x00 16. " FEVTCTOE ,Force event command time out error" "No effect,Force"
|
|
bitfld.long 0x00 7. " FEVTCNIBAC12E ,Force event command not executed by auto command 12 error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 4. " FEVTAC12IE ,Force event auto command 12 index error" "No effect,Force"
|
|
bitfld.long 0x00 3. " FEVTAC12EBE ,Force event auto command 12 end bit error" "No effect,Force"
|
|
bitfld.long 0x00 2. " FEVTAC12CE ,Force event auto command 12 CRC error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 1. " FEVTAC12TOE ,Force event auto command 12 time out error" "No effect,Force"
|
|
bitfld.long 0x00 0. " FEVTAC12NE ,Force event auto command 12 not executed" "No effect,Force"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "ADMA_ERR_STATUS,ADMA Error Status Register"
|
|
bitfld.long 0x00 3. " ADMADCE ,ADMA descriptor error" "No error,Error"
|
|
bitfld.long 0x00 2. " ADMALME ,ADMA length mismatch error" "No error,Error"
|
|
bitfld.long 0x00 0.--1. " ADMAES ,ADMA error state" "ST_STOP,ST_FDS,ST_CADR,ST_TFR"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ADMA_SYS_ADDR,ADMA System Address Register"
|
|
hexmask.long 0x00 2.--31. 0x04 " ADS_ADDR ,ADMA system address"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DLL_CTRL,DLL (Delay Line) Control Register"
|
|
bitfld.long 0x00 28.--31. " REF_UPDATE_INT ,DLL control loop update interval" "2*REF_CLOCK,3*REF_CLOCK,4*REF_CLOCK,5*REF_CLOCK,6*REF_CLOCK,7*REF_CLOCK,8*REF_CLOCK,9*REF_CLOCK,10*REF_CLOCK,11*REF_CLOCK,12*REF_CLOCK,13*REF_CLOCK,14*REF_CLOCK,15*REF_CLOCK,16*REF_CLOCK,17*REF_CLOCK"
|
|
hexmask.long.byte 0x00 20.--27. 1. " SLV_UPDATE_INT ,Slave delay line update interval"
|
|
bitfld.long 0x00 16.--18. " SLV_DLY_TARGET1 ,Delay target for the USDHC loopback read clock (high-order bits)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 9.--15. 1. " SLV_OVERRIDE_VAL ,Slave override value"
|
|
bitfld.long 0x00 8. " SLV_OVERRIDE ,Enable manual override for slave delay chain" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " GATE_UPDATE ,DLL update" "Automatic,No update"
|
|
newline
|
|
bitfld.long 0x00 3.--6. " SLV_DLY_TARGET0 ,Delay target for the USDHC loopback read clock (low-order bits)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2. " SLV_FORCE_UPD ,DLL slave update" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " RESET ,DLL reset" "No reset,Reset"
|
|
newline
|
|
bitfld.long 0x00 0. " ENABLE ,DLL and delay chain enable" "Disabled,Enabled"
|
|
rgroup.long 0x64++0x03
|
|
line.long 0x00 "DLL_STATUS,DLL Status Register"
|
|
hexmask.long.byte 0x00 9.--15. 1. " DLL_STS_REF_SEL ,Reference delay line select taps"
|
|
hexmask.long.byte 0x00 2.--8. 1. " DLL_STS_SLV_SEL ,Slave delay line select status"
|
|
newline
|
|
bitfld.long 0x00 1. " DLL_STS_REF_LOCK ,Reference DLL lock status" "Unlocked,Locked"
|
|
bitfld.long 0x00 0. " DLL_STS_SLV_LOCK ,Slave delay-line lock status" "Not valid,Valid"
|
|
if ((per.l(ad:0x402C0000+0x48)&0x800000)==0x800000)
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CLK_TUNE_CTRL_STATUS,Clock Tuning Control and Status Register"
|
|
rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error"
|
|
hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE"
|
|
rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error"
|
|
hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CLK_TUNE_CTRL_STATUS,Clock Tuning Control and Status Register"
|
|
textfld " "
|
|
hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE"
|
|
rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textfld " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0xC0++0x0F
|
|
line.long 0x00 "VEND_SPEC,Vendor Specific Register"
|
|
bitfld.long 0x00 31. " CMD_BYTE_EN ,Byte access" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CRC_CHK_DIS ,CRC check disable" "No,Yes"
|
|
bitfld.long 0x00 8. " FRC_SDCLK_ON ,Force CLK output active" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x00 3. " AC12_WR_CHKBUSY_EN ,Check busy enable after auto CMD12 for write data packet" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CONFLICT_CHK_EN ,Conflict check enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " VSELECT ,Voltage selection (around: 3.0V/1.8V)" "High,Low"
|
|
line.long 0x04 "MMC_BOOT,MMC Boot Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " BOOT_BLK_CNT ,Stop At Block Gap value of automatic mode"
|
|
bitfld.long 0x04 8. " DISABLE_TIME_OUT ,Disable time out" "No,Yes"
|
|
bitfld.long 0x04 7. " AUTO_SABG_EN ,Auto stop at block gap enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 6. " BOOT_EN ,Boot mode enable" "Disable,Enabled"
|
|
bitfld.long 0x04 5. " BOOT_MODE ,Boot mode select" "Normal,Alternative"
|
|
bitfld.long 0x04 4. " BOOT_ACK ,Boot ACK mode select" "No ACK,ACK"
|
|
newline
|
|
bitfld.long 0x04 0.--3. " DTOCV_ACK ,Boot ACK timeout counter value" "SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,,,,,,,SDCLK x 2^28,SDCLK x 2^29"
|
|
line.long 0x08 "VEND_SPEC2,Vendor Specific 2 Register"
|
|
bitfld.long 0x08 14. " BUS_RST ,BUS reset" "No reset,Reset"
|
|
bitfld.long 0x08 13. " PART_DLL_DEBUG ,Debug for part DLL" "Low,High"
|
|
bitfld.long 0x08 12. " ACMD23_ARGU2_EN ,Argument2 register enable for ACMD23" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 6. " TUNING_CMD_EN ,Auto tuning circuit CMD line check enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4.--5. " TUNING_EN ,Auto tuning circuit DAT[7:0] check enable" "DATA[3:0],DATA[0],DATA[7:0],?..."
|
|
bitfld.long 0x08 3. " CARD_INT_D3_TEST ,Card interrupt detection test condition" "DATA[3] high,DATA[3] ignored"
|
|
line.long 0x0C "TUNING_CTRL,Tuning Control Register"
|
|
bitfld.long 0x0C 24. " STD_TUNING_EN ,Standard tuning circuit and procedure enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20.--22. " TUNING_WINDOW ,Data window value for auto tuning selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 16.--18. " TUNING_STEP ,The increasing delay cell steps in tuning procedure" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0C 8.--15. 1. " TUNING_COUNTER ,The MAX repeat CMD19 times in tuning procedure"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " TUNING_START_TAP ,The start delay cell point when send first CMD19 in tuning procedure"
|
|
width 0x0B
|
|
tree.end
|
|
tree "uSDHC 2"
|
|
base ad:0x402C4000
|
|
width 22.
|
|
if ((((per.l(ad:0x402C4000+0xC8))&0x1000)==0x00)&&((((per.l(ad:0x402C4000+0x24))&0x04)==0x00)))
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DS_ADDR,DMA System Address Register"
|
|
hexmask.long 0x00 2.--31. 0x04 " DS_ADDR ,SDMA System Address"
|
|
elif ((((per.l(ad:0x402C4000+0xC8))&0x1000)==0x00)&&((((per.l(ad:0x402C4000+0x24))&0x04)==0x04)))
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "DS_ADDR,DMA System Address Register"
|
|
in
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "DS_ADDR,DMA System Address Register (Argument 2)"
|
|
endif
|
|
if ((((per.l(ad:0x402C4000+0x24))&0x04)==0x00)&&(((per.l(ad:0x402C4000+0x48))&0x02)==0x02))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BLK_ATT,Block Attributes Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " BLKCNT ,Blocks count for current transfer"
|
|
hexmask.long.word 0x00 0.--12. 1. " BLKSIZE ,Transfer block size"
|
|
elif ((((per.l(ad:0x402C4000+0x24))&0x04)==0x00)&&(((per.l(ad:0x402C4000+0x48))&0x02)==0x00))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "BLK_ATT,Block Attributes Register"
|
|
textfld " "
|
|
hexmask.long.word 0x00 0.--12. 1. " BLKSIZE ,Transfer block size"
|
|
else
|
|
hgroup.long 0x04++0x03
|
|
hide.long 0x00 "BLK_ATT,Block Attributes Register"
|
|
in
|
|
endif
|
|
if (((per.l(ad:0x402C4000+0x24))&0x01)==0x00)
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "CMD_ARG,Command Argument Register"
|
|
line.long 0x04 "CMD_XFR_TYP,Command Transfer Type Register"
|
|
bitfld.long 0x04 24.--29. " CMDINX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 22.--23. " CMDTYP ,Command type" "Normal,Suspend,Resume,Abort"
|
|
bitfld.long 0x04 21. " DPSEL ,Data present select" "No data,Data present"
|
|
newline
|
|
bitfld.long 0x04 20. " CICEN ,Command index check enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " CCCEN ,Command CRC check enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--17. " RSPTYP ,Response type select" "No response,Length 136,Length 48,Length 48/busy check"
|
|
else
|
|
rgroup.long 0x08++0x07
|
|
line.long 0x00 "CMD_ARG,Command Argument Register"
|
|
line.long 0x04 "CMD_XFR_TYP,Command Transfer Type Register"
|
|
bitfld.long 0x04 24.--29. " CMDINX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x04 22.--23. " CMDTYP ,Command type" "Normal,Suspend,Resume,Abort"
|
|
bitfld.long 0x04 21. " DPSEL ,Data present select" "No data,Data present"
|
|
newline
|
|
bitfld.long 0x04 20. " CICEN ,Command index check enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " CCCEN ,Command CRC check enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--17. " RSPTYP ,Response type select" "No response,Length 136,Length 48,Length 48/busy check"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "CMD_RSP0,Command Response Register 0"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "CMD_RSP1,Command Response Register 1"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "CMD_RSP2,Command Response Register 2"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "CMD_RSP3,Command Response Register 3"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DATA_BUFF_ACC_PORT,Data Buffer Access Port Register"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "PRES_STATE,Present State Register"
|
|
bitfld.long 0x00 31. " DLSL[7] ,DAT line 7 signal level" "Low,High"
|
|
bitfld.long 0x00 30. " [6] ,DAT line 6 signal level" "Low,High"
|
|
bitfld.long 0x00 29. " [5] ,DAT line 5 signal level" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 28. " [4] ,DAT line 4 signal level" "Low,High"
|
|
bitfld.long 0x00 27. " [3] ,DAT line 3 signal level" "Low,High"
|
|
bitfld.long 0x00 26. " [2] ,DAT line 2 signal level" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 25. " [1] ,DAT line 1 signal level" "Low,High"
|
|
bitfld.long 0x00 24. " [0] ,DAT line 0 signal level" "Low,High"
|
|
bitfld.long 0x00 23. " CLSL ,CMD line signal level" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 19. " WPSPL ,Write protect switch pin level" "Protected,Not protected"
|
|
bitfld.long 0x00 18. " CDPL ,Card detect pin level" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " CINST ,Card inserted" "Reset/not inserted,Inserted"
|
|
newline
|
|
bitfld.long 0x00 15. " TSCD ,Tape select change done" "Not finished,Finished"
|
|
bitfld.long 0x00 12. " RTR ,Re-Tuning request" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " BREN ,Buffer read enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. " BWEN ,Buffer write enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RTA ,Read transfer active" "Inactive,Active"
|
|
bitfld.long 0x00 8. " WTA ,Write transfer active" "Inactive,Active"
|
|
newline
|
|
bitfld.long 0x00 7. " SDOFF ,SD clock gated off internally" "No,Yes"
|
|
bitfld.long 0x00 6. " PEROFF ,IPG_PERCLK gated off internally" "No,Yes"
|
|
bitfld.long 0x00 5. " HCKOFF ,HCLK gated off internally" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 4. " IPGOFF ,IPG_CLK gated off internally" "No,Yes"
|
|
bitfld.long 0x00 3. " SDSTB ,SD clock stable" "Unstable,Stable"
|
|
bitfld.long 0x00 2. " DLA ,Data line active" "Inactive,Active"
|
|
newline
|
|
bitfld.long 0x00 1. " CDIHB ,Command inhibit (DATA)" "Not inhibited,Inhibited"
|
|
bitfld.long 0x00 0. " CIHB ,Command inhibit (CMD)" "Not inhibited,Inhibited"
|
|
if ((((per.l(ad:0x402C4000+0x28))&0x06)==0x02)&&(((per.l(ad:0x402C4000+0x48))&0x01)==0x01))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control Register"
|
|
bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact"
|
|
bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WECRM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WECINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. " WECINT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High"
|
|
bitfld.long 0x00 19. " IABG ,Interrupt at block gap" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart"
|
|
bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Transferred,Stopped"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " DMASEL ,DMA select" "No DMA/Simple DMA,ADMA1,ADMA2,?..."
|
|
bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Normal level,Test level"
|
|
bitfld.long 0x00 6. " CDTL ,Card detect test level (valid while CDSS = 1)" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " EMODE ,Endian mode" "Big endian,Half word big endian,Little endian,?..."
|
|
bitfld.long 0x00 3. " D3CD ,DATA3 as card detection pin" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,8-bit,?..."
|
|
newline
|
|
bitfld.long 0x00 0. " LCTL ,LED control" "Off,On"
|
|
elif ((((per.l(ad:0x402C4000+0x28))&0x06)!=0x02)&&(((per.l(ad:0x402C4000+0x48))&0x01)==0x01))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control Register"
|
|
bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact"
|
|
bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WECRM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WECINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. " WECINT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart"
|
|
bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Transferred,Stopped"
|
|
newline
|
|
bitfld.long 0x00 8.--9. " DMASEL ,DMA select" "No DMA/Simple DMA,ADMA1,ADMA2,?..."
|
|
bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Card Detection Level,Card Detection Test Level"
|
|
bitfld.long 0x00 6. " CDTL ,Card detect test level (valid while CDSS = 1)" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " EMODE ,Endian mode" "Big endian,Half word big endian,Little endian,?..."
|
|
bitfld.long 0x00 3. " D3CD ,DATA3 as card detection pin" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,8-bit,?..."
|
|
newline
|
|
bitfld.long 0x00 0. " LCTL ,LED control" "Off,On"
|
|
elif ((((per.l(ad:0x402C4000+0x28))&0x06)==0x02)&&(((per.l(ad:0x402C4000+0x48))&0x01)==0x00))
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control Register"
|
|
bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact"
|
|
bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WECRM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WECINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. " WECINT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High"
|
|
bitfld.long 0x00 19. " IABG ,Interrupt at block gap" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart"
|
|
bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Transferred,Stopped"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Card Detection Level,Card Detection Test Level"
|
|
bitfld.long 0x00 6. " CDTL ,Card detect test level (valid while CDSS = 1)" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " EMODE ,Endian mode" "Big endian,Half word big endian,Little endian,?..."
|
|
bitfld.long 0x00 3. " D3CD ,DATA3 as card detection pin" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,8-bit,?..."
|
|
newline
|
|
bitfld.long 0x00 0. " LCTL ,LED control" "Off,On"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "PROT_CTRL,Protocol Control Register"
|
|
bitfld.long 0x00 30. " NON_EXACT_BLK_RD ,Non-exact block read" "Exact,Non-exact"
|
|
bitfld.long 0x00 29. " BURST_LEN_EN[2] ,BURST length enable for INCR4-WRAP/INCR8-WRAP/INCR16-WRAP" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " BURST_LEN_EN[1] ,BURST length enable for INCR4/INCR8/INCR16" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " BURST_LEN_EN[0] ,BURST length enable for INCR" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WECRM ,Wakeup event enable on SD card removal" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WECINS ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. " WECINT ,Wakeup event enable on card interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RD_DONE_NO_8_CLK ,Read done no 8 clock" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart"
|
|
bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Transferred,Stopped"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Card Detection Level,Card Detection Test Level"
|
|
bitfld.long 0x00 6. " CDTL ,Card detect test level (valid while CDSS = 1)" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 4.--5. " EMODE ,Endian mode" "Big endian,Half word big endian,Little endian,?..."
|
|
bitfld.long 0x00 3. " D3CD ,DATA3 as card detection pin" "No,Yes"
|
|
bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,8-bit,?..."
|
|
newline
|
|
bitfld.long 0x00 0. " LCTL ,LED control" "Off,On"
|
|
endif
|
|
if (((per.l(ad:0x402C4000+0x24))&0x03)==0x00)
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SYS_CTRL,System Control Register"
|
|
bitfld.long 0x00 28. " RSTT ,Reset tuning" "Not reset,Reset"
|
|
bitfld.long 0x00 27. " INITA ,Initialization active" "Not active,Active"
|
|
bitfld.long 0x00 26. " RSTD ,Software reset for DATA line" "No reset,Reset"
|
|
newline
|
|
bitfld.long 0x00 25. " RSTC ,Software reset for CMD line" "No reset,Reset"
|
|
bitfld.long 0x00 24. " RSTA ,Software reset for all" "No reset,Reset"
|
|
bitfld.long 0x00 23. " IPP_RST_N ,Value output to CARD for hardware reset" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 16.--19. " DTOCV ,Data timeout counter value" "SDCLK x 2^14,SDCLK x 2^15,,,,,,,,,,,,SDCLK x 2^27,SDCLK x 2^28,SDCLK x 2^29"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDCLKFS ,SDCLK frequency select"
|
|
bitfld.long 0x00 4.--7. " DVS ,Divisor" "/1,/2,,,,,,,,,,,,,/15,/16"
|
|
else
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "SYS_CTRL,System Control Register"
|
|
bitfld.long 0x00 28. " RSTT ,Reset tuning" "Not reset,Reset"
|
|
rbitfld.long 0x00 27. " INITA ,Initialization active" "Not active,Active"
|
|
bitfld.long 0x00 26. " RSTD ,Software reset for DATA line" "No reset,Reset"
|
|
newline
|
|
bitfld.long 0x00 25. " RSTC ,Software reset for CMD line" "No reset,Reset"
|
|
bitfld.long 0x00 24. " RSTA ,Software reset for all" "No reset,Reset"
|
|
bitfld.long 0x00 23. " IPP_RST_N ,Value output to CARD for hardware reset" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 16.--19. " DTOCV ,Data timeout counter value" "SDCLK x 2^14,SDCLK x 2^15,,,,,,,,,,,,SDCLK x 2^27,SDCLK x 2^28,SDCLK x 2^29"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDCLKFS ,SDCLK frequency select"
|
|
bitfld.long 0x00 4.--7. " DVS ,Divisor" "/1,/2,,,,,,,,,,,,,/15,/16"
|
|
endif
|
|
group.long 0x30++0x0B
|
|
line.long 0x00 "INT_STATUS,Interrupt Status Register"
|
|
eventfld.long 0x00 28. " DMAE ,DMA error" "No error,Error"
|
|
eventfld.long 0x00 26. " TNE ,Tuning error" "No error,Error"
|
|
eventfld.long 0x00 24. " AC12E ,Auto CMD12 error" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 22. " DEBE ,Data end bit error" "No error,Error"
|
|
eventfld.long 0x00 21. " DCE ,Data CRC error" "No error,Error"
|
|
eventfld.long 0x00 20. " DTOE ,Data timeout error" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 19. " CIE ,Command index error" "No error,Error"
|
|
eventfld.long 0x00 18. " CEBE ,Command end bit error" "No error,Error"
|
|
eventfld.long 0x00 17. " CCE ,Command CRC error" "No error,Error"
|
|
newline
|
|
eventfld.long 0x00 16. " CTOE ,Command timeout error" "No error,Error"
|
|
eventfld.long 0x00 14. " TP ,Tuning pass" "Not transferred,Transferred"
|
|
eventfld.long 0x00 12. " RTE ,Re-tuning event" "Not requested,Requested"
|
|
newline
|
|
eventfld.long 0x00 8. " CINT ,Card interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " CRM ,Card removal" "Not removed,Removed"
|
|
eventfld.long 0x00 6. " CINS ,Card insertion" "Not inserted,Inserted"
|
|
newline
|
|
eventfld.long 0x00 5. " BRR ,Buffer read ready" "Not ready,Ready"
|
|
eventfld.long 0x00 4. " BWR ,Buffer write ready" "Not ready,Ready"
|
|
eventfld.long 0x00 3. " DINT ,DMA interrupt" "No interrupt,Interrupt"
|
|
newline
|
|
eventfld.long 0x00 2. " BGE ,Block gap event" "Not occurred,Occurred"
|
|
eventfld.long 0x00 1. " TC ,Transfer complete" "Not completed,Completed"
|
|
eventfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed"
|
|
line.long 0x04 "INT_STATUS_EN,Interrupt Status Enable Register"
|
|
bitfld.long 0x04 28. " DMAESEN ,DMA error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " TNESEN ,Tuning error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " AC12ESEN ,Auto CMD12 error status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 22. " DEBESEN ,Data end bit error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " DCESEN ,Data CRC error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " DTOESEN ,Data timeout error status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 19. " CIESEN ,Command index error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " CEBESEN ,Command end bit error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " CCESEN ,Command CRC error status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 16. " CTOESEN ,Command timeout error status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " TPSEN ,Tuning pass status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " RTESEN ,Re-tuning event status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " CINTSEN ,Card interrupt status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " CRMSEN ,Card removal status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " CINSSEN ,Card insertion status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 5. " BRRSEN ,Buffer read ready status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BWRSEN ,Buffer write ready status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " DINTSEN ,DMA interrupt status enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 2. " BGESEN ,Block gap event status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TCSEN ,Transfer complete status enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CCSEN ,Command complete status enable" "Disabled,Enabled"
|
|
line.long 0x08 "INT_SIGNAL_EN,Interrupt Signal Enable Register"
|
|
bitfld.long 0x08 28. " DMAEIEN ,DMA error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " TNEIEN ,Tuning error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " AC12EIEN ,Auto CMD12 error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 22. " DEBEIEN ,Data end bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " DCEIEN ,Data CRC error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " DTOEIEN ,Data timeout error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 19. " CIEIEN ,Command index error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " CEBEIEN ,Command end bit error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " CCEIEN ,Command CRC error interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 16. " CTOEIEN ,Command timeout error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " TPIEN ,Tuning pass interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " RTEIEN ,Re-Tuning event interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 8. " CINTIEN ,Card interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " CRMIEN ,Card removal interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " CINSIEN ,Card insertion interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 5. " BRRIEN ,Buffer read ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " BWRIEN ,Buffer write ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " DINTIEN ,DMA interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 2. " BGEIEN ,Block gap event interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " TCIEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " CCIEN ,Command complete interrupt enable" "Disabled,Enabled"
|
|
if (((per.l(ad:0x402C4000+0x30))&0x1000000)==0x00)
|
|
hgroup.long 0x3C++0x03
|
|
hide.long 0x00 "AUTOCMD12_ERR_STATUS,Auto CMD12 Error Status Register"
|
|
else
|
|
if (((per.l(ad:0x402C4000+0xCC))&0x1000000)==0x00)
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "AUTOCMD12_ERR_STATUS,Auto CMD12 Error Status Register"
|
|
textfld " "
|
|
textfld " "
|
|
rbitfld.long 0x00 7. " CNIBAC12E ,Command not issued by Auto CMD12 error" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 4. " AC12IE ,Auto CMD12 / 23 index error" "No error,Error"
|
|
rbitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC error" "No error,Error"
|
|
rbitfld.long 0x00 2. " AC12EBE ,Auto CMD12 end bit error" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 1. " AC12TOE ,Auto CMD12 timeout error" "No error,Error"
|
|
rbitfld.long 0x00 0. " AC12NE ,Auto CMD12 not executed" "Executed,Not executed"
|
|
else
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "AUTOCMD12_ERR_STATUS,Auto CMD12 Error Status Register"
|
|
bitfld.long 0x00 23. " SMP_CLK_SEL ,Sample clock select" "Fixed clock,Tuned clock"
|
|
bitfld.long 0x00 22. " EXECUTE_TUNING ,Execute tuning" "Not started,Started"
|
|
rbitfld.long 0x00 7. " CNIBAC12E ,Command not issued by Auto CMD12 error" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 4. " AC12IE ,Auto CMD12 / 23 index error" "No error,Error"
|
|
rbitfld.long 0x00 3. " AC12CE ,Auto CMD12 / 23 CRC error" "No error,Error"
|
|
rbitfld.long 0x00 2. " AC12EBE ,Auto CMD12 /23 end bit error" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 1. " AC12TOE ,Auto CMD12 / 23 timeout error" "No error,Error"
|
|
rbitfld.long 0x00 0. " AC12NE ,Auto CMD12 not executed" "Executed,Not executed"
|
|
endif
|
|
endif
|
|
group.long 0x40++0x0B
|
|
line.long 0x00 "HOST_CTRL_CAP,Host Controller Capabilities Register"
|
|
rbitfld.long 0x00 26. " VS18 ,Voltage support 1.8V" "Not supported,Supported"
|
|
rbitfld.long 0x00 25. " VS30 ,Voltage support 3.0V" "Not supported,Supported"
|
|
rbitfld.long 0x00 24. " VS33 ,Voltage support 3.3V" "Not supported,Supported"
|
|
newline
|
|
rbitfld.long 0x00 23. " SRS ,Suspend / Resume support" "Not supported,Supported"
|
|
rbitfld.long 0x00 22. " DMAS ,DMA support" "Not supported,Supported"
|
|
rbitfld.long 0x00 21. " HSS ,High speed support" "Not supported,Supported"
|
|
newline
|
|
rbitfld.long 0x00 20. " ADMAS ,ADMA support" "Not supported,Supported"
|
|
rbitfld.long 0x00 16.--18. " MBL ,Max block length" "512 bytes,1024 bytes,2048 bytes,4096 bytes,?..."
|
|
rbitfld.long 0x00 14.--15. " RETUNING_MODE ,Retuning mode" "Mode 1,Mode 2,Mode 3,?..."
|
|
newline
|
|
bitfld.long 0x00 13. " USE_TUNING_SDR50 ,Use tuning for SDR50" "Not required,Required"
|
|
bitfld.long 0x00 8.--11. " TIME_COUNT_RETUNING ,Time counter for retuning" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 2. " DDR50_SUPPORT ,DDR50 support" "Not supported,Supported"
|
|
newline
|
|
rbitfld.long 0x00 1. " SDR104_SUPPORT ,SDR104 support" "Not supported,Supported"
|
|
rbitfld.long 0x00 0. " SDR50_SUPPORT ,SDR50 support" "Not supported,Supported"
|
|
line.long 0x04 "WTMK_LVL,Watermark Level Register"
|
|
bitfld.long 0x04 24.--28. " WR_BRST_LEN ,Write burst length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
hexmask.long.byte 0x04 16.--23. 1. " WR_WML ,Write watermark level"
|
|
bitfld.long 0x04 8.--12. " RD_BRST_LEN ,Read burst length" "8,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
newline
|
|
hexmask.long.byte 0x04 0.--7. 1. " RD_WML ,Read watermark level"
|
|
line.long 0x08 "MIX_CTRL,Mixer Control Register"
|
|
bitfld.long 0x08 25. " FBCLK_SEL ,Feedback clock source selection" "Loopback CLK,ipp_card_clk_out"
|
|
bitfld.long 0x08 24. " AUTO_TUNE_EN ,Auto tuning enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " SMP_CLK_SEL ,Sample clock selection" "Fixed clock,Tuned clock"
|
|
newline
|
|
bitfld.long 0x08 22. " EXE_TUNE ,Execute tuning" "Not executed,Executed"
|
|
bitfld.long 0x08 7. " AC23EN ,Auto CMD23 enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " NIBBLE_POS ,Nibble position indication in DDR 4-bit mode" "Odd/even H - Odd/even L,Odd H/L - Even H/L"
|
|
newline
|
|
bitfld.long 0x08 5. " MSBSEL ,Multi/single block select" "Single,Multiple"
|
|
bitfld.long 0x08 4. " DTDSEL ,Data transfer direction select" "Write,Read"
|
|
bitfld.long 0x08 3. " DDR_EN ,Dual Data Rate mode selection" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 2. " AC12EN ,Auto CMD12 enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " BCEN ,Block count enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " DMAEN ,DMA enable" "Disabled,Enabled"
|
|
wgroup.long 0x50++0x03
|
|
line.long 0x00 "FORCE_EVENT,Force Event Register"
|
|
bitfld.long 0x00 31. " FEVTCINT ,Force event card interrupt" "No effect,Force"
|
|
bitfld.long 0x00 28. " FEVTDMAE ,Force event DMA error" "No effect,Force"
|
|
bitfld.long 0x00 26. " FEVTTNE ,Force tuning error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 24. " FEVTAC12E ,Force event auto command 12 error" "No effect,Force"
|
|
bitfld.long 0x00 22. " FEVTDEBE ,Force event data end bit error" "No effect,Force"
|
|
bitfld.long 0x00 21. " FEVTDCE ,Force event data CRC error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 20. " FEVTDTOE ,Force event data time out error" "No effect,Force"
|
|
bitfld.long 0x00 19. " FEVTCIE ,Force event command index error" "No effect,Force"
|
|
bitfld.long 0x00 18. " FEVTCEBE ,Force event command end bit error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 17. " FEVTCCE ,Force event command CRC error" "No effect,Force"
|
|
bitfld.long 0x00 16. " FEVTCTOE ,Force event command time out error" "No effect,Force"
|
|
bitfld.long 0x00 7. " FEVTCNIBAC12E ,Force event command not executed by auto command 12 error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 4. " FEVTAC12IE ,Force event auto command 12 index error" "No effect,Force"
|
|
bitfld.long 0x00 3. " FEVTAC12EBE ,Force event auto command 12 end bit error" "No effect,Force"
|
|
bitfld.long 0x00 2. " FEVTAC12CE ,Force event auto command 12 CRC error" "No effect,Force"
|
|
newline
|
|
bitfld.long 0x00 1. " FEVTAC12TOE ,Force event auto command 12 time out error" "No effect,Force"
|
|
bitfld.long 0x00 0. " FEVTAC12NE ,Force event auto command 12 not executed" "No effect,Force"
|
|
rgroup.long 0x54++0x03
|
|
line.long 0x00 "ADMA_ERR_STATUS,ADMA Error Status Register"
|
|
bitfld.long 0x00 3. " ADMADCE ,ADMA descriptor error" "No error,Error"
|
|
bitfld.long 0x00 2. " ADMALME ,ADMA length mismatch error" "No error,Error"
|
|
bitfld.long 0x00 0.--1. " ADMAES ,ADMA error state" "ST_STOP,ST_FDS,ST_CADR,ST_TFR"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ADMA_SYS_ADDR,ADMA System Address Register"
|
|
hexmask.long 0x00 2.--31. 0x04 " ADS_ADDR ,ADMA system address"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "DLL_CTRL,DLL (Delay Line) Control Register"
|
|
bitfld.long 0x00 28.--31. " REF_UPDATE_INT ,DLL control loop update interval" "2*REF_CLOCK,3*REF_CLOCK,4*REF_CLOCK,5*REF_CLOCK,6*REF_CLOCK,7*REF_CLOCK,8*REF_CLOCK,9*REF_CLOCK,10*REF_CLOCK,11*REF_CLOCK,12*REF_CLOCK,13*REF_CLOCK,14*REF_CLOCK,15*REF_CLOCK,16*REF_CLOCK,17*REF_CLOCK"
|
|
hexmask.long.byte 0x00 20.--27. 1. " SLV_UPDATE_INT ,Slave delay line update interval"
|
|
bitfld.long 0x00 16.--18. " SLV_DLY_TARGET1 ,Delay target for the USDHC loopback read clock (high-order bits)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x00 9.--15. 1. " SLV_OVERRIDE_VAL ,Slave override value"
|
|
bitfld.long 0x00 8. " SLV_OVERRIDE ,Enable manual override for slave delay chain" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " GATE_UPDATE ,DLL update" "Automatic,No update"
|
|
newline
|
|
bitfld.long 0x00 3.--6. " SLV_DLY_TARGET0 ,Delay target for the USDHC loopback read clock (low-order bits)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2. " SLV_FORCE_UPD ,DLL slave update" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " RESET ,DLL reset" "No reset,Reset"
|
|
newline
|
|
bitfld.long 0x00 0. " ENABLE ,DLL and delay chain enable" "Disabled,Enabled"
|
|
rgroup.long 0x64++0x03
|
|
line.long 0x00 "DLL_STATUS,DLL Status Register"
|
|
hexmask.long.byte 0x00 9.--15. 1. " DLL_STS_REF_SEL ,Reference delay line select taps"
|
|
hexmask.long.byte 0x00 2.--8. 1. " DLL_STS_SLV_SEL ,Slave delay line select status"
|
|
newline
|
|
bitfld.long 0x00 1. " DLL_STS_REF_LOCK ,Reference DLL lock status" "Unlocked,Locked"
|
|
bitfld.long 0x00 0. " DLL_STS_SLV_LOCK ,Slave delay-line lock status" "Not valid,Valid"
|
|
if ((per.l(ad:0x402C4000+0x48)&0x800000)==0x800000)
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CLK_TUNE_CTRL_STATUS,Clock Tuning Control and Status Register"
|
|
rbitfld.long 0x00 31. " PRE_ERR ,PRE error" "No error,Error"
|
|
hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE"
|
|
rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 15. " NXT_ERR ,NXT error" "No error,Error"
|
|
hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "CLK_TUNE_CTRL_STATUS,Clock Tuning Control and Status Register"
|
|
textfld " "
|
|
hexmask.long.byte 0x00 24.--30. 1. " TAP_SEL_PRE ,Number of delay cells added on the feedback clock between the feedback clock and CLK_PRE"
|
|
rbitfld.long 0x00 20.--23. " TAP_SEL_OUT ,Number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
rbitfld.long 0x00 16.--19. " TAP_SEL_POST ,Number of delay cells added on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textfld " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " DLY_CELL_SET_PRE ,Number of delay cells on the feedback clock between the feedback clock and CLK_PRE"
|
|
newline
|
|
bitfld.long 0x00 4.--7. " DLY_CELL_SET_OUT ,Number of delay cells on the feedback clock between CLK_PRE and CLK_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " DLY_CELL_SET_POST ,Number of delay cells on the feedback clock between CLK_OUT and CLK_POST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0xC0++0x0F
|
|
line.long 0x00 "VEND_SPEC,Vendor Specific Register"
|
|
bitfld.long 0x00 31. " CMD_BYTE_EN ,Byte access" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CRC_CHK_DIS ,CRC check disable" "No,Yes"
|
|
bitfld.long 0x00 8. " FRC_SDCLK_ON ,Force CLK output active" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x00 3. " AC12_WR_CHKBUSY_EN ,Check busy enable after auto CMD12 for write data packet" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CONFLICT_CHK_EN ,Conflict check enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " VSELECT ,Voltage selection (around: 3.0V/1.8V)" "High,Low"
|
|
line.long 0x04 "MMC_BOOT,MMC Boot Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " BOOT_BLK_CNT ,Stop At Block Gap value of automatic mode"
|
|
bitfld.long 0x04 8. " DISABLE_TIME_OUT ,Disable time out" "No,Yes"
|
|
bitfld.long 0x04 7. " AUTO_SABG_EN ,Auto stop at block gap enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 6. " BOOT_EN ,Boot mode enable" "Disable,Enabled"
|
|
bitfld.long 0x04 5. " BOOT_MODE ,Boot mode select" "Normal,Alternative"
|
|
bitfld.long 0x04 4. " BOOT_ACK ,Boot ACK mode select" "No ACK,ACK"
|
|
newline
|
|
bitfld.long 0x04 0.--3. " DTOCV_ACK ,Boot ACK timeout counter value" "SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,,,,,,,SDCLK x 2^28,SDCLK x 2^29"
|
|
line.long 0x08 "VEND_SPEC2,Vendor Specific 2 Register"
|
|
bitfld.long 0x08 14. " BUS_RST ,BUS reset" "No reset,Reset"
|
|
bitfld.long 0x08 13. " PART_DLL_DEBUG ,Debug for part DLL" "Low,High"
|
|
bitfld.long 0x08 12. " ACMD23_ARGU2_EN ,Argument2 register enable for ACMD23" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 6. " TUNING_CMD_EN ,Auto tuning circuit CMD line check enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 4.--5. " TUNING_EN ,Auto tuning circuit DAT[7:0] check enable" "DATA[3:0],DATA[0],DATA[7:0],?..."
|
|
bitfld.long 0x08 3. " CARD_INT_D3_TEST ,Card interrupt detection test condition" "DATA[3] high,DATA[3] ignored"
|
|
line.long 0x0C "TUNING_CTRL,Tuning Control Register"
|
|
bitfld.long 0x0C 24. " STD_TUNING_EN ,Standard tuning circuit and procedure enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20.--22. " TUNING_WINDOW ,Data window value for auto tuning selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0C 16.--18. " TUNING_STEP ,The increasing delay cell steps in tuning procedure" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0C 8.--15. 1. " TUNING_COUNTER ,The MAX repeat CMD19 times in tuning procedure"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " TUNING_START_TAP ,The start delay cell point when send first CMD19 in tuning procedure"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "WDOG (Watchdog Timer)"
|
|
tree "WDOG 1"
|
|
base ad:0x400B8000
|
|
width 6.
|
|
group.word 0x00++0x03
|
|
line.word 0x00 "WCR,Watchdog Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " WT , Watchdog time-out value"
|
|
bitfld.word 0x00 7. " WDW ,Watchdog disable for wait" "No,Yes"
|
|
bitfld.word 0x00 6. " SRE ,Software reset extension" "Original way,New way"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WDA ,WDOG_B assertion" "Asserted,Not asserted"
|
|
bitfld.word 0x00 4. " SRS ,Software reset signal" "Reset,No reset"
|
|
bitfld.word 0x00 3. " WDT ,WDOG_B time-out assertion" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 2. " WDE ,Watchdog enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " WDBG ,Suspend watchdog during debug mode" "Not suspended,Suspended"
|
|
bitfld.word 0x00 0. " WDZST ,Suspend watchdog during low power mode" "Not suspended,Suspended"
|
|
line.word 0x02 "WSR,Watchdog Service"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "WRSR,Watchdog Reset Status Register"
|
|
bitfld.word 0x00 4. " POR ,Power on reset" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " TOUT ,Timeout reset" "Not occurred,Occurred"
|
|
bitfld.word 0x00 0. " SFTW ,Software reset" "Not occurred,Occurred"
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "WICR,Watchdog Interrupt Control Register"
|
|
bitfld.word 0x00 15. " WIE ,Watchdog timer interrupt enable" "Disabled,Enabled"
|
|
eventfld.word 0x00 14. " WTIS ,Watchdog timer interrupt status" "Not occurred,Occurred"
|
|
hexmask.word.byte 0x00 0.--7. 1. " WICT ,Watchdog interrupt count time-out"
|
|
line.word 0x02 "WMCR,Watchdog Miscellaneous Control Register"
|
|
bitfld.word 0x02 0. " PDE ,Power down enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "WDOG 2"
|
|
base ad:0x400D0000
|
|
width 6.
|
|
group.word 0x00++0x03
|
|
line.word 0x00 "WCR,Watchdog Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " WT , Watchdog time-out value"
|
|
bitfld.word 0x00 7. " WDW ,Watchdog disable for wait" "No,Yes"
|
|
bitfld.word 0x00 6. " SRE ,Software reset extension" "Original way,New way"
|
|
textline " "
|
|
bitfld.word 0x00 5. " WDA ,WDOG_B assertion" "Asserted,Not asserted"
|
|
bitfld.word 0x00 4. " SRS ,Software reset signal" "Reset,No reset"
|
|
bitfld.word 0x00 3. " WDT ,WDOG_B time-out assertion" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 2. " WDE ,Watchdog enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " WDBG ,Suspend watchdog during debug mode" "Not suspended,Suspended"
|
|
bitfld.word 0x00 0. " WDZST ,Suspend watchdog during low power mode" "Not suspended,Suspended"
|
|
line.word 0x02 "WSR,Watchdog Service"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "WRSR,Watchdog Reset Status Register"
|
|
bitfld.word 0x00 4. " POR ,Power on reset" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " TOUT ,Timeout reset" "Not occurred,Occurred"
|
|
bitfld.word 0x00 0. " SFTW ,Software reset" "Not occurred,Occurred"
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "WICR,Watchdog Interrupt Control Register"
|
|
bitfld.word 0x00 15. " WIE ,Watchdog timer interrupt enable" "Disabled,Enabled"
|
|
eventfld.word 0x00 14. " WTIS ,Watchdog timer interrupt status" "Not occurred,Occurred"
|
|
hexmask.word.byte 0x00 0.--7. 1. " WICT ,Watchdog interrupt count time-out"
|
|
line.word 0x02 "WMCR,Watchdog Miscellaneous Control Register"
|
|
bitfld.word 0x02 0. " PDE ,Power down enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "RTWDOG (RT Watchdog timer)"
|
|
base ad:0x400BC000
|
|
width 7.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CS,Watchdog Control And Status Register"
|
|
bitfld.long 0x00 15. " WIN ,Watchdog window" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. " FLG ,Watchdog interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " CMD32EN ,Enables or disables WDOG support for 32-bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PRES ,Watchdog prescaler" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 11. " ULK ,Unlock status" "Locked,Unlocked"
|
|
rbitfld.long 0x00 10. " RCS ,Reconfiguration success" "No success,Success"
|
|
sif (cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpuis("IMX7ULP-CA7")||cpuis("IMX7ULP-CM4"))
|
|
bitfld.long 0x00 8.--9. " CLK ,Watchdog clock" "Bus,LPO,INTCLK,ERCLK"
|
|
else
|
|
bitfld.long 0x00 8.--9. " CLK ,Watchdog clock" "Bus,LPO,SOSC,SIRC"
|
|
textfld " "
|
|
endif
|
|
bitfld.long 0x00 7. " EN ,Watchdog enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " INT ,Watchdog interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " UPDATE ,Allow updates" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3.--4. " TST ,Watchdog test" "Disabled,User mode,Enabled for LB,Enabled for HB"
|
|
bitfld.long 0x00 2. " DBG ,Debug enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " WAIT ,Wait enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " STOP ,Stop enable" "Disabled,Enabled"
|
|
sif (cpuis("IMXRT1051")||cpuis("IMXRT1052")||cpuis("IMX7ULP-CA7")||cpuis("IMX7ULP-CM4"))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CNT,Watchdog Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CNTHIGH ,High byte of the watchdog counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CNTLOW ,Low byte of the watchdog counter"
|
|
else
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "CNT,Watchdog Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CNTHIGH ,High byte of the watchdog counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CNTLOW ,Low byte of the watchdog counter"
|
|
endif
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "TOVAL,Watchdog Timeout Value Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TOVALHIGH ,High byte of the timeout value"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TOVALLOW ,Low byte of the timeout value"
|
|
line.long 0x04 "WIN,Watchdog Window Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " WINHIGH ,High byte of watchdog window"
|
|
hexmask.long.byte 0x04 0.--7. 1. " WINLOW ,Low byte of watchdog window"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "XBAR (Inter-Peripheral Crossbar Switch)"
|
|
tree "XBARA"
|
|
base ad:0x403BC000
|
|
width 16.
|
|
group.word 0x0++0x01
|
|
line.word 0x00 "XBARA_SEL0 ,Crossbar A Select Register 0 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL1 ,Input (XBARA_INn) to be muxed to XBARA_OUT1 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL0 ,Input (XBARA_INn) to be muxed to XBARA_OUT0 "
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "XBARA_SEL1 ,Crossbar A Select Register 1 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL3 ,Input (XBARA_INn) to be muxed to XBARA_OUT3 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL2 ,Input (XBARA_INn) to be muxed to XBARA_OUT2 "
|
|
group.word 0x4++0x01
|
|
line.word 0x00 "XBARA_SEL2 ,Crossbar A Select Register 2 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL5 ,Input (XBARA_INn) to be muxed to XBARA_OUT5 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL4 ,Input (XBARA_INn) to be muxed to XBARA_OUT4 "
|
|
group.word 0x6++0x01
|
|
line.word 0x00 "XBARA_SEL3 ,Crossbar A Select Register 3 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL7 ,Input (XBARA_INn) to be muxed to XBARA_OUT7 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL6 ,Input (XBARA_INn) to be muxed to XBARA_OUT6 "
|
|
group.word 0x8++0x01
|
|
line.word 0x00 "XBARA_SEL4 ,Crossbar A Select Register 4 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL9 ,Input (XBARA_INn) to be muxed to XBARA_OUT9 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL8 ,Input (XBARA_INn) to be muxed to XBARA_OUT8 "
|
|
group.word 0xA++0x01
|
|
line.word 0x00 "XBARA_SEL5 ,Crossbar A Select Register 5 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL11 ,Input (XBARA_INn) to be muxed to XBARA_OUT11 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL10 ,Input (XBARA_INn) to be muxed to XBARA_OUT10 "
|
|
group.word 0xC++0x01
|
|
line.word 0x00 "XBARA_SEL6 ,Crossbar A Select Register 6 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL13 ,Input (XBARA_INn) to be muxed to XBARA_OUT13 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL12 ,Input (XBARA_INn) to be muxed to XBARA_OUT12 "
|
|
group.word 0xE++0x01
|
|
line.word 0x00 "XBARA_SEL7 ,Crossbar A Select Register 7 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL15 ,Input (XBARA_INn) to be muxed to XBARA_OUT15 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL14 ,Input (XBARA_INn) to be muxed to XBARA_OUT14 "
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "XBARA_SEL8 ,Crossbar A Select Register 8 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL17 ,Input (XBARA_INn) to be muxed to XBARA_OUT17 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL16 ,Input (XBARA_INn) to be muxed to XBARA_OUT16 "
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "XBARA_SEL9 ,Crossbar A Select Register 9 "
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL19 ,Input (XBARA_INn) to be muxed to XBARA_OUT19 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL18 ,Input (XBARA_INn) to be muxed to XBARA_OUT18 "
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "XBARA_SEL10,Crossbar A Select Register 10"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL21 ,Input (XBARA_INn) to be muxed to XBARA_OUT21 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL20 ,Input (XBARA_INn) to be muxed to XBARA_OUT20 "
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "XBARA_SEL11,Crossbar A Select Register 11"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL23 ,Input (XBARA_INn) to be muxed to XBARA_OUT23 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL22 ,Input (XBARA_INn) to be muxed to XBARA_OUT22 "
|
|
hgroup.word 0x18++0x01
|
|
hide.word 0x00 "XBARA_SEL12,Crossbar A Select Register 12"
|
|
group.word 0x1A++0x01
|
|
line.word 0x00 "XBARA_SEL13,Crossbar A Select Register 13"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL27 ,Input (XBARA_INn) to be muxed to XBARA_OUT27 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL26 ,Input (XBARA_INn) to be muxed to XBARA_OUT26 "
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "XBARA_SEL14,Crossbar A Select Register 14"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL29 ,Input (XBARA_INn) to be muxed to XBARA_OUT29 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL28 ,Input (XBARA_INn) to be muxed to XBARA_OUT28 "
|
|
group.word 0x1E++0x01
|
|
line.word 0x00 "XBARA_SEL15,Crossbar A Select Register 15"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL31 ,Input (XBARA_INn) to be muxed to XBARA_OUT31 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL30 ,Input (XBARA_INn) to be muxed to XBARA_OUT30 "
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "XBARA_SEL16,Crossbar A Select Register 16"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL33 ,Input (XBARA_INn) to be muxed to XBARA_OUT33 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL32 ,Input (XBARA_INn) to be muxed to XBARA_OUT32 "
|
|
group.word 0x22++0x01
|
|
line.word 0x00 "XBARA_SEL17,Crossbar A Select Register 17"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL35 ,Input (XBARA_INn) to be muxed to XBARA_OUT35 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL34 ,Input (XBARA_INn) to be muxed to XBARA_OUT34 "
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "XBARA_SEL18,Crossbar A Select Register 18"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL37 ,Input (XBARA_INn) to be muxed to XBARA_OUT37 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL36 ,Input (XBARA_INn) to be muxed to XBARA_OUT36 "
|
|
group.word 0x26++0x01
|
|
line.word 0x00 "XBARA_SEL19,Crossbar A Select Register 19"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL39 ,Input (XBARA_INn) to be muxed to XBARA_OUT39 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL38 ,Input (XBARA_INn) to be muxed to XBARA_OUT38 "
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "XBARA_SEL20,Crossbar A Select Register 20"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL41 ,Input (XBARA_INn) to be muxed to XBARA_OUT41 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL40 ,Input (XBARA_INn) to be muxed to XBARA_OUT40 "
|
|
group.word 0x2A++0x01
|
|
line.word 0x00 "XBARA_SEL21,Crossbar A Select Register 21"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL43 ,Input (XBARA_INn) to be muxed to XBARA_OUT43 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL42 ,Input (XBARA_INn) to be muxed to XBARA_OUT42 "
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "XBARA_SEL22,Crossbar A Select Register 22"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL45 ,Input (XBARA_INn) to be muxed to XBARA_OUT45 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL44 ,Input (XBARA_INn) to be muxed to XBARA_OUT44 "
|
|
group.word 0x2E++0x01
|
|
line.word 0x00 "XBARA_SEL23,Crossbar A Select Register 23"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL47 ,Input (XBARA_INn) to be muxed to XBARA_OUT47 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL46 ,Input (XBARA_INn) to be muxed to XBARA_OUT46 "
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "XBARA_SEL24,Crossbar A Select Register 24"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL49 ,Input (XBARA_INn) to be muxed to XBARA_OUT49 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL48 ,Input (XBARA_INn) to be muxed to XBARA_OUT48 "
|
|
group.word 0x32++0x01
|
|
line.word 0x00 "XBARA_SEL25,Crossbar A Select Register 25"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL51 ,Input (XBARA_INn) to be muxed to XBARA_OUT51 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL50 ,Input (XBARA_INn) to be muxed to XBARA_OUT50 "
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "XBARA_SEL26,Crossbar A Select Register 26"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL53 ,Input (XBARA_INn) to be muxed to XBARA_OUT53 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL52 ,Input (XBARA_INn) to be muxed to XBARA_OUT52 "
|
|
group.word 0x36++0x01
|
|
line.word 0x00 "XBARA_SEL27,Crossbar A Select Register 27"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL55 ,Input (XBARA_INn) to be muxed to XBARA_OUT55 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL54 ,Input (XBARA_INn) to be muxed to XBARA_OUT54 "
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "XBARA_SEL28,Crossbar A Select Register 28"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL57 ,Input (XBARA_INn) to be muxed to XBARA_OUT57 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL56 ,Input (XBARA_INn) to be muxed to XBARA_OUT56 "
|
|
group.word 0x3A++0x01
|
|
line.word 0x00 "XBARA_SEL29,Crossbar A Select Register 29"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL59 ,Input (XBARA_INn) to be muxed to XBARA_OUT59 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL58 ,Input (XBARA_INn) to be muxed to XBARA_OUT58 "
|
|
group.word 0x3C++0x01
|
|
line.word 0x00 "XBARA_SEL30,Crossbar A Select Register 30"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL61 ,Input (XBARA_INn) to be muxed to XBARA_OUT61 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL60 ,Input (XBARA_INn) to be muxed to XBARA_OUT60 "
|
|
group.word 0x3E++0x01
|
|
line.word 0x00 "XBARA_SEL31,Crossbar A Select Register 31"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL63 ,Input (XBARA_INn) to be muxed to XBARA_OUT63 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL62 ,Input (XBARA_INn) to be muxed to XBARA_OUT62 "
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "XBARA_SEL32,Crossbar A Select Register 32"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL65 ,Input (XBARA_INn) to be muxed to XBARA_OUT65 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL64 ,Input (XBARA_INn) to be muxed to XBARA_OUT64 "
|
|
group.word 0x42++0x01
|
|
line.word 0x00 "XBARA_SEL33,Crossbar A Select Register 33"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL67 ,Input (XBARA_INn) to be muxed to XBARA_OUT67 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL66 ,Input (XBARA_INn) to be muxed to XBARA_OUT66 "
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "XBARA_SEL34,Crossbar A Select Register 34"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL69 ,Input (XBARA_INn) to be muxed to XBARA_OUT69 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL68 ,Input (XBARA_INn) to be muxed to XBARA_OUT68 "
|
|
group.word 0x46++0x01
|
|
line.word 0x00 "XBARA_SEL35,Crossbar A Select Register 35"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL71 ,Input (XBARA_INn) to be muxed to XBARA_OUT71 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL70 ,Input (XBARA_INn) to be muxed to XBARA_OUT70 "
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "XBARA_SEL36,Crossbar A Select Register 36"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL73 ,Input (XBARA_INn) to be muxed to XBARA_OUT73 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL72 ,Input (XBARA_INn) to be muxed to XBARA_OUT72 "
|
|
group.word 0x4A++0x01
|
|
line.word 0x00 "XBARA_SEL37,Crossbar A Select Register 37"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL75 ,Input (XBARA_INn) to be muxed to XBARA_OUT75 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL74 ,Input (XBARA_INn) to be muxed to XBARA_OUT74 "
|
|
group.word 0x4C++0x01
|
|
line.word 0x00 "XBARA_SEL38,Crossbar A Select Register 38"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL77 ,Input (XBARA_INn) to be muxed to XBARA_OUT77 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL76 ,Input (XBARA_INn) to be muxed to XBARA_OUT76 "
|
|
group.word 0x4E++0x01
|
|
line.word 0x00 "XBARA_SEL39,Crossbar A Select Register 39"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL79 ,Input (XBARA_INn) to be muxed to XBARA_OUT79 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL78 ,Input (XBARA_INn) to be muxed to XBARA_OUT78 "
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "XBARA_SEL40,Crossbar A Select Register 40"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL81 ,Input (XBARA_INn) to be muxed to XBARA_OUT81 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL80 ,Input (XBARA_INn) to be muxed to XBARA_OUT80 "
|
|
group.word 0x52++0x01
|
|
line.word 0x00 "XBARA_SEL41,Crossbar A Select Register 41"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL83 ,Input (XBARA_INn) to be muxed to XBARA_OUT83 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL82 ,Input (XBARA_INn) to be muxed to XBARA_OUT82 "
|
|
group.word 0x54++0x01
|
|
line.word 0x00 "XBARA_SEL42,Crossbar A Select Register 42"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL85 ,Input (XBARA_INn) to be muxed to XBARA_OUT85 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL84 ,Input (XBARA_INn) to be muxed to XBARA_OUT84 "
|
|
group.word 0x56++0x01
|
|
line.word 0x00 "XBARA_SEL43,Crossbar A Select Register 43"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL87 ,Input (XBARA_INn) to be muxed to XBARA_OUT87 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL86 ,Input (XBARA_INn) to be muxed to XBARA_OUT86 "
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "XBARA_SEL44,Crossbar A Select Register 44"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL89 ,Input (XBARA_INn) to be muxed to XBARA_OUT89 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL88 ,Input (XBARA_INn) to be muxed to XBARA_OUT88 "
|
|
group.word 0x5A++0x01
|
|
line.word 0x00 "XBARA_SEL45,Crossbar A Select Register 45"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL91 ,Input (XBARA_INn) to be muxed to XBARA_OUT91 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL90 ,Input (XBARA_INn) to be muxed to XBARA_OUT90 "
|
|
group.word 0x5C++0x01
|
|
line.word 0x00 "XBARA_SEL46,Crossbar A Select Register 46"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL93 ,Input (XBARA_INn) to be muxed to XBARA_OUT93 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL92 ,Input (XBARA_INn) to be muxed to XBARA_OUT92 "
|
|
group.word 0x5E++0x01
|
|
line.word 0x00 "XBARA_SEL47,Crossbar A Select Register 47"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL95 ,Input (XBARA_INn) to be muxed to XBARA_OUT95 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL94 ,Input (XBARA_INn) to be muxed to XBARA_OUT94 "
|
|
group.word 0x60++0x01
|
|
line.word 0x00 "XBARA_SEL48,Crossbar A Select Register 48"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL97 ,Input (XBARA_INn) to be muxed to XBARA_OUT97 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL96 ,Input (XBARA_INn) to be muxed to XBARA_OUT96 "
|
|
group.word 0x62++0x01
|
|
line.word 0x00 "XBARA_SEL49,Crossbar A Select Register 49"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL99 ,Input (XBARA_INn) to be muxed to XBARA_OUT99 "
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL98 ,Input (XBARA_INn) to be muxed to XBARA_OUT98 "
|
|
group.word 0x64++0x01
|
|
line.word 0x00 "XBARA_SEL50,Crossbar A Select Register 50"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL101 ,Input (XBARA_INn) to be muxed to XBARA_OUT101"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL100 ,Input (XBARA_INn) to be muxed to XBARA_OUT100"
|
|
group.word 0x66++0x01
|
|
line.word 0x00 "XBARA_SEL51,Crossbar A Select Register 51"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL103 ,Input (XBARA_INn) to be muxed to XBARA_OUT103"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL102 ,Input (XBARA_INn) to be muxed to XBARA_OUT102"
|
|
group.word 0x68++0x01
|
|
line.word 0x00 "XBARA_SEL52,Crossbar A Select Register 52"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL105 ,Input (XBARA_INn) to be muxed to XBARA_OUT105"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL104 ,Input (XBARA_INn) to be muxed to XBARA_OUT104"
|
|
group.word 0x6A++0x01
|
|
line.word 0x00 "XBARA_SEL53,Crossbar A Select Register 53"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL107 ,Input (XBARA_INn) to be muxed to XBARA_OUT107"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL106 ,Input (XBARA_INn) to be muxed to XBARA_OUT106"
|
|
group.word 0x6C++0x01
|
|
line.word 0x00 "XBARA_SEL54,Crossbar A Select Register 54"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL109 ,Input (XBARA_INn) to be muxed to XBARA_OUT109"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL108 ,Input (XBARA_INn) to be muxed to XBARA_OUT108"
|
|
group.word 0x6E++0x01
|
|
line.word 0x00 "XBARA_SEL55,Crossbar A Select Register 55"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL111 ,Input (XBARA_INn) to be muxed to XBARA_OUT111"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL110 ,Input (XBARA_INn) to be muxed to XBARA_OUT110"
|
|
group.word 0x70++0x01
|
|
line.word 0x00 "XBARA_SEL56,Crossbar A Select Register 56"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL113 ,Input (XBARA_INn) to be muxed to XBARA_OUT113"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL112 ,Input (XBARA_INn) to be muxed to XBARA_OUT112"
|
|
group.word 0x72++0x01
|
|
line.word 0x00 "XBARA_SEL57,Crossbar A Select Register 57"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL115 ,Input (XBARA_INn) to be muxed to XBARA_OUT115"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL114 ,Input (XBARA_INn) to be muxed to XBARA_OUT114"
|
|
group.word 0x74++0x01
|
|
line.word 0x00 "XBARA_SEL58,Crossbar A Select Register 58"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL117 ,Input (XBARA_INn) to be muxed to XBARA_OUT117"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL116 ,Input (XBARA_INn) to be muxed to XBARA_OUT116"
|
|
group.word 0x76++0x01
|
|
line.word 0x00 "XBARA_SEL59,Crossbar A Select Register 59"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL119 ,Input (XBARA_INn) to be muxed to XBARA_OUT119"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL118 ,Input (XBARA_INn) to be muxed to XBARA_OUT118"
|
|
group.word 0x78++0x01
|
|
line.word 0x00 "XBARA_SEL60,Crossbar A Select Register 60"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL121 ,Input (XBARA_INn) to be muxed to XBARA_OUT121"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL120 ,Input (XBARA_INn) to be muxed to XBARA_OUT120"
|
|
group.word 0x7A++0x01
|
|
line.word 0x00 "XBARA_SEL61,Crossbar A Select Register 61"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL123 ,Input (XBARA_INn) to be muxed to XBARA_OUT123"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL122 ,Input (XBARA_INn) to be muxed to XBARA_OUT122"
|
|
group.word 0x7C++0x01
|
|
line.word 0x00 "XBARA_SEL62,Crossbar A Select Register 62"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL125 ,Input (XBARA_INn) to be muxed to XBARA_OUT125"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL124 ,Input (XBARA_INn) to be muxed to XBARA_OUT124"
|
|
group.word 0x7E++0x01
|
|
line.word 0x00 "XBARA_SEL63,Crossbar A Select Register 63"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL127 ,Input (XBARA_INn) to be muxed to XBARA_OUT127"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL126 ,Input (XBARA_INn) to be muxed to XBARA_OUT126"
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "XBARA_SEL64,Crossbar A Select Register 64"
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL129 ,Input (XBARA_INn) to be muxed to XBARA_OUT129"
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL128 ,Input (XBARA_INn) to be muxed to XBARA_OUT128"
|
|
group.word 0x82++0x05
|
|
line.word 0x00 "XBARA_SEL65,Crossbar A Select Register 65"
|
|
sif cpuis("IMXRT106*")
|
|
hexmask.word.byte 0x00 8.--14. 1. " SEL131 ,Input (XBARA_INn) to be muxed to XBARA_OUT131"
|
|
textline " "
|
|
endif
|
|
hexmask.word.byte 0x00 0.--6. 1. " SEL130 ,Input (XBARA_INn) to be muxed to XBARA_OUT130"
|
|
textline " "
|
|
line.word 0x02 "XBARA_CTRL0,Crossbar A Control Register 0"
|
|
eventfld.word 0x02 12. " STS1 ,Edge detection status for XBAR_OUT1" "Not detected,Detected"
|
|
bitfld.word 0x02 10.--11. " EDGE1 ,Active edge for edge detection on XBAR_OUT1" "Never,Rising edges,Falling edges,Both edges"
|
|
bitfld.word 0x02 9. " IEN1 ,Interrupt enable for XBAR_OUT1" "Disabled,Enabled"
|
|
bitfld.word 0x02 8. " DEN1 ,DMA enable for XBAR_OUT1" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.word 0x02 4. " STS0 ,Edge detection status for XBAR_OUT0" "Not detected,Detected"
|
|
bitfld.word 0x02 2.--3. " EDGE0 ,Active edge for edge detection on XBAR_OUT0" "Never,Rising edges,Falling edges,Both edges"
|
|
bitfld.word 0x02 1. " IEN0 ,Interrupt enable for XBAR_OUT0" "Disabled,Enabled"
|
|
bitfld.word 0x02 0. " DEN0 ,DMA enable for XBAR_OUT0" "Disabled,Enabled"
|
|
line.word 0x04 "XBARA_CTRL1,Crossbar A Control Register 1"
|
|
eventfld.word 0x04 12. " STS3 ,Edge detection status for XBAR_OUT3" "Not detected,Detected"
|
|
bitfld.word 0x04 10.--11. " EDGE3 ,Active edge for edge detection on XBAR_OUT1" "Never,Rising edges,Falling edges,Both edges"
|
|
bitfld.word 0x04 9. " IEN3 ,Interrupt enable for XBAR_OUT1" "Disabled,Enabled"
|
|
bitfld.word 0x04 8. " DEN3 ,DMA enable for XBAR_OUT1" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.word 0x04 4. " STS2 ,Edge detection status for XBAR_OUT0" "Not detected,Detected"
|
|
bitfld.word 0x04 2.--3. " EDGE2 ,Active edge for edge detection on XBAR_OUT0" "Never,Rising edges,Falling edges,Both edges"
|
|
bitfld.word 0x04 1. " IEN2 ,Interrupt enable for XBAR_OUT0" "Disabled,Enabled"
|
|
bitfld.word 0x04 0. " DEN2 ,DMA enable for XBAR_OUT0" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "XBARB"
|
|
base ad:0x403C0000
|
|
width 17.
|
|
group.word 0x0++0x01
|
|
line.word 0x00 "XBARBB_SEL0 ,Crossbar B Select Register 0 "
|
|
bitfld.word 0x00 8.--13. " SEL1 ,XBARB_OUT1 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
|
|
bitfld.word 0x00 0.--5. " XBARBB_SEL0 ,XBARB_OUT0 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
|
|
group.word 0x2++0x01
|
|
line.word 0x00 "XBARBB_SEL1 ,Crossbar B Select Register 1 "
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bitfld.word 0x00 8.--13. " SEL3 ,XBARB_OUT3 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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bitfld.word 0x00 0.--5. " XBARBB_SEL2 ,XBARB_OUT2 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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group.word 0x4++0x01
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line.word 0x00 "XBARBB_SEL2 ,Crossbar B Select Register 2 "
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bitfld.word 0x00 8.--13. " SEL5 ,XBARB_OUT5 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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bitfld.word 0x00 0.--5. " XBARBB_SEL4 ,XBARB_OUT4 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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group.word 0x6++0x01
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line.word 0x00 "XBARBB_SEL3 ,Crossbar B Select Register 3 "
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bitfld.word 0x00 8.--13. " SEL7 ,XBARB_OUT7 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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bitfld.word 0x00 0.--5. " XBARBB_SEL6 ,XBARB_OUT6 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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group.word 0x8++0x01
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line.word 0x00 "XBARBB_SEL4 ,Crossbar B Select Register 4 "
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bitfld.word 0x00 8.--13. " SEL9 ,XBARB_OUT9 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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bitfld.word 0x00 0.--5. " XBARBB_SEL8 ,XBARB_OUT8 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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group.word 0xA++0x01
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line.word 0x00 "XBARBB_SEL5 ,Crossbar B Select Register 5 "
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bitfld.word 0x00 8.--13. " SEL11 ,XBARB_OUT11 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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bitfld.word 0x00 0.--5. " XBARBB_SEL10 ,XBARB_OUT10 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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group.word 0xC++0x01
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line.word 0x00 "XBARBB_SEL6 ,Crossbar B Select Register 6 "
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bitfld.word 0x00 8.--13. " SEL13 ,XBARB_OUT13 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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bitfld.word 0x00 0.--5. " XBARBB_SEL12 ,XBARB_OUT12 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
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group.word 0xE++0x01
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line.word 0x00 "XBARBB_SEL7 ,Crossbar B Select Register 7 "
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bitfld.word 0x00 8.--13. " SEL15 ,XBARB_OUT15 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
|
|
bitfld.word 0x00 0.--5. " XBARBB_SEL14 ,XBARB_OUT14 input selection" "LOW,HIGH,,,,,ACMP1_OUT,ACMP2_OUT,ACMP3_OUT,ACMP4_OUT,,,QTIMER3_TIMER0,QTIMER3_TIMER1,QTIMER3_TIMER2,QTIMER3_TIMER3,QTIMER4_TIMER0,QTIMER4_TIMER1,QTIMER4_TIMER2,QTIMER4_TIMER3,FLEXPWM1_PWM1_OUT_TRIG0\TRIG1,FLEXPWM1_PWM2_OUT_TRIG0\TRIG1,FLEXPWM1_PWM3_OUT_TRIG0\TRIG1,FLEXPWM1_PWM4_OUT_TRIG0\TRIG1,FLEXPWM2_PWM1_OUT_TRIG0\TRIG1,FLEXPWM2_PWM2_OUT_TRIG0\TRIG1,FLEXPWM2_PWM3_OUT_TRIG0\TRIG1,FLEXPWM2_PWM4_OUT_TRIG0\TRIG1,FLEXPWM3_PWM1_OUT_TRIG0\TRIG1,FLEXPWM3_PWM2_OUT_TRIG0\TRIG1,FLEXPWM3_PWM3_OUT_TRIG0\TRIG1,FLEXPWM3_PWM4_OUT_TRIG0\TRIG1,FLEXPWM4_PWM1_OUT_TRIG0\TRIG1,FLEXPWM4_PWM2_OUT_TRIG0\TRIG1,FLEXPWM4_PWM3_OUT_TRIG0\TRIG1,FLEXPWM4_PWM4_OUT_TRIG0\TRIG1,PIT_TRIGGER0,PIT_TRIGGER1,ADC_ETC_COCO0,DC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ADC_ETC_COCO0,ADC_ETC_COCO1,ADC_ETC_COCO2,ADC_ETC_COCO3,ENC1_POS_MATCH,ENC2_POS_MATCH,ENC3_POS_MATCH,ENC4_POS_MATCH,DMA_DONE0,DMA_DONE1,DMA_DONE2,DMA_DONE3,DMA_DONE4,DMA_DONE5,DMA_DONE6,DMA_DONE7,?..."
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "XTALOSC (Crystal Oscillator)"
|
|
base ad:0x400D8000
|
|
width 17.
|
|
group.long 0x150++0x0F
|
|
line.long 0x00 "MISC0,Miscellaneous Register 0"
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|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " VID_PLL_PREDIV_SET/CLR ,Predivider for the source clock of the PLL's" "/1,/2"
|
|
textline " "
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|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " XTAL_24M_PWD_SET/CLR ,Powers down the 24M crystal oscillator" "Powered up,Powered down"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " RTC_XTAL_SOURCE_SET/CLR ,Chip source used for the rtc clock" "Internal ring oscillator,RTC_XTAL"
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|
textline " "
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|
bitfld.long 0x00 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms"
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|
textline " "
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|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CLKGATE_CTRL_SET/CLR ,Allow disabling the clock gate for the xtal 24MHz clock that clocks the digital logic in the analog block" "Allowed,Not allowed"
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|
textline " "
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|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " OSC_XTALOK_EN_SET/CLR ,Enable the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled"
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|
textline " "
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|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " OSC_XTALOK_SET/CLR ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "Not stable,Stable"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,-12.5%,-25%,-37.5%"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " DISCON_HIGH_SNVS_SET/CLR ,Switch from VDD_HIGH_IN to VDD_SNVS_IN." "Turned on,Turned off"
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|
textline " "
|
|
bitfld.long 0x00 10.--11. " STOP_MODE_CONFIG ,Analog behavior in stop mode" "All analog except rtc powered down on stop mode assertion,Certain analog functions such as certain regulators left up,XtalOsc=off/RCOsc=on/Old BG=on/New BG=off,XtalOsc=off/RCOsc=on/Old BG=off/New BG=on"
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|
textline " "
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|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " REFTOP_VBGUP_SET/CLR ,Analog bandgap voltage is up and stable" "Not stable,Stable"
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|
textline " "
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|
bitfld.long 0x00 4.--6. " REFTOP_VBGADJ ,REFTOP VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%"
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|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " REFTOP_SELFBIASOFF_SET/CLR ,Disable the self-bias circuit in the analog bandgap" "No,Yes"
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|
textline " "
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|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " REFTOP_PWD_SET/CLR ,Power-down the analog bandgap reference circuitry" "Powered up,Powered down"
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|
line.long 0x04 "MISC0_SET,Miscellaneous Register 0"
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|
bitfld.long 0x04 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms"
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|
textline " "
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|
bitfld.long 0x04 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,-12.5%,-25%,-37.5%"
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " STOP_MODE_CONFIG ,Analog behavior in stop mode" "All analog except rtc powered down on stop mode assertion,Certain analog functions such as certain regulators left up,XtalOsc=off/RCOsc=on/Old BG=on/New BG=off,XtalOsc=off/RCOsc=on/Old BG=off/New BG=on"
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|
textline " "
|
|
bitfld.long 0x04 4.--6. " REFTOP_VBGADJ ,REFTOP VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%"
|
|
line.long 0x08 "MISC0_CLR,Miscellaneous Register 0"
|
|
bitfld.long 0x08 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms"
|
|
textline " "
|
|
bitfld.long 0x08 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,-12.5%,-25%,-37.5%"
|
|
textline " "
|
|
bitfld.long 0x08 10.--11. " STOP_MODE_CONFIG ,Analog behavior in stop mode" "All analog except rtc powered down on stop mode assertion,Certain analog functions such as certain regulators left up,XtalOsc=off/RCOsc=on/Old BG=on/New BG=off,XtalOsc=off/RCOsc=on/Old BG=off/New BG=on"
|
|
textline " "
|
|
bitfld.long 0x08 4.--6. " REFTOP_VBGADJ ,REFTOP VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%"
|
|
line.long 0x0C "MISC0_TOG,Miscellaneous Register 0"
|
|
bitfld.long 0x0C 31. " VID_PLL_PREDIV ,Predivider for the source clock of the PLL's" "/1,/2"
|
|
textline " "
|
|
bitfld.long 0x0C 30. " XTAL_24M_PWD ,Powers down the 24M crystal oscillator" "Powered up,Powered down"
|
|
sif !cpuis("IMXRT1021")
|
|
textline " "
|
|
rbitfld.long 0x0C 29. " RTC_XTAL_SOURCE ,Chip source used for the rtc clock" "Internal ring oscillator,RTC_XTAL"
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|
endif
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|
textline " "
|
|
bitfld.long 0x0C 26.--28. " CLKGATE_DELAY ,Delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block" "0.5ms,1.0ms,2.0ms,3.0ms,4.0ms,5.0ms,6.0ms,7.0ms"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " CLKGATE_CTRL ,Allow disabling the clock gate for the xtal 24MHz clock that clocks the digital logic in the analog block" "Allowed,Not allowed"
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|
textline " "
|
|
bitfld.long 0x0C 16. " OSC_XTALOK_EN ,Enable the detector that signals when the 24MHz crystal oscillator is stable" "Disabled,Enabled"
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|
sif !cpuis("IMXRT1021")
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|
textline " "
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rbitfld.long 0x0C 15. " OSC_XTALOK ,Status bit that signals that the output of the 24-MHz crystal oscillator is stable" "Not stable,Stable"
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endif
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textline " "
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bitfld.long 0x0C 13.--14. " OSC_I ,Bias current in the 24MHz oscillator" "Nominal,-12.5%,-25%,-37.5%"
|
|
textline " "
|
|
bitfld.long 0x0C 12. " DISCON_HIGH_SNVS ,Switch from VDD_HIGH_IN to VDD_SNVS_IN." "Turned on,Turned off"
|
|
textline " "
|
|
bitfld.long 0x0C 10.--11. " STOP_MODE_CONFIG ,Analog behavior in stop mode" "All analog except rtc powered down on stop mode assertion,Certain analog functions such as certain regulators left up,XtalOsc=off/RCOsc=on/Old BG=on/New BG=off,XtalOsc=off/RCOsc=on/Old BG=off/New BG=on"
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|
textline " "
|
|
bitfld.long 0x0C 7. " REFTOP_VBGUP ,Analog bandgap voltage is up and stable" "Not stable,Stable"
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|
textline " "
|
|
bitfld.long 0x0C 4.--6. " REFTOP_VBGADJ ,REFTOP VBGADJ" "Nominal VBG,VBG+0.78%,VBG+1.56%,VBG+2.34%,VBG-0.78%,VBG-1.56%,VBG-2.34%,VBG-3.12%"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " REFTOP_SELFBIASOFF ,Disable the self-bias circuit in the analog bandgap" "No,Yes"
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|
textline " "
|
|
bitfld.long 0x0C 0. " REFTOP_PWD ,Power-down the analog bandgap reference circuitry" "Powered up,Powered down"
|
|
textline " "
|
|
group.long 0x270++0x0F
|
|
line.long 0x00 "LOWPWR_CTRL,XTAL OSC (LP) Control Register"
|
|
sif cpuis("IMXRT1021")
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPU_PWRGATE_SET/CLR ,GPU power gate control" "Ungated,Gated"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " MIX_PWRGATE_SET/CLR ,Display power gate control" "Ungated,Gated"
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rbitfld.long 0x00 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,Stable"
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bitfld.long 0x00 14.--15. " XTALOSC_PWRUP_DELAY ,Time delay between when the 24MHz xtal is powered up until it is stable and ready to use" "0.25ms,0.5ms,1ms,2ms"
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|
textline " "
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setclrfld.long 0x00 13. 0x04 13. 0x08 13. " RCOSC_CG_OVERRIDE_SET/CLR ,This bit effects clock gating of certain digital logic clocked by the 24MHz clk" "No override,Override"
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setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DISPLAY_PWRGATE_SET/CLR ,Display logic power gate control" "No override,Override"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CPU_PWRGATE_SET/CLR ,CPU power gate control" "No override,Override"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " L2_PWRGATE_SET/CLR ,L2 power gate control" "No override,Override"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " L1_PWRGATE_SET/CLR ,L1 power gate control" "No override,Override"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " REFTOP_IBIAS_OFF_SET/CLR ,Low power reftop ibias disable" "No,Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " LPBG_TEST_SET/CLR ,Low power bandgap test bit" "0,1"
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setclrfld.long 0x00 5. 0x04 5. 0x08 5. " LPBG_SEL_SET/CLR ,Bandgap select" "Normal power,Low power"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " OSC_SEL_SET/CLR ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC"
|
|
textline " "
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x00 1.--3. " RC_OSC_PROG ,RC OSC tuning values" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RC_OSC_EN_SET/CLR ,RC OSC enable control" "XTAL OSC,RC OSC"
|
|
line.long 0x04 "LOWPWR_CTRL_SET,XTAL OSC (LP) Control Register"
|
|
rbitfld.long 0x00 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,Stable"
|
|
bitfld.long 0x04 14.--15. " XTALOSC_PWRUP_DELAY ,Time delay between when the 24MHz xtal is powered up until it is stable and ready to use" "0.25ms,0.5ms,1ms,2ms"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x04 1.--3. " RC_OSC_PROG ,RC OSC tuning values" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
line.long 0x08 "LOWPWR_CTRL_CLR,XTAL OSC (LP) Control Register"
|
|
rbitfld.long 0x00 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,Stable"
|
|
bitfld.long 0x08 14.--15. " XTALOSC_PWRUP_DELAY ,Time delay between when the 24MHz xtal is powered up until it is stable and ready to use" "0.25ms,0.5ms,1ms,2ms"
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x08 1.--3. " RC_OSC_PROG ,RC OSC tuning values" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
line.long 0x0C "LOWPWR_CTRL_TOG,XTAL OSC (LP) Control Register"
|
|
sif cpuis("IMXRT1021")||cpuis("IMXRT106*")
|
|
bitfld.long 0x0C 18. " GPU_PWRGATE ,GPU power gate control" "Ungated,Gated"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 17. " MIX_PWRGATE ,Display power gate control" "Ungated,Gated"
|
|
sif !cpuis("IMXRT1021")
|
|
textline " "
|
|
rbitfld.long 0x0C 16. " XTALOSC_PWRUP_STAT ,Status of the 24MHz xtal oscillator" "Not stable,Stable"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " XTALOSC_PWRUP_DELAY ,Time delay between when the 24MHz xtal is powered up until it is stable and ready to use" "0.25ms,0.5ms,1ms,2ms"
|
|
bitfld.long 0x0C 13. " RCOSC_CG_OVERRIDE ,This bit effects clock gating of certain digital logic clocked by the 24MHz clk" "No override,Override"
|
|
bitfld.long 0x0C 11. " DISPLAY_PWRGATE ,Display logic power gate control" "No override,Override"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " CPU_PWRGATE ,CPU power gate control" "No override,Override"
|
|
bitfld.long 0x0C 9. " L2_PWRGATE ,L2 power gate control" "No override,Override"
|
|
bitfld.long 0x0C 8. " L1_PWRGATE ,L1 power gate control" "No override,Override"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " REFTOP_IBIAS_OFF ,Low power reftop ibias disable" "No,Yes"
|
|
bitfld.long 0x0C 6. " LPBG_TEST ,Low power bandgap test bit" "0,1"
|
|
bitfld.long 0x0C 5. " LPBG_SEL ,Bandgap select" "Normal power,Low power"
|
|
textline " "
|
|
bitfld.long 0x0C 4. " OSC_SEL ,Select the source for the 24MHz clock" "XTAL OSC,RC OSC"
|
|
textline " "
|
|
sif !cpuis("IMXRT1021")
|
|
bitfld.long 0x0C 1.--3. " RC_OSC_PROG ,RC OSC tuning values" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 0. " RC_OSC_EN ,RC OSC enable control" "XTAL OSC,RC OSC"
|
|
group.long 0x2A0++0x2F
|
|
line.long 0x00 "OSC_CONFIG0,XTAL OSC Configuration 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RC_OSC_PROG_CUR ,The current tuning value in use"
|
|
bitfld.long 0x00 16.--19. " HYST_MINUS ,Negative hysteresis value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " HYST_PLUS ,Positive hysteresis value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--11. 1. " RC_OSC_PROG ,RC OSC tuning values"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " INVERT_SET/CLR ,Invert the stepping of the calculated RC tuning value" "Not inverted,Inverted"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " BYPASS_SET/CLR ,Bypasses any calculated RC tuning value and uses the programmed register value" "Not bypassed,Bypassed"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " ENABLE_SET/CLR ,Enables the tuning logic to calculate new RC tuning values" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " START_SET/CLR ,Start/stop bit for the RC tuning calculation logic" "Started,Stopped"
|
|
line.long 0x04 "OSC_CONFIG0_SET,XTAL OSC Configuration 0 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RC_OSC_PROG_CUR ,The current tuning value in use"
|
|
bitfld.long 0x04 16.--19. " HYST_MINUS ,Negative hysteresis value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 12.--15. " HYST_PLUS ,Positive hysteresis value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x04 4.--11. 1. " RC_OSC_PROG ,RC OSC tuning values"
|
|
line.long 0x08 "OSC_CONFIG0_CLR,XTAL OSC Configuration 0 Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " RC_OSC_PROG_CUR ,The current tuning value in use"
|
|
bitfld.long 0x08 16.--19. " HYST_MINUS ,Negative hysteresis value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 12.--15. " HYST_PLUS ,Positive hysteresis value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x08 4.--11. 1. " RC_OSC_PROG ,RC OSC tuning values"
|
|
line.long 0x0C "OSC_CONFIG0_TOG,XTAL OSC Configuration 0 Register"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " RC_OSC_PROG_CUR ,The current tuning value in use"
|
|
bitfld.long 0x0C 16.--19. " HYST_MINUS ,Negative hysteresis value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0C 12.--15. " HYST_PLUS ,Positive hysteresis value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 4.--11. 1. " RC_OSC_PROG ,RC OSC tuning values"
|
|
bitfld.long 0x0C 3. " INVERT ,Invert the stepping of the calculated RC tuning value" "Not inverted,Inverted"
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bitfld.long 0x0C 2. " BYPASS ,Bypasses any calculated RC tuning value and uses the programmed register value" "Not bypassed,Bypassed"
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textline " "
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bitfld.long 0x0C 1. " ENABLE ,Enables the tuning logic to calculate new RC tuning values" "Disabled,Enabled"
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bitfld.long 0x0C 0. " START ,Start/stop bit for the RC tuning calculation logic" "Started,Stopped"
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line.long 0x10 "OSC_CONFIG1,XTAL OSC Configuration 1 Register"
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hexmask.long.word 0x10 20.--31. 1. " COUNT_RC_CUR ,The current tuning value in use"
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hexmask.long.word 0x10 0.--11. 1. " COUNT_RC_TRG ,The target count used to tune the RC OSC frequency"
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line.long 0x14 "OSC_CONFIG1_SET,XTAL OSC Configuration 1 Register"
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hexmask.long.word 0x14 20.--31. 1. " COUNT_RC_CUR ,The current tuning value in use"
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hexmask.long.word 0x14 0.--11. 1. " COUNT_RC_TRG ,The target count used to tune the RC OSC frequency"
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line.long 0x18 "OSC_CONFIG1_CLR,XTAL OSC Configuration 1 Register"
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hexmask.long.word 0x18 20.--31. 1. " COUNT_RC_CUR ,The current tuning value in use"
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hexmask.long.word 0x18 0.--11. 1. " COUNT_RC_TRG ,The target count used to tune the RC OSC frequency"
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line.long 0x1C "OSC_CONFIG1_TOG,XTAL OSC Configuration 1 Register"
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hexmask.long.word 0x1C 20.--31. 1. " COUNT_RC_CUR ,The current tuning value in use"
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hexmask.long.word 0x1C 0.--11. 1. " COUNT_RC_TRG ,The target count used to tune the RC OSC frequency"
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line.long 0x20 "OSC_CONFIG2,XTAL OSC Configuration 2 Register"
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setclrfld.long 0x20 31. 0x24 31. 0x28 31. " CLK_1M_ERR_FL_SET/CLR ,Flag indicates that the count_1m count wasn't reached within 1 32KHz period" "Not occurred,Occurred"
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textline " "
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setclrfld.long 0x20 17. 0x24 17. 0x28 17. " MUX_1M_SET/CLR ,Mux the corrected or uncorrected 1MHz clock to the output" "Free,Locked"
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textline " "
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setclrfld.long 0x20 16. 0x24 16. 0x28 16. " ENABLE_1M_SET/CLR ,Enable the 1MHz clock output" "Disabled,Enabled"
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hexmask.long.word 0x20 0.--11. 1. " COUNT_1M_TRG ,The target count used to tune the RC OSC frequency"
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line.long 0x24 "OSC_CONFIG2_SET,XTAL OSC Configuration 2 Register"
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hexmask.long.word 0x24 0.--11. 1. " COUNT_1M_TRG ,The target count used to tune the RC OSC frequency"
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line.long 0x28 "OSC_CONFIG2_CLR,XTAL OSC Configuration 2 Register"
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hexmask.long.word 0x28 0.--11. 1. " COUNT_1M_TRG ,The target count used to tune the RC OSC frequency"
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line.long 0x2C "OSC_CONFIG2_TOG,XTAL OSC Configuration 2 Register"
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bitfld.long 0x2C 31. " CLK_1M_ERR_FL ,Flag indicates that the count_1m count wasn't reached within 1 32KHz period" "Not occurred,Occurred"
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bitfld.long 0x2C 17. " MUX_1M ,Mux the corrected or uncorrected 1MHz clock to the output" "Free,Locked"
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textline " "
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bitfld.long 0x2C 16. " ENABLE_1M ,Enable the 1MHz clock output" "Disabled,Enabled"
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hexmask.long.word 0x2C 0.--11. 1. " COUNT_1M_TRG ,The target count used to tune the RC OSC frequency"
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width 0x0B
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tree.end
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newline
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